Merge tag 'pull-target-arm-20240701' of https://git.linaro.org/people/pmaydell/qemu...
[qemu/kevin.git] / target / riscv / cpu_cfg.h
blobfb7eebde523bd2b8b828ac6ba52f07e158d7da0e
1 /*
2 * QEMU RISC-V CPU CFG
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
5 * Copyright (c) 2017-2018 SiFive, Inc.
6 * Copyright (c) 2021-2023 PLCT Lab
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2 or later, as published by the Free Software Foundation.
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
17 * You should have received a copy of the GNU General Public License along with
18 * this program. If not, see <http://www.gnu.org/licenses/>.
21 #ifndef RISCV_CPU_CFG_H
22 #define RISCV_CPU_CFG_H
25 * map is a 16-bit bitmap: the most significant set bit in map is the maximum
26 * satp mode that is supported. It may be chosen by the user and must respect
27 * what qemu implements (valid_1_10_32/64) and what the hw is capable of
28 * (supported bitmap below).
30 * init is a 16-bit bitmap used to make sure the user selected a correct
31 * configuration as per the specification.
33 * supported is a 16-bit bitmap used to reflect the hw capabilities.
35 typedef struct {
36 uint16_t map, init, supported;
37 } RISCVSATPMap;
39 struct RISCVCPUConfig {
40 bool ext_zba;
41 bool ext_zbb;
42 bool ext_zbc;
43 bool ext_zbkb;
44 bool ext_zbkc;
45 bool ext_zbkx;
46 bool ext_zbs;
47 bool ext_zca;
48 bool ext_zcb;
49 bool ext_zcd;
50 bool ext_zce;
51 bool ext_zcf;
52 bool ext_zcmp;
53 bool ext_zcmt;
54 bool ext_zk;
55 bool ext_zkn;
56 bool ext_zknd;
57 bool ext_zkne;
58 bool ext_zknh;
59 bool ext_zkr;
60 bool ext_zks;
61 bool ext_zksed;
62 bool ext_zksh;
63 bool ext_zkt;
64 bool ext_zifencei;
65 bool ext_zicntr;
66 bool ext_zicsr;
67 bool ext_zicbom;
68 bool ext_zicbop;
69 bool ext_zicboz;
70 bool ext_zicond;
71 bool ext_zihintntl;
72 bool ext_zihintpause;
73 bool ext_zihpm;
74 bool ext_ztso;
75 bool ext_smstateen;
76 bool ext_sstc;
77 bool ext_svadu;
78 bool ext_svinval;
79 bool ext_svnapot;
80 bool ext_svpbmt;
81 bool ext_zdinx;
82 bool ext_zaamo;
83 bool ext_zacas;
84 bool ext_zalrsc;
85 bool ext_zawrs;
86 bool ext_zfa;
87 bool ext_zfbfmin;
88 bool ext_zfh;
89 bool ext_zfhmin;
90 bool ext_zfinx;
91 bool ext_zhinx;
92 bool ext_zhinxmin;
93 bool ext_zve32f;
94 bool ext_zve32x;
95 bool ext_zve64f;
96 bool ext_zve64d;
97 bool ext_zve64x;
98 bool ext_zvbb;
99 bool ext_zvbc;
100 bool ext_zvkb;
101 bool ext_zvkg;
102 bool ext_zvkned;
103 bool ext_zvknha;
104 bool ext_zvknhb;
105 bool ext_zvksed;
106 bool ext_zvksh;
107 bool ext_zvkt;
108 bool ext_zvkn;
109 bool ext_zvknc;
110 bool ext_zvkng;
111 bool ext_zvks;
112 bool ext_zvksc;
113 bool ext_zvksg;
114 bool ext_zmmul;
115 bool ext_zvfbfmin;
116 bool ext_zvfbfwma;
117 bool ext_zvfh;
118 bool ext_zvfhmin;
119 bool ext_smaia;
120 bool ext_ssaia;
121 bool ext_sscofpmf;
122 bool ext_smepmp;
123 bool rvv_ta_all_1s;
124 bool rvv_ma_all_1s;
126 uint32_t mvendorid;
127 uint64_t marchid;
128 uint64_t mimpid;
130 /* Named features */
131 bool ext_svade;
132 bool ext_zic64b;
135 * Always 'true' booleans for named features
136 * TCG always implement/can't be user disabled,
137 * based on spec version.
139 bool has_priv_1_13;
140 bool has_priv_1_12;
141 bool has_priv_1_11;
143 /* Vendor-specific custom extensions */
144 bool ext_xtheadba;
145 bool ext_xtheadbb;
146 bool ext_xtheadbs;
147 bool ext_xtheadcmo;
148 bool ext_xtheadcondmov;
149 bool ext_xtheadfmemidx;
150 bool ext_xtheadfmv;
151 bool ext_xtheadmac;
152 bool ext_xtheadmemidx;
153 bool ext_xtheadmempair;
154 bool ext_xtheadsync;
155 bool ext_XVentanaCondOps;
157 uint32_t pmu_mask;
158 uint16_t vlenb;
159 uint16_t elen;
160 uint16_t cbom_blocksize;
161 uint16_t cbop_blocksize;
162 uint16_t cboz_blocksize;
163 bool mmu;
164 bool pmp;
165 bool debug;
166 bool misa_w;
168 bool short_isa_string;
170 #ifndef CONFIG_USER_ONLY
171 RISCVSATPMap satp_mode;
172 #endif
175 typedef struct RISCVCPUConfig RISCVCPUConfig;
177 /* Helper functions to test for extensions. */
179 static inline bool always_true_p(const RISCVCPUConfig *cfg __attribute__((__unused__)))
181 return true;
184 static inline bool has_xthead_p(const RISCVCPUConfig *cfg)
186 return cfg->ext_xtheadba || cfg->ext_xtheadbb ||
187 cfg->ext_xtheadbs || cfg->ext_xtheadcmo ||
188 cfg->ext_xtheadcondmov ||
189 cfg->ext_xtheadfmemidx || cfg->ext_xtheadfmv ||
190 cfg->ext_xtheadmac || cfg->ext_xtheadmemidx ||
191 cfg->ext_xtheadmempair || cfg->ext_xtheadsync;
194 #define MATERIALISE_EXT_PREDICATE(ext) \
195 static inline bool has_ ## ext ## _p(const RISCVCPUConfig *cfg) \
197 return cfg->ext_ ## ext ; \
200 MATERIALISE_EXT_PREDICATE(xtheadba)
201 MATERIALISE_EXT_PREDICATE(xtheadbb)
202 MATERIALISE_EXT_PREDICATE(xtheadbs)
203 MATERIALISE_EXT_PREDICATE(xtheadcmo)
204 MATERIALISE_EXT_PREDICATE(xtheadcondmov)
205 MATERIALISE_EXT_PREDICATE(xtheadfmemidx)
206 MATERIALISE_EXT_PREDICATE(xtheadfmv)
207 MATERIALISE_EXT_PREDICATE(xtheadmac)
208 MATERIALISE_EXT_PREDICATE(xtheadmemidx)
209 MATERIALISE_EXT_PREDICATE(xtheadmempair)
210 MATERIALISE_EXT_PREDICATE(xtheadsync)
211 MATERIALISE_EXT_PREDICATE(XVentanaCondOps)
213 #endif