2 * host-signal.h: signal info dependent on the host architecture
4 * Copyright (c) 2003-2005 Fabrice Bellard
5 * Copyright (c) 2021 Linaro Limited
7 * This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
8 * See the COPYING file in the top-level directory.
11 #ifndef S390_HOST_SIGNAL_H
12 #define S390_HOST_SIGNAL_H
14 /* The third argument to a SA_SIGINFO handler is ucontext_t. */
15 typedef ucontext_t host_sigcontext
;
17 static inline uintptr_t host_signal_pc(host_sigcontext
*uc
)
19 return uc
->uc_mcontext
.psw
.addr
;
22 static inline void host_signal_set_pc(host_sigcontext
*uc
, uintptr_t pc
)
24 uc
->uc_mcontext
.psw
.addr
= pc
;
27 static inline void *host_signal_mask(host_sigcontext
*uc
)
29 return &uc
->uc_sigmask
;
32 static inline bool host_signal_write(siginfo_t
*info
, host_sigcontext
*uc
)
34 uint16_t *pinsn
= (uint16_t *)host_signal_pc(uc
);
37 * ??? On linux, the non-rt signal handler has 4 (!) arguments instead
38 * of the normal 2 arguments. The 4th argument contains the "Translation-
39 * Exception Identification for DAT Exceptions" from the hardware (aka
40 * "int_parm_long"), which does in fact contain the is_write value.
41 * The rt signal handler, as far as I can tell, does not give this value
42 * at all. Not that we could get to it from here even if it were.
43 * So fall back to parsing instructions. Treat read-modify-write ones as
44 * writes, which is not fully correct, but for tracking self-modifying code
45 * this is better than treating them as reads. Checking si_addr page flags
46 * might be a viable improvement, albeit a racy one.
48 /* ??? This is not even close to complete. */
49 switch (pinsn
[0] >> 8) {
57 case 0xc4: /* RIL format insns */
58 switch (pinsn
[0] & 0xf) {
65 case 0xc6: /* RIL-b format insns */
66 switch (pinsn
[0] & 0xf) {
71 case 0xc8: /* SSF format insns */
72 switch (pinsn
[0] & 0xf) {
77 case 0xe3: /* RXY format insns */
78 switch (pinsn
[2] & 0xff) {
84 case 0x3f: /* STRVH */
86 case 0x2f: /* STRVG */
91 switch (pinsn
[2] & 0xff) {
92 case 0x09: /* VSTEBRH */
93 case 0x0a: /* VSTEBRG */
94 case 0x0b: /* VSTEBRF */
95 case 0x0e: /* VSTBR */
96 case 0x0f: /* VSTER */
97 case 0x3f: /* VSTRLR */
102 switch (pinsn
[2] & 0xff) {
103 case 0x08: /* VSTEB */
104 case 0x09: /* VSTEH */
105 case 0x0a: /* VSTEG */
106 case 0x0b: /* VSTEF */
108 case 0x1a: /* VSCEG */
109 case 0x1b: /* VSCEF */
110 case 0x3e: /* VSTM */
111 case 0x3f: /* VSTL */
115 case 0xeb: /* RSY format insns */
116 switch (pinsn
[2] & 0xff) {
119 case 0x31: /* CDSY */
120 case 0x3e: /* CDSG */
121 case 0xe4: /* LANG */
122 case 0xe6: /* LAOG */
123 case 0xe7: /* LAXG */
124 case 0xe8: /* LAAG */
125 case 0xea: /* LAALG */
129 case 0xfa: /* LAAL */