hw/core/machine.c

   1 /*
   2  * QEMU Machine
   3  *
   4  * Copyright (C) 2014 Red Hat Inc
   5  *
   6  * Authors:
   7  *   Marcel Apfelbaum <marcel.a@redhat.com>
   8  *
   9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
  10  * See the COPYING file in the top-level directory.
  11  */
  12
  13 #include "qemu/osdep.h"
  14 #include "qemu/accel.h"
  15 #include "sysemu/replay.h"
  16 #include "hw/boards.h"
  17 #include "hw/loader.h"
  18 #include "qapi/error.h"
  19 #include "qapi/qapi-visit-machine.h"
  20 #include "qemu/madvise.h"
  21 #include "qom/object_interfaces.h"
  22 #include "sysemu/cpus.h"
  23 #include "sysemu/sysemu.h"
  24 #include "sysemu/reset.h"
  25 #include "sysemu/runstate.h"
  26 #include "sysemu/xen.h"
  27 #include "sysemu/qtest.h"
  28 #include "hw/pci/pci_bridge.h"
  29 #include "hw/mem/nvdimm.h"
  30 #include "migration/global_state.h"
  31 #include "exec/confidential-guest-support.h"
  32 #include "hw/virtio/virtio-pci.h"
  33 #include "hw/virtio/virtio-net.h"
  34 #include "hw/virtio/virtio-iommu.h"
  35 #include "audio/audio.h"
  36
  37 GlobalProperty hw_compat_9_0[] = {
  38     {"arm-cpu", "backcompat-cntfrq", "true" },
  39     { "scsi-hd", "migrate-emulated-scsi-request", "false" },
  40     { "scsi-cd", "migrate-emulated-scsi-request", "false" },
  41     {"vfio-pci", "skip-vsc-check", "false" },
  42     { "virtio-pci", "x-pcie-pm-no-soft-reset", "off" },
  43     {"sd-card", "spec_version", "2" },
  44 };
  45 const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0);
  46
  47 GlobalProperty hw_compat_8_2[] = {
  48     { "migration", "zero-page-detection", "legacy"},
  49     { TYPE_VIRTIO_IOMMU_PCI, "granule", "4k" },
  50     { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "64" },
  51     { "virtio-gpu-device", "x-scanout-vmstate-version", "1" },
  52 };
  53 const size_t hw_compat_8_2_len = G_N_ELEMENTS(hw_compat_8_2);
  54
  55 GlobalProperty hw_compat_8_1[] = {
  56     { TYPE_PCI_BRIDGE, "x-pci-express-writeable-slt-bug", "true" },
  57     { "ramfb", "x-migrate", "off" },
  58     { "vfio-pci-nohotplug", "x-ramfb-migrate", "off" },
  59     { "igb", "x-pcie-flr-init", "off" },
  60     { TYPE_VIRTIO_NET, "host_uso", "off"},
  61     { TYPE_VIRTIO_NET, "guest_uso4", "off"},
  62     { TYPE_VIRTIO_NET, "guest_uso6", "off"},
  63 };
  64 const size_t hw_compat_8_1_len = G_N_ELEMENTS(hw_compat_8_1);
  65
  66 GlobalProperty hw_compat_8_0[] = {
  67     { "migration", "multifd-flush-after-each-section", "on"},
  68     { TYPE_PCI_DEVICE, "x-pcie-ari-nextfn-1", "on" },
  69 };
  70 const size_t hw_compat_8_0_len = G_N_ELEMENTS(hw_compat_8_0);
  71
  72 GlobalProperty hw_compat_7_2[] = {
  73     { "e1000e", "migrate-timadj", "off" },
  74     { "virtio-mem", "x-early-migration", "false" },
  75     { "migration", "x-preempt-pre-7-2", "true" },
  76     { TYPE_PCI_DEVICE, "x-pcie-err-unc-mask", "off" },
  77 };
  78 const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2);
  79
  80 GlobalProperty hw_compat_7_1[] = {
  81     { "virtio-device", "queue_reset", "false" },
  82     { "virtio-rng-pci", "vectors", "0" },
  83     { "virtio-rng-pci-transitional", "vectors", "0" },
  84     { "virtio-rng-pci-non-transitional", "vectors", "0" },
  85 };
  86 const size_t hw_compat_7_1_len = G_N_ELEMENTS(hw_compat_7_1);
  87
  88 GlobalProperty hw_compat_7_0[] = {
  89     { "arm-gicv3-common", "force-8-bit-prio", "on" },
  90     { "nvme-ns", "eui64-default", "on"},
  91 };
  92 const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0);
  93
  94 GlobalProperty hw_compat_6_2[] = {
  95     { "PIIX4_PM", "x-not-migrate-acpi-index", "on"},
  96 };
  97 const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2);
  98
  99 GlobalProperty hw_compat_6_1[] = {
 100     { "vhost-user-vsock-device", "seqpacket", "off" },
 101     { "nvme-ns", "shared", "off" },
 102 };
 103 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1);
 104
 105 GlobalProperty hw_compat_6_0[] = {
 106     { "gpex-pcihost", "allow-unmapped-accesses", "false" },
 107     { "i8042", "extended-state", "false"},
 108     { "nvme-ns", "eui64-default", "off"},
 109     { "e1000", "init-vet", "off" },
 110     { "e1000e", "init-vet", "off" },
 111     { "vhost-vsock-device", "seqpacket", "off" },
 112 };
 113 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0);
 114
 115 GlobalProperty hw_compat_5_2[] = {
 116     { "ICH9-LPC", "smm-compat", "on"},
 117     { "PIIX4_PM", "smm-compat", "on"},
 118     { "virtio-blk-device", "report-discard-granularity", "off" },
 119     { "virtio-net-pci-base", "vectors", "3"},
 120     { "nvme", "msix-exclusive-bar", "on"},
 121 };
 122 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2);
 123
 124 GlobalProperty hw_compat_5_1[] = {
 125     { "vhost-scsi", "num_queues", "1"},
 126     { "vhost-user-blk", "num-queues", "1"},
 127     { "vhost-user-scsi", "num_queues", "1"},
 128     { "virtio-blk-device", "num-queues", "1"},
 129     { "virtio-scsi-device", "num_queues", "1"},
 130     { "nvme", "use-intel-id", "on"},
 131     { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
 132     { "pl011", "migrate-clk", "off" },
 133     { "virtio-pci", "x-ats-page-aligned", "off"},
 134 };
 135 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1);
 136
 137 GlobalProperty hw_compat_5_0[] = {
 138     { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
 139     { "virtio-balloon-device", "page-poison", "false" },
 140     { "vmport", "x-read-set-eax", "off" },
 141     { "vmport", "x-signal-unsupported-cmd", "off" },
 142     { "vmport", "x-report-vmx-type", "off" },
 143     { "vmport", "x-cmds-v2", "off" },
 144     { "virtio-device", "x-disable-legacy-check", "true" },
 145 };
 146 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0);
 147
 148 GlobalProperty hw_compat_4_2[] = {
 149     { "virtio-blk-device", "queue-size", "128"},
 150     { "virtio-scsi-device", "virtqueue_size", "128"},
 151     { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
 152     { "virtio-blk-device", "seg-max-adjust", "off"},
 153     { "virtio-scsi-device", "seg_max_adjust", "off"},
 154     { "vhost-blk-device", "seg_max_adjust", "off"},
 155     { "usb-host", "suppress-remote-wake", "off" },
 156     { "usb-redir", "suppress-remote-wake", "off" },
 157     { "qxl", "revision", "4" },
 158     { "qxl-vga", "revision", "4" },
 159     { "fw_cfg", "acpi-mr-restore", "false" },
 160     { "virtio-device", "use-disabled-flag", "false" },
 161 };
 162 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
 163
 164 GlobalProperty hw_compat_4_1[] = {
 165     { "virtio-pci", "x-pcie-flr-init", "off" },
 166 };
 167 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
 168
 169 GlobalProperty hw_compat_4_0[] = {
 170     { "VGA",            "edid", "false" },
 171     { "secondary-vga",  "edid", "false" },
 172     { "bochs-display",  "edid", "false" },
 173     { "virtio-vga",     "edid", "false" },
 174     { "virtio-gpu-device", "edid", "false" },
 175     { "virtio-device", "use-started", "false" },
 176     { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
 177     { "pl031", "migrate-tick-offset", "false" },
 178 };
 179 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
 180
 181 GlobalProperty hw_compat_3_1[] = {
 182     { "pcie-root-port", "x-speed", "2_5" },
 183     { "pcie-root-port", "x-width", "1" },
 184     { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
 185     { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
 186     { "tpm-crb", "ppi", "false" },
 187     { "tpm-tis", "ppi", "false" },
 188     { "usb-kbd", "serial", "42" },
 189     { "usb-mouse", "serial", "42" },
 190     { "usb-tablet", "serial", "42" },
 191     { "virtio-blk-device", "discard", "false" },
 192     { "virtio-blk-device", "write-zeroes", "false" },
 193     { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
 194     { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
 195 };
 196 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
 197
 198 GlobalProperty hw_compat_3_0[] = {};
 199 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
 200
 201 GlobalProperty hw_compat_2_12[] = {
 202     { "hda-audio", "use-timer", "false" },
 203     { "cirrus-vga", "global-vmstate", "true" },
 204     { "VGA", "global-vmstate", "true" },
 205     { "vmware-svga", "global-vmstate", "true" },
 206     { "qxl-vga", "global-vmstate", "true" },
 207 };
 208 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
 209
 210 GlobalProperty hw_compat_2_11[] = {
 211     { "hpet", "hpet-offset-saved", "false" },
 212     { "virtio-blk-pci", "vectors", "2" },
 213     { "vhost-user-blk-pci", "vectors", "2" },
 214     { "e1000", "migrate_tso_props", "off" },
 215 };
 216 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
 217
 218 GlobalProperty hw_compat_2_10[] = {
 219     { "virtio-mouse-device", "wheel-axis", "false" },
 220     { "virtio-tablet-device", "wheel-axis", "false" },
 221 };
 222 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
 223
 224 GlobalProperty hw_compat_2_9[] = {
 225     { "pci-bridge", "shpc", "off" },
 226     { "intel-iommu", "pt", "off" },
 227     { "virtio-net-device", "x-mtu-bypass-backend", "off" },
 228     { "pcie-root-port", "x-migrate-msix", "false" },
 229 };
 230 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
 231
 232 GlobalProperty hw_compat_2_8[] = {
 233     { "fw_cfg_mem", "x-file-slots", "0x10" },
 234     { "fw_cfg_io", "x-file-slots", "0x10" },
 235     { "pflash_cfi01", "old-multiple-chip-handling", "on" },
 236     { "pci-bridge", "shpc", "on" },
 237     { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
 238     { "virtio-pci", "x-pcie-deverr-init", "off" },
 239     { "virtio-pci", "x-pcie-lnkctl-init", "off" },
 240     { "virtio-pci", "x-pcie-pm-init", "off" },
 241     { "cirrus-vga", "vgamem_mb", "8" },
 242     { "isa-cirrus-vga", "vgamem_mb", "8" },
 243 };
 244 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
 245
 246 GlobalProperty hw_compat_2_7[] = {
 247     { "virtio-pci", "page-per-vq", "on" },
 248     { "virtio-serial-device", "emergency-write", "off" },
 249     { "ioapic", "version", "0x11" },
 250     { "intel-iommu", "x-buggy-eim", "true" },
 251     { "virtio-pci", "x-ignore-backend-features", "on" },
 252 };
 253 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
 254
 255 GlobalProperty hw_compat_2_6[] = {
 256     { "virtio-mmio", "format_transport_address", "off" },
 257     /* Optional because not all virtio-pci devices support legacy mode */
 258     { "virtio-pci", "disable-modern", "on",  .optional = true },
 259     { "virtio-pci", "disable-legacy", "off", .optional = true },
 260 };
 261 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
 262
 263 GlobalProperty hw_compat_2_5[] = {
 264     { "isa-fdc", "fallback", "144" },
 265     { "pvscsi", "x-old-pci-configuration", "on" },
 266     { "pvscsi", "x-disable-pcie", "on" },
 267     { "vmxnet3", "x-old-msi-offsets", "on" },
 268     { "vmxnet3", "x-disable-pcie", "on" },
 269 };
 270 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
 271
 272 GlobalProperty hw_compat_2_4[] = {
 273     { "e1000", "extra_mac_registers", "off" },
 274     { "virtio-pci", "x-disable-pcie", "on" },
 275     { "virtio-pci", "migrate-extra", "off" },
 276     { "fw_cfg_mem", "dma_enabled", "off" },
 277     { "fw_cfg_io", "dma_enabled", "off" }
 278 };
 279 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
 280
 281 GlobalProperty hw_compat_2_3[] = {
 282     { "virtio-blk-pci", "any_layout", "off" },
 283     { "virtio-balloon-pci", "any_layout", "off" },
 284     { "virtio-serial-pci", "any_layout", "off" },
 285     { "virtio-9p-pci", "any_layout", "off" },
 286     { "virtio-rng-pci", "any_layout", "off" },
 287     { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
 288     { "migration", "send-configuration", "off" },
 289     { "migration", "send-section-footer", "off" },
 290     { "migration", "store-global-state", "off" },
 291 };
 292 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
 293
 294 GlobalProperty hw_compat_2_2[] = {};
 295 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
 296
 297 GlobalProperty hw_compat_2_1[] = {
 298     { "intel-hda", "old_msi_addr", "on" },
 299     { "VGA", "qemu-extended-regs", "off" },
 300     { "secondary-vga", "qemu-extended-regs", "off" },
 301     { "virtio-scsi-pci", "any_layout", "off" },
 302     { "usb-mouse", "usb_version", "1" },
 303     { "usb-kbd", "usb_version", "1" },
 304     { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
 305 };
 306 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
 307
 308 MachineState *current_machine;
 309
 310 static char *machine_get_kernel(Object *obj, Error **errp)
 311 {
 312     MachineState *ms = MACHINE(obj);
 313
 314     return g_strdup(ms->kernel_filename);
 315 }
 316
 317 static void machine_set_kernel(Object *obj, const char *value, Error **errp)
 318 {
 319     MachineState *ms = MACHINE(obj);
 320
 321     g_free(ms->kernel_filename);
 322     ms->kernel_filename = g_strdup(value);
 323 }
 324
 325 static char *machine_get_initrd(Object *obj, Error **errp)
 326 {
 327     MachineState *ms = MACHINE(obj);
 328
 329     return g_strdup(ms->initrd_filename);
 330 }
 331
 332 static void machine_set_initrd(Object *obj, const char *value, Error **errp)
 333 {
 334     MachineState *ms = MACHINE(obj);
 335
 336     g_free(ms->initrd_filename);
 337     ms->initrd_filename = g_strdup(value);
 338 }
 339
 340 static char *machine_get_append(Object *obj, Error **errp)
 341 {
 342     MachineState *ms = MACHINE(obj);
 343
 344     return g_strdup(ms->kernel_cmdline);
 345 }
 346
 347 static void machine_set_append(Object *obj, const char *value, Error **errp)
 348 {
 349     MachineState *ms = MACHINE(obj);
 350
 351     g_free(ms->kernel_cmdline);
 352     ms->kernel_cmdline = g_strdup(value);
 353 }
 354
 355 static char *machine_get_dtb(Object *obj, Error **errp)
 356 {
 357     MachineState *ms = MACHINE(obj);
 358
 359     return g_strdup(ms->dtb);
 360 }
 361
 362 static void machine_set_dtb(Object *obj, const char *value, Error **errp)
 363 {
 364     MachineState *ms = MACHINE(obj);
 365
 366     g_free(ms->dtb);
 367     ms->dtb = g_strdup(value);
 368 }
 369
 370 static char *machine_get_dumpdtb(Object *obj, Error **errp)
 371 {
 372     MachineState *ms = MACHINE(obj);
 373
 374     return g_strdup(ms->dumpdtb);
 375 }
 376
 377 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
 378 {
 379     MachineState *ms = MACHINE(obj);
 380
 381     g_free(ms->dumpdtb);
 382     ms->dumpdtb = g_strdup(value);
 383 }
 384
 385 static void machine_get_phandle_start(Object *obj, Visitor *v,
 386                                       const char *name, void *opaque,
 387                                       Error **errp)
 388 {
 389     MachineState *ms = MACHINE(obj);
 390     int64_t value = ms->phandle_start;
 391
 392     visit_type_int(v, name, &value, errp);
 393 }
 394
 395 static void machine_set_phandle_start(Object *obj, Visitor *v,
 396                                       const char *name, void *opaque,
 397                                       Error **errp)
 398 {
 399     MachineState *ms = MACHINE(obj);
 400     int64_t value;
 401
 402     if (!visit_type_int(v, name, &value, errp)) {
 403         return;
 404     }
 405
 406     ms->phandle_start = value;
 407 }
 408
 409 static char *machine_get_dt_compatible(Object *obj, Error **errp)
 410 {
 411     MachineState *ms = MACHINE(obj);
 412
 413     return g_strdup(ms->dt_compatible);
 414 }
 415
 416 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
 417 {
 418     MachineState *ms = MACHINE(obj);
 419
 420     g_free(ms->dt_compatible);
 421     ms->dt_compatible = g_strdup(value);
 422 }
 423
 424 static bool machine_get_dump_guest_core(Object *obj, Error **errp)
 425 {
 426     MachineState *ms = MACHINE(obj);
 427
 428     return ms->dump_guest_core;
 429 }
 430
 431 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
 432 {
 433     MachineState *ms = MACHINE(obj);
 434
 435     if (!value && QEMU_MADV_DONTDUMP == QEMU_MADV_INVALID) {
 436         error_setg(errp, "Dumping guest memory cannot be disabled on this host");
 437         return;
 438     }
 439     ms->dump_guest_core = value;
 440 }
 441
 442 static bool machine_get_mem_merge(Object *obj, Error **errp)
 443 {
 444     MachineState *ms = MACHINE(obj);
 445
 446     return ms->mem_merge;
 447 }
 448
 449 static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
 450 {
 451     MachineState *ms = MACHINE(obj);
 452
 453     if (value && QEMU_MADV_MERGEABLE == QEMU_MADV_INVALID) {
 454         error_setg(errp, "Memory merging is not supported on this host");
 455         return;
 456     }
 457     ms->mem_merge = value;
 458 }
 459
 460 static bool machine_get_usb(Object *obj, Error **errp)
 461 {
 462     MachineState *ms = MACHINE(obj);
 463
 464     return ms->usb;
 465 }
 466
 467 static void machine_set_usb(Object *obj, bool value, Error **errp)
 468 {
 469     MachineState *ms = MACHINE(obj);
 470
 471     ms->usb = value;
 472     ms->usb_disabled = !value;
 473 }
 474
 475 static bool machine_get_graphics(Object *obj, Error **errp)
 476 {
 477     MachineState *ms = MACHINE(obj);
 478
 479     return ms->enable_graphics;
 480 }
 481
 482 static void machine_set_graphics(Object *obj, bool value, Error **errp)
 483 {
 484     MachineState *ms = MACHINE(obj);
 485
 486     ms->enable_graphics = value;
 487 }
 488
 489 static char *machine_get_firmware(Object *obj, Error **errp)
 490 {
 491     MachineState *ms = MACHINE(obj);
 492
 493     return g_strdup(ms->firmware);
 494 }
 495
 496 static void machine_set_firmware(Object *obj, const char *value, Error **errp)
 497 {
 498     MachineState *ms = MACHINE(obj);
 499
 500     g_free(ms->firmware);
 501     ms->firmware = g_strdup(value);
 502 }
 503
 504 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
 505 {
 506     MachineState *ms = MACHINE(obj);
 507
 508     ms->suppress_vmdesc = value;
 509 }
 510
 511 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
 512 {
 513     MachineState *ms = MACHINE(obj);
 514
 515     return ms->suppress_vmdesc;
 516 }
 517
 518 static char *machine_get_memory_encryption(Object *obj, Error **errp)
 519 {
 520     MachineState *ms = MACHINE(obj);
 521
 522     if (ms->cgs) {
 523         return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs)));
 524     }
 525
 526     return NULL;
 527 }
 528
 529 static void machine_set_memory_encryption(Object *obj, const char *value,
 530                                         Error **errp)
 531 {
 532     Object *cgs =
 533         object_resolve_path_component(object_get_objects_root(), value);
 534
 535     if (!cgs) {
 536         error_setg(errp, "No such memory encryption object '%s'", value);
 537         return;
 538     }
 539
 540     object_property_set_link(obj, "confidential-guest-support", cgs, errp);
 541 }
 542
 543 static void machine_check_confidential_guest_support(const Object *obj,
 544                                                      const char *name,
 545                                                      Object *new_target,
 546                                                      Error **errp)
 547 {
 548     /*
 549      * So far the only constraint is that the target has the
 550      * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
 551      * by the QOM core
 552      */
 553 }
 554
 555 static bool machine_get_nvdimm(Object *obj, Error **errp)
 556 {
 557     MachineState *ms = MACHINE(obj);
 558
 559     return ms->nvdimms_state->is_enabled;
 560 }
 561
 562 static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
 563 {
 564     MachineState *ms = MACHINE(obj);
 565
 566     ms->nvdimms_state->is_enabled = value;
 567 }
 568
 569 static bool machine_get_hmat(Object *obj, Error **errp)
 570 {
 571     MachineState *ms = MACHINE(obj);
 572
 573     return ms->numa_state->hmat_enabled;
 574 }
 575
 576 static void machine_set_hmat(Object *obj, bool value, Error **errp)
 577 {
 578     MachineState *ms = MACHINE(obj);
 579
 580     ms->numa_state->hmat_enabled = value;
 581 }
 582
 583 static void machine_get_mem(Object *obj, Visitor *v, const char *name,
 584                             void *opaque, Error **errp)
 585 {
 586     MachineState *ms = MACHINE(obj);
 587     MemorySizeConfiguration mem = {
 588         .has_size = true,
 589         .size = ms->ram_size,
 590         .has_max_size = !!ms->ram_slots,
 591         .max_size = ms->maxram_size,
 592         .has_slots = !!ms->ram_slots,
 593         .slots = ms->ram_slots,
 594     };
 595     MemorySizeConfiguration *p_mem = &mem;
 596
 597     visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort);
 598 }
 599
 600 static void machine_set_mem(Object *obj, Visitor *v, const char *name,
 601                             void *opaque, Error **errp)
 602 {
 603     ERRP_GUARD();
 604     MachineState *ms = MACHINE(obj);
 605     MachineClass *mc = MACHINE_GET_CLASS(obj);
 606     MemorySizeConfiguration *mem;
 607
 608     if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) {
 609         return;
 610     }
 611
 612     if (!mem->has_size) {
 613         mem->has_size = true;
 614         mem->size = mc->default_ram_size;
 615     }
 616     mem->size = QEMU_ALIGN_UP(mem->size, 8192);
 617     if (mc->fixup_ram_size) {
 618         mem->size = mc->fixup_ram_size(mem->size);
 619     }
 620     if ((ram_addr_t)mem->size != mem->size) {
 621         error_setg(errp, "ram size too large");
 622         goto out_free;
 623     }
 624
 625     if (mem->has_max_size) {
 626         if (mem->max_size < mem->size) {
 627             error_setg(errp, "invalid value of maxmem: "
 628                        "maximum memory size (0x%" PRIx64 ") must be at least "
 629                        "the initial memory size (0x%" PRIx64 ")",
 630                        mem->max_size, mem->size);
 631             goto out_free;
 632         }
 633         if (mem->has_slots && mem->slots && mem->max_size == mem->size) {
 634             error_setg(errp, "invalid value of maxmem: "
 635                        "memory slots were specified but maximum memory size "
 636                        "(0x%" PRIx64 ") is equal to the initial memory size "
 637                        "(0x%" PRIx64 ")", mem->max_size, mem->size);
 638             goto out_free;
 639         }
 640         ms->maxram_size = mem->max_size;
 641     } else {
 642         if (mem->has_slots) {
 643             error_setg(errp, "slots specified but no max-size");
 644             goto out_free;
 645         }
 646         ms->maxram_size = mem->size;
 647     }
 648     ms->ram_size = mem->size;
 649     ms->ram_slots = mem->has_slots ? mem->slots : 0;
 650 out_free:
 651     qapi_free_MemorySizeConfiguration(mem);
 652 }
 653
 654 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
 655 {
 656     MachineState *ms = MACHINE(obj);
 657
 658     return g_strdup(ms->nvdimms_state->persistence_string);
 659 }
 660
 661 static void machine_set_nvdimm_persistence(Object *obj, const char *value,
 662                                            Error **errp)
 663 {
 664     MachineState *ms = MACHINE(obj);
 665     NVDIMMState *nvdimms_state = ms->nvdimms_state;
 666
 667     if (strcmp(value, "cpu") == 0) {
 668         nvdimms_state->persistence = 3;
 669     } else if (strcmp(value, "mem-ctrl") == 0) {
 670         nvdimms_state->persistence = 2;
 671     } else {
 672         error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
 673                    value);
 674         return;
 675     }
 676
 677     g_free(nvdimms_state->persistence_string);
 678     nvdimms_state->persistence_string = g_strdup(value);
 679 }
 680
 681 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
 682 {
 683     QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type));
 684 }
 685
 686 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev)
 687 {
 688     Object *obj = OBJECT(dev);
 689
 690     if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) {
 691         return false;
 692     }
 693
 694     return device_type_is_dynamic_sysbus(mc, object_get_typename(obj));
 695 }
 696
 697 bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type)
 698 {
 699     bool allowed = false;
 700     strList *wl;
 701     ObjectClass *klass = object_class_by_name(type);
 702
 703     for (wl = mc->allowed_dynamic_sysbus_devices;
 704          !allowed && wl;
 705          wl = wl->next) {
 706         allowed |= !!object_class_dynamic_cast(klass, wl->value);
 707     }
 708
 709     return allowed;
 710 }
 711
 712 static char *machine_get_audiodev(Object *obj, Error **errp)
 713 {
 714     MachineState *ms = MACHINE(obj);
 715
 716     return g_strdup(ms->audiodev);
 717 }
 718
 719 static void machine_set_audiodev(Object *obj, const char *value,
 720                                  Error **errp)
 721 {
 722     MachineState *ms = MACHINE(obj);
 723
 724     if (!audio_state_by_name(value, errp)) {
 725         return;
 726     }
 727
 728     g_free(ms->audiodev);
 729     ms->audiodev = g_strdup(value);
 730 }
 731
 732 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
 733 {
 734     int i;
 735     HotpluggableCPUList *head = NULL;
 736     MachineClass *mc = MACHINE_GET_CLASS(machine);
 737
 738     /* force board to initialize possible_cpus if it hasn't been done yet */
 739     mc->possible_cpu_arch_ids(machine);
 740
 741     for (i = 0; i < machine->possible_cpus->len; i++) {
 742         CPUState *cpu;
 743         HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
 744
 745         cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
 746         cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
 747         cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
 748                                    sizeof(*cpu_item->props));
 749
 750         cpu = machine->possible_cpus->cpus[i].cpu;
 751         if (cpu) {
 752             cpu_item->qom_path = object_get_canonical_path(OBJECT(cpu));
 753         }
 754         QAPI_LIST_PREPEND(head, cpu_item);
 755     }
 756     return head;
 757 }
 758
 759 /**
 760  * machine_set_cpu_numa_node:
 761  * @machine: machine object to modify
 762  * @props: specifies which cpu objects to assign to
 763  *         numa node specified by @props.node_id
 764  * @errp: if an error occurs, a pointer to an area to store the error
 765  *
 766  * Associate NUMA node specified by @props.node_id with cpu slots that
 767  * match socket/core/thread-ids specified by @props. It's recommended to use
 768  * query-hotpluggable-cpus.props values to specify affected cpu slots,
 769  * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
 770  *
 771  * However for CLI convenience it's possible to pass in subset of properties,
 772  * which would affect all cpu slots that match it.
 773  * Ex for pc machine:
 774  *    -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
 775  *    -numa cpu,node-id=0,socket_id=0 \
 776  *    -numa cpu,node-id=1,socket_id=1
 777  * will assign all child cores of socket 0 to node 0 and
 778  * of socket 1 to node 1.
 779  *
 780  * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
 781  * return error.
 782  * Empty subset is disallowed and function will return with error in this case.
 783  */
 784 void machine_set_cpu_numa_node(MachineState *machine,
 785                                const CpuInstanceProperties *props, Error **errp)
 786 {
 787     MachineClass *mc = MACHINE_GET_CLASS(machine);
 788     NodeInfo *numa_info = machine->numa_state->nodes;
 789     bool match = false;
 790     int i;
 791
 792     if (!mc->possible_cpu_arch_ids) {
 793         error_setg(errp, "mapping of CPUs to NUMA node is not supported");
 794         return;
 795     }
 796
 797     /* disabling node mapping is not supported, forbid it */
 798     assert(props->has_node_id);
 799
 800     /* force board to initialize possible_cpus if it hasn't been done yet */
 801     mc->possible_cpu_arch_ids(machine);
 802
 803     for (i = 0; i < machine->possible_cpus->len; i++) {
 804         CPUArchId *slot = &machine->possible_cpus->cpus[i];
 805
 806         /* reject unsupported by board properties */
 807         if (props->has_thread_id && !slot->props.has_thread_id) {
 808             error_setg(errp, "thread-id is not supported");
 809             return;
 810         }
 811
 812         if (props->has_core_id && !slot->props.has_core_id) {
 813             error_setg(errp, "core-id is not supported");
 814             return;
 815         }
 816
 817         if (props->has_module_id && !slot->props.has_module_id) {
 818             error_setg(errp, "module-id is not supported");
 819             return;
 820         }
 821
 822         if (props->has_cluster_id && !slot->props.has_cluster_id) {
 823             error_setg(errp, "cluster-id is not supported");
 824             return;
 825         }
 826
 827         if (props->has_socket_id && !slot->props.has_socket_id) {
 828             error_setg(errp, "socket-id is not supported");
 829             return;
 830         }
 831
 832         if (props->has_die_id && !slot->props.has_die_id) {
 833             error_setg(errp, "die-id is not supported");
 834             return;
 835         }
 836
 837         /* skip slots with explicit mismatch */
 838         if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
 839                 continue;
 840         }
 841
 842         if (props->has_core_id && props->core_id != slot->props.core_id) {
 843                 continue;
 844         }
 845
 846         if (props->has_module_id &&
 847             props->module_id != slot->props.module_id) {
 848                 continue;
 849         }
 850
 851         if (props->has_cluster_id &&
 852             props->cluster_id != slot->props.cluster_id) {
 853                 continue;
 854         }
 855
 856         if (props->has_die_id && props->die_id != slot->props.die_id) {
 857                 continue;
 858         }
 859
 860         if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
 861                 continue;
 862         }
 863
 864         /* reject assignment if slot is already assigned, for compatibility
 865          * of legacy cpu_index mapping with SPAPR core based mapping do not
 866          * error out if cpu thread and matched core have the same node-id */
 867         if (slot->props.has_node_id &&
 868             slot->props.node_id != props->node_id) {
 869             error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
 870                        slot->props.node_id);
 871             return;
 872         }
 873
 874         /* assign slot to node as it's matched '-numa cpu' key */
 875         match = true;
 876         slot->props.node_id = props->node_id;
 877         slot->props.has_node_id = props->has_node_id;
 878
 879         if (machine->numa_state->hmat_enabled) {
 880             if ((numa_info[props->node_id].initiator < MAX_NODES) &&
 881                 (props->node_id != numa_info[props->node_id].initiator)) {
 882                 error_setg(errp, "The initiator of CPU NUMA node %" PRId64
 883                            " should be itself (got %" PRIu16 ")",
 884                            props->node_id, numa_info[props->node_id].initiator);
 885                 return;
 886             }
 887             numa_info[props->node_id].has_cpu = true;
 888             numa_info[props->node_id].initiator = props->node_id;
 889         }
 890     }
 891
 892     if (!match) {
 893         error_setg(errp, "no match found");
 894     }
 895 }
 896
 897 static void machine_get_smp(Object *obj, Visitor *v, const char *name,
 898                             void *opaque, Error **errp)
 899 {
 900     MachineState *ms = MACHINE(obj);
 901     SMPConfiguration *config = &(SMPConfiguration){
 902         .has_cpus = true, .cpus = ms->smp.cpus,
 903         .has_drawers = true, .drawers = ms->smp.drawers,
 904         .has_books = true, .books = ms->smp.books,
 905         .has_sockets = true, .sockets = ms->smp.sockets,
 906         .has_dies = true, .dies = ms->smp.dies,
 907         .has_clusters = true, .clusters = ms->smp.clusters,
 908         .has_modules = true, .modules = ms->smp.modules,
 909         .has_cores = true, .cores = ms->smp.cores,
 910         .has_threads = true, .threads = ms->smp.threads,
 911         .has_maxcpus = true, .maxcpus = ms->smp.max_cpus,
 912     };
 913
 914     if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) {
 915         return;
 916     }
 917 }
 918
 919 static void machine_set_smp(Object *obj, Visitor *v, const char *name,
 920                             void *opaque, Error **errp)
 921 {
 922     MachineState *ms = MACHINE(obj);
 923     g_autoptr(SMPConfiguration) config = NULL;
 924
 925     if (!visit_type_SMPConfiguration(v, name, &config, errp)) {
 926         return;
 927     }
 928
 929     machine_parse_smp_config(ms, config, errp);
 930 }
 931
 932 static void machine_get_boot(Object *obj, Visitor *v, const char *name,
 933                             void *opaque, Error **errp)
 934 {
 935     MachineState *ms = MACHINE(obj);
 936     BootConfiguration *config = &ms->boot_config;
 937     visit_type_BootConfiguration(v, name, &config, &error_abort);
 938 }
 939
 940 static void machine_free_boot_config(MachineState *ms)
 941 {
 942     g_free(ms->boot_config.order);
 943     g_free(ms->boot_config.once);
 944     g_free(ms->boot_config.splash);
 945 }
 946
 947 static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config)
 948 {
 949     MachineClass *machine_class = MACHINE_GET_CLASS(ms);
 950
 951     machine_free_boot_config(ms);
 952     ms->boot_config = *config;
 953     if (!config->order) {
 954         ms->boot_config.order = g_strdup(machine_class->default_boot_order);
 955     }
 956 }
 957
 958 static void machine_set_boot(Object *obj, Visitor *v, const char *name,
 959                             void *opaque, Error **errp)
 960 {
 961     ERRP_GUARD();
 962     MachineState *ms = MACHINE(obj);
 963     BootConfiguration *config = NULL;
 964
 965     if (!visit_type_BootConfiguration(v, name, &config, errp)) {
 966         return;
 967     }
 968     if (config->order) {
 969         validate_bootdevices(config->order, errp);
 970         if (*errp) {
 971             goto out_free;
 972         }
 973     }
 974     if (config->once) {
 975         validate_bootdevices(config->once, errp);
 976         if (*errp) {
 977             goto out_free;
 978         }
 979     }
 980
 981     machine_copy_boot_config(ms, config);
 982     /* Strings live in ms->boot_config.  */
 983     free(config);
 984     return;
 985
 986 out_free:
 987     qapi_free_BootConfiguration(config);
 988 }
 989
 990 void machine_add_audiodev_property(MachineClass *mc)
 991 {
 992     ObjectClass *oc = OBJECT_CLASS(mc);
 993
 994     object_class_property_add_str(oc, "audiodev",
 995                                   machine_get_audiodev,
 996                                   machine_set_audiodev);
 997     object_class_property_set_description(oc, "audiodev",
 998                                           "Audiodev to use for default machine devices");
 999 }
1000
1001 static void machine_class_init(ObjectClass *oc, void *data)
1002 {
1003     MachineClass *mc = MACHINE_CLASS(oc);
1004
1005     /* Default 128 MB as guest ram size */
1006     mc->default_ram_size = 128 * MiB;
1007     mc->rom_file_has_mr = true;
1008     /*
1009      * SMBIOS 3.1.0 7.18.5 Memory Device — Extended Size
1010      * use max possible value that could be encoded into
1011      * 'Extended Size' field (2047Tb).
1012      */
1013     mc->smbios_memory_device_size = 2047 * TiB;
1014
1015     /* numa node memory size aligned on 8MB by default.
1016      * On Linux, each node's border has to be 8MB aligned
1017      */
1018     mc->numa_mem_align_shift = 23;
1019
1020     object_class_property_add_str(oc, "kernel",
1021         machine_get_kernel, machine_set_kernel);
1022     object_class_property_set_description(oc, "kernel",
1023         "Linux kernel image file");
1024
1025     object_class_property_add_str(oc, "initrd",
1026         machine_get_initrd, machine_set_initrd);
1027     object_class_property_set_description(oc, "initrd",
1028         "Linux initial ramdisk file");
1029
1030     object_class_property_add_str(oc, "append",
1031         machine_get_append, machine_set_append);
1032     object_class_property_set_description(oc, "append",
1033         "Linux kernel command line");
1034
1035     object_class_property_add_str(oc, "dtb",
1036         machine_get_dtb, machine_set_dtb);
1037     object_class_property_set_description(oc, "dtb",
1038         "Linux kernel device tree file");
1039
1040     object_class_property_add_str(oc, "dumpdtb",
1041         machine_get_dumpdtb, machine_set_dumpdtb);
1042     object_class_property_set_description(oc, "dumpdtb",
1043         "Dump current dtb to a file and quit");
1044
1045     object_class_property_add(oc, "boot", "BootConfiguration",
1046         machine_get_boot, machine_set_boot,
1047         NULL, NULL);
1048     object_class_property_set_description(oc, "boot",
1049         "Boot configuration");
1050
1051     object_class_property_add(oc, "smp", "SMPConfiguration",
1052         machine_get_smp, machine_set_smp,
1053         NULL, NULL);
1054     object_class_property_set_description(oc, "smp",
1055         "CPU topology");
1056
1057     object_class_property_add(oc, "phandle-start", "int",
1058         machine_get_phandle_start, machine_set_phandle_start,
1059         NULL, NULL);
1060     object_class_property_set_description(oc, "phandle-start",
1061         "The first phandle ID we may generate dynamically");
1062
1063     object_class_property_add_str(oc, "dt-compatible",
1064         machine_get_dt_compatible, machine_set_dt_compatible);
1065     object_class_property_set_description(oc, "dt-compatible",
1066         "Overrides the \"compatible\" property of the dt root node");
1067
1068     object_class_property_add_bool(oc, "dump-guest-core",
1069         machine_get_dump_guest_core, machine_set_dump_guest_core);
1070     object_class_property_set_description(oc, "dump-guest-core",
1071         "Include guest memory in a core dump");
1072
1073     object_class_property_add_bool(oc, "mem-merge",
1074         machine_get_mem_merge, machine_set_mem_merge);
1075     object_class_property_set_description(oc, "mem-merge",
1076         "Enable/disable memory merge support");
1077
1078     object_class_property_add_bool(oc, "usb",
1079         machine_get_usb, machine_set_usb);
1080     object_class_property_set_description(oc, "usb",
1081         "Set on/off to enable/disable usb");
1082
1083     object_class_property_add_bool(oc, "graphics",
1084         machine_get_graphics, machine_set_graphics);
1085     object_class_property_set_description(oc, "graphics",
1086         "Set on/off to enable/disable graphics emulation");
1087
1088     object_class_property_add_str(oc, "firmware",
1089         machine_get_firmware, machine_set_firmware);
1090     object_class_property_set_description(oc, "firmware",
1091         "Firmware image");
1092
1093     object_class_property_add_bool(oc, "suppress-vmdesc",
1094         machine_get_suppress_vmdesc, machine_set_suppress_vmdesc);
1095     object_class_property_set_description(oc, "suppress-vmdesc",
1096         "Set on to disable self-describing migration");
1097
1098     object_class_property_add_link(oc, "confidential-guest-support",
1099                                    TYPE_CONFIDENTIAL_GUEST_SUPPORT,
1100                                    offsetof(MachineState, cgs),
1101                                    machine_check_confidential_guest_support,
1102                                    OBJ_PROP_LINK_STRONG);
1103     object_class_property_set_description(oc, "confidential-guest-support",
1104                                           "Set confidential guest scheme to support");
1105
1106     /* For compatibility */
1107     object_class_property_add_str(oc, "memory-encryption",
1108         machine_get_memory_encryption, machine_set_memory_encryption);
1109     object_class_property_set_description(oc, "memory-encryption",
1110         "Set memory encryption object to use");
1111
1112     object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKEND,
1113                                    offsetof(MachineState, memdev), object_property_allow_set_link,
1114                                    OBJ_PROP_LINK_STRONG);
1115     object_class_property_set_description(oc, "memory-backend",
1116                                           "Set RAM backend"
1117                                           "Valid value is ID of hostmem based backend");
1118
1119     object_class_property_add(oc, "memory", "MemorySizeConfiguration",
1120         machine_get_mem, machine_set_mem,
1121         NULL, NULL);
1122     object_class_property_set_description(oc, "memory",
1123         "Memory size configuration");
1124 }
1125
1126 static void machine_class_base_init(ObjectClass *oc, void *data)
1127 {
1128     MachineClass *mc = MACHINE_CLASS(oc);
1129     mc->max_cpus = mc->max_cpus ?: 1;
1130     mc->min_cpus = mc->min_cpus ?: 1;
1131     mc->default_cpus = mc->default_cpus ?: 1;
1132
1133     if (!object_class_is_abstract(oc)) {
1134         const char *cname = object_class_get_name(oc);
1135         assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
1136         mc->name = g_strndup(cname,
1137                             strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
1138         mc->compat_props = g_ptr_array_new();
1139     }
1140 }
1141
1142 static void machine_initfn(Object *obj)
1143 {
1144     MachineState *ms = MACHINE(obj);
1145     MachineClass *mc = MACHINE_GET_CLASS(obj);
1146
1147     container_get(obj, "/peripheral");
1148     container_get(obj, "/peripheral-anon");
1149
1150     ms->dump_guest_core = true;
1151     ms->mem_merge = (QEMU_MADV_MERGEABLE != QEMU_MADV_INVALID);
1152     ms->enable_graphics = true;
1153     ms->kernel_cmdline = g_strdup("");
1154     ms->ram_size = mc->default_ram_size;
1155     ms->maxram_size = mc->default_ram_size;
1156
1157     if (mc->nvdimm_supported) {
1158         ms->nvdimms_state = g_new0(NVDIMMState, 1);
1159         object_property_add_bool(obj, "nvdimm",
1160                                  machine_get_nvdimm, machine_set_nvdimm);
1161         object_property_set_description(obj, "nvdimm",
1162                                         "Set on/off to enable/disable "
1163                                         "NVDIMM instantiation");
1164
1165         object_property_add_str(obj, "nvdimm-persistence",
1166                                 machine_get_nvdimm_persistence,
1167                                 machine_set_nvdimm_persistence);
1168         object_property_set_description(obj, "nvdimm-persistence",
1169                                         "Set NVDIMM persistence"
1170                                         "Valid values are cpu, mem-ctrl");
1171     }
1172
1173     if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
1174         ms->numa_state = g_new0(NumaState, 1);
1175         object_property_add_bool(obj, "hmat",
1176                                  machine_get_hmat, machine_set_hmat);
1177         object_property_set_description(obj, "hmat",
1178                                         "Set on/off to enable/disable "
1179                                         "ACPI Heterogeneous Memory Attribute "
1180                                         "Table (HMAT)");
1181     }
1182
1183     /* default to mc->default_cpus */
1184     ms->smp.cpus = mc->default_cpus;
1185     ms->smp.max_cpus = mc->default_cpus;
1186     ms->smp.drawers = 1;
1187     ms->smp.books = 1;
1188     ms->smp.sockets = 1;
1189     ms->smp.dies = 1;
1190     ms->smp.clusters = 1;
1191     ms->smp.modules = 1;
1192     ms->smp.cores = 1;
1193     ms->smp.threads = 1;
1194
1195     machine_copy_boot_config(ms, &(BootConfiguration){ 0 });
1196 }
1197
1198 static void machine_finalize(Object *obj)
1199 {
1200     MachineState *ms = MACHINE(obj);
1201
1202     machine_free_boot_config(ms);
1203     g_free(ms->kernel_filename);
1204     g_free(ms->initrd_filename);
1205     g_free(ms->kernel_cmdline);
1206     g_free(ms->dtb);
1207     g_free(ms->dumpdtb);
1208     g_free(ms->dt_compatible);
1209     g_free(ms->firmware);
1210     g_free(ms->device_memory);
1211     g_free(ms->nvdimms_state);
1212     g_free(ms->numa_state);
1213     g_free(ms->audiodev);
1214 }
1215
1216 bool machine_usb(MachineState *machine)
1217 {
1218     return machine->usb;
1219 }
1220
1221 int machine_phandle_start(MachineState *machine)
1222 {
1223     return machine->phandle_start;
1224 }
1225
1226 bool machine_dump_guest_core(MachineState *machine)
1227 {
1228     return machine->dump_guest_core;
1229 }
1230
1231 bool machine_mem_merge(MachineState *machine)
1232 {
1233     return machine->mem_merge;
1234 }
1235
1236 bool machine_require_guest_memfd(MachineState *machine)
1237 {
1238     return machine->cgs && machine->cgs->require_guest_memfd;
1239 }
1240
1241 static char *cpu_slot_to_string(const CPUArchId *cpu)
1242 {
1243     GString *s = g_string_new(NULL);
1244     if (cpu->props.has_socket_id) {
1245         g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
1246     }
1247     if (cpu->props.has_die_id) {
1248         if (s->len) {
1249             g_string_append_printf(s, ", ");
1250         }
1251         g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
1252     }
1253     if (cpu->props.has_cluster_id) {
1254         if (s->len) {
1255             g_string_append_printf(s, ", ");
1256         }
1257         g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id);
1258     }
1259     if (cpu->props.has_module_id) {
1260         if (s->len) {
1261             g_string_append_printf(s, ", ");
1262         }
1263         g_string_append_printf(s, "module-id: %"PRId64, cpu->props.module_id);
1264     }
1265     if (cpu->props.has_core_id) {
1266         if (s->len) {
1267             g_string_append_printf(s, ", ");
1268         }
1269         g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
1270     }
1271     if (cpu->props.has_thread_id) {
1272         if (s->len) {
1273             g_string_append_printf(s, ", ");
1274         }
1275         g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
1276     }
1277     return g_string_free(s, false);
1278 }
1279
1280 static void numa_validate_initiator(NumaState *numa_state)
1281 {
1282     int i;
1283     NodeInfo *numa_info = numa_state->nodes;
1284
1285     for (i = 0; i < numa_state->num_nodes; i++) {
1286         if (numa_info[i].initiator == MAX_NODES) {
1287             continue;
1288         }
1289
1290         if (!numa_info[numa_info[i].initiator].present) {
1291             error_report("NUMA node %" PRIu16 " is missing, use "
1292                          "'-numa node' option to declare it first",
1293                          numa_info[i].initiator);
1294             exit(1);
1295         }
1296
1297         if (!numa_info[numa_info[i].initiator].has_cpu) {
1298             error_report("The initiator of NUMA node %d is invalid", i);
1299             exit(1);
1300         }
1301     }
1302 }
1303
1304 static void machine_numa_finish_cpu_init(MachineState *machine)
1305 {
1306     int i;
1307     bool default_mapping;
1308     GString *s = g_string_new(NULL);
1309     MachineClass *mc = MACHINE_GET_CLASS(machine);
1310     const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
1311
1312     assert(machine->numa_state->num_nodes);
1313     for (i = 0; i < possible_cpus->len; i++) {
1314         if (possible_cpus->cpus[i].props.has_node_id) {
1315             break;
1316         }
1317     }
1318     default_mapping = (i == possible_cpus->len);
1319
1320     for (i = 0; i < possible_cpus->len; i++) {
1321         const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
1322
1323         if (!cpu_slot->props.has_node_id) {
1324             /* fetch default mapping from board and enable it */
1325             CpuInstanceProperties props = cpu_slot->props;
1326
1327             props.node_id = mc->get_default_cpu_node_id(machine, i);
1328             if (!default_mapping) {
1329                 /* record slots with not set mapping,
1330                  * TODO: make it hard error in future */
1331                 char *cpu_str = cpu_slot_to_string(cpu_slot);
1332                 g_string_append_printf(s, "%sCPU %d [%s]",
1333                                        s->len ? ", " : "", i, cpu_str);
1334                 g_free(cpu_str);
1335
1336                 /* non mapped cpus used to fallback to node 0 */
1337                 props.node_id = 0;
1338             }
1339
1340             props.has_node_id = true;
1341             machine_set_cpu_numa_node(machine, &props, &error_fatal);
1342         }
1343     }
1344
1345     if (machine->numa_state->hmat_enabled) {
1346         numa_validate_initiator(machine->numa_state);
1347     }
1348
1349     if (s->len && !qtest_enabled()) {
1350         warn_report("CPU(s) not present in any NUMA nodes: %s",
1351                     s->str);
1352         warn_report("All CPU(s) up to maxcpus should be described "
1353                     "in NUMA config, ability to start up with partial NUMA "
1354                     "mappings is obsoleted and will be removed in future");
1355     }
1356     g_string_free(s, true);
1357 }
1358
1359 static void validate_cpu_cluster_to_numa_boundary(MachineState *ms)
1360 {
1361     MachineClass *mc = MACHINE_GET_CLASS(ms);
1362     NumaState *state = ms->numa_state;
1363     const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms);
1364     const CPUArchId *cpus = possible_cpus->cpus;
1365     int i, j;
1366
1367     if (qtest_enabled() || state->num_nodes <= 1 || possible_cpus->len <= 1) {
1368         return;
1369     }
1370
1371     /*
1372      * The Linux scheduling domain can't be parsed when the multiple CPUs
1373      * in one cluster have been associated with different NUMA nodes. However,
1374      * it's fine to associate one NUMA node with CPUs in different clusters.
1375      */
1376     for (i = 0; i < possible_cpus->len; i++) {
1377         for (j = i + 1; j < possible_cpus->len; j++) {
1378             if (cpus[i].props.has_socket_id &&
1379                 cpus[i].props.has_cluster_id &&
1380                 cpus[i].props.has_node_id &&
1381                 cpus[j].props.has_socket_id &&
1382                 cpus[j].props.has_cluster_id &&
1383                 cpus[j].props.has_node_id &&
1384                 cpus[i].props.socket_id == cpus[j].props.socket_id &&
1385                 cpus[i].props.cluster_id == cpus[j].props.cluster_id &&
1386                 cpus[i].props.node_id != cpus[j].props.node_id) {
1387                 warn_report("CPU-%d and CPU-%d in socket-%" PRId64 "-cluster-%" PRId64
1388                              " have been associated with node-%" PRId64 " and node-%" PRId64
1389                              " respectively. It can cause OSes like Linux to"
1390                              " misbehave", i, j, cpus[i].props.socket_id,
1391                              cpus[i].props.cluster_id, cpus[i].props.node_id,
1392                              cpus[j].props.node_id);
1393             }
1394         }
1395     }
1396 }
1397
1398 MemoryRegion *machine_consume_memdev(MachineState *machine,
1399                                      HostMemoryBackend *backend)
1400 {
1401     MemoryRegion *ret = host_memory_backend_get_memory(backend);
1402
1403     if (host_memory_backend_is_mapped(backend)) {
1404         error_report("memory backend %s can't be used multiple times.",
1405                      object_get_canonical_path_component(OBJECT(backend)));
1406         exit(EXIT_FAILURE);
1407     }
1408     host_memory_backend_set_mapped(backend, true);
1409     vmstate_register_ram_global(ret);
1410     return ret;
1411 }
1412
1413 static bool create_default_memdev(MachineState *ms, const char *path, Error **errp)
1414 {
1415     Object *obj;
1416     MachineClass *mc = MACHINE_GET_CLASS(ms);
1417     bool r = false;
1418
1419     obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM);
1420     if (path) {
1421         if (!object_property_set_str(obj, "mem-path", path, errp)) {
1422             goto out;
1423         }
1424     }
1425     if (!object_property_set_int(obj, "size", ms->ram_size, errp)) {
1426         goto out;
1427     }
1428     object_property_add_child(object_get_objects_root(), mc->default_ram_id,
1429                               obj);
1430     /* Ensure backend's memory region name is equal to mc->default_ram_id */
1431     if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id",
1432                              false, errp)) {
1433         goto out;
1434     }
1435     if (!user_creatable_complete(USER_CREATABLE(obj), errp)) {
1436         goto out;
1437     }
1438     r = object_property_set_link(OBJECT(ms), "memory-backend", obj, errp);
1439
1440 out:
1441     object_unref(obj);
1442     return r;
1443 }
1444
1445 const char *machine_class_default_cpu_type(MachineClass *mc)
1446 {
1447     if (mc->valid_cpu_types && !mc->valid_cpu_types[1]) {
1448         /* Only a single CPU type allowed: use it as default. */
1449         return mc->valid_cpu_types[0];
1450     }
1451     return mc->default_cpu_type;
1452 }
1453
1454 static bool is_cpu_type_supported(const MachineState *machine, Error **errp)
1455 {
1456     MachineClass *mc = MACHINE_GET_CLASS(machine);
1457     ObjectClass *oc = object_class_by_name(machine->cpu_type);
1458     CPUClass *cc;
1459     int i;
1460
1461     /*
1462      * Check if the user specified CPU type is supported when the valid
1463      * CPU types have been determined. Note that the user specified CPU
1464      * type is provided through '-cpu' option.
1465      */
1466     if (mc->valid_cpu_types) {
1467         assert(mc->valid_cpu_types[0] != NULL);
1468         for (i = 0; mc->valid_cpu_types[i]; i++) {
1469             if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) {
1470                 break;
1471             }
1472         }
1473
1474         /* The user specified CPU type isn't valid */
1475         if (!mc->valid_cpu_types[i]) {
1476             g_autofree char *requested = cpu_model_from_type(machine->cpu_type);
1477             error_setg(errp, "Invalid CPU model: %s", requested);
1478             if (!mc->valid_cpu_types[1]) {
1479                 g_autofree char *model = cpu_model_from_type(
1480                                                  mc->valid_cpu_types[0]);
1481                 error_append_hint(errp, "The only valid type is: %s\n", model);
1482             } else {
1483                 error_append_hint(errp, "The valid models are: ");
1484                 for (i = 0; mc->valid_cpu_types[i]; i++) {
1485                     g_autofree char *model = cpu_model_from_type(
1486                                                  mc->valid_cpu_types[i]);
1487                     error_append_hint(errp, "%s%s",
1488                                       model,
1489                                       mc->valid_cpu_types[i + 1] ? ", " : "");
1490                 }
1491                 error_append_hint(errp, "\n");
1492             }
1493
1494             return false;
1495         }
1496     }
1497
1498     /* Check if CPU type is deprecated and warn if so */
1499     cc = CPU_CLASS(oc);
1500     assert(cc != NULL);
1501     if (cc->deprecation_note) {
1502         warn_report("CPU model %s is deprecated -- %s",
1503                     machine->cpu_type, cc->deprecation_note);
1504     }
1505
1506     return true;
1507 }
1508
1509 void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp)
1510 {
1511     ERRP_GUARD();
1512     MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1513
1514     /* This checkpoint is required by replay to separate prior clock
1515        reading from the other reads, because timer polling functions query
1516        clock values from the log. */
1517     replay_checkpoint(CHECKPOINT_INIT);
1518
1519     if (!xen_enabled()) {
1520         /* On 32-bit hosts, QEMU is limited by virtual address space */
1521         if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS == 32) {
1522             error_setg(errp, "at most 2047 MB RAM can be simulated");
1523             return;
1524         }
1525     }
1526
1527     if (machine->memdev) {
1528         ram_addr_t backend_size = object_property_get_uint(OBJECT(machine->memdev),
1529                                                            "size",  &error_abort);
1530         if (backend_size != machine->ram_size) {
1531             error_setg(errp, "Machine memory size does not match the size of the memory backend");
1532             return;
1533         }
1534     } else if (machine_class->default_ram_id && machine->ram_size &&
1535                numa_uses_legacy_mem()) {
1536         if (object_property_find(object_get_objects_root(),
1537                                  machine_class->default_ram_id)) {
1538             error_setg(errp, "object's id '%s' is reserved for the default"
1539                 " RAM backend, it can't be used for any other purposes",
1540                 machine_class->default_ram_id);
1541             error_append_hint(errp,
1542                 "Change the object's 'id' to something else or disable"
1543                 " automatic creation of the default RAM backend by setting"
1544                 " 'memory-backend=%s' with '-machine'.\n",
1545                 machine_class->default_ram_id);
1546             return;
1547         }
1548         if (!create_default_memdev(current_machine, mem_path, errp)) {
1549             return;
1550         }
1551     }
1552
1553     if (machine->numa_state) {
1554         numa_complete_configuration(machine);
1555         if (machine->numa_state->num_nodes) {
1556             machine_numa_finish_cpu_init(machine);
1557             if (machine_class->cpu_cluster_has_numa_boundary) {
1558                 validate_cpu_cluster_to_numa_boundary(machine);
1559             }
1560         }
1561     }
1562
1563     if (!machine->ram && machine->memdev) {
1564         machine->ram = machine_consume_memdev(machine, machine->memdev);
1565     }
1566
1567     /* Check if the CPU type is supported */
1568     if (machine->cpu_type && !is_cpu_type_supported(machine, errp)) {
1569         return;
1570     }
1571
1572     if (machine->cgs) {
1573         /*
1574          * With confidential guests, the host can't see the real
1575          * contents of RAM, so there's no point in it trying to merge
1576          * areas.
1577          */
1578         machine_set_mem_merge(OBJECT(machine), false, &error_abort);
1579
1580         /*
1581          * Virtio devices can't count on directly accessing guest
1582          * memory, so they need iommu_platform=on to use normal DMA
1583          * mechanisms.  That requires also disabling legacy virtio
1584          * support for those virtio pci devices which allow it.
1585          */
1586         object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy",
1587                                    "on", true);
1588         object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform",
1589                                    "on", false);
1590     }
1591
1592     accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator));
1593     machine_class->init(machine);
1594     phase_advance(PHASE_MACHINE_INITIALIZED);
1595 }
1596
1597 static NotifierList machine_init_done_notifiers =
1598     NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers);
1599
1600 void qemu_add_machine_init_done_notifier(Notifier *notify)
1601 {
1602     notifier_list_add(&machine_init_done_notifiers, notify);
1603     if (phase_check(PHASE_MACHINE_READY)) {
1604         notify->notify(notify, NULL);
1605     }
1606 }
1607
1608 void qemu_remove_machine_init_done_notifier(Notifier *notify)
1609 {
1610     notifier_remove(notify);
1611 }
1612
1613 void qdev_machine_creation_done(void)
1614 {
1615     cpu_synchronize_all_post_init();
1616
1617     if (current_machine->boot_config.once) {
1618         qemu_boot_set(current_machine->boot_config.once, &error_fatal);
1619         qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order));
1620     }
1621
1622     /*
1623      * ok, initial machine setup is done, starting from now we can
1624      * only create hotpluggable devices
1625      */
1626     phase_advance(PHASE_MACHINE_READY);
1627     qdev_assert_realized_properly();
1628
1629     /* TODO: once all bus devices are qdevified, this should be done
1630      * when bus is created by qdev.c */
1631     /*
1632      * This is where we arrange for the sysbus to be reset when the
1633      * whole simulation is reset. In turn, resetting the sysbus will cause
1634      * all devices hanging off it (and all their child buses, recursively)
1635      * to be reset. Note that this will *not* reset any Device objects
1636      * which are not attached to some part of the qbus tree!
1637      */
1638     qemu_register_resettable(OBJECT(sysbus_get_default()));
1639
1640     notifier_list_notify(&machine_init_done_notifiers, NULL);
1641
1642     if (rom_check_and_register_reset() != 0) {
1643         exit(1);
1644     }
1645
1646     replay_start();
1647
1648     /* This checkpoint is required by replay to separate prior clock
1649        reading from the other reads, because timer polling functions query
1650        clock values from the log. */
1651     replay_checkpoint(CHECKPOINT_RESET);
1652     qemu_system_reset(SHUTDOWN_CAUSE_NONE);
1653     register_global_state();
1654 }
1655
1656 static const TypeInfo machine_info = {
1657     .name = TYPE_MACHINE,
1658     .parent = TYPE_OBJECT,
1659     .abstract = true,
1660     .class_size = sizeof(MachineClass),
1661     .class_init    = machine_class_init,
1662     .class_base_init = machine_class_base_init,
1663     .instance_size = sizeof(MachineState),
1664     .instance_init = machine_initfn,
1665     .instance_finalize = machine_finalize,
1666 };
1667
1668 static void machine_register_types(void)
1669 {
1670     type_register_static(&machine_info);
1671 }
1672
1673 type_init(machine_register_types)