1 /* omap_sx1.c Support for the Siemens SX1 smartphone emulation.
4 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 * Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com>
7 * based on PalmOne's (TM) PDAs support (palm.c)
11 * PalmOne's (TM) PDAs.
13 * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, see <http://www.gnu.org/licenses/>.
28 #include "qemu/osdep.h"
29 #include "qemu/units.h"
30 #include "qapi/error.h"
31 #include "ui/console.h"
32 #include "hw/arm/omap.h"
33 #include "hw/boards.h"
34 #include "hw/arm/boot.h"
35 #include "hw/block/flash.h"
36 #include "sysemu/qtest.h"
37 #include "exec/address-spaces.h"
38 #include "qemu/cutils.h"
39 #include "qemu/error-report.h"
42 /*****************************************************************************/
43 /* Siemens SX1 Cellphone V1 */
44 /* - ARM OMAP310 processor
46 * - SDRAM 32 MB at 0x10000000
47 * - Boot flash 16 MB at 0x00000000
48 * - Application flash 8 MB at 0x04000000
55 /*****************************************************************************/
56 /* Siemens SX1 Cellphone V2 */
57 /* - ARM OMAP310 processor
59 * - SDRAM 32 MB at 0x10000000
60 * - Boot flash 32 MB at 0x00000000
67 static uint64_t static_read(void *opaque
, hwaddr offset
,
70 uint32_t *val
= opaque
;
71 uint32_t mask
= (4 / size
) - 1;
73 return *val
>> ((offset
& mask
) << 3);
76 static void static_write(void *opaque
, hwaddr offset
,
77 uint64_t value
, unsigned size
)
80 printf("%s: value %" PRIx64
" %u bytes written at 0x%x\n",
81 __func__
, value
, size
, (int)offset
);
85 static const MemoryRegionOps static_ops
= {
87 .write
= static_write
,
88 .endianness
= DEVICE_NATIVE_ENDIAN
,
91 #define SDRAM_SIZE (32 * MiB)
92 #define SECTOR_SIZE (128 * KiB)
93 #define FLASH0_SIZE (16 * MiB)
94 #define FLASH1_SIZE (8 * MiB)
95 #define FLASH2_SIZE (32 * MiB)
97 static struct arm_boot_info sx1_binfo
= {
98 .loader_start
= OMAP_EMIFF_BASE
,
99 .ram_size
= SDRAM_SIZE
,
103 static void sx1_init(MachineState
*machine
, const int version
)
105 struct omap_mpu_state_s
*mpu
;
106 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
107 MemoryRegion
*address_space
= get_system_memory();
108 MemoryRegion
*flash
= g_new(MemoryRegion
, 1);
109 MemoryRegion
*cs
= g_new(MemoryRegion
, 4);
110 static uint32_t cs0val
= 0x00213090;
111 static uint32_t cs1val
= 0x00215070;
112 static uint32_t cs2val
= 0x00001139;
113 static uint32_t cs3val
= 0x00001139;
116 uint32_t flash_size
= FLASH0_SIZE
;
118 if (machine
->ram_size
!= mc
->default_ram_size
) {
119 char *sz
= size_to_str(mc
->default_ram_size
);
120 error_report("Invalid RAM size, should be %s", sz
);
126 flash_size
= FLASH2_SIZE
;
129 memory_region_add_subregion(address_space
, OMAP_EMIFF_BASE
, machine
->ram
);
131 mpu
= omap310_mpu_init(machine
->ram
, machine
->cpu_type
);
133 /* External Flash (EMIFS) */
134 memory_region_init_rom(flash
, NULL
, "omap_sx1.flash0-0", flash_size
,
136 memory_region_add_subregion(address_space
, OMAP_CS0_BASE
, flash
);
138 memory_region_init_io(&cs
[0], NULL
, &static_ops
, &cs0val
,
139 "sx1.cs0", OMAP_CS0_SIZE
- flash_size
);
140 memory_region_add_subregion(address_space
,
141 OMAP_CS0_BASE
+ flash_size
, &cs
[0]);
144 memory_region_init_io(&cs
[2], NULL
, &static_ops
, &cs2val
,
145 "sx1.cs2", OMAP_CS2_SIZE
);
146 memory_region_add_subregion(address_space
,
147 OMAP_CS2_BASE
, &cs
[2]);
149 memory_region_init_io(&cs
[3], NULL
, &static_ops
, &cs3val
,
150 "sx1.cs3", OMAP_CS3_SIZE
);
151 memory_region_add_subregion(address_space
,
152 OMAP_CS2_BASE
, &cs
[3]);
155 if ((dinfo
= drive_get(IF_PFLASH
, 0, fl_idx
)) != NULL
) {
156 pflash_cfi01_register(OMAP_CS0_BASE
,
157 "omap_sx1.flash0-1", flash_size
,
158 blk_by_legacy_dinfo(dinfo
),
159 SECTOR_SIZE
, 4, 0, 0, 0, 0, 0);
163 if ((version
== 1) &&
164 (dinfo
= drive_get(IF_PFLASH
, 0, fl_idx
)) != NULL
) {
165 MemoryRegion
*flash_1
= g_new(MemoryRegion
, 1);
166 memory_region_init_rom(flash_1
, NULL
, "omap_sx1.flash1-0",
167 FLASH1_SIZE
, &error_fatal
);
168 memory_region_add_subregion(address_space
, OMAP_CS1_BASE
, flash_1
);
170 memory_region_init_io(&cs
[1], NULL
, &static_ops
, &cs1val
,
171 "sx1.cs1", OMAP_CS1_SIZE
- FLASH1_SIZE
);
172 memory_region_add_subregion(address_space
,
173 OMAP_CS1_BASE
+ FLASH1_SIZE
, &cs
[1]);
175 pflash_cfi01_register(OMAP_CS1_BASE
,
176 "omap_sx1.flash1-1", FLASH1_SIZE
,
177 blk_by_legacy_dinfo(dinfo
),
178 SECTOR_SIZE
, 4, 0, 0, 0, 0, 0);
181 memory_region_init_io(&cs
[1], NULL
, &static_ops
, &cs1val
,
182 "sx1.cs1", OMAP_CS1_SIZE
);
183 memory_region_add_subregion(address_space
,
184 OMAP_CS1_BASE
, &cs
[1]);
187 if (!machine
->kernel_filename
&& !fl_idx
&& !qtest_enabled()) {
188 error_report("Kernel or Flash image must be specified");
192 /* Load the kernel. */
193 arm_load_kernel(mpu
->cpu
, machine
, &sx1_binfo
);
195 /* TODO: fix next line */
196 //~ qemu_console_resize(ds, 640, 480);
199 static void sx1_init_v1(MachineState
*machine
)
201 sx1_init(machine
, 1);
204 static void sx1_init_v2(MachineState
*machine
)
206 sx1_init(machine
, 2);
209 static void sx1_machine_v2_class_init(ObjectClass
*oc
, void *data
)
211 MachineClass
*mc
= MACHINE_CLASS(oc
);
213 mc
->desc
= "Siemens SX1 (OMAP310) V2";
214 mc
->init
= sx1_init_v2
;
215 mc
->ignore_memory_transaction_failures
= true;
216 mc
->default_cpu_type
= ARM_CPU_TYPE_NAME("ti925t");
217 mc
->default_ram_size
= SDRAM_SIZE
;
218 mc
->default_ram_id
= "omap1.dram";
221 static const TypeInfo sx1_machine_v2_type
= {
222 .name
= MACHINE_TYPE_NAME("sx1"),
223 .parent
= TYPE_MACHINE
,
224 .class_init
= sx1_machine_v2_class_init
,
227 static void sx1_machine_v1_class_init(ObjectClass
*oc
, void *data
)
229 MachineClass
*mc
= MACHINE_CLASS(oc
);
231 mc
->desc
= "Siemens SX1 (OMAP310) V1";
232 mc
->init
= sx1_init_v1
;
233 mc
->ignore_memory_transaction_failures
= true;
234 mc
->default_cpu_type
= ARM_CPU_TYPE_NAME("ti925t");
235 mc
->default_ram_size
= SDRAM_SIZE
;
236 mc
->default_ram_id
= "omap1.dram";
239 static const TypeInfo sx1_machine_v1_type
= {
240 .name
= MACHINE_TYPE_NAME("sx1-v1"),
241 .parent
= TYPE_MACHINE
,
242 .class_init
= sx1_machine_v1_class_init
,
245 static void sx1_machine_init(void)
247 type_register_static(&sx1_machine_v1_type
);
248 type_register_static(&sx1_machine_v2_type
);
251 type_init(sx1_machine_init
)