COLO: Implement failover work for secondary VM
[qemu/kevin.git] / qom / cpu.c
blob03d9190f8ce8eb60ed81a1e748869f9e82164955
1 /*
2 * QEMU CPU model
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "qemu-common.h"
24 #include "qom/cpu.h"
25 #include "sysemu/kvm.h"
26 #include "qemu/notify.h"
27 #include "qemu/log.h"
28 #include "exec/log.h"
29 #include "qemu/error-report.h"
30 #include "sysemu/sysemu.h"
31 #include "hw/qdev-properties.h"
32 #include "trace.h"
34 bool cpu_exists(int64_t id)
36 CPUState *cpu;
38 CPU_FOREACH(cpu) {
39 CPUClass *cc = CPU_GET_CLASS(cpu);
41 if (cc->get_arch_id(cpu) == id) {
42 return true;
45 return false;
48 CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
50 char *str, *name, *featurestr;
51 CPUState *cpu = NULL;
52 ObjectClass *oc;
53 CPUClass *cc;
54 Error *err = NULL;
56 str = g_strdup(cpu_model);
57 name = strtok(str, ",");
59 oc = cpu_class_by_name(typename, name);
60 if (oc == NULL) {
61 g_free(str);
62 return NULL;
65 cc = CPU_CLASS(oc);
66 featurestr = strtok(NULL, ",");
67 /* TODO: all callers of cpu_generic_init() need to be converted to
68 * call parse_features() only once, before calling cpu_generic_init().
70 cc->parse_features(object_class_get_name(oc), featurestr, &err);
71 g_free(str);
72 if (err != NULL) {
73 goto out;
76 cpu = CPU(object_new(object_class_get_name(oc)));
77 object_property_set_bool(OBJECT(cpu), true, "realized", &err);
79 out:
80 if (err != NULL) {
81 error_report_err(err);
82 object_unref(OBJECT(cpu));
83 return NULL;
86 return cpu;
89 bool cpu_paging_enabled(const CPUState *cpu)
91 CPUClass *cc = CPU_GET_CLASS(cpu);
93 return cc->get_paging_enabled(cpu);
96 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
98 return false;
101 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
102 Error **errp)
104 CPUClass *cc = CPU_GET_CLASS(cpu);
106 cc->get_memory_mapping(cpu, list, errp);
109 static void cpu_common_get_memory_mapping(CPUState *cpu,
110 MemoryMappingList *list,
111 Error **errp)
113 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
116 void cpu_reset_interrupt(CPUState *cpu, int mask)
118 cpu->interrupt_request &= ~mask;
121 void cpu_exit(CPUState *cpu)
123 atomic_set(&cpu->exit_request, 1);
124 /* Ensure cpu_exec will see the exit request after TCG has exited. */
125 smp_wmb();
126 atomic_set(&cpu->tcg_exit_req, 1);
129 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
130 void *opaque)
132 CPUClass *cc = CPU_GET_CLASS(cpu);
134 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
137 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
138 CPUState *cpu, void *opaque)
140 return 0;
143 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
144 int cpuid, void *opaque)
146 CPUClass *cc = CPU_GET_CLASS(cpu);
148 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
151 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
152 CPUState *cpu, int cpuid,
153 void *opaque)
155 return -1;
158 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
159 void *opaque)
161 CPUClass *cc = CPU_GET_CLASS(cpu);
163 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
166 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
167 CPUState *cpu, void *opaque)
169 return 0;
172 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
173 int cpuid, void *opaque)
175 CPUClass *cc = CPU_GET_CLASS(cpu);
177 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
180 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
181 CPUState *cpu, int cpuid,
182 void *opaque)
184 return -1;
188 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
190 return 0;
193 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
195 return 0;
198 static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
200 /* If no extra check is required, QEMU watchpoint match can be considered
201 * as an architectural match.
203 return true;
206 bool target_words_bigendian(void);
207 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
209 return target_words_bigendian();
212 static void cpu_common_noop(CPUState *cpu)
216 static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
218 return false;
221 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
222 int flags)
224 CPUClass *cc = CPU_GET_CLASS(cpu);
226 if (cc->dump_state) {
227 cpu_synchronize_state(cpu);
228 cc->dump_state(cpu, f, cpu_fprintf, flags);
232 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
233 int flags)
235 CPUClass *cc = CPU_GET_CLASS(cpu);
237 if (cc->dump_statistics) {
238 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
242 void cpu_reset(CPUState *cpu)
244 CPUClass *klass = CPU_GET_CLASS(cpu);
246 if (klass->reset != NULL) {
247 (*klass->reset)(cpu);
250 trace_guest_cpu_reset(cpu);
253 static void cpu_common_reset(CPUState *cpu)
255 CPUClass *cc = CPU_GET_CLASS(cpu);
256 int i;
258 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
259 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
260 log_cpu_state(cpu, cc->reset_dump_flags);
263 cpu->interrupt_request = 0;
264 cpu->halted = 0;
265 cpu->mem_io_pc = 0;
266 cpu->mem_io_vaddr = 0;
267 cpu->icount_extra = 0;
268 cpu->icount_decr.u32 = 0;
269 cpu->can_do_io = 1;
270 cpu->exception_index = -1;
271 cpu->crash_occurred = false;
273 for (i = 0; i < TB_JMP_CACHE_SIZE; ++i) {
274 atomic_set(&cpu->tb_jmp_cache[i], NULL);
278 static bool cpu_common_has_work(CPUState *cs)
280 return false;
283 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
285 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
287 return cc->class_by_name(cpu_model);
290 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
292 return NULL;
295 static void cpu_common_parse_features(const char *typename, char *features,
296 Error **errp)
298 char *featurestr; /* Single "key=value" string being parsed */
299 char *val;
300 static bool cpu_globals_initialized;
302 /* TODO: all callers of ->parse_features() need to be changed to
303 * call it only once, so we can remove this check (or change it
304 * to assert(!cpu_globals_initialized).
305 * Current callers of ->parse_features() are:
306 * - cpu_generic_init()
308 if (cpu_globals_initialized) {
309 return;
311 cpu_globals_initialized = true;
313 featurestr = features ? strtok(features, ",") : NULL;
315 while (featurestr) {
316 val = strchr(featurestr, '=');
317 if (val) {
318 GlobalProperty *prop = g_new0(typeof(*prop), 1);
319 *val = 0;
320 val++;
321 prop->driver = typename;
322 prop->property = g_strdup(featurestr);
323 prop->value = g_strdup(val);
324 prop->errp = &error_fatal;
325 qdev_prop_register_global(prop);
326 } else {
327 error_setg(errp, "Expected key=value format, found %s.",
328 featurestr);
329 return;
331 featurestr = strtok(NULL, ",");
335 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
337 CPUState *cpu = CPU(dev);
339 if (dev->hotplugged) {
340 cpu_synchronize_post_init(cpu);
341 cpu_resume(cpu);
344 /* NOTE: latest generic point where the cpu is fully realized */
345 trace_init_vcpu(cpu);
348 static void cpu_common_unrealizefn(DeviceState *dev, Error **errp)
350 CPUState *cpu = CPU(dev);
351 cpu_exec_unrealizefn(cpu);
354 static void cpu_common_initfn(Object *obj)
356 CPUState *cpu = CPU(obj);
357 CPUClass *cc = CPU_GET_CLASS(obj);
359 cpu->cpu_index = UNASSIGNED_CPU_INDEX;
360 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
361 /* *-user doesn't have configurable SMP topology */
362 /* the default value is changed by qemu_init_vcpu() for softmmu */
363 cpu->nr_cores = 1;
364 cpu->nr_threads = 1;
366 qemu_mutex_init(&cpu->work_mutex);
367 QTAILQ_INIT(&cpu->breakpoints);
368 QTAILQ_INIT(&cpu->watchpoints);
370 cpu->trace_dstate = bitmap_new(trace_get_vcpu_event_count());
372 cpu_exec_initfn(cpu);
375 static void cpu_common_finalize(Object *obj)
377 CPUState *cpu = CPU(obj);
378 g_free(cpu->trace_dstate);
381 static int64_t cpu_common_get_arch_id(CPUState *cpu)
383 return cpu->cpu_index;
386 static void cpu_class_init(ObjectClass *klass, void *data)
388 DeviceClass *dc = DEVICE_CLASS(klass);
389 CPUClass *k = CPU_CLASS(klass);
391 k->class_by_name = cpu_common_class_by_name;
392 k->parse_features = cpu_common_parse_features;
393 k->reset = cpu_common_reset;
394 k->get_arch_id = cpu_common_get_arch_id;
395 k->has_work = cpu_common_has_work;
396 k->get_paging_enabled = cpu_common_get_paging_enabled;
397 k->get_memory_mapping = cpu_common_get_memory_mapping;
398 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
399 k->write_elf32_note = cpu_common_write_elf32_note;
400 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
401 k->write_elf64_note = cpu_common_write_elf64_note;
402 k->gdb_read_register = cpu_common_gdb_read_register;
403 k->gdb_write_register = cpu_common_gdb_write_register;
404 k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
405 k->debug_excp_handler = cpu_common_noop;
406 k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
407 k->cpu_exec_enter = cpu_common_noop;
408 k->cpu_exec_exit = cpu_common_noop;
409 k->cpu_exec_interrupt = cpu_common_exec_interrupt;
410 dc->realize = cpu_common_realizefn;
411 dc->unrealize = cpu_common_unrealizefn;
413 * Reason: CPUs still need special care by board code: wiring up
414 * IRQs, adding reset handlers, halting non-first CPUs, ...
416 dc->cannot_instantiate_with_device_add_yet = true;
419 static const TypeInfo cpu_type_info = {
420 .name = TYPE_CPU,
421 .parent = TYPE_DEVICE,
422 .instance_size = sizeof(CPUState),
423 .instance_init = cpu_common_initfn,
424 .instance_finalize = cpu_common_finalize,
425 .abstract = true,
426 .class_size = sizeof(CPUClass),
427 .class_init = cpu_class_init,
430 static void cpu_register_types(void)
432 type_register_static(&cpu_type_info);
435 type_init(cpu_register_types)