target/ppc/monitor.c

   1 /*
   2  * QEMU monitor
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "qemu/osdep.h"
  25 #include "cpu.h"
  26 #include "monitor/monitor.h"
  27 #include "monitor/hmp-target.h"
  28 #include "hmp.h"
  29
  30 static target_long monitor_get_ccr(const struct MonitorDef *md, int val)
  31 {
  32     CPUArchState *env = mon_get_cpu_env();
  33     unsigned int u;
  34     int i;
  35
  36     u = 0;
  37     for (i = 0; i < 8; i++) {
  38         u |= env->crf[i] << (32 - (4 * (i + 1)));
  39     }
  40
  41     return u;
  42 }
  43
  44 static target_long monitor_get_decr(const struct MonitorDef *md, int val)
  45 {
  46     CPUArchState *env = mon_get_cpu_env();
  47     return cpu_ppc_load_decr(env);
  48 }
  49
  50 static target_long monitor_get_tbu(const struct MonitorDef *md, int val)
  51 {
  52     CPUArchState *env = mon_get_cpu_env();
  53     return cpu_ppc_load_tbu(env);
  54 }
  55
  56 static target_long monitor_get_tbl(const struct MonitorDef *md, int val)
  57 {
  58     CPUArchState *env = mon_get_cpu_env();
  59     return cpu_ppc_load_tbl(env);
  60 }
  61
  62 void hmp_info_tlb(Monitor *mon, const QDict *qdict)
  63 {
  64     CPUArchState *env1 = mon_get_cpu_env();
  65
  66     if (!env1) {
  67         monitor_printf(mon, "No CPU available\n");
  68         return;
  69     }
  70     dump_mmu(env1);
  71 }
  72
  73 const MonitorDef monitor_defs[] = {
  74     { "fpscr", offsetof(CPUPPCState, fpscr) },
  75     /* Next instruction pointer */
  76     { "nip|pc", offsetof(CPUPPCState, nip) },
  77     { "lr", offsetof(CPUPPCState, lr) },
  78     { "ctr", offsetof(CPUPPCState, ctr) },
  79     { "decr", 0, &monitor_get_decr, },
  80     { "ccr|cr", 0, &monitor_get_ccr, },
  81     /* Machine state register */
  82     { "xer", offsetof(CPUPPCState, xer) },
  83     { "msr", offsetof(CPUPPCState, msr) },
  84     { "tbu", 0, &monitor_get_tbu, },
  85     { "tbl", 0, &monitor_get_tbl, },
  86     { NULL },
  87 };
  88
  89 const MonitorDef *target_monitor_defs(void)
  90 {
  91     return monitor_defs;
  92 }
  93
  94 static int ppc_cpu_get_reg_num(const char *numstr, int maxnum, int *pregnum)
  95 {
  96     int regnum;
  97     char *endptr = NULL;
  98
  99     if (!*numstr) {
 100         return false;
 101     }
 102
 103     regnum = strtoul(numstr, &endptr, 10);
 104     if (*endptr || (regnum >= maxnum)) {
 105         return false;
 106     }
 107     *pregnum = regnum;
 108
 109     return true;
 110 }
 111
 112 int target_get_monitor_def(CPUState *cs, const char *name, uint64_t *pval)
 113 {
 114     int i, regnum;
 115     PowerPCCPU *cpu = POWERPC_CPU(cs);
 116     CPUPPCState *env = &cpu->env;
 117
 118     /* General purpose registers */
 119     if ((qemu_tolower(name[0]) == 'r') &&
 120         ppc_cpu_get_reg_num(name + 1, ARRAY_SIZE(env->gpr), &regnum)) {
 121         *pval = env->gpr[regnum];
 122         return 0;
 123     }
 124
 125     /* Floating point registers */
 126     if ((qemu_tolower(name[0]) == 'f') &&
 127         ppc_cpu_get_reg_num(name + 1, 32, &regnum)) {
 128         *pval = *cpu_fpr_ptr(env, regnum);
 129         return 0;
 130     }
 131
 132     /* Special purpose registers */
 133     for (i = 0; i < ARRAY_SIZE(env->spr_cb); ++i) {
 134         ppc_spr_t *spr = &env->spr_cb[i];
 135
 136         if (spr->name && (strcasecmp(name, spr->name) == 0)) {
 137             *pval = env->spr[i];
 138             return 0;
 139         }
 140     }
 141
 142     /* Segment registers */
 143 #if !defined(CONFIG_USER_ONLY)
 144     if ((strncasecmp(name, "sr", 2) == 0) &&
 145         ppc_cpu_get_reg_num(name + 2, ARRAY_SIZE(env->sr), &regnum)) {
 146         *pval = env->sr[regnum];
 147         return 0;
 148     }
 149 #endif
 150
 151     return -EINVAL;
 152 }