hw/i2c/versatile_i2c.c

   1 /*
   2  * ARM Versatile I2C controller
   3  *
   4  * Copyright (c) 2006-2007 CodeSourcery.
   5  * Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
   6  *
   7  * This file is derived from hw/realview.c by Paul Brook
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version 2
  12  * of the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  21  *
  22  */
  23
  24 #include "qemu/osdep.h"
  25 #include "hw/sysbus.h"
  26 #include "bitbang_i2c.h"
  27
  28 #define TYPE_VERSATILE_I2C "versatile_i2c"
  29 #define VERSATILE_I2C(obj) \
  30     OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C)
  31
  32 typedef struct VersatileI2CState {
  33     SysBusDevice parent_obj;
  34
  35     MemoryRegion iomem;
  36     bitbang_i2c_interface *bitbang;
  37     int out;
  38     int in;
  39 } VersatileI2CState;
  40
  41 static uint64_t versatile_i2c_read(void *opaque, hwaddr offset,
  42                                    unsigned size)
  43 {
  44     VersatileI2CState *s = (VersatileI2CState *)opaque;
  45
  46     if (offset == 0) {
  47         return (s->out & 1) | (s->in << 1);
  48     } else {
  49         qemu_log_mask(LOG_GUEST_ERROR,
  50                       "%s: Bad offset 0x%x\n", __func__, (int)offset);
  51         return -1;
  52     }
  53 }
  54
  55 static void versatile_i2c_write(void *opaque, hwaddr offset,
  56                                 uint64_t value, unsigned size)
  57 {
  58     VersatileI2CState *s = (VersatileI2CState *)opaque;
  59
  60     switch (offset) {
  61     case 0:
  62         s->out |= value & 3;
  63         break;
  64     case 4:
  65         s->out &= ~value;
  66         break;
  67     default:
  68         qemu_log_mask(LOG_GUEST_ERROR,
  69                       "%s: Bad offset 0x%x\n", __func__, (int)offset);
  70     }
  71     bitbang_i2c_set(s->bitbang, BITBANG_I2C_SCL, (s->out & 1) != 0);
  72     s->in = bitbang_i2c_set(s->bitbang, BITBANG_I2C_SDA, (s->out & 2) != 0);
  73 }
  74
  75 static const MemoryRegionOps versatile_i2c_ops = {
  76     .read = versatile_i2c_read,
  77     .write = versatile_i2c_write,
  78     .endianness = DEVICE_NATIVE_ENDIAN,
  79 };
  80
  81 static int versatile_i2c_init(SysBusDevice *sbd)
  82 {
  83     DeviceState *dev = DEVICE(sbd);
  84     VersatileI2CState *s = VERSATILE_I2C(dev);
  85     I2CBus *bus;
  86
  87     bus = i2c_init_bus(dev, "i2c");
  88     s->bitbang = bitbang_i2c_init(bus);
  89     memory_region_init_io(&s->iomem, OBJECT(s), &versatile_i2c_ops, s,
  90                           "versatile_i2c", 0x1000);
  91     sysbus_init_mmio(sbd, &s->iomem);
  92     return 0;
  93 }
  94
  95 static void versatile_i2c_class_init(ObjectClass *klass, void *data)
  96 {
  97     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
  98
  99     k->init = versatile_i2c_init;
 100 }
 101
 102 static const TypeInfo versatile_i2c_info = {
 103     .name          = TYPE_VERSATILE_I2C,
 104     .parent        = TYPE_SYS_BUS_DEVICE,
 105     .instance_size = sizeof(VersatileI2CState),
 106     .class_init    = versatile_i2c_class_init,
 107 };
 108
 109 static void versatile_i2c_register_types(void)
 110 {
 111     type_register_static(&versatile_i2c_info);
 112 }
 113
 114 type_init(versatile_i2c_register_types)