3 # tool for querying VMX capabilities
5 # Copyright 2009-2010 Red Hat, Inc.
8 # Avi Kivity <avi@redhat.com>
10 # This work is licensed under the terms of the GNU GPL, version 2. See
11 # the COPYING file in the top-level directory.
13 MSR_IA32_VMX_BASIC
= 0x480
14 MSR_IA32_VMX_PINBASED_CTLS
= 0x481
15 MSR_IA32_VMX_PROCBASED_CTLS
= 0x482
16 MSR_IA32_VMX_EXIT_CTLS
= 0x483
17 MSR_IA32_VMX_ENTRY_CTLS
= 0x484
18 MSR_IA32_VMX_MISC_CTLS
= 0x485
19 MSR_IA32_VMX_PROCBASED_CTLS2
= 0x48B
20 MSR_IA32_VMX_EPT_VPID_CAP
= 0x48C
21 MSR_IA32_VMX_TRUE_PINBASED_CTLS
= 0x48D
22 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
= 0x48E
23 MSR_IA32_VMX_TRUE_EXIT_CTLS
= 0x48F
24 MSR_IA32_VMX_TRUE_ENTRY_CTLS
= 0x490
25 MSR_IA32_VMX_VMFUNC
= 0x491
30 self
.f
= open('/dev/cpu/0/msr', 'rb', 0)
32 self
.f
= open('/dev/msr0', 'rb', 0)
33 def read(self
, index
, default
= None):
37 return struct
.unpack('Q', self
.f
.read(8))[0]
41 class Control(object):
42 def __init__(self
, name
, bits
, cap_msr
, true_cap_msr
= None):
45 self
.cap_msr
= cap_msr
46 self
.true_cap_msr
= true_cap_msr
50 return (val
& 0xffffffff, val
>> 32)
53 mbz
, mb1
= self
.read2(self
.cap_msr
)
56 tmbz
, tmb1
= self
.read2(self
.true_cap_msr
)
57 for bit
in sorted(self
.bits
.keys()):
58 zero
= not (mbz
& (1 << bit
))
59 one
= mb1
& (1 << bit
)
60 true_zero
= not (tmbz
& (1 << bit
))
61 true_one
= tmb1
& (1 << bit
)
63 if (self
.true_cap_msr
and true_zero
and true_one
64 and one
and not zero
):
66 elif zero
and not one
:
68 elif one
and not zero
:
72 print(' %-40s %s' % (self
.bits
[bit
], s
))
75 def __init__(self
, name
, bits
, msr
):
81 value
= msr().read(self
.msr
, 0)
82 print(' Hex: 0x%x' % (value
))
84 if type(key
) is tuple:
88 for bits
in sorted(self
.bits
.keys(), key
= first_bit
):
89 if type(bits
) is tuple:
95 return { True: 'yes', False: 'no' }[x
]
96 v
= (value
>> lo
) & ((1 << (hi
- lo
+ 1)) - 1)
97 print(' %-40s %s' % (self
.bits
[bits
], fmt(v
)))
101 name
= 'Basic VMX Information',
104 (32,44): 'VMCS size',
105 48: 'VMCS restricted to 32 bit addresses',
106 49: 'Dual-monitor support',
107 (50, 53): 'VMCS memory type',
108 54: 'INS/OUTS instruction information',
109 55: 'IA32_VMX_TRUE_*_CTLS support',
111 msr
= MSR_IA32_VMX_BASIC
,
114 name
= 'pin-based controls',
116 0: 'External interrupt exiting',
119 6: 'Activate VMX-preemption timer',
120 7: 'Process posted interrupts',
122 cap_msr
= MSR_IA32_VMX_PINBASED_CTLS
,
123 true_cap_msr
= MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
127 name
= 'primary processor-based controls',
129 2: 'Interrupt window exiting',
130 3: 'Use TSC offsetting',
136 15: 'CR3-load exiting',
137 16: 'CR3-store exiting',
138 19: 'CR8-load exiting',
139 20: 'CR8-store exiting',
140 21: 'Use TPR shadow',
141 22: 'NMI-window exiting',
142 23: 'MOV-DR exiting',
143 24: 'Unconditional I/O exiting',
144 25: 'Use I/O bitmaps',
145 27: 'Monitor trap flag',
146 28: 'Use MSR bitmaps',
147 29: 'MONITOR exiting',
149 31: 'Activate secondary control',
151 cap_msr
= MSR_IA32_VMX_PROCBASED_CTLS
,
152 true_cap_msr
= MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
156 name
= 'secondary processor-based controls',
158 0: 'Virtualize APIC accesses',
160 2: 'Descriptor-table exiting',
162 4: 'Virtualize x2APIC mode',
165 7: 'Unrestricted guest',
166 8: 'APIC register emulation',
167 9: 'Virtual interrupt delivery',
168 10: 'PAUSE-loop exiting',
169 11: 'RDRAND exiting',
170 12: 'Enable INVPCID',
171 13: 'Enable VM functions',
172 14: 'VMCS shadowing',
173 15: 'Enable ENCLS exiting',
174 16: 'RDSEED exiting',
176 18: 'EPT-violation #VE',
177 19: 'Conceal non-root operation from PT',
178 20: 'Enable XSAVES/XRSTORS',
179 22: 'Mode-based execute control (XS/XU)',
182 cap_msr
= MSR_IA32_VMX_PROCBASED_CTLS2
,
186 name
= 'VM-Exit controls',
188 2: 'Save debug controls',
189 9: 'Host address-space size',
190 12: 'Load IA32_PERF_GLOBAL_CTRL',
191 15: 'Acknowledge interrupt on exit',
194 20: 'Save IA32_EFER',
195 21: 'Load IA32_EFER',
196 22: 'Save VMX-preemption timer value',
197 23: 'Clear IA32_BNDCFGS',
198 24: 'Conceal VM exits from PT',
200 cap_msr
= MSR_IA32_VMX_EXIT_CTLS
,
201 true_cap_msr
= MSR_IA32_VMX_TRUE_EXIT_CTLS
,
205 name
= 'VM-Entry controls',
207 2: 'Load debug controls',
208 9: 'IA-32e mode guest',
210 11: 'Deactivate dual-monitor treatment',
211 13: 'Load IA32_PERF_GLOBAL_CTRL',
213 15: 'Load IA32_EFER',
214 16: 'Load IA32_BNDCFGS',
215 17: 'Conceal VM entries from PT',
217 cap_msr
= MSR_IA32_VMX_ENTRY_CTLS
,
218 true_cap_msr
= MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
222 name
= 'Miscellaneous data',
224 (0,4): 'VMX-preemption timer scale (log2)',
225 5: 'Store EFER.LMA into IA-32e mode guest control',
226 6: 'HLT activity state',
227 7: 'Shutdown activity state',
228 8: 'Wait-for-SIPI activity state',
229 15: 'IA32_SMBASE support',
230 (16,24): 'Number of CR3-target values',
231 (25,27): 'MSR-load/store count recommendation',
232 28: 'IA32_SMM_MONITOR_CTL[2] can be set to 1',
233 29: 'VMWRITE to VM-exit information fields',
234 30: 'Inject event with insn length=0',
235 (32,63): 'MSEG revision identifier',
237 msr
= MSR_IA32_VMX_MISC_CTLS
,
241 name
= 'VPID and EPT capabilities',
243 0: 'Execute-only EPT translations',
244 6: 'Page-walk length 4',
245 8: 'Paging-structure memory type UC',
246 14: 'Paging-structure memory type WB',
249 20: 'INVEPT supported',
250 21: 'EPT accessed and dirty flags',
251 25: 'Single-context INVEPT',
252 26: 'All-context INVEPT',
253 32: 'INVVPID supported',
254 40: 'Individual-address INVVPID',
255 41: 'Single-context INVVPID',
256 42: 'All-context INVVPID',
257 43: 'Single-context-retaining-globals INVVPID',
259 msr
= MSR_IA32_VMX_EPT_VPID_CAP
,
262 name
= 'VM Functions',
266 msr
= MSR_IA32_VMX_VMFUNC
,