2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #include "vmware_vga.h"
32 #include "hpet_emul.h"
36 #include "multiboot.h"
37 #include "mc146818rtc.h"
42 /* output Bochs bios info messages */
45 /* debug PC/ISA interrupts */
49 #define DPRINTF(fmt, ...) \
50 do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
52 #define DPRINTF(fmt, ...)
55 #define BIOS_FILENAME "bios.bin"
57 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
59 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
60 #define ACPI_DATA_SIZE 0x10000
61 #define BIOS_CFG_IOPORT 0x510
62 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
63 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
64 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
65 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
66 #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
68 #define MSI_ADDR_BASE 0xfee00000
70 #define E820_NR_ENTRIES 16
80 struct e820_entry entry
[E820_NR_ENTRIES
];
83 static struct e820_table e820_table
;
85 void isa_irq_handler(void *opaque
, int n
, int level
)
87 IsaIrqState
*isa
= (IsaIrqState
*)opaque
;
89 DPRINTF("isa_irqs: %s irq %d\n", level
? "raise" : "lower", n
);
91 qemu_set_irq(isa
->i8259
[n
], level
);
94 qemu_set_irq(isa
->ioapic
[n
], level
);
97 static void ioport80_write(void *opaque
, uint32_t addr
, uint32_t data
)
101 /* MSDOS compatibility mode FPU exception support */
102 static qemu_irq ferr_irq
;
104 void pc_register_ferr_irq(qemu_irq irq
)
109 /* XXX: add IGNNE support */
110 void cpu_set_ferr(CPUX86State
*s
)
112 qemu_irq_raise(ferr_irq
);
115 static void ioportF0_write(void *opaque
, uint32_t addr
, uint32_t data
)
117 qemu_irq_lower(ferr_irq
);
121 uint64_t cpu_get_tsc(CPUX86State
*env
)
123 return cpu_get_ticks();
128 static cpu_set_smm_t smm_set
;
129 static void *smm_arg
;
131 void cpu_smm_register(cpu_set_smm_t callback
, void *arg
)
133 assert(smm_set
== NULL
);
134 assert(smm_arg
== NULL
);
139 void cpu_smm_update(CPUState
*env
)
141 if (smm_set
&& smm_arg
&& env
== first_cpu
)
142 smm_set(!!(env
->hflags
& HF_SMM_MASK
), smm_arg
);
147 int cpu_get_pic_interrupt(CPUState
*env
)
151 intno
= apic_get_interrupt(env
->apic_state
);
153 /* set irq request if a PIC irq is still pending */
154 /* XXX: improve that */
155 pic_update_irq(isa_pic
);
158 /* read the irq from the PIC */
159 if (!apic_accept_pic_intr(env
->apic_state
)) {
163 intno
= pic_read_irq(isa_pic
);
167 static void pic_irq_request(void *opaque
, int irq
, int level
)
169 CPUState
*env
= first_cpu
;
171 DPRINTF("pic_irqs: %s irq %d\n", level
? "raise" : "lower", irq
);
172 if (env
->apic_state
) {
174 if (apic_accept_pic_intr(env
->apic_state
)) {
175 apic_deliver_pic_intr(env
->apic_state
, level
);
181 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
183 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);
187 /* PC cmos mappings */
189 #define REG_EQUIPMENT_BYTE 0x14
191 static int cmos_get_fd_drive_type(int fd0
)
197 /* 1.44 Mb 3"5 drive */
201 /* 2.88 Mb 3"5 drive */
205 /* 1.2 Mb 5"5 drive */
215 static void cmos_init_hd(int type_ofs
, int info_ofs
, BlockDriverState
*hd
,
218 int cylinders
, heads
, sectors
;
219 bdrv_get_geometry_hint(hd
, &cylinders
, &heads
, §ors
);
220 rtc_set_memory(s
, type_ofs
, 47);
221 rtc_set_memory(s
, info_ofs
, cylinders
);
222 rtc_set_memory(s
, info_ofs
+ 1, cylinders
>> 8);
223 rtc_set_memory(s
, info_ofs
+ 2, heads
);
224 rtc_set_memory(s
, info_ofs
+ 3, 0xff);
225 rtc_set_memory(s
, info_ofs
+ 4, 0xff);
226 rtc_set_memory(s
, info_ofs
+ 5, 0xc0 | ((heads
> 8) << 3));
227 rtc_set_memory(s
, info_ofs
+ 6, cylinders
);
228 rtc_set_memory(s
, info_ofs
+ 7, cylinders
>> 8);
229 rtc_set_memory(s
, info_ofs
+ 8, sectors
);
232 /* convert boot_device letter to something recognizable by the bios */
233 static int boot_device2nibble(char boot_device
)
235 switch(boot_device
) {
238 return 0x01; /* floppy boot */
240 return 0x02; /* hard drive boot */
242 return 0x03; /* CD-ROM boot */
244 return 0x04; /* Network boot */
249 static int set_boot_dev(ISADevice
*s
, const char *boot_device
, int fd_bootchk
)
251 #define PC_MAX_BOOT_DEVICES 3
252 int nbds
, bds
[3] = { 0, };
255 nbds
= strlen(boot_device
);
256 if (nbds
> PC_MAX_BOOT_DEVICES
) {
257 error_report("Too many boot devices for PC");
260 for (i
= 0; i
< nbds
; i
++) {
261 bds
[i
] = boot_device2nibble(boot_device
[i
]);
263 error_report("Invalid boot device for PC: '%c'",
268 rtc_set_memory(s
, 0x3d, (bds
[1] << 4) | bds
[0]);
269 rtc_set_memory(s
, 0x38, (bds
[2] << 4) | (fd_bootchk
? 0x0 : 0x1));
273 static int pc_boot_set(void *opaque
, const char *boot_device
)
275 return set_boot_dev(opaque
, boot_device
, 0);
278 /* hd_table must contain 4 block drivers */
279 void pc_cmos_init(ram_addr_t ram_size
, ram_addr_t above_4g_mem_size
,
280 const char *boot_device
, DriveInfo
**hd_table
,
281 FDCtrl
*floppy_controller
, ISADevice
*s
)
287 /* various important CMOS locations needed by PC/Bochs bios */
290 val
= 640; /* base memory in K */
291 rtc_set_memory(s
, 0x15, val
);
292 rtc_set_memory(s
, 0x16, val
>> 8);
294 val
= (ram_size
/ 1024) - 1024;
297 rtc_set_memory(s
, 0x17, val
);
298 rtc_set_memory(s
, 0x18, val
>> 8);
299 rtc_set_memory(s
, 0x30, val
);
300 rtc_set_memory(s
, 0x31, val
>> 8);
302 if (above_4g_mem_size
) {
303 rtc_set_memory(s
, 0x5b, (unsigned int)above_4g_mem_size
>> 16);
304 rtc_set_memory(s
, 0x5c, (unsigned int)above_4g_mem_size
>> 24);
305 rtc_set_memory(s
, 0x5d, (uint64_t)above_4g_mem_size
>> 32);
308 if (ram_size
> (16 * 1024 * 1024))
309 val
= (ram_size
/ 65536) - ((16 * 1024 * 1024) / 65536);
314 rtc_set_memory(s
, 0x34, val
);
315 rtc_set_memory(s
, 0x35, val
>> 8);
317 /* set the number of CPU */
318 rtc_set_memory(s
, 0x5f, smp_cpus
- 1);
320 /* set boot devices, and disable floppy signature check if requested */
321 if (set_boot_dev(s
, boot_device
, fd_bootchk
)) {
327 fd0
= fdctrl_get_drive_type(floppy_controller
, 0);
328 fd1
= fdctrl_get_drive_type(floppy_controller
, 1);
330 val
= (cmos_get_fd_drive_type(fd0
) << 4) | cmos_get_fd_drive_type(fd1
);
331 rtc_set_memory(s
, 0x10, val
);
343 val
|= 0x01; /* 1 drive, ready for boot */
346 val
|= 0x41; /* 2 drives, ready for boot */
349 val
|= 0x02; /* FPU is there */
350 val
|= 0x04; /* PS/2 mouse installed */
351 rtc_set_memory(s
, REG_EQUIPMENT_BYTE
, val
);
355 rtc_set_memory(s
, 0x12, (hd_table
[0] ? 0xf0 : 0) | (hd_table
[1] ? 0x0f : 0));
357 cmos_init_hd(0x19, 0x1b, hd_table
[0]->bdrv
, s
);
359 cmos_init_hd(0x1a, 0x24, hd_table
[1]->bdrv
, s
);
362 for (i
= 0; i
< 4; i
++) {
364 int cylinders
, heads
, sectors
, translation
;
365 /* NOTE: bdrv_get_geometry_hint() returns the physical
366 geometry. It is always such that: 1 <= sects <= 63, 1
367 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
368 geometry can be different if a translation is done. */
369 translation
= bdrv_get_translation_hint(hd_table
[i
]->bdrv
);
370 if (translation
== BIOS_ATA_TRANSLATION_AUTO
) {
371 bdrv_get_geometry_hint(hd_table
[i
]->bdrv
, &cylinders
, &heads
, §ors
);
372 if (cylinders
<= 1024 && heads
<= 16 && sectors
<= 63) {
373 /* No translation. */
376 /* LBA translation. */
382 val
|= translation
<< (i
* 2);
385 rtc_set_memory(s
, 0x39, val
);
388 static void handle_a20_line_change(void *opaque
, int irq
, int level
)
390 CPUState
*cpu
= opaque
;
392 /* XXX: send to all CPUs ? */
393 cpu_x86_set_a20(cpu
, level
);
396 /***********************************************************/
397 /* Bochs BIOS debug ports */
399 static void bochs_bios_write(void *opaque
, uint32_t addr
, uint32_t val
)
401 static const char shutdown_str
[8] = "Shutdown";
402 static int shutdown_index
= 0;
405 /* Bochs BIOS messages */
408 fprintf(stderr
, "BIOS panic at rombios.c, line %d\n", val
);
413 fprintf(stderr
, "%c", val
);
417 /* same as Bochs power off */
418 if (val
== shutdown_str
[shutdown_index
]) {
420 if (shutdown_index
== 8) {
422 qemu_system_shutdown_request();
429 /* LGPL'ed VGA BIOS messages */
432 fprintf(stderr
, "VGA BIOS panic, line %d\n", val
);
437 fprintf(stderr
, "%c", val
);
443 int e820_add_entry(uint64_t address
, uint64_t length
, uint32_t type
)
445 int index
= e820_table
.count
;
446 struct e820_entry
*entry
;
448 if (index
>= E820_NR_ENTRIES
)
450 entry
= &e820_table
.entry
[index
];
452 entry
->address
= address
;
453 entry
->length
= length
;
457 return e820_table
.count
;
460 static void *bochs_bios_init(void)
463 uint8_t *smbios_table
;
465 uint64_t *numa_fw_cfg
;
468 register_ioport_write(0x400, 1, 2, bochs_bios_write
, NULL
);
469 register_ioport_write(0x401, 1, 2, bochs_bios_write
, NULL
);
470 register_ioport_write(0x402, 1, 1, bochs_bios_write
, NULL
);
471 register_ioport_write(0x403, 1, 1, bochs_bios_write
, NULL
);
472 register_ioport_write(0x8900, 1, 1, bochs_bios_write
, NULL
);
474 register_ioport_write(0x501, 1, 2, bochs_bios_write
, NULL
);
475 register_ioport_write(0x502, 1, 2, bochs_bios_write
, NULL
);
476 register_ioport_write(0x500, 1, 1, bochs_bios_write
, NULL
);
477 register_ioport_write(0x503, 1, 1, bochs_bios_write
, NULL
);
479 fw_cfg
= fw_cfg_init(BIOS_CFG_IOPORT
, BIOS_CFG_IOPORT
+ 1, 0, 0);
481 fw_cfg_add_i32(fw_cfg
, FW_CFG_ID
, 1);
482 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
483 fw_cfg_add_bytes(fw_cfg
, FW_CFG_ACPI_TABLES
, (uint8_t *)acpi_tables
,
485 fw_cfg_add_bytes(fw_cfg
, FW_CFG_IRQ0_OVERRIDE
, &irq0override
, 1);
487 smbios_table
= smbios_get_table(&smbios_len
);
489 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SMBIOS_ENTRIES
,
490 smbios_table
, smbios_len
);
491 fw_cfg_add_bytes(fw_cfg
, FW_CFG_E820_TABLE
, (uint8_t *)&e820_table
,
492 sizeof(struct e820_table
));
494 fw_cfg_add_bytes(fw_cfg
, FW_CFG_HPET
, (uint8_t *)&hpet_cfg
,
495 sizeof(struct hpet_fw_config
));
496 /* allocate memory for the NUMA channel: one (64bit) word for the number
497 * of nodes, one word for each VCPU->node and one word for each node to
498 * hold the amount of memory.
500 numa_fw_cfg
= qemu_mallocz((1 + smp_cpus
+ nb_numa_nodes
) * 8);
501 numa_fw_cfg
[0] = cpu_to_le64(nb_numa_nodes
);
502 for (i
= 0; i
< smp_cpus
; i
++) {
503 for (j
= 0; j
< nb_numa_nodes
; j
++) {
504 if (node_cpumask
[j
] & (1 << i
)) {
505 numa_fw_cfg
[i
+ 1] = cpu_to_le64(j
);
510 for (i
= 0; i
< nb_numa_nodes
; i
++) {
511 numa_fw_cfg
[smp_cpus
+ 1 + i
] = cpu_to_le64(node_mem
[i
]);
513 fw_cfg_add_bytes(fw_cfg
, FW_CFG_NUMA
, (uint8_t *)numa_fw_cfg
,
514 (1 + smp_cpus
+ nb_numa_nodes
) * 8);
519 static long get_file_size(FILE *f
)
523 /* XXX: on Unix systems, using fstat() probably makes more sense */
526 fseek(f
, 0, SEEK_END
);
528 fseek(f
, where
, SEEK_SET
);
533 static void load_linux(void *fw_cfg
,
534 const char *kernel_filename
,
535 const char *initrd_filename
,
536 const char *kernel_cmdline
,
537 target_phys_addr_t max_ram_size
)
540 int setup_size
, kernel_size
, initrd_size
= 0, cmdline_size
;
542 uint8_t header
[8192], *setup
, *kernel
, *initrd_data
;
543 target_phys_addr_t real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
547 /* Align to 16 bytes as a paranoia measure */
548 cmdline_size
= (strlen(kernel_cmdline
)+16) & ~15;
550 /* load the kernel header */
551 f
= fopen(kernel_filename
, "rb");
552 if (!f
|| !(kernel_size
= get_file_size(f
)) ||
553 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
554 MIN(ARRAY_SIZE(header
), kernel_size
)) {
555 fprintf(stderr
, "qemu: could not load kernel '%s': %s\n",
556 kernel_filename
, strerror(errno
));
560 /* kernel protocol version */
562 fprintf(stderr
, "header magic: %#x\n", ldl_p(header
+0x202));
564 if (ldl_p(header
+0x202) == 0x53726448)
565 protocol
= lduw_p(header
+0x206);
567 /* This looks like a multiboot kernel. If it is, let's stop
568 treating it like a Linux kernel. */
569 if (load_multiboot(fw_cfg
, f
, kernel_filename
, initrd_filename
,
570 kernel_cmdline
, kernel_size
, header
))
575 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
578 cmdline_addr
= 0x9a000 - cmdline_size
;
580 } else if (protocol
< 0x202) {
581 /* High but ancient kernel */
583 cmdline_addr
= 0x9a000 - cmdline_size
;
584 prot_addr
= 0x100000;
586 /* High and recent kernel */
588 cmdline_addr
= 0x20000;
589 prot_addr
= 0x100000;
594 "qemu: real_addr = 0x" TARGET_FMT_plx
"\n"
595 "qemu: cmdline_addr = 0x" TARGET_FMT_plx
"\n"
596 "qemu: prot_addr = 0x" TARGET_FMT_plx
"\n",
602 /* highest address for loading the initrd */
603 if (protocol
>= 0x203)
604 initrd_max
= ldl_p(header
+0x22c);
606 initrd_max
= 0x37ffffff;
608 if (initrd_max
>= max_ram_size
-ACPI_DATA_SIZE
)
609 initrd_max
= max_ram_size
-ACPI_DATA_SIZE
-1;
611 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_ADDR
, cmdline_addr
);
612 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
, strlen(kernel_cmdline
)+1);
613 fw_cfg_add_bytes(fw_cfg
, FW_CFG_CMDLINE_DATA
,
614 (uint8_t*)strdup(kernel_cmdline
),
615 strlen(kernel_cmdline
)+1);
617 if (protocol
>= 0x202) {
618 stl_p(header
+0x228, cmdline_addr
);
620 stw_p(header
+0x20, 0xA33F);
621 stw_p(header
+0x22, cmdline_addr
-real_addr
);
624 /* handle vga= parameter */
625 vmode
= strstr(kernel_cmdline
, "vga=");
627 unsigned int video_mode
;
630 if (!strncmp(vmode
, "normal", 6)) {
632 } else if (!strncmp(vmode
, "ext", 3)) {
634 } else if (!strncmp(vmode
, "ask", 3)) {
637 video_mode
= strtol(vmode
, NULL
, 0);
639 stw_p(header
+0x1fa, video_mode
);
643 /* High nybble = B reserved for Qemu; low nybble is revision number.
644 If this code is substantially changed, you may want to consider
645 incrementing the revision. */
646 if (protocol
>= 0x200)
647 header
[0x210] = 0xB0;
650 if (protocol
>= 0x201) {
651 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
652 stw_p(header
+0x224, cmdline_addr
-real_addr
-0x200);
656 if (initrd_filename
) {
657 if (protocol
< 0x200) {
658 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
662 initrd_size
= get_image_size(initrd_filename
);
663 if (initrd_size
< 0) {
664 fprintf(stderr
, "qemu: error reading initrd %s\n",
669 initrd_addr
= (initrd_max
-initrd_size
) & ~4095;
671 initrd_data
= qemu_malloc(initrd_size
);
672 load_image(initrd_filename
, initrd_data
);
674 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
675 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
676 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
, initrd_size
);
678 stl_p(header
+0x218, initrd_addr
);
679 stl_p(header
+0x21c, initrd_size
);
682 /* load kernel and setup */
683 setup_size
= header
[0x1f1];
686 setup_size
= (setup_size
+1)*512;
687 kernel_size
-= setup_size
;
689 setup
= qemu_malloc(setup_size
);
690 kernel
= qemu_malloc(kernel_size
);
691 fseek(f
, 0, SEEK_SET
);
692 if (fread(setup
, 1, setup_size
, f
) != setup_size
) {
693 fprintf(stderr
, "fread() failed\n");
696 if (fread(kernel
, 1, kernel_size
, f
) != kernel_size
) {
697 fprintf(stderr
, "fread() failed\n");
701 memcpy(setup
, header
, MIN(sizeof(header
), setup_size
));
703 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, prot_addr
);
704 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
705 fw_cfg_add_bytes(fw_cfg
, FW_CFG_KERNEL_DATA
, kernel
, kernel_size
);
707 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_ADDR
, real_addr
);
708 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, setup_size
);
709 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
, setup
, setup_size
);
711 option_rom
[nb_option_roms
] = "linuxboot.bin";
715 #define NE2000_NB_MAX 6
717 static const int ne2000_io
[NE2000_NB_MAX
] = { 0x300, 0x320, 0x340, 0x360,
719 static const int ne2000_irq
[NE2000_NB_MAX
] = { 9, 10, 11, 3, 4, 5 };
721 static const int parallel_io
[MAX_PARALLEL_PORTS
] = { 0x378, 0x278, 0x3bc };
722 static const int parallel_irq
[MAX_PARALLEL_PORTS
] = { 7, 7, 7 };
724 void pc_audio_init (PCIBus
*pci_bus
, qemu_irq
*pic
)
728 for (c
= soundhw
; c
->name
; ++c
) {
731 c
->init
.init_isa(pic
);
734 c
->init
.init_pci(pci_bus
);
741 void pc_init_ne2k_isa(NICInfo
*nd
)
743 static int nb_ne2k
= 0;
745 if (nb_ne2k
== NE2000_NB_MAX
)
747 isa_ne2000_init(ne2000_io
[nb_ne2k
],
748 ne2000_irq
[nb_ne2k
], nd
);
752 int cpu_is_bsp(CPUState
*env
)
754 /* We hard-wire the BSP to the first CPU. */
755 return env
->cpu_index
== 0;
758 DeviceState
*cpu_get_current_apic(void)
760 if (cpu_single_env
) {
761 return cpu_single_env
->apic_state
;
767 static DeviceState
*apic_init(void *env
, uint8_t apic_id
)
771 static int apic_mapped
;
773 dev
= qdev_create(NULL
, "apic");
774 qdev_prop_set_uint8(dev
, "id", apic_id
);
775 qdev_prop_set_ptr(dev
, "cpu_env", env
);
776 qdev_init_nofail(dev
);
777 d
= sysbus_from_qdev(dev
);
779 /* XXX: mapping more APICs at the same memory location */
780 if (apic_mapped
== 0) {
781 /* NOTE: the APIC is directly connected to the CPU - it is not
782 on the global memory bus. */
783 /* XXX: what if the base changes? */
784 sysbus_mmio_map(d
, 0, MSI_ADDR_BASE
);
793 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
794 BIOS will read it and start S3 resume at POST Entry */
795 void pc_cmos_set_s3_resume(void *opaque
, int irq
, int level
)
797 ISADevice
*s
= opaque
;
800 rtc_set_memory(s
, 0xF, 0xFE);
804 void pc_acpi_smi_interrupt(void *opaque
, int irq
, int level
)
806 CPUState
*s
= opaque
;
809 cpu_interrupt(s
, CPU_INTERRUPT_SMI
);
813 static void bsp_cpu_reset(void *opaque
)
815 CPUState
*env
= opaque
;
821 static void ap_cpu_reset(void *opaque
)
823 CPUState
*env
= opaque
;
829 static CPUState
*pc_new_cpu(const char *cpu_model
)
833 env
= cpu_init(cpu_model
);
835 fprintf(stderr
, "Unable to find x86 CPU definition\n");
838 if ((env
->cpuid_features
& CPUID_APIC
) || smp_cpus
> 1) {
839 env
->cpuid_apic_id
= env
->cpu_index
;
840 /* APIC reset callback resets cpu */
841 env
->apic_state
= apic_init(env
, env
->cpuid_apic_id
);
843 if (cpu_is_bsp(env
)) {
844 qemu_register_reset(bsp_cpu_reset
, env
);
847 qemu_register_reset(ap_cpu_reset
, env
);
853 void pc_cpus_init(const char *cpu_model
)
858 if (cpu_model
== NULL
) {
860 cpu_model
= "qemu64";
862 cpu_model
= "qemu32";
866 for(i
= 0; i
< smp_cpus
; i
++) {
867 pc_new_cpu(cpu_model
);
871 void pc_memory_init(ram_addr_t ram_size
,
872 const char *kernel_filename
,
873 const char *kernel_cmdline
,
874 const char *initrd_filename
,
875 ram_addr_t
*below_4g_mem_size_p
,
876 ram_addr_t
*above_4g_mem_size_p
)
879 int ret
, linux_boot
, i
;
880 ram_addr_t ram_addr
, bios_offset
, option_rom_offset
;
881 ram_addr_t below_4g_mem_size
, above_4g_mem_size
= 0;
882 int bios_size
, isa_bios_size
;
885 if (ram_size
>= 0xe0000000 ) {
886 above_4g_mem_size
= ram_size
- 0xe0000000;
887 below_4g_mem_size
= 0xe0000000;
889 below_4g_mem_size
= ram_size
;
891 *above_4g_mem_size_p
= above_4g_mem_size
;
892 *below_4g_mem_size_p
= below_4g_mem_size
;
894 linux_boot
= (kernel_filename
!= NULL
);
897 ram_addr
= qemu_ram_alloc(below_4g_mem_size
);
898 cpu_register_physical_memory(0, 0xa0000, ram_addr
);
899 cpu_register_physical_memory(0x100000,
900 below_4g_mem_size
- 0x100000,
901 ram_addr
+ 0x100000);
903 /* above 4giga memory allocation */
904 if (above_4g_mem_size
> 0) {
905 #if TARGET_PHYS_ADDR_BITS == 32
906 hw_error("To much RAM for 32-bit physical address");
908 ram_addr
= qemu_ram_alloc(above_4g_mem_size
);
909 cpu_register_physical_memory(0x100000000ULL
,
917 if (bios_name
== NULL
)
918 bios_name
= BIOS_FILENAME
;
919 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
921 bios_size
= get_image_size(filename
);
925 if (bios_size
<= 0 ||
926 (bios_size
% 65536) != 0) {
929 bios_offset
= qemu_ram_alloc(bios_size
);
930 ret
= rom_add_file_fixed(bios_name
, (uint32_t)(-bios_size
));
933 fprintf(stderr
, "qemu: could not load PC BIOS '%s'\n", bios_name
);
939 /* map the last 128KB of the BIOS in ISA space */
940 isa_bios_size
= bios_size
;
941 if (isa_bios_size
> (128 * 1024))
942 isa_bios_size
= 128 * 1024;
943 cpu_register_physical_memory(0x100000 - isa_bios_size
,
945 (bios_offset
+ bios_size
- isa_bios_size
) | IO_MEM_ROM
);
947 option_rom_offset
= qemu_ram_alloc(PC_ROM_SIZE
);
948 cpu_register_physical_memory(PC_ROM_MIN_VGA
, PC_ROM_SIZE
, option_rom_offset
);
950 /* map all the bios at the top of memory */
951 cpu_register_physical_memory((uint32_t)(-bios_size
),
952 bios_size
, bios_offset
| IO_MEM_ROM
);
954 fw_cfg
= bochs_bios_init();
958 load_linux(fw_cfg
, kernel_filename
, initrd_filename
, kernel_cmdline
, below_4g_mem_size
);
961 for (i
= 0; i
< nb_option_roms
; i
++) {
962 rom_add_option(option_rom
[i
]);
966 qemu_irq
*pc_allocate_cpu_irq(void)
968 return qemu_allocate_irqs(pic_irq_request
, NULL
, 1);
971 void pc_vga_init(PCIBus
*pci_bus
)
973 if (cirrus_vga_enabled
) {
975 pci_cirrus_vga_init(pci_bus
);
977 isa_cirrus_vga_init();
979 } else if (vmsvga_enabled
) {
981 pci_vmsvga_init(pci_bus
);
983 fprintf(stderr
, "%s: vmware_vga: no PCI bus\n", __FUNCTION__
);
984 } else if (std_vga_enabled
) {
986 pci_vga_init(pci_bus
, 0, 0);
993 static void cpu_request_exit(void *opaque
, int irq
, int level
)
995 CPUState
*env
= cpu_single_env
;
1002 void pc_basic_device_init(qemu_irq
*isa_irq
,
1003 FDCtrl
**floppy_controller
,
1004 ISADevice
**rtc_state
)
1007 DriveInfo
*fd
[MAX_FD
];
1009 qemu_irq rtc_irq
= NULL
;
1012 qemu_irq
*cpu_exit_irq
;
1014 register_ioport_write(0x80, 1, 1, ioport80_write
, NULL
);
1016 register_ioport_write(0xf0, 1, 1, ioportF0_write
, NULL
);
1019 DeviceState
*hpet
= sysbus_create_simple("hpet", HPET_BASE
, NULL
);
1021 for (i
= 0; i
< 24; i
++) {
1022 sysbus_connect_irq(sysbus_from_qdev(hpet
), i
, isa_irq
[i
]);
1024 rtc_irq
= qdev_get_gpio_in(hpet
, 0);
1026 *rtc_state
= rtc_init(2000, rtc_irq
);
1028 qemu_register_boot_set(pc_boot_set
, *rtc_state
);
1030 pit
= pit_init(0x40, isa_reserve_irq(0));
1033 for(i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1034 if (serial_hds
[i
]) {
1035 serial_isa_init(i
, serial_hds
[i
]);
1039 for(i
= 0; i
< MAX_PARALLEL_PORTS
; i
++) {
1040 if (parallel_hds
[i
]) {
1041 parallel_init(i
, parallel_hds
[i
]);
1045 a20_line
= qemu_allocate_irqs(handle_a20_line_change
, first_cpu
, 1);
1046 i8042
= isa_create_simple("i8042");
1047 i8042_setup_a20_line(i8042
, a20_line
);
1048 vmmouse_init(i8042
);
1050 cpu_exit_irq
= qemu_allocate_irqs(cpu_request_exit
, NULL
, 1);
1051 DMA_init(0, cpu_exit_irq
);
1053 for(i
= 0; i
< MAX_FD
; i
++) {
1054 fd
[i
] = drive_get(IF_FLOPPY
, 0, i
);
1056 *floppy_controller
= fdctrl_init_isa(fd
);
1059 void pc_pci_device_init(PCIBus
*pci_bus
)
1064 max_bus
= drive_get_max_bus(IF_SCSI
);
1065 for (bus
= 0; bus
<= max_bus
; bus
++) {
1066 pci_create_simple(pci_bus
, -1, "lsi53c895a");