1 # Trace events for debugging and performance instrumentation
3 # This file is processed by the tracetool script during the build.
5 # To add a new trace event:
7 # 1. Choose a name for the trace event. Declare its arguments and format
10 # 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
11 # trace_multiwrite_cb(). The source file must #include "trace.h".
13 # Format of a trace event:
15 # [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
17 # Example: g_malloc(size_t size) "size %zu"
19 # The "disable" keyword will build without the trace event.
21 # The <name> must be a valid as a C function name.
23 # Types should be standard C types. Use void * for pointers because the trace
24 # system may not have the necessary headers included.
26 # The <format-string> should be a sprintf()-compatible format string.
29 virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
30 virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
31 virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
32 virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
33 virtio_irq(void *vq) "vq %p"
34 virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
35 virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u"
37 # hw/virtio/virtio-rng.c
38 virtio_rng_guest_not_ready(void *rng) "rng %p: guest not ready"
39 virtio_rng_pushed(void *rng, size_t len) "rng %p: %zd bytes pushed"
40 virtio_rng_request(void *rng, size_t size, unsigned quota) "rng %p: %zd bytes requested, %u bytes quota left"
42 # hw/char/virtio-serial-bus.c
43 virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
44 virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
45 virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
46 virtio_serial_handle_control_message_port(unsigned int port) "port %u"
48 # hw/char/virtio-console.c
49 virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
50 virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
51 virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
54 thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %p"
55 thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d"
56 thread_pool_cancel(void *req, void *opaque) "req %p opaque %p"
59 cpu_in(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u"
60 cpu_out(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u"
63 # Since requests are raised via monitor, not many tracepoints are needed.
64 balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
65 virtio_balloon_handle_output(const char *name, uint64_t gpa) "section name: %s gpa: %"PRIx64
66 virtio_balloon_get_config(uint32_t num_pages, uint32_t actual) "num_pages: %d actual: %d"
67 virtio_balloon_set_config(uint32_t actual, uint32_t oldactual) "actual: %d oldactual: %d"
68 virtio_balloon_to_target(uint64_t target, uint32_t num_pages) "balloon target: %"PRIx64" num_pages: %d"
70 # hw/intc/apic_common.c
71 cpu_set_apic_base(uint64_t val) "%016"PRIx64
72 cpu_get_apic_base(uint64_t val) "%016"PRIx64
74 apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d"
75 apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
76 apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
79 apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
80 apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
81 apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
82 apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
85 cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
86 cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
87 cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
88 cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
91 nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
92 nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
95 ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
96 ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
97 ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
98 ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
99 ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
100 ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
101 ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
102 ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
103 ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
104 ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
105 ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
106 ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
107 ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
108 ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
109 ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
110 ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
111 ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
112 ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
115 fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d = %d"
116 fw_cfg_read(void *s, uint64_t ret) "%p = %"PRIx64
117 fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %s (%zd bytes)"
119 # hw/display/jazz_led.c
120 jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x"
121 jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x"
124 xenfb_mouse_event(void *opaque, int dx, int dy, int dz, int button_state, int abs_pointer_wanted) "%p x %d y %d z %d bs %#x abs %d"
125 xenfb_input_connected(void *xendev, int abs_pointer_wanted) "%p abs %d"
128 lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
129 lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
131 # hw/intc/slavio_intctl.c
132 slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
133 slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
134 slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
135 slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
136 slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
137 slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
138 slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
139 slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
140 slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
141 slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
142 slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
143 slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
146 ps2_put_keycode(void *opaque, int keycode) "%p keycode %d"
147 ps2_read_data(void *opaque) "%p"
148 ps2_set_ledstate(void *s, int ledstate) "%p ledstate %d"
149 ps2_reset_keyboard(void *s) "%p"
150 ps2_write_keyboard(void *opaque, int val) "%p val %d"
151 ps2_keyboard_set_translation(void *opaque, int mode) "%p mode %d"
152 ps2_mouse_send_packet(void *s, int dx1, int dy1, int dz1, int b) "%p x %d y %d z %d bs %#x"
153 ps2_mouse_event_disabled(void *opaque, int dx, int dy, int dz, int buttons_state, int mouse_dx, int mouse_dy, int mouse_dz) "%p x %d y %d z %d bs %#x mx %d my %d mz %d "
154 ps2_mouse_event(void *opaque, int dx, int dy, int dz, int buttons_state, int mouse_dx, int mouse_dy, int mouse_dz) "%p x %d y %d z %d bs %#x mx %d my %d mz %d "
155 ps2_mouse_fake_event(void *opaque) "%p"
156 ps2_write_mouse(void *opaque, int val) "%p val %d"
157 ps2_kbd_reset(void *opaque) "%p"
158 ps2_mouse_reset(void *opaque) "%p"
159 ps2_kbd_init(void *s) "%p"
160 ps2_mouse_init(void *s) "%p"
162 # hw/misc/slavio_misc.c
163 slavio_misc_update_irq_raise(void) "Raise IRQ"
164 slavio_misc_update_irq_lower(void) "Lower IRQ"
165 slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
166 slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
167 slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
168 slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
169 slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
170 slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
171 slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
172 slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
173 slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
174 slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
175 slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
176 apc_mem_writeb(uint32_t val) "Write power management %02x"
177 apc_mem_readb(uint32_t ret) "Read power management %02x"
178 slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
179 slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
180 slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
181 slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
183 # hw/timer/slavio_timer.c
184 slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
185 slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
186 slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64
187 slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
188 slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
189 slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64
190 slavio_timer_mem_writel_counter_invalid(void) "not user timer"
191 slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
192 slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
193 slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
194 slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
195 slavio_timer_mem_writel_mode_invalid(void) "not system timer"
196 slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64
199 jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
200 jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
201 rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
202 rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
204 # hw/dma/sparc32_dma.c
205 ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
206 ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
207 sparc32_dma_set_irq_raise(void) "Raise IRQ"
208 sparc32_dma_set_irq_lower(void) "Lower IRQ"
209 espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
210 espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
211 sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
212 sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
213 sparc32_dma_enable_raise(void) "Raise DMA enable"
214 sparc32_dma_enable_lower(void) "Lower DMA enable"
217 sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
218 sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
219 sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
220 sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
222 # hw/dma/sun4m_iommu.c
223 sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
224 sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
225 sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64
226 sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
227 sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
228 sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
229 sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
230 sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64
233 usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s"
234 usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s, expected %s"
237 usb_port_claim(int bus, const char *port) "bus %d, port %s"
238 usb_port_attach(int bus, const char *port, const char *devspeed, const char *portspeed) "bus %d, port %s, devspeed %s, portspeed %s"
239 usb_port_detach(int bus, const char *port) "bus %d, port %s"
240 usb_port_release(int bus, const char *port) "bus %d, port %s"
243 usb_ohci_iso_td_read_failed(uint32_t addr) "ISO_TD read error at %x"
244 usb_ohci_iso_td_head(uint32_t head, uint32_t tail, uint32_t flags, uint32_t bp, uint32_t next, uint32_t be, uint32_t framenum, uint32_t startframe, uint32_t framecount, int rel_frame_num) "ISO_TD ED head 0x%.8x tailp 0x%.8x\n0x%.8x 0x%.8x 0x%.8x 0x%.8x\nframe_number 0x%.8x starting_frame 0x%.8x\nframe_count 0x%.8x relative %d"
245 usb_ohci_iso_td_head_offset(uint32_t o0, uint32_t o1, uint32_t o2, uint32_t o3, uint32_t o4, uint32_t o5, uint32_t o6, uint32_t o7) "0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x"
246 usb_ohci_iso_td_relative_frame_number_neg(int rel) "ISO_TD R=%d < 0"
247 usb_ohci_iso_td_relative_frame_number_big(int rel, int count) "ISO_TD R=%d > FC=%d"
248 usb_ohci_iso_td_bad_direction(int dir) "Bad direction %d"
249 usb_ohci_iso_td_bad_bp_be(uint32_t bp, uint32_t be) "ISO_TD bp 0x%.8x be 0x%.8x"
250 usb_ohci_iso_td_bad_cc_not_accessed(uint32_t start, uint32_t next) "ISO_TD cc != not accessed 0x%.8x 0x%.8x"
251 usb_ohci_iso_td_bad_cc_overrun(uint32_t start, uint32_t next) "ISO_TD start_offset=0x%.8x > next_offset=0x%.8x"
252 usb_ohci_iso_td_so(uint32_t so, uint32_t eo, uint32_t s, uint32_t e, const char *str, ssize_t len, int ret) "0x%.8x eo 0x%.8x\nsa 0x%.8x ea 0x%.8x\ndir %s len %zu ret %d"
253 usb_ohci_iso_td_data_overrun(int ret, ssize_t len) "DataOverrun %d > %zu"
254 usb_ohci_iso_td_data_underrun(int ret) "DataUnderrun %d"
255 usb_ohci_iso_td_nak(int ret) "got NAK/STALL %d"
256 usb_ohci_iso_td_bad_response(int ret) "Bad device response %d"
257 usb_ohci_port_attach(int index) "port #%d"
258 usb_ohci_port_detach(int index) "port #%d"
259 usb_ohci_port_wakeup(int index) "port #%d"
260 usb_ohci_port_suspend(int index) "port #%d"
261 usb_ohci_port_reset(int index) "port #%d"
262 usb_ohci_remote_wakeup(const char *s) "%s: SUSPEND->RESUME"
263 usb_ohci_reset(const char *s) "%s"
264 usb_ohci_start(const char *s) "%s: USB Operational"
265 usb_ohci_resume(const char *s) "%s: USB Resume"
266 usb_ohci_stop(const char *s) "%s: USB Suspended"
267 usb_ohci_exit(const char *s) "%s"
268 usb_ohci_set_ctl(const char *s, uint32_t new_state) "%s: new state 0x%x"
269 usb_ohci_td_underrun(void) ""
270 usb_ohci_td_dev_error(void) ""
271 usb_ohci_td_nak(void) ""
272 usb_ohci_td_stall(void) ""
273 usb_ohci_td_babble(void) ""
274 usb_ohci_td_bad_device_response(int rc) "%d"
275 usb_ohci_td_read_error(uint32_t addr) "TD read error at %x"
276 usb_ohci_td_bad_direction(int dir) "Bad direction %d"
277 usb_ohci_td_skip_async(void) ""
278 usb_ohci_td_pkt_hdr(uint32_t addr, int64_t pktlen, int64_t len, const char *s, int flag_r, uint32_t cbp, uint32_t be) " TD @ 0x%.8x %" PRId64 " of %" PRId64 " bytes %s r=%d cbp=0x%.8x be=0x%.8x"
279 usb_ohci_td_pkt_short(const char *dir, const char *buf) "%s data: %s"
280 usb_ohci_td_pkt_full(const char *dir, const char *buf) "%s data: %s"
281 usb_ohci_td_too_many_pending(void) ""
282 usb_ohci_td_packet_status(int status) "status=%d"
283 usb_ohci_ed_read_error(uint32_t addr) "ED read error at %x"
284 usb_ohci_ed_pkt(uint32_t cur, int h, int c, uint32_t head, uint32_t tail, uint32_t next) "ED @ 0x%.8x h=%u c=%u\n head=0x%.8x tailp=0x%.8x next=0x%.8x"
285 usb_ohci_ed_pkt_flags(uint32_t fa, uint32_t en, uint32_t d, int s, int k, int f, uint32_t mps) "fa=%u en=%u d=%u s=%u k=%u f=%u mps=%u"
286 usb_ohci_hcca_read_error(uint32_t addr) "HCCA read error at %x"
287 usb_ohci_mem_read_unaligned(uint32_t addr) "at %x"
288 usb_ohci_mem_read_bad_offset(uint32_t addr) "%x"
289 usb_ohci_mem_write_unaligned(uint32_t addr) "at %x"
290 usb_ohci_mem_write_bad_offset(uint32_t addr) "%x"
291 usb_ohci_process_lists(uint32_t head, uint32_t cur) "head %x, cur %x"
292 usb_ohci_bus_eof_timer_failed(const char *name) "%s: timer_new_ns failed"
293 usb_ohci_set_frame_interval(const char *name, uint16_t fi_x, uint16_t fi_u) "%s: FrameInterval = 0x%x (%u)"
294 usb_ohci_hub_power_up(void) "powered up all ports"
295 usb_ohci_hub_power_down(void) "powered down all ports"
296 usb_ohci_init_time(int64_t frametime, int64_t bittime) "usb_bit_time=%" PRId64 " usb_frame_time=%" PRId64
297 usb_ohci_die(void) ""
298 usb_ohci_async_complete(void) ""
301 usb_ehci_reset(void) "=== RESET ==="
302 usb_ehci_unrealize(void) "=== UNREALIZE ==="
303 usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
304 usb_ehci_opreg_write(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
305 usb_ehci_opreg_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
306 usb_ehci_portsc_read(uint32_t addr, uint32_t port, uint32_t val) "rd mmio %04x [port %d] = %x"
307 usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) "wr mmio %04x [port %d] = %x"
308 usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_t old) "ch mmio %04x [port %d] = %x (old: %x)"
309 usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
310 usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
311 usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
312 usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
313 usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d"
314 usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
315 usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
316 usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
317 usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d"
318 usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d"
319 usb_ehci_port_attach(uint32_t port, const char *owner, const char *device) "attach port #%d, owner %s, device %s"
320 usb_ehci_port_detach(uint32_t port, const char *owner) "detach port #%d, owner %s"
321 usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
322 usb_ehci_port_suspend(uint32_t port) "port #%d"
323 usb_ehci_port_wakeup(uint32_t port) "port #%d"
324 usb_ehci_port_resume(uint32_t port) "port #%d"
325 usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
326 usb_ehci_packet_action(void *q, void *p, const char *action) "q %p p %p: %s"
327 usb_ehci_irq(uint32_t level, uint32_t frindex, uint32_t sts, uint32_t mask) "level %d, frindex 0x%04x, sts 0x%x, mask 0x%x"
328 usb_ehci_guest_bug(const char *reason) "%s"
329 usb_ehci_doorbell_ring(void) ""
330 usb_ehci_doorbell_ack(void) ""
331 usb_ehci_dma_error(void) ""
334 usb_uhci_reset(void) "=== RESET ==="
335 usb_uhci_exit(void) "=== EXIT ==="
336 usb_uhci_schedule_start(void) ""
337 usb_uhci_schedule_stop(void) ""
338 usb_uhci_frame_start(uint32_t num) "nr %d"
339 usb_uhci_frame_stop_bandwidth(void) ""
340 usb_uhci_frame_loop_stop_idle(void) ""
341 usb_uhci_frame_loop_continue(void) ""
342 usb_uhci_mmio_readw(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%04x"
343 usb_uhci_mmio_writew(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%04x"
344 usb_uhci_queue_add(uint32_t token) "token 0x%x"
345 usb_uhci_queue_del(uint32_t token, const char *reason) "token 0x%x: %s"
346 usb_uhci_packet_add(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
347 usb_uhci_packet_link_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
348 usb_uhci_packet_unlink_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
349 usb_uhci_packet_cancel(uint32_t token, uint32_t addr, int done) "token 0x%x, td 0x%x, done %d"
350 usb_uhci_packet_complete_success(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
351 usb_uhci_packet_complete_shortxfer(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
352 usb_uhci_packet_complete_stall(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
353 usb_uhci_packet_complete_babble(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
354 usb_uhci_packet_complete_error(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
355 usb_uhci_packet_del(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x"
356 usb_uhci_qh_load(uint32_t qh) "qh 0x%x"
357 usb_uhci_td_load(uint32_t qh, uint32_t td, uint32_t ctrl, uint32_t token) "qh 0x%x, td 0x%x, ctrl 0x%x, token 0x%x"
358 usb_uhci_td_queue(uint32_t td, uint32_t ctrl, uint32_t token) "td 0x%x, ctrl 0x%x, token 0x%x"
359 usb_uhci_td_nextqh(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
360 usb_uhci_td_async(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
361 usb_uhci_td_complete(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x"
364 usb_xhci_reset(void) "=== RESET ==="
365 usb_xhci_exit(void) "=== EXIT ==="
366 usb_xhci_run(void) ""
367 usb_xhci_stop(void) ""
368 usb_xhci_cap_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
369 usb_xhci_oper_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
370 usb_xhci_port_read(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, ret 0x%08x"
371 usb_xhci_runtime_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
372 usb_xhci_doorbell_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x"
373 usb_xhci_oper_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
374 usb_xhci_port_write(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, val 0x%08x"
375 usb_xhci_runtime_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
376 usb_xhci_doorbell_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x"
377 usb_xhci_irq_intx(uint32_t level) "level %d"
378 usb_xhci_irq_msi(uint32_t nr) "nr %d"
379 usb_xhci_irq_msix(uint32_t nr) "nr %d"
380 usb_xhci_irq_msix_use(uint32_t nr) "nr %d"
381 usb_xhci_irq_msix_unuse(uint32_t nr) "nr %d"
382 usb_xhci_queue_event(uint32_t vector, uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) "v %d, idx %d, %s, %s, p %016" PRIx64 ", s %08x, c 0x%08x"
383 usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) "addr %016" PRIx64 ", %s, p %016" PRIx64 ", s %08x, c 0x%08x"
384 usb_xhci_port_reset(uint32_t port, bool warm) "port %d, warm %d"
385 usb_xhci_port_link(uint32_t port, uint32_t pls) "port %d, pls %d"
386 usb_xhci_port_notify(uint32_t port, uint32_t pls) "port %d, bits %x"
387 usb_xhci_slot_enable(uint32_t slotid) "slotid %d"
388 usb_xhci_slot_disable(uint32_t slotid) "slotid %d"
389 usb_xhci_slot_address(uint32_t slotid, const char *port) "slotid %d, port %s"
390 usb_xhci_slot_configure(uint32_t slotid) "slotid %d"
391 usb_xhci_slot_evaluate(uint32_t slotid) "slotid %d"
392 usb_xhci_slot_reset(uint32_t slotid) "slotid %d"
393 usb_xhci_ep_enable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
394 usb_xhci_ep_disable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
395 usb_xhci_ep_set_dequeue(uint32_t slotid, uint32_t epid, uint32_t streamid, uint64_t param) "slotid %d, epid %d, streamid %d, ptr %016" PRIx64
396 usb_xhci_ep_kick(uint32_t slotid, uint32_t epid, uint32_t streamid) "slotid %d, epid %d, streamid %d"
397 usb_xhci_ep_stop(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
398 usb_xhci_ep_reset(uint32_t slotid, uint32_t epid) "slotid %d, epid %d"
399 usb_xhci_ep_state(uint32_t slotid, uint32_t epid, const char *os, const char *ns) "slotid %d, epid %d, %s -> %s"
400 usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid, uint32_t streamid) "%p: slotid %d, epid %d, streamid %d"
401 usb_xhci_xfer_async(void *xfer) "%p"
402 usb_xhci_xfer_nak(void *xfer) "%p"
403 usb_xhci_xfer_retry(void *xfer) "%p"
404 usb_xhci_xfer_success(void *xfer, uint32_t bytes) "%p: len %d"
405 usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d"
406 usb_xhci_unimplemented(const char *item, int nr) "%s (0x%x)"
409 usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
410 usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
411 usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
412 usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
413 usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
414 usb_desc_bos(int addr, int len, int ret) "dev %d bos, len %d, ret %d"
415 usb_desc_msos(int addr, int index, int len, int ret) "dev %d msos, index 0x%x, len %d, ret %d"
416 usb_set_addr(int addr) "dev %d"
417 usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
418 usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, altsetting %d, ret %d"
419 usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
420 usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
423 usb_hub_reset(int addr) "dev %d"
424 usb_hub_control(int addr, int request, int value, int index, int length) "dev %d, req 0x%x, value %d, index %d, langth %d"
425 usb_hub_get_port_status(int addr, int nr, int status, int changed) "dev %d, port %d, status 0x%x, changed 0x%x"
426 usb_hub_set_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s"
427 usb_hub_clear_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s"
428 usb_hub_attach(int addr, int nr) "dev %d, port %d"
429 usb_hub_detach(int addr, int nr) "dev %d, port %d"
430 usb_hub_status_report(int addr, int status) "dev %d, status 0x%x"
433 usb_uas_reset(int addr) "dev %d"
434 usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 %08x-%08x"
435 usb_uas_response(int addr, uint16_t tag, uint8_t code) "dev %d, tag 0x%x, code 0x%x"
436 usb_uas_sense(int addr, uint16_t tag, uint8_t status) "dev %d, tag 0x%x, status 0x%x"
437 usb_uas_read_ready(int addr, uint16_t tag) "dev %d, tag 0x%x"
438 usb_uas_write_ready(int addr, uint16_t tag) "dev %d, tag 0x%x"
439 usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, uint32_t usize, uint32_t soff, uint32_t ssize) "dev %d, tag 0x%x, copy %d, usb-pkt %d/%d, scsi-buf %d/%d"
440 usb_uas_scsi_data(int addr, uint16_t tag, uint32_t bytes) "dev %d, tag 0x%x, bytes %d"
441 usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, uint32_t resid) "dev %d, tag 0x%x, status 0x%x, residue %d"
442 usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) "dev %d, tag 0x%x, task-tag 0x%x"
443 usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%x, lun %d"
444 usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x"
447 usb_mtp_reset(int addr) "dev %d"
448 usb_mtp_command(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1, uint32_t arg2, uint32_t arg3, uint32_t arg4) "dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x, 0x%x, 0x%x, 0x%x"
449 usb_mtp_success(int dev, uint32_t trans, uint32_t arg0, uint32_t arg1) "dev %d, trans 0x%x, args 0x%x, 0x%x"
450 usb_mtp_error(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1) "dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x"
451 usb_mtp_data_in(int dev, uint32_t trans, uint32_t len) "dev %d, trans 0x%x, len %d"
452 usb_mtp_xfer(int dev, uint32_t ep, uint32_t dlen, uint32_t plen) "dev %d, ep %d, %d/%d"
453 usb_mtp_nak(int dev, uint32_t ep) "dev %d, ep %d"
454 usb_mtp_stall(int dev, const char *reason) "dev %d, reason: %s"
455 usb_mtp_op_get_device_info(int dev) "dev %d"
456 usb_mtp_op_open_session(int dev) "dev %d"
457 usb_mtp_op_close_session(int dev) "dev %d"
458 usb_mtp_op_get_storage_ids(int dev) "dev %d"
459 usb_mtp_op_get_storage_info(int dev) "dev %d"
460 usb_mtp_op_get_num_objects(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
461 usb_mtp_op_get_object_handles(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
462 usb_mtp_op_get_object_info(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
463 usb_mtp_op_get_object(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
464 usb_mtp_op_get_partial_object(int dev, uint32_t handle, const char *path, uint32_t offset, uint32_t length) "dev %d, handle 0x%x, path %s, off %d, len %d"
465 usb_mtp_op_unknown(int dev, uint32_t code) "dev %d, command code 0x%x"
466 usb_mtp_object_alloc(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
467 usb_mtp_object_free(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
468 usb_mtp_add_child(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s"
469 usb_mtp_inotify_event(int dev, const char *path, uint32_t mask, const char *s) "dev %d, path %s mask 0x%x event %s"
471 # hw/usb/host-libusb.c
472 usb_host_open_started(int bus, int addr) "dev %d:%d"
473 usb_host_open_success(int bus, int addr) "dev %d:%d"
474 usb_host_open_failure(int bus, int addr) "dev %d:%d"
475 usb_host_close(int bus, int addr) "dev %d:%d"
476 usb_host_attach_kernel(int bus, int addr, int interface) "dev %d:%d, if %d"
477 usb_host_detach_kernel(int bus, int addr, int interface) "dev %d:%d, if %d"
478 usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d"
479 usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d"
480 usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d"
481 usb_host_claim_interface(int bus, int addr, int config, int interface) "dev %d:%d, config %d, if %d"
482 usb_host_release_interface(int bus, int addr, int interface) "dev %d:%d, if %d"
483 usb_host_req_control(int bus, int addr, void *p, int req, int value, int index) "dev %d:%d, packet %p, req 0x%x, value %d, index %d"
484 usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) "dev %d:%d, packet %p, in %d, ep %d, size %d"
485 usb_host_req_complete(int bus, int addr, void *p, int status, int length) "dev %d:%d, packet %p, status %d, length %d"
486 usb_host_req_emulated(int bus, int addr, void *p, int status) "dev %d:%d, packet %p, status %d"
487 usb_host_req_canceled(int bus, int addr, void *p) "dev %d:%d, packet %p"
488 usb_host_iso_start(int bus, int addr, int ep) "dev %d:%d, ep %d"
489 usb_host_iso_stop(int bus, int addr, int ep) "dev %d:%d, ep %d"
490 usb_host_iso_out_of_bufs(int bus, int addr, int ep) "dev %d:%d, ep %d"
491 usb_host_reset(int bus, int addr) "dev %d:%d"
492 usb_host_auto_scan_enabled(void)
493 usb_host_auto_scan_disabled(void)
494 usb_host_parse_config(int bus, int addr, int value, int active) "dev %d:%d, value %d, active %d"
495 usb_host_parse_interface(int bus, int addr, int num, int alt, int active) "dev %d:%d, num %d, alt %d, active %d"
496 usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *type, int active) "dev %d:%d, ep %d, %s, %s, active %d"
497 usb_host_parse_error(int bus, int addr, const char *errmsg) "dev %d:%d, msg %s"
500 scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
501 scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d"
502 scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
503 scsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
504 scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
505 scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
506 scsi_req_continue_canceled(int target, int lun, int tag) "target %d lun %d tag %d"
507 scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
508 scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64
509 scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
510 scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
511 scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) "target %d lun %d key %#02x asc %#02x ascq %#02x"
512 scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
513 scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
514 scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
515 scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
518 vm_state_notify(int running, int reason) "running %d reason %d"
519 load_file(const char *name, const char *path) "name %s location %s"
520 runstate_set(int new_state) "new state %d"
521 system_wakeup_request(int reason) "reason=%d"
522 qemu_system_shutdown_request(void) ""
523 qemu_system_powerdown_request(void) ""
525 # hw/display/g364fb.c
526 g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
527 g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
529 # hw/timer/grlib_gptimer.c
530 grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
531 grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
532 grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
533 grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
534 grlib_gptimer_hit(int id) "timer:%d HIT"
535 grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
536 grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
538 # hw/intc/grlib_irqmp.c
539 grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x"
540 grlib_irqmp_ack(int intno) "interrupt:%d"
541 grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
542 grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
543 grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
545 # hw/char/grlib_apbuart.c
546 grlib_apbuart_event(int event) "event:%d"
547 grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
548 grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64
551 leon3_set_irq(int intno) "Set CPU IRQ %d"
552 leon3_reset_irq(int intno) "Reset CPU IRQ %d"
555 spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
556 spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
557 spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
558 spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
559 spice_vmc_event(int event) "spice vmc event %d"
562 lm32_pic_raise_irq(void) "Raise CPU interrupt"
563 lm32_pic_lower_irq(void) "Lower CPU interrupt"
564 lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
565 lm32_pic_set_im(uint32_t im) "im 0x%08x"
566 lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
567 lm32_pic_get_im(uint32_t im) "im 0x%08x"
568 lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
570 # hw/char/lm32_juart.c
571 lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
572 lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
573 lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
574 lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
576 # hw/timer/lm32_timer.c
577 lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
578 lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
579 lm32_timer_hit(void) "timer hit"
580 lm32_timer_irq_state(int level) "irq state %d"
582 # hw/char/lm32_uart.c
583 lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
584 lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
585 lm32_uart_irq_state(int level) "irq state %d"
588 mptsas_command_complete(void *dev, uint32_t ctx, uint32_t status, uint32_t resid) "dev %p context 0x%08x status %x resid %d"
589 mptsas_diag_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x"
590 mptsas_diag_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x"
591 mptsas_irq_intx(void *dev, int level) "dev %p level %d"
592 mptsas_irq_msi(void *dev) "dev %p "
593 mptsas_mmio_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
594 mptsas_mmio_unhandled_read(void *dev, uint32_t addr) "dev %p addr 0x%08x"
595 mptsas_mmio_unhandled_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
596 mptsas_mmio_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
597 mptsas_process_message(void *dev, int msg, uint32_t ctx) "dev %p cmd %d context 0x%08x\n"
598 mptsas_process_scsi_io_request(void *dev, int bus, int target, int lun, uint64_t len) "dev %p dev %d:%d:%d length %"PRIu64""
599 mptsas_reset(void *dev) "dev %p "
600 mptsas_scsi_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) "dev %p context 0x%08x: %"PRIu64"/%"PRIu64""
601 mptsas_sgl_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) "dev %p context 0x%08x: %"PRIu64"/%"PRIu64""
602 mptsas_unhandled_cmd(void *dev, uint32_t ctx, uint8_t msg_cmd) "dev %p context 0x%08x: Unhandled cmd %x"
603 mptsas_unhandled_doorbell_cmd(void *dev, int cmd) "dev %p value 0x%08x"
605 # hw/scsi/mptconfig.c
606 mptsas_config_sas_device(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d"
607 mptsas_config_sas_phy(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d"
610 megasas_init_firmware(uint64_t pa) "pa %" PRIx64 " "
611 megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at %" PRIx64 " len %d head %" PRIx64 " tail %" PRIx64 " flags %x"
612 megasas_initq_map_failed(int frame) "scmd %d: failed to map queue"
613 megasas_initq_mapped(uint64_t pa) "queue already mapped at %" PRIx64
614 megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw cmds %d"
615 megasas_qf_mapped(unsigned int index) "skip mapped frame %x"
616 megasas_qf_new(unsigned int index, uint64_t frame) "frame %x addr %" PRIx64
617 megasas_qf_busy(unsigned long pa) "all frames busy for frame %lx"
618 megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int head, unsigned int tail, int busy) "frame %x count %d context %" PRIx64 " head %x tail %x busy %d"
619 megasas_qf_update(unsigned int head, unsigned int tail, unsigned int busy) "head %x tail %x busy %d"
620 megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu"
621 megasas_qf_complete_noirq(uint64_t context) "context %" PRIx64 " "
622 megasas_qf_complete(uint64_t context, unsigned int head, unsigned int tail, int busy) "context %" PRIx64 " head %x tail %x busy %d"
623 megasas_frame_busy(uint64_t addr) "frame %" PRIx64 " busy"
624 megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: MFI cmd %x"
625 megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu"
626 megasas_scsi_target_not_present(const char *frame, int bus, int dev, int lun) "%s dev %x/%x/%x"
627 megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun, int len) "%s dev %x/%x/%x invalid cdb len %d"
628 megasas_iov_read_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
629 megasas_iov_write_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
630 megasas_iov_read_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
631 megasas_iov_write_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
632 megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) "%s dev %x/%x"
633 megasas_scsi_read_start(int cmd, int len) "scmd %d: transfer %d bytes of data"
634 megasas_scsi_write_start(int cmd, int len) "scmd %d: transfer %d bytes of data"
635 megasas_scsi_nodata(int cmd) "scmd %d: no data to be transferred"
636 megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) "scmd %d: status %x, len %u/%u"
637 megasas_command_complete(int cmd, uint32_t status, uint32_t resid) "scmd %d: status %x, residual %d"
638 megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned long lba, unsigned long count) "scmd %d: %s dev %x/%x lba %lx count %lu"
639 megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun) "scmd %d: %s dev 1/%x/%x LUN not present"
640 megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)"
641 megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)"
642 megasas_io_complete(int cmd, uint32_t len) "scmd %d: %d bytes"
643 megasas_iovec_sgl_overflow(int cmd, int index, int limit) "scmd %d: iovec count %d limit %d"
644 megasas_iovec_sgl_underflow(int cmd, int index) "scmd %d: iovec count %d"
645 megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) "scmd %d: element %d pa %" PRIx64 " len %u"
646 megasas_iovec_overflow(int cmd, int len, int limit) "scmd %d: len %d limit %d"
647 megasas_iovec_underflow(int cmd, int len, int limit) "scmd %d: len %d limit %d"
648 megasas_handle_dcmd(int cmd, int opcode) "scmd %d: MFI DCMD opcode %x"
649 megasas_finish_dcmd(int cmd, int size) "scmd %d: MFI DCMD wrote %d bytes"
650 megasas_dcmd_req_alloc_failed(int cmd, const char *desc) "scmd %d: %s"
651 megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) "scmd %d: %s to dev %d"
652 megasas_dcmd_internal_finish(int cmd, int opcode, int lun) "scmd %d: cmd %x lun %d"
653 megasas_dcmd_internal_invalid(int cmd, int opcode) "scmd %d: DCMD %x"
654 megasas_dcmd_unhandled(int cmd, int opcode, int len) "scmd %d: opcode %x, len %d"
655 megasas_dcmd_zero_sge(int cmd) "scmd %d: zero DCMD sge count"
656 megasas_dcmd_invalid_sge(int cmd, int count) "scmd %d: DCMD sge count %d"
657 megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) "scmd %d: xfer len %ld, max %ld"
658 megasas_dcmd_enter(int cmd, const char *dcmd, int len) "scmd %d: DCMD %s len %d"
659 megasas_dcmd_dummy(int cmd, unsigned long size) "scmd %d: xfer len %ld"
660 megasas_dcmd_set_fw_time(int cmd, unsigned long time) "scmd %d: Set FW time %lx"
661 megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) "scmd %d: DCMD PD get list: %d / %d PDs, size %d"
662 megasas_dcmd_ld_get_list(int cmd, int num, int max) "scmd %d: DCMD LD get list: found %d / %d LDs"
663 megasas_dcmd_ld_get_info(int cmd, int ld_id) "scmd %d: dev %d"
664 megasas_dcmd_ld_list_query(int cmd, int flags) "scmd %d: query flags %x"
665 megasas_dcmd_pd_get_info(int cmd, int pd_id) "scmd %d: dev %d"
666 megasas_dcmd_pd_list_query(int cmd, int flags) "scmd %d: query flags %x"
667 megasas_dcmd_reset_ld(int cmd, int target_id) "scmd %d: dev %d"
668 megasas_dcmd_unsupported(int cmd, unsigned long size) "scmd %d: set properties len %ld"
669 megasas_abort_frame(int cmd, int abort_cmd) "scmd %d: frame %x"
670 megasas_abort_no_cmd(int cmd, uint64_t context) "scmd %d: no active command for frame context %" PRIx64
671 megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) "scmd %d: invalid frame context %" PRIx64 " for abort frame %x"
672 megasas_reset(int fw_state) "firmware state %x"
673 megasas_init(int sges, int cmds, const char *mode) "Using %d sges, %d cmds, %s mode"
674 megasas_msix_raise(int vector) "vector %d"
675 megasas_msi_raise(int vector) "vector %d"
676 megasas_irq_lower(void) "INTx"
677 megasas_irq_raise(void) "INTx"
678 megasas_intr_enabled(void) "Interrupts enabled"
679 megasas_intr_disabled(void) "Interrupts disabled"
680 megasas_msix_enabled(int vector) "vector %d"
681 megasas_msi_enabled(int vector) "vector %d"
682 megasas_mmio_readl(const char *reg, uint32_t val) "reg %s: 0x%x"
683 megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx"
684 megasas_mmio_writel(const char *reg, uint32_t val) "reg %s: 0x%x"
685 megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
687 # hw/audio/milkymist-ac97.c
688 milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
689 milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
690 milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
691 milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
692 milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
693 milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
694 milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
695 milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
696 milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
697 milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
699 # hw/misc/milkymist-hpdmc.c
700 milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
701 milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
703 # hw/sd/milkymist-memcard.c
704 milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
705 milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
707 # hw/net/milkymist-minimac2.c
708 milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
709 milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
710 milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
711 milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
712 milkymist_minimac2_tx_frame(uint32_t length) "length %u"
713 milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u"
714 milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d"
715 milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
716 milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
717 milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
719 # hw/misc/milkymist-pfpu.c
720 milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
721 milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
722 milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
723 milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
725 # hw/input/milkymist-softusb.c
726 milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
727 milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
728 milkymist_softusb_mevt(uint8_t m) "m %d"
729 milkymist_softusb_kevt(uint8_t m) "m %d"
730 milkymist_softusb_pulse_irq(void) "Pulse IRQ"
732 # hw/timer/milkymist-sysctl.c
733 milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
734 milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
735 milkymist_sysctl_icap_write(uint32_t value) "value %08x"
736 milkymist_sysctl_start_timer0(void) "Start timer0"
737 milkymist_sysctl_stop_timer0(void) "Stop timer0"
738 milkymist_sysctl_start_timer1(void) "Start timer1"
739 milkymist_sysctl_stop_timer1(void) "Stop timer1"
740 milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
741 milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
743 # hw/display/milkymist-tmu2.c
744 milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
745 milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
746 milkymist_tmu2_start(void) "Start TMU"
747 milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
749 # hw/char/milkymist-uart.c
750 milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
751 milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
752 milkymist_uart_raise_irq(void) "Raise IRQ"
753 milkymist_uart_lower_irq(void) "Lower IRQ"
755 # hw/display/milkymist-vgafb.c
756 milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
757 milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
760 mipsnet_send(uint32_t size) "sending len=%u"
761 mipsnet_receive(uint32_t size) "receiving len=%u"
762 mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
763 mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64
764 mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (%02x)"
767 pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
768 pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
769 pc87312_info_floppy(uint32_t base) "base 0x%x"
770 pc87312_info_ide(uint32_t base) "base 0x%x"
771 pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u"
772 pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u"
774 # hw/scsi/vmw_pvscsi.c
775 pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) "TX/RX rings logarithms set to %d/%d"
776 pvscsi_ring_init_msg(uint32_t len_log2) "MSG ring logarithm set to %d"
777 pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) "new production counter of completion ring is 0x%"PRIx64
778 pvscsi_ring_flush_msg(uint64_t filled_cmp_ptr) "new production counter of message ring is 0x%"PRIx64
779 pvscsi_update_irq_level(bool raise, uint64_t mask, uint64_t status) "interrupt level set to %d (MASK: 0x%"PRIx64", STATUS: 0x%"PRIx64")"
780 pvscsi_update_irq_msi(void) "sending MSI notification"
781 pvscsi_cmp_ring_put(unsigned long addr) "got completion descriptor 0x%lx"
782 pvscsi_msg_ring_put(unsigned long addr) "got message descriptor 0x%lx"
783 pvscsi_complete_request(uint64_t context, uint64_t len, uint8_t sense_key) "completion: ctx: 0x%"PRIx64", len: 0x%"PRIx64", sense key: %u"
784 pvscsi_get_sg_list(int nsg, size_t size) "get SG list: depth: %u, size: %zu"
785 pvscsi_get_next_sg_elem(uint32_t flags) "unknown flags in SG element (val: 0x%x)"
786 pvscsi_command_complete_not_found(uint32_t tag) "can't find request for tag 0x%x"
787 pvscsi_command_complete_data_run(void) "not all data required for command transferred"
788 pvscsi_command_complete_sense_len(int len) "sense information length is %d bytes"
789 pvscsi_convert_sglist(uint64_t context, unsigned long addr, uint32_t resid) "element: ctx: 0x%"PRIx64" addr: 0x%lx, len: %ul"
790 pvscsi_process_req_descr(uint8_t cmd, uint64_t ctx) "SCSI cmd 0x%x, ctx: 0x%"PRIx64
791 pvscsi_process_req_descr_unknown_device(void) "command directed to unknown device rejected"
792 pvscsi_process_req_descr_invalid_dir(void) "command with invalid transfer direction rejected"
793 pvscsi_process_io(unsigned long addr) "got descriptor 0x%lx"
794 pvscsi_on_cmd_noimpl(const char* cmd) "unimplemented command %s ignored"
795 pvscsi_on_cmd_reset_dev(uint32_t tgt, int lun, void* dev) "PVSCSI_CMD_RESET_DEVICE[target %u lun %d (dev 0x%p)]"
796 pvscsi_on_cmd_arrived(const char* cmd) "command %s arrived"
797 pvscsi_on_cmd_abort(uint64_t ctx, uint32_t tgt) "command PVSCSI_CMD_ABORT_CMD for ctx 0x%"PRIx64", target %u"
798 pvscsi_on_cmd_unknown(uint64_t cmd_id) "unknown command %"PRIx64
799 pvscsi_on_cmd_unknown_data(uint32_t data) "data for unknown command 0x:%x"
800 pvscsi_io_write(const char* cmd, uint64_t val) "%s write: %"PRIx64
801 pvscsi_io_write_unknown(unsigned long addr, unsigned sz, uint64_t val) "unknown write address: 0x%lx size: %u bytes value: 0x%"PRIx64
802 pvscsi_io_read(const char* cmd, uint64_t status) "%s read: 0x%"PRIx64
803 pvscsi_io_read_unknown(unsigned long addr, unsigned sz) "unknown read address: 0x%lx size: %u bytes"
804 pvscsi_init_msi_fail(int res) "failed to initialize MSI, error %d"
805 pvscsi_state(const char* state) "starting %s ..."
806 pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) "%s page: %"PRIx64
807 pvscsi_tx_rings_num_pages(const char* label, uint32_t num) "Number of %s pages: %u"
810 xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
811 xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i"
812 xen_ioreq_server_create(uint32_t id) "id: %u"
813 xen_ioreq_server_destroy(uint32_t id) "id: %u"
814 xen_ioreq_server_state(uint32_t id, bool enable) "id: %u: enable: %i"
815 xen_map_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
816 xen_unmap_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
817 xen_map_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
818 xen_unmap_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
819 xen_map_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x"
820 xen_unmap_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x"
821 handle_ioreq(void *req, uint32_t type, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p type=%d dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
822 handle_ioreq_read(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p read type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
823 handle_ioreq_write(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p write type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
824 cpu_ioreq_pio(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p pio dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
825 cpu_ioreq_pio_read_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio read reg data=%#"PRIx64" port=%#"PRIx64" size=%d"
826 cpu_ioreq_pio_write_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio write reg data=%#"PRIx64" port=%#"PRIx64" size=%d"
827 cpu_ioreq_move(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p copy dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
830 xen_map_cache(uint64_t phys_addr) "want %#"PRIx64
831 xen_remap_bucket(uint64_t index) "index %#"PRIx64
832 xen_map_cache_return(void* ptr) "%p"
834 # hw/i386/xen/xen_platform.c
835 xen_platform_log(char *s) "xen platform: %s"
838 qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
839 qemu_coroutine_yield(void *from, void *to) "from %p to %p"
840 qemu_coroutine_terminate(void *co) "self %p"
842 # qemu-coroutine-lock.c
843 qemu_co_queue_run_restart(void *co) "co %p"
844 qemu_co_queue_next(void *nxt) "next %p"
845 qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
846 qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
847 qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
848 qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
851 escc_put_queue(char channel, int b) "channel %c put: 0x%02x"
852 escc_get_queue(char channel, int val) "channel %c get 0x%02x"
853 escc_update_irq(int irq) "IRQ = %d"
854 escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d"
855 escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x"
856 escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d"
857 escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x"
858 escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d"
859 escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d"
860 escc_sunkbd_event_in(int ch, const char *name, int down) "QKeyCode 0x%2.2x [%s], down %d"
861 escc_sunkbd_event_out(int ch) "Translated keycode 0x%2.2x"
862 escc_kbd_command(int val) "Command %d"
863 escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x"
866 esp_error_fifo_overrun(void) "FIFO overrun"
867 esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)"
868 esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
869 esp_raise_irq(void) "Raise IRQ"
870 esp_lower_irq(void) "Lower IRQ"
871 esp_dma_enable(void) "Raise enable"
872 esp_dma_disable(void) "Lower enable"
873 esp_get_cmd(uint32_t dmalen, int target) "len %d target %d"
874 esp_do_busid_cmd(uint8_t busid) "busid 0x%x"
875 esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d"
876 esp_write_response(uint32_t status) "Transfer status (status=%d)"
877 esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d"
878 esp_command_complete(void) "SCSI Command complete"
879 esp_command_complete_unexpected(void) "SCSI command completed unexpectedly"
880 esp_command_complete_fail(void) "Command failed"
881 esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d"
882 esp_handle_ti(uint32_t minlen) "Transfer Information len %d"
883 esp_handle_ti_cmd(uint32_t cmdlen) "command len %d"
884 esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x"
885 esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x"
886 esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)"
887 esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)"
888 esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)"
889 esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)"
890 esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)"
891 esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)"
892 esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)"
893 esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)"
894 esp_mem_writeb_cmd_rstatn(uint32_t val) "Reset ATN (%2.2x)"
895 esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)"
896 esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)"
897 esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)"
898 esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)"
899 esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (%2.2x)"
902 esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction"
903 esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)"
904 esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)"
905 esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
906 esp_pci_dma_read(uint32_t saddr, uint32_t reg) "reg[%d]: 0x%8.8x"
907 esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) "reg[%d]: 0x%8.8x -> 0x%8.8x"
908 esp_pci_dma_idle(uint32_t val) "IDLE (%.8x)"
909 esp_pci_dma_blast(uint32_t val) "BLAST (%.8x)"
910 esp_pci_dma_abort(uint32_t val) "ABORT (%.8x)"
911 esp_pci_dma_start(uint32_t val) "START (%.8x)"
912 esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x"
913 esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x"
916 handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\""
917 monitor_protocol_emitter(void *mon) "mon %p"
918 monitor_protocol_event_handler(uint32_t event, void *qdict) "event=%d data=%p"
919 monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p"
920 monitor_protocol_event_queue(uint32_t event, void *qdict, uint64_t rate) "event=%d data=%p rate=%" PRId64
921 monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64
923 # hw/net/opencores_eth.c
924 open_eth_mii_write(unsigned idx, uint16_t v) "MII[%02x] <- %04x"
925 open_eth_mii_read(unsigned idx, uint16_t v) "MII[%02x] -> %04x"
926 open_eth_update_irq(uint32_t v) "IRQ <- %x"
927 open_eth_receive(unsigned len) "RX: len: %u"
928 open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x"
929 open_eth_receive_reject(void) "RX: rejected"
930 open_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: %08x, len_flags: %08x"
931 open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: %08x, len: %u, tx_len: %u"
932 open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[%02x] -> %08x"
933 open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[%02x] <- %08x"
934 open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[%04x] -> %08x"
935 open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[%04x] <- %08x"
937 # hw/9pfs/virtio-9p.c
938 v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d"
939 v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
940 v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
941 v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s"
942 v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64
943 v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
944 v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}"
945 v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64
946 v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}"
947 v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d"
948 v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p"
949 v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d"
950 v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
951 v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u"
952 v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
953 v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d"
954 v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
955 v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u"
956 v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd"
957 v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u"
958 v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd"
959 v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d"
960 v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd"
961 v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d"
962 v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
963 v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u"
964 v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
965 v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d"
966 v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s"
967 v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
968 v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}"
969 v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d"
970 v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
971 v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64
972 v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d"
973 v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64
974 v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u"
975 v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u"
976 v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d"
977 v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s"
978 v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64
979 v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d"
980 v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
981 v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s"
983 # target-sparc/mmu_helper.c
984 mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
985 mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
986 mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64
987 mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64
988 mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64
989 mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
990 mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
991 mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64
993 # target-sparc/int64_helper.c
994 int_helper_set_softint(uint32_t softint) "new %08x"
995 int_helper_clear_softint(uint32_t softint) "new %08x"
996 int_helper_write_softint(uint32_t softint) "new %08x"
998 # target-sparc/int32_helper.c
999 int_helper_icache_freeze(void) "Instruction cache: freeze"
1000 int_helper_dcache_freeze(void) "Data cache: freeze"
1002 # target-sparc/win_helper.c
1003 win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x"
1004 win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x"
1005 win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)"
1006 win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x"
1007 win_helper_done(uint32_t tl) "tl=%d"
1008 win_helper_retry(uint32_t tl) "tl=%d"
1011 dma_blk_io(void *dbs, void *bs, int64_t offset, bool to_dev) "dbs=%p bs=%p offset=%" PRId64 " to_dev=%d"
1012 dma_aio_cancel(void *dbs) "dbs=%p"
1013 dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p"
1014 dma_blk_cb(void *dbs, int ret) "dbs=%p ret=%d"
1015 dma_map_wait(void *dbs) "dbs=%p"
1018 console_gfx_new(void) ""
1019 console_putchar_csi(int esc_param0, int esc_param1, int ch, int nb_esc_params) "escape sequence CSI%d;%d%c, %d parameters"
1020 console_putchar_unhandled(int ch) "unhandled escape character '%c'"
1021 console_txt_new(int w, int h) "%dx%d"
1022 console_select(int nr) "%d"
1023 console_refresh(int interval) "interval %d ms"
1024 displaysurface_create(void *display_surface, int w, int h) "surface=%p, %dx%d"
1025 displaysurface_create_from(void *display_surface, int w, int h, uint32_t format) "surface=%p, %dx%d, format 0x%x"
1026 displaysurface_create_pixman(void *display_surface) "surface=%p"
1027 displaysurface_free(void *display_surface) "surface=%p"
1028 displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]"
1029 displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]"
1030 ppm_save(const char *filename, void *display_surface) "%s surface=%p"
1033 gd_switch(const char *tab, int width, int height) "tab=%s, width=%d, height=%d"
1034 gd_update(const char *tab, int x, int y, int w, int h) "tab=%s, x=%d, y=%d, w=%d, h=%d"
1035 gd_key_event(const char *tab, int gdk_keycode, int qemu_keycode, const char *action) "tab=%s, translated GDK keycode %d to QEMU keycode %d (%s)"
1036 gd_grab(const char *tab, const char *device, const char *reason) "tab=%s, dev=%s, reason=%s"
1037 gd_ungrab(const char *tab, const char *device) "tab=%s, dev=%s"
1040 vnc_key_guest_leds(bool caps, bool num, bool scroll) "caps %d, num %d, scroll %d"
1041 vnc_key_map_init(const char *layout) "%s"
1042 vnc_key_event_ext(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x, keycode 0x%x [%s]"
1043 vnc_key_event_map(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x -> keycode 0x%x [%s]"
1044 vnc_key_sync_numlock(bool on) "%d"
1045 vnc_key_sync_capslock(bool on) "%d"
1048 input_event_key_number(int conidx, int number, const char *qcode, bool down) "con %d, key number 0x%x [%s], down %d"
1049 input_event_key_qcode(int conidx, const char *qcode, bool down) "con %d, key qcode %s, down %d"
1050 input_event_btn(int conidx, const char *btn, bool down) "con %d, button %s, down %d"
1051 input_event_rel(int conidx, const char *axis, int value) "con %d, axis %s, value %d"
1052 input_event_abs(int conidx, const char *axis, int value) "con %d, axis %s, value 0x%x"
1053 input_event_sync(void) ""
1054 input_mouse_mode(int absolute) "absolute %d"
1056 # hw/display/vmware_vga.c
1057 vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
1058 vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
1059 vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
1060 vmware_palette_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
1061 vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
1062 vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
1063 vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp"
1065 # hw/display/virtio-gpu.c
1066 virtio_gpu_features(bool virgl) "virgl %d"
1067 virtio_gpu_cmd_get_display_info(void) ""
1068 virtio_gpu_cmd_get_caps(void) ""
1069 virtio_gpu_cmd_set_scanout(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d"
1070 virtio_gpu_cmd_res_create_2d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h) "res 0x%x, fmt 0x%x, w %d, h %d"
1071 virtio_gpu_cmd_res_create_3d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h, uint32_t d) "res 0x%x, fmt 0x%x, w %d, h %d, d %d"
1072 virtio_gpu_cmd_res_unref(uint32_t res) "res 0x%x"
1073 virtio_gpu_cmd_res_back_attach(uint32_t res) "res 0x%x"
1074 virtio_gpu_cmd_res_back_detach(uint32_t res) "res 0x%x"
1075 virtio_gpu_cmd_res_xfer_toh_2d(uint32_t res) "res 0x%x"
1076 virtio_gpu_cmd_res_xfer_toh_3d(uint32_t res) "res 0x%x"
1077 virtio_gpu_cmd_res_xfer_fromh_3d(uint32_t res) "res 0x%x"
1078 virtio_gpu_cmd_res_flush(uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "res 0x%x, w %d, h %d, x %d, y %d"
1079 virtio_gpu_cmd_ctx_create(uint32_t ctx, const char *name) "ctx 0x%x, name %s"
1080 virtio_gpu_cmd_ctx_destroy(uint32_t ctx) "ctx 0x%x"
1081 virtio_gpu_cmd_ctx_res_attach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x"
1082 virtio_gpu_cmd_ctx_res_detach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x"
1083 virtio_gpu_cmd_ctx_submit(uint32_t ctx, uint32_t size) "ctx 0x%x, size %d"
1084 virtio_gpu_update_cursor(uint32_t scanout, uint32_t x, uint32_t y, const char *type, uint32_t res) "scanout %d, x %d, y %d, %s, res 0x%x"
1085 virtio_gpu_fence_ctrl(uint64_t fence, uint32_t type) "fence 0x%" PRIx64 ", type 0x%x"
1086 virtio_gpu_fence_resp(uint64_t fence) "fence 0x%" PRIx64
1089 disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d"
1090 disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u"
1091 qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=%" PRIx64 " %u,%u"
1092 qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d"
1093 qxl_destroy_primary(int qid) "%d"
1094 qxl_enter_vga_mode(int qid) "%d"
1095 qxl_exit_vga_mode(int qid) "%d"
1096 qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=%"PRId64
1097 qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) "%d current=%d cookie=%p"
1098 qxl_interface_attach_worker(int qid) "%d"
1099 qxl_interface_get_init_info(int qid) "%d"
1100 qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64
1101 qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]"
1102 qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) "%d #=%d"
1103 qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d"
1104 qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d"
1105 qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s"
1106 qxl_io_log(int qid, const uint8_t *log_buf) "%d %s"
1107 qxl_io_read_unexpected(int qid) "%d"
1108 qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) "%d 0x%"PRIx64"=%"PRIu64" (%s)"
1109 qxl_io_write(int qid, const char *mode, uint64_t addr, const char *aname, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " (%s) val=%"PRIu64" size=%u async=%d"
1110 qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64
1111 qxl_post_load(int qid, const char *mode) "%d %s"
1112 qxl_pre_load(int qid) "%d"
1113 qxl_pre_save(int qid) "%d"
1114 qxl_reset_surfaces(int qid) "%d"
1115 qxl_ring_command_check(int qid, const char *mode) "%d %s"
1116 qxl_ring_command_get(int qid, const char *mode) "%d %s"
1117 qxl_ring_command_req_notification(int qid) "%d"
1118 qxl_ring_cursor_check(int qid, const char *mode) "%d %s"
1119 qxl_ring_cursor_get(int qid, const char *mode) "%d %s"
1120 qxl_ring_cursor_req_notification(int qid) "%d"
1121 qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) "%d %s s#=%d res#=%d last=%p notify=%s"
1122 qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]"
1123 qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d"
1124 qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]"
1125 qxl_soft_reset(int qid) "%d"
1126 qxl_spice_destroy_surfaces_complete(int qid) "%d"
1127 qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d"
1128 qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d"
1129 qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d"
1130 qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d"
1131 qxl_spice_monitors_config(int qid) "%d"
1132 qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d"
1133 qxl_spice_oom(int qid) "%d"
1134 qxl_spice_reset_cursor(int qid) "%d"
1135 qxl_spice_reset_image_cache(int qid) "%d"
1136 qxl_spice_reset_memslots(int qid) "%d"
1137 qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]"
1138 qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d"
1139 qxl_surfaces_dirty(int qid, int surface, int offset, int size) "%d surface=%d offset=%d size=%d"
1140 qxl_send_events(int qid, uint32_t events) "%d %d"
1141 qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d"
1142 qxl_set_guest_bug(int qid) "%d"
1143 qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) "%d %d %p"
1144 qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) "%d %X %p"
1145 qxl_client_monitors_config_unsupported_by_device(int qid, int revision) "%d revision=%d"
1146 qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d"
1147 qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u"
1148 qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d"
1150 # ui/spice-display.c
1151 qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d"
1152 qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u"
1153 qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d"
1154 qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d"
1155 qemu_spice_wakeup(uint32_t qid) "%d"
1156 qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d"
1158 # hw/display/qxl-render.c
1159 qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]"
1160 qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d"
1161 qxl_render_update_area_done(void *cookie) "%p"
1163 # hw/ppc/spapr_pci.c
1164 spapr_pci_msi(const char *msg, uint32_t ca) "%s (cfg=%x)"
1165 spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64
1166 spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) "cfgaddr %x func %u, requested %u, first irq %u"
1167 spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u"
1168 spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u"
1169 spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
1170 spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at %x asked %u, have only %u"
1173 pci_update_mappings_del(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
1174 pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
1177 pcnet_s_reset(void *s) "s=%p"
1178 pcnet_user_int(void *s) "s=%p"
1179 pcnet_isr_change(void *s, uint32_t isr, uint32_t isr_old) "s=%p INTA=%d<=%d"
1180 pcnet_init(void *s, uint64_t init_addr) "s=%p init_addr=%#"PRIx64
1181 pcnet_rlen_tlen(void *s, uint32_t rlen, uint32_t tlen) "s=%p rlen=%d tlen=%d"
1182 pcnet_ss32_rdra_tdra(void *s, uint32_t ss32, uint32_t rdra, uint32_t rcvrl, uint32_t tdra, uint32_t xmtrl) "s=%p ss32=%d rdra=0x%08x[%d] tdra=0x%08x[%d]"
1184 # hw/net/pcnet-pci.c
1185 pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x"
1186 pcnet_aprom_readb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x"
1187 pcnet_ioport_read(void *opaque, uint64_t addr, unsigned size) "opaque=%p addr=%#"PRIx64" size=%d"
1188 pcnet_ioport_write(void *opaque, uint64_t addr, uint64_t data, unsigned size) "opaque=%p addr=%#"PRIx64" data=%#"PRIx64" size=%d"
1189 pcnet_mmio_writeb(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
1190 pcnet_mmio_writew(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
1191 pcnet_mmio_writel(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
1192 pcnet_mmio_readb(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
1193 pcnet_mmio_readw(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
1194 pcnet_mmio_readl(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=%#"PRIx64" val=0x%x"
1197 xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=%#x"
1198 xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR %#"PRIx32"->%#"PRIx32
1199 xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR %#"PRIx32" new XIRR %#"PRIx32
1200 xics_icp_irq(int server, int nr, uint8_t priority) "cpu %d trying to deliver irq %#"PRIx32" priority %#x"
1201 xics_icp_raise(uint32_t xirr, uint8_t pending_priority) "raising IRQ new XIRR=%#x new pending priority=%#x"
1202 xics_set_irq_msi(int srcno, int nr) "set_irq_msi: srcno %d [irq %#x]"
1203 xics_masked_pending(void) "set_irq_msi: masked pending"
1204 xics_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d [irq %#x]"
1205 xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) "ics_write_xive: irq %#x [src %d] server %#x prio %#x"
1206 xics_ics_reject(int nr, int srcno) "reject irq %#x [src %d]"
1207 xics_ics_eoi(int nr) "ics_eoi: irq %#x"
1208 xics_alloc(int src, int irq) "source#%d, irq %d"
1209 xics_alloc_block(int src, int first, int num, bool lsi, int align) "source#%d, first irq %d, %d irqs, lsi=%d, alignnum %d"
1210 xics_ics_free(int src, int irq, int num) "Source#%d, first irq %d, %d irqs"
1211 xics_ics_free_warn(int src, int irq) "Source#%d, irq %d is already free"
1214 spapr_cas_failed(unsigned long n) "DT diff buffer is too small: %ld bytes"
1215 spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes"
1217 # hw/ppc/spapr_hcall.c
1218 spapr_cas_pvr_try(uint32_t pvr) "%x"
1219 spapr_cas_pvr(uint32_t cur_pvr, bool cpu_match, uint32_t new_pvr, uint64_t pcr) "current=%x, cpu_match=%u, new=%x, compat flags=%"PRIx64
1221 # hw/ppc/spapr_iommu.c
1222 spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
1223 spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
1224 spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
1225 spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
1226 spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
1227 spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
1228 spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
1229 spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
1230 spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) "liobn=%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" perm=%u mask=%x"
1231 spapr_iommu_new_table(uint64_t liobn, void *table, int fd) "liobn=%"PRIx64" table=%p fd=%d"
1232 spapr_iommu_pre_save(uint64_t liobn, uint32_t nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32
1233 spapr_iommu_post_load(uint64_t liobn, uint32_t pre_nb, uint32_t post_nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" => %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32
1236 ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) "adjusted from 0x%"PRIx64" to 0x%"PRIx64", diff %"PRId64" (%"PRId64"s)"
1239 prep_io_800_writeb(uint32_t addr, uint32_t val) "0x%08" PRIx32 " => 0x%02" PRIx32
1240 prep_io_800_readb(uint32_t addr, uint32_t retval) "0x%08" PRIx32 " <= 0x%02" PRIx32
1242 # target-s390x/mmu_helper.c
1243 get_skeys_nonzero(int rc) "SKEY: Call to get_skeys unexpectedly returned %d"
1244 set_skeys_nonzero(int rc) "SKEY: Call to set_skeys unexpectedly returned %d"
1246 # target-s390x/ioinst.c
1247 ioinst(const char *insn) "IOINST: %s"
1248 ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) "IOINST: %s (%x.%x.%04x)"
1249 ioinst_chp_id(const char *insn, int cssid, int chpid) "IOINST: %s (%x.%02x)"
1250 ioinst_chsc_cmd(uint16_t cmd, uint16_t len) "IOINST: chsc command %04x, len %04x"
1253 css_enable_facility(const char *facility) "CSS: enable %s"
1254 css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=%x, erc=%x, rsid=%x %s"
1255 css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type %02x)"
1256 css_new_image(uint8_t cssid, const char *default_cssid) "CSS: add css image %02x %s"
1257 css_assign_subch(const char *do_assign, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) "CSS: %s %x.%x.%04x (devno %04x)"
1258 css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, const char *conditional) "CSS: I/O interrupt on sch %x.%x.%04x (intparm %08x, isc %x) %s"
1259 css_adapter_interrupt(uint8_t isc) "CSS: adapter I/O interrupt (isc %x)"
1261 # hw/s390x/virtio-ccw.c
1262 virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command %x"
1263 virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno %04x (%s)"
1264 virtio_ccw_set_ind(uint64_t ind_loc, uint8_t ind_old, uint8_t ind_new) "VIRTIO-CCW: indicator at %" PRIu64 ": %x->%x"
1266 # hw/intc/s390_flic_kvm.c
1267 flic_create_device(int err) "flic: create device failed %d"
1268 flic_no_device_api(int err) "flic: no Device Contral API support %d"
1269 flic_reset_failed(int err) "flic: reset failed %d"
1272 kvm_ioctl(int type, void *arg) "type 0x%x, arg %p"
1273 kvm_vm_ioctl(int type, void *arg) "type 0x%x, arg %p"
1274 kvm_vcpu_ioctl(int cpu_index, int type, void *arg) "cpu_index %d, type 0x%x, arg %p"
1275 kvm_run_exit(int cpu_index, uint32_t reason) "cpu_index %d, reason %d"
1276 kvm_device_ioctl(int fd, int type, void *arg) "dev fd %d, type 0x%x, arg %p"
1277 kvm_failed_reg_get(uint64_t id, const char *msg) "Warning: Unable to retrieve ONEREG %" PRIu64 " from KVM: %s"
1278 kvm_failed_reg_set(uint64_t id, const char *msg) "Warning: Unable to set ONEREG %" PRIu64 " to KVM: %s"
1281 kvm_failed_spr_set(int str, const char *msg) "Warning: Unable to set SPR %d to KVM: %s"
1282 kvm_failed_spr_get(int str, const char *msg) "Warning: Unable to retrieve SPR %d from KVM: %s"
1284 # TCG related tracing (mostly disabled by default)
1286 disable exec_tb(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
1287 disable exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
1288 disable exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=%x"
1291 translate_block(void *tb, uintptr_t pc, uint8_t *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p"
1294 memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u"
1295 memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u"
1296 memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u"
1297 memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u"
1298 memory_region_tb_read(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u"
1299 memory_region_tb_write(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u"
1302 object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
1303 object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
1305 # hw/i386/xen/xen_pvdevice.c
1306 xen_pv_mmio_read(uint64_t addr) "WARNING: read from Xen PV Device MMIO space (address %"PRIx64")"
1307 xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (address %"PRIx64")"
1310 pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x"
1311 pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x"
1314 vfio_intx_interrupt(const char *name, char line) " (%s) Pin %c"
1315 vfio_intx_eoi(const char *name) " (%s) EOI"
1316 vfio_intx_enable_kvm(const char *name) " (%s) KVM INTx accel enabled"
1317 vfio_intx_disable_kvm(const char *name) " (%s) KVM INTx accel disabled"
1318 vfio_intx_update(const char *name, int new_irq, int target_irq) " (%s) IRQ moved %d -> %d"
1319 vfio_intx_enable(const char *name) " (%s)"
1320 vfio_intx_disable(const char *name) " (%s)"
1321 vfio_msi_interrupt(const char *name, int index, uint64_t addr, int data) " (%s) vector %d 0x%"PRIx64"/0x%x"
1322 vfio_msix_vector_do_use(const char *name, int index) " (%s) vector %d used"
1323 vfio_msix_vector_release(const char *name, int index) " (%s) vector %d released"
1324 vfio_msix_enable(const char *name) " (%s)"
1325 vfio_msix_pba_disable(const char *name) " (%s)"
1326 vfio_msix_pba_enable(const char *name) " (%s)"
1327 vfio_msix_disable(const char *name) " (%s)"
1328 vfio_msix_fixup(const char *name, int bar, uint64_t start, uint64_t end) " (%s) MSI-X region %d mmap fixup [0x%"PRIx64" - 0x%"PRIx64"]"
1329 vfio_msi_enable(const char *name, int nr_vectors) " (%s) Enabled %d MSI vectors"
1330 vfio_msi_disable(const char *name) " (%s)"
1331 vfio_pci_load_rom(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s ROM:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx"
1332 vfio_rom_read(const char *name, uint64_t addr, int size, uint64_t data) " (%s, 0x%"PRIx64", 0x%x) = 0x%"PRIx64
1333 vfio_pci_size_rom(const char *name, int size) "%s ROM size 0x%x"
1334 vfio_vga_write(uint64_t addr, uint64_t data, int size) " (0x%"PRIx64", 0x%"PRIx64", %d)"
1335 vfio_vga_read(uint64_t addr, int size, uint64_t data) " (0x%"PRIx64", %d) = 0x%"PRIx64
1336 vfio_pci_read_config(const char *name, int addr, int len, int val) " (%s, @0x%x, len=0x%x) %x"
1337 vfio_pci_write_config(const char *name, int addr, int val, int len) " (%s, @0x%x, 0x%x, len=0x%x)"
1338 vfio_msi_setup(const char *name, int pos) "%s PCI MSI CAP @0x%x"
1339 vfio_msix_early_setup(const char *name, int pos, int table_bar, int offset, int entries) "%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d"
1340 vfio_check_pcie_flr(const char *name) "%s Supports FLR via PCIe cap"
1341 vfio_check_pm_reset(const char *name) "%s Supports PM reset"
1342 vfio_check_af_flr(const char *name) "%s Supports FLR via AF cap"
1343 vfio_pci_hot_reset(const char *name, const char *type) " (%s) %s"
1344 vfio_pci_hot_reset_has_dep_devices(const char *name) "%s: hot reset dependent devices:"
1345 vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) "\t%04x:%02x:%02x.%x group %d"
1346 vfio_pci_hot_reset_result(const char *name, const char *result) "%s hot reset: %s"
1347 vfio_populate_device_config(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s config:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx"
1348 vfio_populate_device_get_irq_info_failure(void) "VFIO_DEVICE_GET_IRQ_INFO failure: %m"
1349 vfio_initfn(const char *name, int group_id) " (%s) group %d"
1350 vfio_pci_reset(const char *name) " (%s)"
1351 vfio_pci_reset_flr(const char *name) "%s FLR/VFIO_DEVICE_RESET"
1352 vfio_pci_reset_pm(const char *name) "%s PCI PM Reset"
1353 vfio_pci_emulated_vendor_id(const char *name, uint16_t val) "%s %04x"
1354 vfio_pci_emulated_device_id(const char *name, uint16_t val) "%s %04x"
1355 vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) "%s %04x"
1356 vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) "%s %04x"
1358 # hw/vfio/pci-quirks.
1359 vfio_quirk_rom_blacklisted(const char *name, uint16_t vid, uint16_t did) "%s %04x:%04x"
1360 vfio_quirk_generic_window_address_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
1361 vfio_quirk_generic_window_data_read(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
1362 vfio_quirk_generic_window_data_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
1363 vfio_quirk_generic_mirror_read(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64
1364 vfio_quirk_generic_mirror_write(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64
1365 vfio_quirk_ati_3c3_read(const char *name, uint64_t data) "%s 0x%"PRIx64
1366 vfio_quirk_ati_3c3_probe(const char *name) "%s"
1367 vfio_quirk_ati_bar4_probe(const char *name) "%s"
1368 vfio_quirk_ati_bar2_probe(const char *name) "%s"
1369 vfio_quirk_nvidia_3d0_state(const char *name, const char *state) "%s %s"
1370 vfio_quirk_nvidia_3d0_read(const char *name, uint8_t offset, unsigned size, uint64_t val) " (%s, @0x%x, len=0x%x) %"PRIx64
1371 vfio_quirk_nvidia_3d0_write(const char *name, uint8_t offset, uint64_t data, unsigned size) "(%s, @0x%x, 0x%"PRIx64", len=0x%x)"
1372 vfio_quirk_nvidia_3d0_probe(const char *name) "%s"
1373 vfio_quirk_nvidia_bar5_state(const char *name, const char *state) "%s %s"
1374 vfio_quirk_nvidia_bar5_probe(const char *name) "%s"
1375 vfio_quirk_nvidia_bar0_msi_ack(const char *name) "%s"
1376 vfio_quirk_nvidia_bar0_probe(const char *name) "%s"
1377 vfio_quirk_rtl8168_fake_latch(const char *name, uint64_t val) "%s 0x%"PRIx64
1378 vfio_quirk_rtl8168_msix_write(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table write[0x%x]: 0x%"PRIx64
1379 vfio_quirk_rtl8168_msix_read(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table read[0x%x]: 0x%"PRIx64
1380 vfio_quirk_rtl8168_probe(const char *name) "%s"
1382 vfio_quirk_ati_bonaire_reset_skipped(const char *name) "%s"
1383 vfio_quirk_ati_bonaire_reset_no_smc(const char *name) "%s"
1384 vfio_quirk_ati_bonaire_reset_timeout(const char *name) "%s"
1385 vfio_quirk_ati_bonaire_reset_done(const char *name) "%s"
1386 vfio_quirk_ati_bonaire_reset(const char *name) "%s"
1387 vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, uint32_t base) "%s [%03x] %08x -> %08x"
1388 vfio_pci_igd_bdsm_enabled(const char *name, int size) "%s %dMB"
1389 vfio_pci_igd_opregion_enabled(const char *name) "%s"
1390 vfio_pci_igd_host_bridge_enabled(const char *name) "%s"
1391 vfio_pci_igd_lpc_bridge_enabled(const char *name) "%s"
1394 vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)"
1395 vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) " (%s:region%d+0x%"PRIx64", %d) = 0x%"PRIx64
1396 vfio_iommu_map_notify(uint64_t iova_start, uint64_t iova_end) "iommu map @ %"PRIx64" - %"PRIx64
1397 vfio_listener_region_add_skip(uint64_t start, uint64_t end) "SKIPPING region_add %"PRIx64" - %"PRIx64
1398 vfio_listener_region_add_iommu(uint64_t start, uint64_t end) "region_add [iommu] %"PRIx64" - %"PRIx64
1399 vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) "region_add [ram] %"PRIx64" - %"PRIx64" [%p]"
1400 vfio_listener_region_del_skip(uint64_t start, uint64_t end) "SKIPPING region_del %"PRIx64" - %"PRIx64
1401 vfio_listener_region_del(uint64_t start, uint64_t end) "region_del %"PRIx64" - %"PRIx64
1402 vfio_disconnect_container(int fd) "close container->fd=%d"
1403 vfio_put_group(int fd) "close group->fd=%d"
1404 vfio_get_device(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u"
1405 vfio_put_base_device(int fd) "close vdev->fd=%d"
1406 vfio_region_setup(const char *dev, int index, const char *name, unsigned long flags, unsigned long offset, unsigned long size) "Device %s, region %d \"%s\", flags: %lx, offset: %lx, size: %lx"
1407 vfio_region_mmap_fault(const char *name, int index, unsigned long offset, unsigned long size, int fault) "Region %s mmaps[%d], [%lx - %lx], fault: %d"
1408 vfio_region_mmap(const char *name, unsigned long offset, unsigned long end) "Region %s [%lx - %lx]"
1409 vfio_region_exit(const char *name, int index) "Device %s, region %d"
1410 vfio_region_finalize(const char *name, int index) "Device %s, region %d"
1411 vfio_region_mmaps_set_enabled(const char *name, bool enabled) "Region %s mmaps enabled: %d"
1412 vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) "Device %s region %d: %d sparse mmap entries"
1413 vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) "sparse entry %d [0x%lx - 0x%lx]"
1414 vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t subtype) "%s index %d, %08x/%0x8"
1416 # hw/vfio/platform.c
1417 vfio_platform_base_device_init(char *name, int groupid) "%s belongs to group #%d"
1418 vfio_platform_realize(char *name, char *compat) "vfio device %s, compat = %s"
1419 vfio_platform_eoi(int pin, int fd) "EOI IRQ pin %d (fd=%d)"
1420 vfio_platform_intp_mmap_enable(int pin) "IRQ #%d still active, stay in slow path"
1421 vfio_platform_intp_interrupt(int pin, int fd) "Inject IRQ #%d (fd = %d)"
1422 vfio_platform_intp_inject_pending_lockheld(int pin, int fd) "Inject pending IRQ #%d (fd = %d)"
1423 vfio_platform_populate_interrupts(int pin, int count, int flags) "- IRQ index %d: count %d, flags=0x%x"
1424 vfio_intp_interrupt_set_pending(int index) "irq %d is set PENDING"
1425 vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) "IRQ index=%d, fd = %d, resamplefd = %d"
1426 vfio_platform_start_edge_irqfd_injection(int index, int fd) "IRQ index=%d, fd = %d"
1429 #hw/acpi/memory_hotplug.c
1430 mhp_acpi_invalid_slot_selected(uint32_t slot) "0x%"PRIx32
1431 mhp_acpi_ejecting_invalid_slot(uint32_t slot) "0x%"PRIx32
1432 mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32
1433 mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr hi: 0x%"PRIx32
1434 mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size lo: 0x%"PRIx32
1435 mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size hi: 0x%"PRIx32
1436 mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) "slot[0x%"PRIx32"] proximity: 0x%"PRIx32
1437 mhp_acpi_read_flags(uint32_t slot, uint32_t flags) "slot[0x%"PRIx32"] flags: 0x%"PRIx32
1438 mhp_acpi_write_slot(uint32_t slot) "set active slot: 0x%"PRIx32
1439 mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "slot[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
1440 mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "slot[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
1441 mhp_acpi_clear_insert_evt(uint32_t slot) "slot[0x%"PRIx32"] clear insert event"
1442 mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event"
1443 mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted"
1444 mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed"
1447 mhp_pc_dimm_assigned_slot(int slot) "0x%d"
1448 mhp_pc_dimm_assigned_address(uint64_t addr) "0x%"PRIx64
1450 # target-s390x/kvm.c
1451 kvm_enable_cmma(int rc) "CMMA: enabling with result code %d"
1452 kvm_clear_cmma(int rc) "CMMA: clearing with result code %d"
1453 kvm_failed_cpu_state_set(int cpu_index, uint8_t state, const char *msg) "Warning: Unable to set cpu %d state %" PRIu8 " to KVM: %s"
1454 kvm_sigp_finished(uint8_t order, int cpu_index, int dst_index, int cc) "SIGP: Finished order %u on cpu %d -> cpu %d with cc=%d"
1457 i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d"
1459 # target-s390x/cpu.c
1460 cpu_set_state(int cpu_index, uint8_t state) "setting cpu %d state to %" PRIu8
1461 cpu_halt(int cpu_index) "halting cpu %d"
1462 cpu_unhalt(int cpu_index) "unhalting cpu %d"
1464 # hw/arm/virt-acpi-build.c
1465 virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out."
1468 alpha_pci_iack_write(void) ""
1471 alsa_revents(int revents) "revents = %d"
1472 alsa_pollout(int i, int fd) "i = %d fd = %d"
1473 alsa_set_handler(int events, int index, int fd, int err) "events=%#x index=%d fd=%d err=%d"
1474 alsa_wrote_zero(int len) "Failed to write %d frames (wrote zero)"
1475 alsa_read_zero(long len) "Failed to read %ld frames (read zero)"
1476 alsa_xrun_out(void) "Recovering from playback xrun"
1477 alsa_xrun_in(void) "Recovering from capture xrun"
1478 alsa_resume_out(void) "Resuming suspended output stream"
1479 alsa_resume_in(void) "Resuming suspended input stream"
1480 alsa_no_frames(int state) "No frames available and ALSA state is %d"
1483 oss_version(int version) "OSS version = %#x"
1484 oss_invalid_available_size(int size, int bufsize) "Invalid available size, size=%d bufsize=%d"
1487 vhost_user_event(const char *chr, int event) "chr: %s got event: %d"
1489 # linux-user/signal.c
1490 user_setup_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
1491 user_setup_rt_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
1492 user_do_rt_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
1493 user_do_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
1494 user_force_sig(void *env, int target_sig, int host_sig) "env=%p signal %d (host %d)"
1495 user_handle_signal(void *env, int target_sig) "env=%p signal %d"
1496 user_host_signal(void *env, int host_sig, int target_sig) "env=%p signal %d (target %d("
1497 user_queue_signal(void *env, int target_sig) "env=%p signal %d"
1498 user_s390x_restore_sigregs(void *env, uint64_t sc_psw_addr, uint64_t env_psw_addr) "env=%p frame psw.addr %"PRIx64 " current psw.addr %"PRIx64
1500 # hw/timer/aspeed_timer.c
1501 aspeed_timer_ctrl_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
1502 aspeed_timer_ctrl_external_clock(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
1503 aspeed_timer_ctrl_overflow_interrupt(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
1504 aspeed_timer_ctrl_pulse_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
1505 aspeed_timer_set_ctrl2(uint32_t value) "Value: 0x%" PRIx32
1506 aspeed_timer_set_value(int timer, int reg, uint32_t value) "Timer %d register %d: 0x%" PRIx32
1507 aspeed_timer_read(uint64_t offset, unsigned size, uint64_t value) "From 0x%" PRIx64 ": of size %u: 0x%" PRIx64
1509 # hw/intc/aspeed_vic.c
1510 aspeed_vic_set_irq(int irq, int level) "Enabling IRQ %d: %d"
1511 aspeed_vic_update_fiq(int flags) "Raising FIQ: %d"
1512 aspeed_vic_update_irq(int flags) "Raising IRQ: %d"
1513 aspeed_vic_read(uint64_t offset, unsigned size, uint32_t value) "From 0x%" PRIx64 " of size %u: 0x%" PRIx32
1514 aspeed_vic_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
1517 gic_enable_irq(int irq) "irq %d enabled"
1518 gic_disable_irq(int irq) "irq %d disabled"
1519 gic_set_irq(int irq, int level, int cpumask, int target) "irq %d level %d cpumask 0x%x target 0x%x"
1520 gic_update_bestirq(int cpu, int irq, int prio, int priority_mask, int running_priority) "cpu %d irq %d priority %d cpu priority mask %d cpu running priority %d"
1521 gic_update_set_irq(int cpu, const char *name, int level) "cpu[%d]: %s = %d"
1522 gic_acknowledge_irq(int cpu, int irq) "cpu %d acknowledged irq %d"
1524 # hw/net/net_rx_pkt.c
1525 net_rx_pkt_parsed(bool ip4, bool ip6, bool udp, bool tcp, size_t l3o, size_t l4o, size_t l5o) "RX packet parsed: ip4: %d, ip6: %d, udp: %d, tcp: %d, l3 offset: %zu, l4 offset: %zu, l5 offset: %zu"
1526 net_rx_pkt_l4_csum_validate_entry(void) "Starting L4 checksum validation"
1527 net_rx_pkt_l4_csum_validate_not_xxp(void) "Not a TCP/UDP packet"
1528 net_rx_pkt_l4_csum_validate_udp_with_no_checksum(void) "UDP packet without checksum"
1529 net_rx_pkt_l4_csum_validate_ip4_fragment(void) "IP4 fragment"
1530 net_rx_pkt_l4_csum_validate_ip4_udp(void) "IP4/UDP packet"
1531 net_rx_pkt_l4_csum_validate_ip4_tcp(void) "IP4/TCP packet"
1532 net_rx_pkt_l4_csum_validate_ip6_udp(void) "IP6/UDP packet"
1533 net_rx_pkt_l4_csum_validate_ip6_tcp(void) "IP6/TCP packet"
1534 net_rx_pkt_l4_csum_validate_csum(bool csum_valid) "Checksum valid: %d"
1536 net_rx_pkt_l4_csum_calc_entry(void) "Starting L4 checksum calculation"
1537 net_rx_pkt_l4_csum_calc_ip4_udp(void) "IP4/UDP packet"
1538 net_rx_pkt_l4_csum_calc_ip4_tcp(void) "IP4/TCP packet"
1539 net_rx_pkt_l4_csum_calc_ip6_udp(void) "IP6/UDP packet"
1540 net_rx_pkt_l4_csum_calc_ip6_tcp(void) "IP6/TCP packet"
1541 net_rx_pkt_l4_csum_calc_ph_csum(uint32_t cntr, uint16_t csl) "Pseudo-header: checksum counter %u, length %u"
1542 net_rx_pkt_l4_csum_calc_csum(size_t l4hdr_off, uint16_t csl, uint32_t cntr, uint16_t csum) "L4 Checksum: L4 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X"
1544 net_rx_pkt_l4_csum_fix_entry(void) "Starting L4 checksum correction"
1545 net_rx_pkt_l4_csum_fix_tcp(uint32_t l4_cso) "TCP packet, L4 cso: %u"
1546 net_rx_pkt_l4_csum_fix_udp(uint32_t l4_cso) "UDP packet, L4 cso: %u"
1547 net_rx_pkt_l4_csum_fix_not_xxp(void) "Not an IP4 packet"
1548 net_rx_pkt_l4_csum_fix_ip4_fragment(void) "IP4 fragment"
1549 net_rx_pkt_l4_csum_fix_udp_with_no_checksum(void) "UDP packet without checksum"
1550 net_rx_pkt_l4_csum_fix_csum(uint32_t cso, uint16_t csum) "L4 Checksum: Offset: %u, value 0x%X"
1552 net_rx_pkt_l3_csum_validate_entry(void) "Starting L3 checksum validation"
1553 net_rx_pkt_l3_csum_validate_not_ip4(void) "Not an IP4 packet"
1554 net_rx_pkt_l3_csum_validate_csum(size_t l3hdr_off, uint32_t csl, uint32_t cntr, uint16_t csum, bool csum_valid) "L3 Checksum: L3 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X, valid: %d"
1556 net_rx_pkt_rss_ip4(void) "Calculating IPv4 RSS hash"
1557 net_rx_pkt_rss_ip4_tcp(void) "Calculating IPv4/TCP RSS hash"
1558 net_rx_pkt_rss_ip6_tcp(void) "Calculating IPv6/TCP RSS hash"
1559 net_rx_pkt_rss_ip6(void) "Calculating IPv6 RSS hash"
1560 net_rx_pkt_rss_ip6_ex(void) "Calculating IPv6/EX RSS hash"
1561 net_rx_pkt_rss_hash(size_t rss_length, uint32_t rss_hash) "RSS hash for %zu bytes: 0x%X"
1562 net_rx_pkt_rss_add_chunk(void* ptr, size_t size, size_t input_offset) "Add RSS chunk %p, %zu bytes, RSS input offset %zu bytes"
1564 # hw/net/e1000x_common.c
1565 e1000x_rx_can_recv_disabled(bool link_up, bool rx_enabled, bool pci_master) "link_up: %d, rx_enabled %d, pci_master %d"
1566 e1000x_vlan_is_vlan_pkt(bool is_vlan_pkt, uint16_t eth_proto, uint16_t vet) "Is VLAN packet: %d, ETH proto: 0x%X, VET: 0x%X"
1567 e1000x_rx_flt_ucast_match(uint32_t idx, uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "unicast match[%d]: %02x:%02x:%02x:%02x:%02x:%02x"
1568 e1000x_rx_flt_ucast_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "unicast mismatch: %02x:%02x:%02x:%02x:%02x:%02x"
1569 e1000x_rx_flt_inexact_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5, uint32_t mo, uint32_t mta, uint32_t mta_val) "inexact mismatch: %02x:%02x:%02x:%02x:%02x:%02x MO %d MTA[%d] %x"
1570 e1000x_rx_link_down(uint32_t status_reg) "Received packet dropped because the link is down STATUS = %u"
1571 e1000x_rx_disabled(uint32_t rctl_reg) "Received packet dropped because receive is disabled RCTL = %u"
1572 e1000x_rx_oversized(size_t size) "Received packet dropped because it was oversized (%zu bytes)"
1573 e1000x_mac_indicate(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Indicating MAC to guest: %02x:%02x:%02x:%02x:%02x:%02x"
1574 e1000x_link_negotiation_start(void) "Start link auto negotiation"
1575 e1000x_link_negotiation_done(void) "Auto negotiation is completed"
1577 # hw/net/e1000e_core.c
1578 e1000e_core_write(uint64_t index, uint32_t size, uint64_t val) "Write to register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64
1579 e1000e_core_read(uint64_t index, uint32_t size, uint64_t val) "Read from register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64
1580 e1000e_core_mdic_read(uint8_t page, uint32_t addr, uint32_t data) "MDIC READ: PHY[%u][%u] = 0x%x"
1581 e1000e_core_mdic_read_unhandled(uint8_t page, uint32_t addr) "MDIC READ: PHY[%u][%u] UNHANDLED"
1582 e1000e_core_mdic_write(uint8_t page, uint32_t addr, uint32_t data) "MDIC WRITE: PHY[%u][%u] = 0x%x"
1583 e1000e_core_mdic_write_unhandled(uint8_t page, uint32_t addr) "MDIC WRITE: PHY[%u][%u] UNHANDLED"
1584 e1000e_core_eeeprom_write(uint16_t bit_in, uint16_t bit_out, uint16_t reading) "eeprom bitnum in %d out %d, reading %d"
1585 e1000e_core_ctrl_write(uint64_t index, uint32_t val) "Write CTRL register 0x%"PRIx64", value: 0x%X"
1586 e1000e_core_ctrl_sw_reset(void) "Doing SW reset"
1587 e1000e_core_ctrl_phy_reset(void) "Doing PHY reset"
1589 e1000e_link_autoneg_flowctl(bool enabled) "Auto-negotiated flow control state is %d"
1590 e1000e_link_set_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) "Set link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control %d, TX flow control %d"
1591 e1000e_link_read_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) "Get link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control %d, TX flow control %d"
1592 e1000e_link_set_ext_params(bool asd_check, bool speed_select_bypass) "Set extended link params: ASD check: %d, Speed select bypass: %d"
1593 e1000e_link_status(bool link_up, bool full_dplx, uint32_t speed, uint32_t asdv) "Link up: %d, Duplex: %d, Speed: %d, ASDV: %d"
1594 e1000e_link_status_changed(bool status) "New link status: %d"
1596 e1000e_wrn_regs_write_ro(uint64_t index, uint32_t size, uint64_t val) "WARNING: Write to RO register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64
1597 e1000e_wrn_regs_write_unknown(uint64_t index, uint32_t size, uint64_t val) "WARNING: Write to unknown register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64
1598 e1000e_wrn_regs_read_unknown(uint64_t index, uint32_t size) "WARNING: Read from unknown register 0x%"PRIx64", %d byte(s)"
1599 e1000e_wrn_regs_read_trivial(uint32_t index) "WARNING: Reading register at offset: 0x%05x. It is not fully implemented."
1600 e1000e_wrn_regs_write_trivial(uint32_t index) "WARNING: Writing to register at offset: 0x%05x. It is not fully implemented."
1601 e1000e_wrn_no_ts_support(void) "WARNING: Guest requested TX timestamping which is not supported"
1602 e1000e_wrn_no_snap_support(void) "WARNING: Guest requested TX SNAP header update which is not supported"
1603 e1000e_wrn_iscsi_filtering_not_supported(void) "WARNING: Guest requested iSCSI filtering which is not supported"
1604 e1000e_wrn_nfsw_filtering_not_supported(void) "WARNING: Guest requested NFS write filtering which is not supported"
1605 e1000e_wrn_nfsr_filtering_not_supported(void) "WARNING: Guest requested NFS read filtering which is not supported"
1607 e1000e_tx_disabled(void) "TX Disabled"
1608 e1000e_tx_descr(void *addr, uint32_t lower, uint32_t upper) "%p : %x %x"
1610 e1000e_ring_free_space(int ridx, uint32_t rdlen, uint32_t rdh, uint32_t rdt) "ring #%d: LEN: %u, DH: %u, DT: %u"
1612 e1000e_rx_can_recv_rings_full(void) "Cannot receive: all rings are full"
1613 e1000e_rx_can_recv(void) "Can receive"
1614 e1000e_rx_has_buffers(int ridx, uint32_t free_desc, size_t total_size, uint32_t desc_buf_size) "ring #%d: free descr: %u, packet size %zu, descr buffer size %u"
1615 e1000e_rx_null_descriptor(void) "Null RX descriptor!!"
1616 e1000e_rx_flt_vlan_mismatch(uint16_t vid) "VID mismatch: 0x%X"
1617 e1000e_rx_flt_vlan_match(uint16_t vid) "VID match: 0x%X"
1618 e1000e_rx_desc_ps_read(uint64_t a0, uint64_t a1, uint64_t a2, uint64_t a3) "buffers: [0x%"PRIx64", 0x%"PRIx64", 0x%"PRIx64", 0x%"PRIx64"]"
1619 e1000e_rx_desc_ps_write(uint16_t a0, uint16_t a1, uint16_t a2, uint16_t a3) "bytes written: [%u, %u, %u, %u]"
1620 e1000e_rx_desc_buff_sizes(uint32_t b0, uint32_t b1, uint32_t b2, uint32_t b3) "buffer sizes: [%u, %u, %u, %u]"
1621 e1000e_rx_desc_len(uint8_t rx_desc_len) "RX descriptor length: %u"
1622 e1000e_rx_desc_buff_write(uint8_t idx, uint64_t addr, uint16_t offset, const void* source, uint32_t len) "buffer #%u, addr: 0x%"PRIx64", offset: %u, from: %p, length: %u"
1623 e1000e_rx_descr(int ridx, uint64_t base, uint8_t len) "Next RX descriptor: ring #%d, PA: 0x%"PRIx64", length: %u"
1624 e1000e_rx_set_rctl(uint32_t rctl) "RCTL = 0x%x"
1625 e1000e_rx_receive_iov(int iovcnt) "Received vector of %d fragments"
1626 e1000e_rx_packet_size(size_t full, size_t vhdr, size_t data) "Received packet of %zu bytes total, %zu virt header, %zu data"
1627 e1000e_rx_flt_dropped(void) "Received packet dropped by RX filter"
1628 e1000e_rx_written_to_guest(uint32_t causes) "Received packet written to guest (ICR causes %u)"
1629 e1000e_rx_not_written_to_guest(uint32_t causes) "Received packet NOT written to guest (ICR causes %u)"
1630 e1000e_rx_interrupt_set(uint32_t causes) "Receive interrupt set (ICR causes %u)"
1631 e1000e_rx_interrupt_delayed(uint32_t causes) "Receive interrupt delayed (ICR causes %u)"
1632 e1000e_rx_set_cso(int cso_state) "RX CSO state set to %d"
1633 e1000e_rx_set_rdt(int queue_idx, uint32_t val) "Setting RDT[%d] = %u"
1634 e1000e_rx_set_rfctl(uint32_t val) "Setting RFCTL = 0x%X"
1635 e1000e_rx_start_recv(void)
1637 e1000e_rx_rss_started(void) "Starting RSS processing"
1638 e1000e_rx_rss_disabled(void) "RSS is disabled"
1639 e1000e_rx_rss_type(uint32_t type) "RSS type is %u"
1640 e1000e_rx_rss_ip4(bool isfragment, bool istcp, uint32_t mrqc, bool tcpipv4_enabled, bool ipv4_enabled) "RSS IPv4: fragment %d, tcp %d, mrqc 0x%X, tcpipv4 enabled %d, ipv4 enabled %d"
1641 e1000e_rx_rss_ip6_rfctl(uint32_t rfctl) "RSS IPv6: rfctl 0x%X"
1642 e1000e_rx_rss_ip6(bool ex_dis, bool new_ex_dis, bool istcp, bool has_ext_headers, bool ex_dst_valid, bool ex_src_valid, uint32_t mrqc, bool tcpipv6_enabled, bool ipv6ex_enabled, bool ipv6_enabled) "RSS IPv6: ex_dis: %d, new_ex_dis: %d, tcp %d, has_ext_headers %d, ex_dst_valid %d, ex_src_valid %d, mrqc 0x%X, tcpipv6 enabled %d, ipv6ex enabled %d, ipv6 enabled %d"
1643 e1000e_rx_rss_dispatched_to_queue(int queue_idx) "Packet being dispatched to queue %d"
1645 e1000e_rx_metadata_protocols(bool isip4, bool isip6, bool isudp, bool istcp) "protocols: ip4: %d, ip6: %d, udp: %d, tcp: %d"
1646 e1000e_rx_metadata_vlan(uint16_t vlan_tag) "VLAN tag is 0x%X"
1647 e1000e_rx_metadata_rss(uint32_t rss, uint32_t mrq) "RSS data: rss: 0x%X, mrq: 0x%X"
1648 e1000e_rx_metadata_ip_id(uint16_t ip_id) "the IPv4 ID is 0x%X"
1649 e1000e_rx_metadata_ack(void) "the packet is TCP ACK"
1650 e1000e_rx_metadata_pkt_type(uint32_t pkt_type) "the packet type is %u"
1651 e1000e_rx_metadata_no_virthdr(void) "the packet has no virt-header"
1652 e1000e_rx_metadata_virthdr_no_csum_info(void) "virt-header does not contain checksum info"
1653 e1000e_rx_metadata_l3_cso_disabled(void) "IP4 CSO is disabled"
1654 e1000e_rx_metadata_l4_cso_disabled(void) "TCP/UDP CSO is disabled"
1655 e1000e_rx_metadata_l3_csum_validation_failed(void) "Cannot validate L3 checksum"
1656 e1000e_rx_metadata_l4_csum_validation_failed(void) "Cannot validate L4 checksum"
1657 e1000e_rx_metadata_status_flags(uint32_t status_flags) "status_flags is 0x%X"
1658 e1000e_rx_metadata_ipv6_sum_disabled(void) "IPv6 RX checksummimg disabled by RFCTL"
1659 e1000e_rx_metadata_ipv6_filtering_disabled(void) "IPv6 RX filtering disabled by RFCTL"
1661 e1000e_vlan_vet(uint16_t vet) "Setting VLAN ethernet type 0x%X"
1663 e1000e_irq_set_cause(uint32_t cause) "IRQ cause set 0x%x"
1664 e1000e_irq_msi_notify(uint32_t cause) "MSI notify 0x%x"
1665 e1000e_irq_throttling_no_pending_interrupts(void) "No pending interrupts to notify"
1666 e1000e_irq_msi_notify_postponed(void) "Sending MSI postponed by ITR"
1667 e1000e_irq_legacy_notify_postponed(void) "Raising legacy IRQ postponed by ITR"
1668 e1000e_irq_throttling_no_pending_vec(int idx) "No pending interrupts for vector %d"
1669 e1000e_irq_msix_notify_postponed_vec(int idx) "Sending MSI-X postponed by EITR[%d]"
1670 e1000e_irq_msix_notify(uint32_t cause) "MSI-X notify 0x%x"
1671 e1000e_irq_legacy_notify(bool level) "IRQ line state: %d"
1672 e1000e_irq_msix_notify_vec(uint32_t vector) "MSI-X notify vector 0x%x"
1673 e1000e_irq_postponed_by_xitr(uint32_t reg) "Interrupt postponed by [E]ITR register 0x%x"
1674 e1000e_irq_clear_ims(uint32_t bits, uint32_t old_ims, uint32_t new_ims) "Clearing IMS bits 0x%x: 0x%x --> 0x%x"
1675 e1000e_irq_set_ims(uint32_t bits, uint32_t old_ims, uint32_t new_ims) "Setting IMS bits 0x%x: 0x%x --> 0x%x"
1676 e1000e_irq_fix_icr_asserted(uint32_t new_val) "ICR_ASSERTED bit fixed: 0x%x"
1677 e1000e_irq_add_msi_other(uint32_t new_val) "ICR_OTHER bit added: 0x%x"
1678 e1000e_irq_pending_interrupts(uint32_t pending, uint32_t icr, uint32_t ims) "ICR PENDING: 0x%x (ICR: 0x%x, IMS: 0x%x)"
1679 e1000e_irq_set_cause_entry(uint32_t val, uint32_t icr) "Going to set IRQ cause 0x%x, ICR: 0x%x"
1680 e1000e_irq_set_cause_exit(uint32_t val, uint32_t icr) "Set IRQ cause 0x%x, ICR: 0x%x"
1681 e1000e_irq_icr_write(uint32_t bits, uint32_t old_icr, uint32_t new_icr) "Clearing ICR bits 0x%x: 0x%x --> 0x%x"
1682 e1000e_irq_write_ics(uint32_t val) "Adding ICR bits 0x%x"
1683 e1000e_irq_icr_process_iame(void) "Clearing IMS bits due to IAME"
1684 e1000e_irq_read_ics(uint32_t ics) "Current ICS: 0x%x"
1685 e1000e_irq_read_ims(uint32_t ims) "Current IMS: 0x%x"
1686 e1000e_irq_icr_read_entry(uint32_t icr) "Starting ICR read. Current ICR: 0x%x"
1687 e1000e_irq_icr_read_exit(uint32_t icr) "Ending ICR read. Current ICR: 0x%x"
1688 e1000e_irq_icr_clear_zero_ims(void) "Clearing ICR on read due to zero IMS"
1689 e1000e_irq_icr_clear_iame(void) "Clearing ICR on read due to IAME"
1690 e1000e_irq_ims_clear_eiame(uint32_t iam, uint32_t cause) "Clearing IMS due to EIAME, IAM: 0x%X, cause: 0x%X"
1691 e1000e_irq_icr_clear_eiac(uint32_t icr, uint32_t eiac) "Clearing ICR bits due to EIAC, ICR: 0x%X, EIAC: 0x%X"
1692 e1000e_irq_ims_clear_set_imc(uint32_t val) "Clearing IMS bits due to IMC write 0x%x"
1693 e1000e_irq_fire_delayed_interrupts(void) "Firing delayed interrupts"
1694 e1000e_irq_rearm_timer(uint32_t reg, int64_t delay_ns) "Mitigation timer armed for register 0x%X, delay %"PRId64" ns"
1695 e1000e_irq_throttling_timer(uint32_t reg) "Mitigation timer shot for register 0x%X"
1696 e1000e_irq_rdtr_fpd_running(void) "FPD written while RDTR was running"
1697 e1000e_irq_rdtr_fpd_not_running(void) "FPD written while RDTR was not running"
1698 e1000e_irq_tidv_fpd_running(void) "FPD written while TIDV was running"
1699 e1000e_irq_tidv_fpd_not_running(void) "FPD written while TIDV was not running"
1700 e1000e_irq_eitr_set(uint32_t eitr_num, uint32_t val) "EITR[%u] = %u"
1701 e1000e_irq_itr_set(uint32_t val) "ITR = %u"
1702 e1000e_irq_fire_all_timers(uint32_t val) "Firing all delay/throttling timers on all interrupts enable (0x%X written to IMS)"
1703 e1000e_irq_adding_delayed_causes(uint32_t val, uint32_t icr) "Merging delayed causes 0x%X to ICR 0x%X"
1704 e1000e_irq_msix_pending_clearing(uint32_t cause, uint32_t int_cfg, uint32_t vec) "Clearing MSI-X pending bit for cause 0x%x, IVAR config 0x%x, vector %u"
1706 e1000e_wrn_msix_vec_wrong(uint32_t cause, uint32_t cfg) "Invalid configuration for cause 0x%x: 0x%x"
1707 e1000e_wrn_msix_invalid(uint32_t cause, uint32_t cfg) "Invalid entry for cause 0x%x: 0x%x"
1709 e1000e_mac_set_permanent(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Set permanent MAC: %02x:%02x:%02x:%02x:%02x:%02x"
1710 e1000e_mac_set_sw(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Set SW MAC: %02x:%02x:%02x:%02x:%02x:%02x"
1713 e1000e_cb_pci_realize(void) "E1000E PCI realize entry"
1714 e1000e_cb_pci_uninit(void) "E1000E PCI unit entry"
1715 e1000e_cb_qdev_reset(void) "E1000E qdev reset entry"
1716 e1000e_cb_pre_save(void) "E1000E pre save entry"
1717 e1000e_cb_post_load(void) "E1000E post load entry"
1719 e1000e_io_write_addr(uint64_t addr) "IOADDR write 0x%"PRIx64
1720 e1000e_io_write_data(uint64_t addr, uint64_t val) "IODATA write 0x%"PRIx64", value: 0x%"PRIx64
1721 e1000e_io_read_addr(uint64_t addr) "IOADDR read 0x%"PRIx64
1722 e1000e_io_read_data(uint64_t addr, uint64_t val) "IODATA read 0x%"PRIx64", value: 0x%"PRIx64
1723 e1000e_wrn_io_write_unknown(uint64_t addr) "IO write unknown address 0x%"PRIx64
1724 e1000e_wrn_io_read_unknown(uint64_t addr) "IO read unknown address 0x%"PRIx64
1725 e1000e_wrn_io_addr_undefined(uint64_t addr) "IO undefined register 0x%"PRIx64
1726 e1000e_wrn_io_addr_flash(uint64_t addr) "IO flash access (0x%"PRIx64") not implemented"
1727 e1000e_wrn_io_addr_unknown(uint64_t addr) "IO unknown register 0x%"PRIx64
1729 e1000e_msi_init_fail(int32_t res) "Failed to initialize MSI, error %d"
1730 e1000e_msix_init_fail(int32_t res) "Failed to initialize MSI-X, error %d"
1731 e1000e_msix_use_vector_fail(uint32_t vec, int32_t res) "Failed to use MSI-X vector %d, error %d"
1733 e1000e_cfg_support_virtio(bool support) "Virtio header supported: %d"
1735 e1000e_vm_state_running(void) "VM state is running"
1736 e1000e_vm_state_stopped(void) "VM state is stopped"
1738 # hw/intc/arm_gicv3_cpuif.c
1739 gicv3_icc_pmr_read(uint32_t cpu, uint64_t val) "GICv3 ICC_PMR read cpu %x value 0x%" PRIx64
1740 gicv3_icc_pmr_write(uint32_t cpu, uint64_t val) "GICv3 ICC_PMR write cpu %x value 0x%" PRIx64
1741 gicv3_icc_bpr_read(uint32_t cpu, uint64_t val) "GICv3 ICC_BPR read cpu %x value 0x%" PRIx64
1742 gicv3_icc_bpr_write(uint32_t cpu, uint64_t val) "GICv3 ICC_BPR write cpu %x value 0x%" PRIx64
1743 gicv3_icc_ap_read(int regno, uint32_t cpu, uint64_t val) "GICv3 ICC_AP%dR read cpu %x value 0x%" PRIx64
1744 gicv3_icc_ap_write(int regno, uint32_t cpu, uint64_t val) "GICv3 ICC_AP%dR write cpu %x value 0x%" PRIx64
1745 gicv3_icc_igrpen_read(uint32_t cpu, uint64_t val) "GICv3 ICC_IGRPEN read cpu %x value 0x%" PRIx64
1746 gicv3_icc_igrpen_write(uint32_t cpu, uint64_t val) "GICv3 ICC_IGRPEN write cpu %x value 0x%" PRIx64
1747 gicv3_icc_igrpen1_el3_read(uint32_t cpu, uint64_t val) "GICv3 ICC_IGRPEN1_EL3 read cpu %x value 0x%" PRIx64
1748 gicv3_icc_igrpen1_el3_write(uint32_t cpu, uint64_t val) "GICv3 ICC_IGRPEN1_EL3 write cpu %x value 0x%" PRIx64
1749 gicv3_icc_ctlr_read(uint32_t cpu, uint64_t val) "GICv3 ICC_CTLR read cpu %x value 0x%" PRIx64
1750 gicv3_icc_ctlr_write(uint32_t cpu, uint64_t val) "GICv3 ICC_CTLR write cpu %x value 0x%" PRIx64
1751 gicv3_icc_ctlr_el3_read(uint32_t cpu, uint64_t val) "GICv3 ICC_CTLR_EL3 read cpu %x value 0x%" PRIx64
1752 gicv3_icc_ctlr_el3_write(uint32_t cpu, uint64_t val) "GICv3 ICC_CTLR_EL3 write cpu %x value 0x%" PRIx64
1753 gicv3_cpuif_update(uint32_t cpuid, int irq, int grp, int prio) "GICv3 CPU i/f %x HPPI update: irq %d group %d prio %d"
1754 gicv3_cpuif_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel) "GICv3 CPU i/f %x HPPI update: setting FIQ %d IRQ %d"
1755 gicv3_icc_generate_sgi(uint32_t cpuid, int irq, int irm, uint32_t aff, uint32_t targetlist) "GICv3 CPU i/f %x generating SGI %d IRM %d target affinity 0x%xxx targetlist 0x%x"
1756 gicv3_icc_iar0_read(uint32_t cpu, uint64_t val) "GICv3 ICC_IAR0 read cpu %x value 0x%" PRIx64
1757 gicv3_icc_iar1_read(uint32_t cpu, uint64_t val) "GICv3 ICC_IAR1 read cpu %x value 0x%" PRIx64
1758 gicv3_icc_eoir_write(uint32_t cpu, uint64_t val) "GICv3 ICC_EOIR write cpu %x value 0x%" PRIx64
1759 gicv3_icc_hppir0_read(uint32_t cpu, uint64_t val) "GICv3 ICC_HPPIR0 read cpu %x value 0x%" PRIx64
1760 gicv3_icc_hppir1_read(uint32_t cpu, uint64_t val) "GICv3 ICC_HPPIR1 read cpu %x value 0x%" PRIx64
1761 gicv3_icc_dir_write(uint32_t cpu, uint64_t val) "GICv3 ICC_DIR write cpu %x value 0x%" PRIx64
1762 gicv3_icc_rpr_read(uint32_t cpu, uint64_t val) "GICv3 ICC_RPR read cpu %x value 0x%" PRIx64
1764 # hw/intc/arm_gicv3_dist.c
1765 gicv3_dist_read(uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 distributor read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d"
1766 gicv3_dist_badread(uint64_t offset, unsigned size, bool secure) "GICv3 distributor read: offset 0x%" PRIx64 " size %u secure %d: error"
1767 gicv3_dist_write(uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 distributor write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d"
1768 gicv3_dist_badwrite(uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 distributor write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d: error"
1769 gicv3_dist_set_irq(int irq, int level) "GICv3 distributor interrupt %d level changed to %d"
1771 # hw/intc/arm_gicv3_redist.c
1772 gicv3_redist_read(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 redistributor %x read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d"
1773 gicv3_redist_badread(uint32_t cpu, uint64_t offset, unsigned size, bool secure) "GICv3 redistributor %x read: offset 0x%" PRIx64 " size %u secure %d: error"
1774 gicv3_redist_write(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 redistributor %x write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d"
1775 gicv3_redist_badwrite(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 redistributor %x write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d: error"
1776 gicv3_redist_set_irq(uint32_t cpu, int irq, int level) "GICv3 redistributor %x interrupt %d level changed to %d"
1777 gicv3_redist_send_sgi(uint32_t cpu, int irq) "GICv3 redistributor %x pending SGI %d"
1779 ### Guest events, keep at bottom
1781 # @vaddr: Access' virtual address.
1782 # @info : Access' information (see below).
1784 # Start virtual memory access (before any potential access violation).
1786 # Does not include memory accesses performed by devices.
1788 # Access information can be parsed as:
1791 # uint8_t size_shift : 2; /* interpreted as "1 << size_shift" bytes */
1792 # bool sign_extend: 1; /* sign-extended */
1793 # uint8_t endianness : 1; /* 0: little, 1: big */
1794 # bool store : 1; /* wheter it's a store operation */
1798 disable vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d", "vaddr=0x%016"PRIx64" info=%d"