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block/export: convert vhost-user-blk server to block export API
[qemu/kevin.git] / softmmu / memory.c
blob403ff3abc99b781cf5366646ff794703229abc43
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qemu/log.h"
18 #include "qapi/error.h"
19 #include "cpu.h"
20 #include "exec/memory.h"
21 #include "exec/address-spaces.h"
22 #include "qapi/visitor.h"
23 #include "qemu/bitops.h"
24 #include "qemu/error-report.h"
25 #include "qemu/main-loop.h"
26 #include "qemu/qemu-print.h"
27 #include "qom/object.h"
28 #include "trace.h"
29
30 #include "exec/memory-internal.h"
31 #include "exec/ram_addr.h"
32 #include "sysemu/kvm.h"
33 #include "sysemu/runstate.h"
34 #include "sysemu/tcg.h"
35 #include "sysemu/accel.h"
36 #include "hw/boards.h"
37 #include "migration/vmstate.h"
38
39 //#define DEBUG_UNASSIGNED
40
41 static unsigned memory_region_transaction_depth;
42 static bool memory_region_update_pending;
43 static bool ioeventfd_update_pending;
44 bool global_dirty_log;
45
46 static QTAILQ_HEAD(, MemoryListener) memory_listeners
47 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
48
49 static QTAILQ_HEAD(, AddressSpace) address_spaces
50 = QTAILQ_HEAD_INITIALIZER(address_spaces);
51
52 static GHashTable *flat_views;
53
54 typedef struct AddrRange AddrRange;
55
56 /*
57 * Note that signed integers are needed for negative offsetting in aliases
58 * (large MemoryRegion::alias_offset).
59 */
60 struct AddrRange {
61 Int128 start;
62 Int128 size;
63 };
64
65 static AddrRange addrrange_make(Int128 start, Int128 size)
66 {
67 return (AddrRange) { start, size };
68 }
69
70 static bool addrrange_equal(AddrRange r1, AddrRange r2)
71 {
72 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
73 }
74
75 static Int128 addrrange_end(AddrRange r)
76 {
77 return int128_add(r.start, r.size);
78 }
79
80 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
81 {
82 int128_addto(&range.start, delta);
83 return range;
84 }
85
86 static bool addrrange_contains(AddrRange range, Int128 addr)
87 {
88 return int128_ge(addr, range.start)
89 && int128_lt(addr, addrrange_end(range));
90 }
91
92 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
93 {
94 return addrrange_contains(r1, r2.start)
95 || addrrange_contains(r2, r1.start);
96 }
97
98 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
99 {
100 Int128 start = int128_max(r1.start, r2.start);
101 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
102 return addrrange_make(start, int128_sub(end, start));
103 }
104
105 enum ListenerDirection { Forward, Reverse };
106
107 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
108 do { \
109 MemoryListener *_listener; \
110 \
111 switch (_direction) { \
112 case Forward: \
113 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
114 if (_listener->_callback) { \
115 _listener->_callback(_listener, ##_args); \
116 } \
117 } \
118 break; \
119 case Reverse: \
120 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
121 if (_listener->_callback) { \
122 _listener->_callback(_listener, ##_args); \
123 } \
124 } \
125 break; \
126 default: \
127 abort(); \
128 } \
129 } while (0)
130
131 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
132 do { \
133 MemoryListener *_listener; \
134 \
135 switch (_direction) { \
136 case Forward: \
137 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
138 if (_listener->_callback) { \
139 _listener->_callback(_listener, _section, ##_args); \
140 } \
141 } \
142 break; \
143 case Reverse: \
144 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
145 if (_listener->_callback) { \
146 _listener->_callback(_listener, _section, ##_args); \
147 } \
148 } \
149 break; \
150 default: \
151 abort(); \
152 } \
153 } while (0)
154
155 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
156 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
157 do { \
158 MemoryRegionSection mrs = section_from_flat_range(fr, \
159 address_space_to_flatview(as)); \
160 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
161 } while(0)
162
163 struct CoalescedMemoryRange {
164 AddrRange addr;
165 QTAILQ_ENTRY(CoalescedMemoryRange) link;
166 };
167
168 struct MemoryRegionIoeventfd {
169 AddrRange addr;
170 bool match_data;
171 uint64_t data;
172 EventNotifier *e;
173 };
174
175 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
176 MemoryRegionIoeventfd *b)
177 {
178 if (int128_lt(a->addr.start, b->addr.start)) {
179 return true;
180 } else if (int128_gt(a->addr.start, b->addr.start)) {
181 return false;
182 } else if (int128_lt(a->addr.size, b->addr.size)) {
183 return true;
184 } else if (int128_gt(a->addr.size, b->addr.size)) {
185 return false;
186 } else if (a->match_data < b->match_data) {
187 return true;
188 } else if (a->match_data > b->match_data) {
189 return false;
190 } else if (a->match_data) {
191 if (a->data < b->data) {
192 return true;
193 } else if (a->data > b->data) {
194 return false;
195 }
196 }
197 if (a->e < b->e) {
198 return true;
199 } else if (a->e > b->e) {
200 return false;
201 }
202 return false;
203 }
204
205 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
206 MemoryRegionIoeventfd *b)
207 {
208 return !memory_region_ioeventfd_before(a, b)
209 && !memory_region_ioeventfd_before(b, a);
210 }
211
212 /* Range of memory in the global map. Addresses are absolute. */
213 struct FlatRange {
214 MemoryRegion *mr;
215 hwaddr offset_in_region;
216 AddrRange addr;
217 uint8_t dirty_log_mask;
218 bool romd_mode;
219 bool readonly;
220 bool nonvolatile;
221 };
222
223 #define FOR_EACH_FLAT_RANGE(var, view) \
224 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
225
226 static inline MemoryRegionSection
227 section_from_flat_range(FlatRange *fr, FlatView *fv)
228 {
229 return (MemoryRegionSection) {
230 .mr = fr->mr,
231 .fv = fv,
232 .offset_within_region = fr->offset_in_region,
233 .size = fr->addr.size,
234 .offset_within_address_space = int128_get64(fr->addr.start),
235 .readonly = fr->readonly,
236 .nonvolatile = fr->nonvolatile,
237 };
238 }
239
240 static bool flatrange_equal(FlatRange *a, FlatRange *b)
241 {
242 return a->mr == b->mr
243 && addrrange_equal(a->addr, b->addr)
244 && a->offset_in_region == b->offset_in_region
245 && a->romd_mode == b->romd_mode
246 && a->readonly == b->readonly
247 && a->nonvolatile == b->nonvolatile;
248 }
249
250 static FlatView *flatview_new(MemoryRegion *mr_root)
251 {
252 FlatView *view;
253
254 view = g_new0(FlatView, 1);
255 view->ref = 1;
256 view->root = mr_root;
257 memory_region_ref(mr_root);
258 trace_flatview_new(view, mr_root);
259
260 return view;
261 }
262
263 /* Insert a range into a given position. Caller is responsible for maintaining
264 * sorting order.
265 */
266 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
267 {
268 if (view->nr == view->nr_allocated) {
269 view->nr_allocated = MAX(2 * view->nr, 10);
270 view->ranges = g_realloc(view->ranges,
271 view->nr_allocated * sizeof(*view->ranges));
272 }
273 memmove(view->ranges + pos + 1, view->ranges + pos,
274 (view->nr - pos) * sizeof(FlatRange));
275 view->ranges[pos] = *range;
276 memory_region_ref(range->mr);
277 ++view->nr;
278 }
279
280 static void flatview_destroy(FlatView *view)
281 {
282 int i;
283
284 trace_flatview_destroy(view, view->root);
285 if (view->dispatch) {
286 address_space_dispatch_free(view->dispatch);
287 }
288 for (i = 0; i < view->nr; i++) {
289 memory_region_unref(view->ranges[i].mr);
290 }
291 g_free(view->ranges);
292 memory_region_unref(view->root);
293 g_free(view);
294 }
295
296 static bool flatview_ref(FlatView *view)
297 {
298 return qatomic_fetch_inc_nonzero(&view->ref) > 0;
299 }
300
301 void flatview_unref(FlatView *view)
302 {
303 if (qatomic_fetch_dec(&view->ref) == 1) {
304 trace_flatview_destroy_rcu(view, view->root);
305 assert(view->root);
306 call_rcu(view, flatview_destroy, rcu);
307 }
308 }
309
310 static bool can_merge(FlatRange *r1, FlatRange *r2)
311 {
312 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
313 && r1->mr == r2->mr
314 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
315 r1->addr.size),
316 int128_make64(r2->offset_in_region))
317 && r1->dirty_log_mask == r2->dirty_log_mask
318 && r1->romd_mode == r2->romd_mode
319 && r1->readonly == r2->readonly
320 && r1->nonvolatile == r2->nonvolatile;
321 }
322
323 /* Attempt to simplify a view by merging adjacent ranges */
324 static void flatview_simplify(FlatView *view)
325 {
326 unsigned i, j, k;
327
328 i = 0;
329 while (i < view->nr) {
330 j = i + 1;
331 while (j < view->nr
332 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
333 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
334 ++j;
335 }
336 ++i;
337 for (k = i; k < j; k++) {
338 memory_region_unref(view->ranges[k].mr);
339 }
340 memmove(&view->ranges[i], &view->ranges[j],
341 (view->nr - j) * sizeof(view->ranges[j]));
342 view->nr -= j - i;
343 }
344 }
345
346 static bool memory_region_big_endian(MemoryRegion *mr)
347 {
348 #ifdef TARGET_WORDS_BIGENDIAN
349 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
350 #else
351 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
352 #endif
353 }
354
355 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
356 {
357 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
358 switch (op & MO_SIZE) {
359 case MO_8:
360 break;
361 case MO_16:
362 *data = bswap16(*data);
363 break;
364 case MO_32:
365 *data = bswap32(*data);
366 break;
367 case MO_64:
368 *data = bswap64(*data);
369 break;
370 default:
371 g_assert_not_reached();
372 }
373 }
374 }
375
376 static inline void memory_region_shift_read_access(uint64_t *value,
377 signed shift,
378 uint64_t mask,
379 uint64_t tmp)
380 {
381 if (shift >= 0) {
382 *value |= (tmp & mask) << shift;
383 } else {
384 *value |= (tmp & mask) >> -shift;
385 }
386 }
387
388 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
389 signed shift,
390 uint64_t mask)
391 {
392 uint64_t tmp;
393
394 if (shift >= 0) {
395 tmp = (*value >> shift) & mask;
396 } else {
397 tmp = (*value << -shift) & mask;
398 }
399
400 return tmp;
401 }
402
403 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
404 {
405 MemoryRegion *root;
406 hwaddr abs_addr = offset;
407
408 abs_addr += mr->addr;
409 for (root = mr; root->container; ) {
410 root = root->container;
411 abs_addr += root->addr;
412 }
413
414 return abs_addr;
415 }
416
417 static int get_cpu_index(void)
418 {
419 if (current_cpu) {
420 return current_cpu->cpu_index;
421 }
422 return -1;
423 }
424
425 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
426 hwaddr addr,
427 uint64_t *value,
428 unsigned size,
429 signed shift,
430 uint64_t mask,
431 MemTxAttrs attrs)
432 {
433 uint64_t tmp;
434
435 tmp = mr->ops->read(mr->opaque, addr, size);
436 if (mr->subpage) {
437 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
438 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
439 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
440 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
441 }
442 memory_region_shift_read_access(value, shift, mask, tmp);
443 return MEMTX_OK;
444 }
445
446 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
447 hwaddr addr,
448 uint64_t *value,
449 unsigned size,
450 signed shift,
451 uint64_t mask,
452 MemTxAttrs attrs)
453 {
454 uint64_t tmp = 0;
455 MemTxResult r;
456
457 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
458 if (mr->subpage) {
459 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
460 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
461 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
462 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
463 }
464 memory_region_shift_read_access(value, shift, mask, tmp);
465 return r;
466 }
467
468 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
469 hwaddr addr,
470 uint64_t *value,
471 unsigned size,
472 signed shift,
473 uint64_t mask,
474 MemTxAttrs attrs)
475 {
476 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
477
478 if (mr->subpage) {
479 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
480 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
481 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
482 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
483 }
484 mr->ops->write(mr->opaque, addr, tmp, size);
485 return MEMTX_OK;
486 }
487
488 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
489 hwaddr addr,
490 uint64_t *value,
491 unsigned size,
492 signed shift,
493 uint64_t mask,
494 MemTxAttrs attrs)
495 {
496 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
497
498 if (mr->subpage) {
499 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
500 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
501 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
502 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
503 }
504 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
505 }
506
507 static MemTxResult access_with_adjusted_size(hwaddr addr,
508 uint64_t *value,
509 unsigned size,
510 unsigned access_size_min,
511 unsigned access_size_max,
512 MemTxResult (*access_fn)
513 (MemoryRegion *mr,
514 hwaddr addr,
515 uint64_t *value,
516 unsigned size,
517 signed shift,
518 uint64_t mask,
519 MemTxAttrs attrs),
520 MemoryRegion *mr,
521 MemTxAttrs attrs)
522 {
523 uint64_t access_mask;
524 unsigned access_size;
525 unsigned i;
526 MemTxResult r = MEMTX_OK;
527
528 if (!access_size_min) {
529 access_size_min = 1;
530 }
531 if (!access_size_max) {
532 access_size_max = 4;
533 }
534
535 /* FIXME: support unaligned access? */
536 access_size = MAX(MIN(size, access_size_max), access_size_min);
537 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
538 if (memory_region_big_endian(mr)) {
539 for (i = 0; i < size; i += access_size) {
540 r |= access_fn(mr, addr + i, value, access_size,
541 (size - access_size - i) * 8, access_mask, attrs);
542 }
543 } else {
544 for (i = 0; i < size; i += access_size) {
545 r |= access_fn(mr, addr + i, value, access_size, i * 8,
546 access_mask, attrs);
547 }
548 }
549 return r;
550 }
551
552 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
553 {
554 AddressSpace *as;
555
556 while (mr->container) {
557 mr = mr->container;
558 }
559 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
560 if (mr == as->root) {
561 return as;
562 }
563 }
564 return NULL;
565 }
566
567 /* Render a memory region into the global view. Ranges in @view obscure
568 * ranges in @mr.
569 */
570 static void render_memory_region(FlatView *view,
571 MemoryRegion *mr,
572 Int128 base,
573 AddrRange clip,
574 bool readonly,
575 bool nonvolatile)
576 {
577 MemoryRegion *subregion;
578 unsigned i;
579 hwaddr offset_in_region;
580 Int128 remain;
581 Int128 now;
582 FlatRange fr;
583 AddrRange tmp;
584
585 if (!mr->enabled) {
586 return;
587 }
588
589 int128_addto(&base, int128_make64(mr->addr));
590 readonly |= mr->readonly;
591 nonvolatile |= mr->nonvolatile;
592
593 tmp = addrrange_make(base, mr->size);
594
595 if (!addrrange_intersects(tmp, clip)) {
596 return;
597 }
598
599 clip = addrrange_intersection(tmp, clip);
600
601 if (mr->alias) {
602 int128_subfrom(&base, int128_make64(mr->alias->addr));
603 int128_subfrom(&base, int128_make64(mr->alias_offset));
604 render_memory_region(view, mr->alias, base, clip,
605 readonly, nonvolatile);
606 return;
607 }
608
609 /* Render subregions in priority order. */
610 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
611 render_memory_region(view, subregion, base, clip,
612 readonly, nonvolatile);
613 }
614
615 if (!mr->terminates) {
616 return;
617 }
618
619 offset_in_region = int128_get64(int128_sub(clip.start, base));
620 base = clip.start;
621 remain = clip.size;
622
623 fr.mr = mr;
624 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
625 fr.romd_mode = mr->romd_mode;
626 fr.readonly = readonly;
627 fr.nonvolatile = nonvolatile;
628
629 /* Render the region itself into any gaps left by the current view. */
630 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
631 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
632 continue;
633 }
634 if (int128_lt(base, view->ranges[i].addr.start)) {
635 now = int128_min(remain,
636 int128_sub(view->ranges[i].addr.start, base));
637 fr.offset_in_region = offset_in_region;
638 fr.addr = addrrange_make(base, now);
639 flatview_insert(view, i, &fr);
640 ++i;
641 int128_addto(&base, now);
642 offset_in_region += int128_get64(now);
643 int128_subfrom(&remain, now);
644 }
645 now = int128_sub(int128_min(int128_add(base, remain),
646 addrrange_end(view->ranges[i].addr)),
647 base);
648 int128_addto(&base, now);
649 offset_in_region += int128_get64(now);
650 int128_subfrom(&remain, now);
651 }
652 if (int128_nz(remain)) {
653 fr.offset_in_region = offset_in_region;
654 fr.addr = addrrange_make(base, remain);
655 flatview_insert(view, i, &fr);
656 }
657 }
658
659 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
660 {
661 while (mr->enabled) {
662 if (mr->alias) {
663 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
664 /* The alias is included in its entirety. Use it as
665 * the "real" root, so that we can share more FlatViews.
666 */
667 mr = mr->alias;
668 continue;
669 }
670 } else if (!mr->terminates) {
671 unsigned int found = 0;
672 MemoryRegion *child, *next = NULL;
673 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
674 if (child->enabled) {
675 if (++found > 1) {
676 next = NULL;
677 break;
678 }
679 if (!child->addr && int128_ge(mr->size, child->size)) {
680 /* A child is included in its entirety. If it's the only
681 * enabled one, use it in the hope of finding an alias down the
682 * way. This will also let us share FlatViews.
683 */
684 next = child;
685 }
686 }
687 }
688 if (found == 0) {
689 return NULL;
690 }
691 if (next) {
692 mr = next;
693 continue;
694 }
695 }
696
697 return mr;
698 }
699
700 return NULL;
701 }
702
703 /* Render a memory topology into a list of disjoint absolute ranges. */
704 static FlatView *generate_memory_topology(MemoryRegion *mr)
705 {
706 int i;
707 FlatView *view;
708
709 view = flatview_new(mr);
710
711 if (mr) {
712 render_memory_region(view, mr, int128_zero(),
713 addrrange_make(int128_zero(), int128_2_64()),
714 false, false);
715 }
716 flatview_simplify(view);
717
718 view->dispatch = address_space_dispatch_new(view);
719 for (i = 0; i < view->nr; i++) {
720 MemoryRegionSection mrs =
721 section_from_flat_range(&view->ranges[i], view);
722 flatview_add_to_dispatch(view, &mrs);
723 }
724 address_space_dispatch_compact(view->dispatch);
725 g_hash_table_replace(flat_views, mr, view);
726
727 return view;
728 }
729
730 static void address_space_add_del_ioeventfds(AddressSpace *as,
731 MemoryRegionIoeventfd *fds_new,
732 unsigned fds_new_nb,
733 MemoryRegionIoeventfd *fds_old,
734 unsigned fds_old_nb)
735 {
736 unsigned iold, inew;
737 MemoryRegionIoeventfd *fd;
738 MemoryRegionSection section;
739
740 /* Generate a symmetric difference of the old and new fd sets, adding
741 * and deleting as necessary.
742 */
743
744 iold = inew = 0;
745 while (iold < fds_old_nb || inew < fds_new_nb) {
746 if (iold < fds_old_nb
747 && (inew == fds_new_nb
748 || memory_region_ioeventfd_before(&fds_old[iold],
749 &fds_new[inew]))) {
750 fd = &fds_old[iold];
751 section = (MemoryRegionSection) {
752 .fv = address_space_to_flatview(as),
753 .offset_within_address_space = int128_get64(fd->addr.start),
754 .size = fd->addr.size,
755 };
756 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
757 fd->match_data, fd->data, fd->e);
758 ++iold;
759 } else if (inew < fds_new_nb
760 && (iold == fds_old_nb
761 || memory_region_ioeventfd_before(&fds_new[inew],
762 &fds_old[iold]))) {
763 fd = &fds_new[inew];
764 section = (MemoryRegionSection) {
765 .fv = address_space_to_flatview(as),
766 .offset_within_address_space = int128_get64(fd->addr.start),
767 .size = fd->addr.size,
768 };
769 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
770 fd->match_data, fd->data, fd->e);
771 ++inew;
772 } else {
773 ++iold;
774 ++inew;
775 }
776 }
777 }
778
779 FlatView *address_space_get_flatview(AddressSpace *as)
780 {
781 FlatView *view;
782
783 RCU_READ_LOCK_GUARD();
784 do {
785 view = address_space_to_flatview(as);
786 /* If somebody has replaced as->current_map concurrently,
787 * flatview_ref returns false.
788 */
789 } while (!flatview_ref(view));
790 return view;
791 }
792
793 static void address_space_update_ioeventfds(AddressSpace *as)
794 {
795 FlatView *view;
796 FlatRange *fr;
797 unsigned ioeventfd_nb = 0;
798 unsigned ioeventfd_max;
799 MemoryRegionIoeventfd *ioeventfds;
800 AddrRange tmp;
801 unsigned i;
802
803 /*
804 * It is likely that the number of ioeventfds hasn't changed much, so use
805 * the previous size as the starting value, with some headroom to avoid
806 * gratuitous reallocations.
807 */
808 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
809 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
810
811 view = address_space_get_flatview(as);
812 FOR_EACH_FLAT_RANGE(fr, view) {
813 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
814 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
815 int128_sub(fr->addr.start,
816 int128_make64(fr->offset_in_region)));
817 if (addrrange_intersects(fr->addr, tmp)) {
818 ++ioeventfd_nb;
819 if (ioeventfd_nb > ioeventfd_max) {
820 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
821 ioeventfds = g_realloc(ioeventfds,
822 ioeventfd_max * sizeof(*ioeventfds));
823 }
824 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
825 ioeventfds[ioeventfd_nb-1].addr = tmp;
826 }
827 }
828 }
829
830 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
831 as->ioeventfds, as->ioeventfd_nb);
832
833 g_free(as->ioeventfds);
834 as->ioeventfds = ioeventfds;
835 as->ioeventfd_nb = ioeventfd_nb;
836 flatview_unref(view);
837 }
838
839 /*
840 * Notify the memory listeners about the coalesced IO change events of
841 * range `cmr'. Only the part that has intersection of the specified
842 * FlatRange will be sent.
843 */
844 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
845 CoalescedMemoryRange *cmr, bool add)
846 {
847 AddrRange tmp;
848
849 tmp = addrrange_shift(cmr->addr,
850 int128_sub(fr->addr.start,
851 int128_make64(fr->offset_in_region)));
852 if (!addrrange_intersects(tmp, fr->addr)) {
853 return;
854 }
855 tmp = addrrange_intersection(tmp, fr->addr);
856
857 if (add) {
858 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
859 int128_get64(tmp.start),
860 int128_get64(tmp.size));
861 } else {
862 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
863 int128_get64(tmp.start),
864 int128_get64(tmp.size));
865 }
866 }
867
868 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
869 {
870 CoalescedMemoryRange *cmr;
871
872 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
873 flat_range_coalesced_io_notify(fr, as, cmr, false);
874 }
875 }
876
877 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
878 {
879 MemoryRegion *mr = fr->mr;
880 CoalescedMemoryRange *cmr;
881
882 if (QTAILQ_EMPTY(&mr->coalesced)) {
883 return;
884 }
885
886 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
887 flat_range_coalesced_io_notify(fr, as, cmr, true);
888 }
889 }
890
891 static void address_space_update_topology_pass(AddressSpace *as,
892 const FlatView *old_view,
893 const FlatView *new_view,
894 bool adding)
895 {
896 unsigned iold, inew;
897 FlatRange *frold, *frnew;
898
899 /* Generate a symmetric difference of the old and new memory maps.
900 * Kill ranges in the old map, and instantiate ranges in the new map.
901 */
902 iold = inew = 0;
903 while (iold < old_view->nr || inew < new_view->nr) {
904 if (iold < old_view->nr) {
905 frold = &old_view->ranges[iold];
906 } else {
907 frold = NULL;
908 }
909 if (inew < new_view->nr) {
910 frnew = &new_view->ranges[inew];
911 } else {
912 frnew = NULL;
913 }
914
915 if (frold
916 && (!frnew
917 || int128_lt(frold->addr.start, frnew->addr.start)
918 || (int128_eq(frold->addr.start, frnew->addr.start)
919 && !flatrange_equal(frold, frnew)))) {
920 /* In old but not in new, or in both but attributes changed. */
921
922 if (!adding) {
923 flat_range_coalesced_io_del(frold, as);
924 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
925 }
926
927 ++iold;
928 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
929 /* In both and unchanged (except logging may have changed) */
930
931 if (adding) {
932 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
933 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
934 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
935 frold->dirty_log_mask,
936 frnew->dirty_log_mask);
937 }
938 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
939 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
940 frold->dirty_log_mask,
941 frnew->dirty_log_mask);
942 }
943 }
944
945 ++iold;
946 ++inew;
947 } else {
948 /* In new */
949
950 if (adding) {
951 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
952 flat_range_coalesced_io_add(frnew, as);
953 }
954
955 ++inew;
956 }
957 }
958 }
959
960 static void flatviews_init(void)
961 {
962 static FlatView *empty_view;
963
964 if (flat_views) {
965 return;
966 }
967
968 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
969 (GDestroyNotify) flatview_unref);
970 if (!empty_view) {
971 empty_view = generate_memory_topology(NULL);
972 /* We keep it alive forever in the global variable. */
973 flatview_ref(empty_view);
974 } else {
975 g_hash_table_replace(flat_views, NULL, empty_view);
976 flatview_ref(empty_view);
977 }
978 }
979
980 static void flatviews_reset(void)
981 {
982 AddressSpace *as;
983
984 if (flat_views) {
985 g_hash_table_unref(flat_views);
986 flat_views = NULL;
987 }
988 flatviews_init();
989
990 /* Render unique FVs */
991 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
992 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
993
994 if (g_hash_table_lookup(flat_views, physmr)) {
995 continue;
996 }
997
998 generate_memory_topology(physmr);
999 }
1000 }
1001
1002 static void address_space_set_flatview(AddressSpace *as)
1003 {
1004 FlatView *old_view = address_space_to_flatview(as);
1005 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1006 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1007
1008 assert(new_view);
1009
1010 if (old_view == new_view) {
1011 return;
1012 }
1013
1014 if (old_view) {
1015 flatview_ref(old_view);
1016 }
1017
1018 flatview_ref(new_view);
1019
1020 if (!QTAILQ_EMPTY(&as->listeners)) {
1021 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1022
1023 if (!old_view2) {
1024 old_view2 = &tmpview;
1025 }
1026 address_space_update_topology_pass(as, old_view2, new_view, false);
1027 address_space_update_topology_pass(as, old_view2, new_view, true);
1028 }
1029
1030 /* Writes are protected by the BQL. */
1031 qatomic_rcu_set(&as->current_map, new_view);
1032 if (old_view) {
1033 flatview_unref(old_view);
1034 }
1035
1036 /* Note that all the old MemoryRegions are still alive up to this
1037 * point. This relieves most MemoryListeners from the need to
1038 * ref/unref the MemoryRegions they get---unless they use them
1039 * outside the iothread mutex, in which case precise reference
1040 * counting is necessary.
1041 */
1042 if (old_view) {
1043 flatview_unref(old_view);
1044 }
1045 }
1046
1047 static void address_space_update_topology(AddressSpace *as)
1048 {
1049 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1050
1051 flatviews_init();
1052 if (!g_hash_table_lookup(flat_views, physmr)) {
1053 generate_memory_topology(physmr);
1054 }
1055 address_space_set_flatview(as);
1056 }
1057
1058 void memory_region_transaction_begin(void)
1059 {
1060 qemu_flush_coalesced_mmio_buffer();
1061 ++memory_region_transaction_depth;
1062 }
1063
1064 void memory_region_transaction_commit(void)
1065 {
1066 AddressSpace *as;
1067
1068 assert(memory_region_transaction_depth);
1069 assert(qemu_mutex_iothread_locked());
1070
1071 --memory_region_transaction_depth;
1072 if (!memory_region_transaction_depth) {
1073 if (memory_region_update_pending) {
1074 flatviews_reset();
1075
1076 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1077
1078 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1079 address_space_set_flatview(as);
1080 address_space_update_ioeventfds(as);
1081 }
1082 memory_region_update_pending = false;
1083 ioeventfd_update_pending = false;
1084 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1085 } else if (ioeventfd_update_pending) {
1086 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1087 address_space_update_ioeventfds(as);
1088 }
1089 ioeventfd_update_pending = false;
1090 }
1091 }
1092 }
1093
1094 static void memory_region_destructor_none(MemoryRegion *mr)
1095 {
1096 }
1097
1098 static void memory_region_destructor_ram(MemoryRegion *mr)
1099 {
1100 qemu_ram_free(mr->ram_block);
1101 }
1102
1103 static bool memory_region_need_escape(char c)
1104 {
1105 return c == '/' || c == '[' || c == '\\' || c == ']';
1106 }
1107
1108 static char *memory_region_escape_name(const char *name)
1109 {
1110 const char *p;
1111 char *escaped, *q;
1112 uint8_t c;
1113 size_t bytes = 0;
1114
1115 for (p = name; *p; p++) {
1116 bytes += memory_region_need_escape(*p) ? 4 : 1;
1117 }
1118 if (bytes == p - name) {
1119 return g_memdup(name, bytes + 1);
1120 }
1121
1122 escaped = g_malloc(bytes + 1);
1123 for (p = name, q = escaped; *p; p++) {
1124 c = *p;
1125 if (unlikely(memory_region_need_escape(c))) {
1126 *q++ = '\\';
1127 *q++ = 'x';
1128 *q++ = "0123456789abcdef"[c >> 4];
1129 c = "0123456789abcdef"[c & 15];
1130 }
1131 *q++ = c;
1132 }
1133 *q = 0;
1134 return escaped;
1135 }
1136
1137 static void memory_region_do_init(MemoryRegion *mr,
1138 Object *owner,
1139 const char *name,
1140 uint64_t size)
1141 {
1142 mr->size = int128_make64(size);
1143 if (size == UINT64_MAX) {
1144 mr->size = int128_2_64();
1145 }
1146 mr->name = g_strdup(name);
1147 mr->owner = owner;
1148 mr->ram_block = NULL;
1149
1150 if (name) {
1151 char *escaped_name = memory_region_escape_name(name);
1152 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1153
1154 if (!owner) {
1155 owner = container_get(qdev_get_machine(), "/unattached");
1156 }
1157
1158 object_property_add_child(owner, name_array, OBJECT(mr));
1159 object_unref(OBJECT(mr));
1160 g_free(name_array);
1161 g_free(escaped_name);
1162 }
1163 }
1164
1165 void memory_region_init(MemoryRegion *mr,
1166 Object *owner,
1167 const char *name,
1168 uint64_t size)
1169 {
1170 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1171 memory_region_do_init(mr, owner, name, size);
1172 }
1173
1174 static void memory_region_get_container(Object *obj, Visitor *v,
1175 const char *name, void *opaque,
1176 Error **errp)
1177 {
1178 MemoryRegion *mr = MEMORY_REGION(obj);
1179 char *path = (char *)"";
1180
1181 if (mr->container) {
1182 path = object_get_canonical_path(OBJECT(mr->container));
1183 }
1184 visit_type_str(v, name, &path, errp);
1185 if (mr->container) {
1186 g_free(path);
1187 }
1188 }
1189
1190 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1191 const char *part)
1192 {
1193 MemoryRegion *mr = MEMORY_REGION(obj);
1194
1195 return OBJECT(mr->container);
1196 }
1197
1198 static void memory_region_get_priority(Object *obj, Visitor *v,
1199 const char *name, void *opaque,
1200 Error **errp)
1201 {
1202 MemoryRegion *mr = MEMORY_REGION(obj);
1203 int32_t value = mr->priority;
1204
1205 visit_type_int32(v, name, &value, errp);
1206 }
1207
1208 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1209 void *opaque, Error **errp)
1210 {
1211 MemoryRegion *mr = MEMORY_REGION(obj);
1212 uint64_t value = memory_region_size(mr);
1213
1214 visit_type_uint64(v, name, &value, errp);
1215 }
1216
1217 static void memory_region_initfn(Object *obj)
1218 {
1219 MemoryRegion *mr = MEMORY_REGION(obj);
1220 ObjectProperty *op;
1221
1222 mr->ops = &unassigned_mem_ops;
1223 mr->enabled = true;
1224 mr->romd_mode = true;
1225 mr->destructor = memory_region_destructor_none;
1226 QTAILQ_INIT(&mr->subregions);
1227 QTAILQ_INIT(&mr->coalesced);
1228
1229 op = object_property_add(OBJECT(mr), "container",
1230 "link<" TYPE_MEMORY_REGION ">",
1231 memory_region_get_container,
1232 NULL, /* memory_region_set_container */
1233 NULL, NULL);
1234 op->resolve = memory_region_resolve_container;
1235
1236 object_property_add_uint64_ptr(OBJECT(mr), "addr",
1237 &mr->addr, OBJ_PROP_FLAG_READ);
1238 object_property_add(OBJECT(mr), "priority", "uint32",
1239 memory_region_get_priority,
1240 NULL, /* memory_region_set_priority */
1241 NULL, NULL);
1242 object_property_add(OBJECT(mr), "size", "uint64",
1243 memory_region_get_size,
1244 NULL, /* memory_region_set_size, */
1245 NULL, NULL);
1246 }
1247
1248 static void iommu_memory_region_initfn(Object *obj)
1249 {
1250 MemoryRegion *mr = MEMORY_REGION(obj);
1251
1252 mr->is_iommu = true;
1253 }
1254
1255 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1256 unsigned size)
1257 {
1258 #ifdef DEBUG_UNASSIGNED
1259 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1260 #endif
1261 return 0;
1262 }
1263
1264 static void unassigned_mem_write(void *opaque, hwaddr addr,
1265 uint64_t val, unsigned size)
1266 {
1267 #ifdef DEBUG_UNASSIGNED
1268 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1269 #endif
1270 }
1271
1272 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1273 unsigned size, bool is_write,
1274 MemTxAttrs attrs)
1275 {
1276 return false;
1277 }
1278
1279 const MemoryRegionOps unassigned_mem_ops = {
1280 .valid.accepts = unassigned_mem_accepts,
1281 .endianness = DEVICE_NATIVE_ENDIAN,
1282 };
1283
1284 static uint64_t memory_region_ram_device_read(void *opaque,
1285 hwaddr addr, unsigned size)
1286 {
1287 MemoryRegion *mr = opaque;
1288 uint64_t data = (uint64_t)~0;
1289
1290 switch (size) {
1291 case 1:
1292 data = *(uint8_t *)(mr->ram_block->host + addr);
1293 break;
1294 case 2:
1295 data = *(uint16_t *)(mr->ram_block->host + addr);
1296 break;
1297 case 4:
1298 data = *(uint32_t *)(mr->ram_block->host + addr);
1299 break;
1300 case 8:
1301 data = *(uint64_t *)(mr->ram_block->host + addr);
1302 break;
1303 }
1304
1305 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1306
1307 return data;
1308 }
1309
1310 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1311 uint64_t data, unsigned size)
1312 {
1313 MemoryRegion *mr = opaque;
1314
1315 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1316
1317 switch (size) {
1318 case 1:
1319 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1320 break;
1321 case 2:
1322 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1323 break;
1324 case 4:
1325 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1326 break;
1327 case 8:
1328 *(uint64_t *)(mr->ram_block->host + addr) = data;
1329 break;
1330 }
1331 }
1332
1333 static const MemoryRegionOps ram_device_mem_ops = {
1334 .read = memory_region_ram_device_read,
1335 .write = memory_region_ram_device_write,
1336 .endianness = DEVICE_HOST_ENDIAN,
1337 .valid = {
1338 .min_access_size = 1,
1339 .max_access_size = 8,
1340 .unaligned = true,
1341 },
1342 .impl = {
1343 .min_access_size = 1,
1344 .max_access_size = 8,
1345 .unaligned = true,
1346 },
1347 };
1348
1349 bool memory_region_access_valid(MemoryRegion *mr,
1350 hwaddr addr,
1351 unsigned size,
1352 bool is_write,
1353 MemTxAttrs attrs)
1354 {
1355 if (mr->ops->valid.accepts
1356 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1357 qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
1358 "0x%" HWADDR_PRIX ", size %u, "
1359 "region '%s', reason: rejected\n",
1360 addr, size, memory_region_name(mr));
1361 return false;
1362 }
1363
1364 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1365 qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
1366 "0x%" HWADDR_PRIX ", size %u, "
1367 "region '%s', reason: unaligned\n",
1368 addr, size, memory_region_name(mr));
1369 return false;
1370 }
1371
1372 /* Treat zero as compatibility all valid */
1373 if (!mr->ops->valid.max_access_size) {
1374 return true;
1375 }
1376
1377 if (size > mr->ops->valid.max_access_size
1378 || size < mr->ops->valid.min_access_size) {
1379 qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
1380 "0x%" HWADDR_PRIX ", size %u, "
1381 "region '%s', reason: invalid size "
1382 "(min:%u max:%u)\n",
1383 addr, size, memory_region_name(mr),
1384 mr->ops->valid.min_access_size,
1385 mr->ops->valid.max_access_size);
1386 return false;
1387 }
1388 return true;
1389 }
1390
1391 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1392 hwaddr addr,
1393 uint64_t *pval,
1394 unsigned size,
1395 MemTxAttrs attrs)
1396 {
1397 *pval = 0;
1398
1399 if (mr->ops->read) {
1400 return access_with_adjusted_size(addr, pval, size,
1401 mr->ops->impl.min_access_size,
1402 mr->ops->impl.max_access_size,
1403 memory_region_read_accessor,
1404 mr, attrs);
1405 } else {
1406 return access_with_adjusted_size(addr, pval, size,
1407 mr->ops->impl.min_access_size,
1408 mr->ops->impl.max_access_size,
1409 memory_region_read_with_attrs_accessor,
1410 mr, attrs);
1411 }
1412 }
1413
1414 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1415 hwaddr addr,
1416 uint64_t *pval,
1417 MemOp op,
1418 MemTxAttrs attrs)
1419 {
1420 unsigned size = memop_size(op);
1421 MemTxResult r;
1422
1423 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1424 *pval = unassigned_mem_read(mr, addr, size);
1425 return MEMTX_DECODE_ERROR;
1426 }
1427
1428 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1429 adjust_endianness(mr, pval, op);
1430 return r;
1431 }
1432
1433 /* Return true if an eventfd was signalled */
1434 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1435 hwaddr addr,
1436 uint64_t data,
1437 unsigned size,
1438 MemTxAttrs attrs)
1439 {
1440 MemoryRegionIoeventfd ioeventfd = {
1441 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1442 .data = data,
1443 };
1444 unsigned i;
1445
1446 for (i = 0; i < mr->ioeventfd_nb; i++) {
1447 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1448 ioeventfd.e = mr->ioeventfds[i].e;
1449
1450 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1451 event_notifier_set(ioeventfd.e);
1452 return true;
1453 }
1454 }
1455
1456 return false;
1457 }
1458
1459 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1460 hwaddr addr,
1461 uint64_t data,
1462 MemOp op,
1463 MemTxAttrs attrs)
1464 {
1465 unsigned size = memop_size(op);
1466
1467 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1468 unassigned_mem_write(mr, addr, data, size);
1469 return MEMTX_DECODE_ERROR;
1470 }
1471
1472 adjust_endianness(mr, &data, op);
1473
1474 if ((!kvm_eventfds_enabled()) &&
1475 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1476 return MEMTX_OK;
1477 }
1478
1479 if (mr->ops->write) {
1480 return access_with_adjusted_size(addr, &data, size,
1481 mr->ops->impl.min_access_size,
1482 mr->ops->impl.max_access_size,
1483 memory_region_write_accessor, mr,
1484 attrs);
1485 } else {
1486 return
1487 access_with_adjusted_size(addr, &data, size,
1488 mr->ops->impl.min_access_size,
1489 mr->ops->impl.max_access_size,
1490 memory_region_write_with_attrs_accessor,
1491 mr, attrs);
1492 }
1493 }
1494
1495 void memory_region_init_io(MemoryRegion *mr,
1496 Object *owner,
1497 const MemoryRegionOps *ops,
1498 void *opaque,
1499 const char *name,
1500 uint64_t size)
1501 {
1502 memory_region_init(mr, owner, name, size);
1503 mr->ops = ops ? ops : &unassigned_mem_ops;
1504 mr->opaque = opaque;
1505 mr->terminates = true;
1506 }
1507
1508 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1509 Object *owner,
1510 const char *name,
1511 uint64_t size,
1512 Error **errp)
1513 {
1514 memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1515 }
1516
1517 void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
1518 Object *owner,
1519 const char *name,
1520 uint64_t size,
1521 bool share,
1522 Error **errp)
1523 {
1524 Error *err = NULL;
1525 memory_region_init(mr, owner, name, size);
1526 mr->ram = true;
1527 mr->terminates = true;
1528 mr->destructor = memory_region_destructor_ram;
1529 mr->ram_block = qemu_ram_alloc(size, share, mr, &err);
1530 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1531 if (err) {
1532 mr->size = int128_zero();
1533 object_unparent(OBJECT(mr));
1534 error_propagate(errp, err);
1535 }
1536 }
1537
1538 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1539 Object *owner,
1540 const char *name,
1541 uint64_t size,
1542 uint64_t max_size,
1543 void (*resized)(const char*,
1544 uint64_t length,
1545 void *host),
1546 Error **errp)
1547 {
1548 Error *err = NULL;
1549 memory_region_init(mr, owner, name, size);
1550 mr->ram = true;
1551 mr->terminates = true;
1552 mr->destructor = memory_region_destructor_ram;
1553 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1554 mr, &err);
1555 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1556 if (err) {
1557 mr->size = int128_zero();
1558 object_unparent(OBJECT(mr));
1559 error_propagate(errp, err);
1560 }
1561 }
1562
1563 #ifdef CONFIG_POSIX
1564 void memory_region_init_ram_from_file(MemoryRegion *mr,
1565 struct Object *owner,
1566 const char *name,
1567 uint64_t size,
1568 uint64_t align,
1569 uint32_t ram_flags,
1570 const char *path,
1571 Error **errp)
1572 {
1573 Error *err = NULL;
1574 memory_region_init(mr, owner, name, size);
1575 mr->ram = true;
1576 mr->terminates = true;
1577 mr->destructor = memory_region_destructor_ram;
1578 mr->align = align;
1579 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path, &err);
1580 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1581 if (err) {
1582 mr->size = int128_zero();
1583 object_unparent(OBJECT(mr));
1584 error_propagate(errp, err);
1585 }
1586 }
1587
1588 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1589 struct Object *owner,
1590 const char *name,
1591 uint64_t size,
1592 bool share,
1593 int fd,
1594 Error **errp)
1595 {
1596 Error *err = NULL;
1597 memory_region_init(mr, owner, name, size);
1598 mr->ram = true;
1599 mr->terminates = true;
1600 mr->destructor = memory_region_destructor_ram;
1601 mr->ram_block = qemu_ram_alloc_from_fd(size, mr,
1602 share ? RAM_SHARED : 0,
1603 fd, &err);
1604 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1605 if (err) {
1606 mr->size = int128_zero();
1607 object_unparent(OBJECT(mr));
1608 error_propagate(errp, err);
1609 }
1610 }
1611 #endif
1612
1613 void memory_region_init_ram_ptr(MemoryRegion *mr,
1614 Object *owner,
1615 const char *name,
1616 uint64_t size,
1617 void *ptr)
1618 {
1619 memory_region_init(mr, owner, name, size);
1620 mr->ram = true;
1621 mr->terminates = true;
1622 mr->destructor = memory_region_destructor_ram;
1623 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1624
1625 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1626 assert(ptr != NULL);
1627 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1628 }
1629
1630 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1631 Object *owner,
1632 const char *name,
1633 uint64_t size,
1634 void *ptr)
1635 {
1636 memory_region_init(mr, owner, name, size);
1637 mr->ram = true;
1638 mr->terminates = true;
1639 mr->ram_device = true;
1640 mr->ops = &ram_device_mem_ops;
1641 mr->opaque = mr;
1642 mr->destructor = memory_region_destructor_ram;
1643 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1644 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1645 assert(ptr != NULL);
1646 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1647 }
1648
1649 void memory_region_init_alias(MemoryRegion *mr,
1650 Object *owner,
1651 const char *name,
1652 MemoryRegion *orig,
1653 hwaddr offset,
1654 uint64_t size)
1655 {
1656 memory_region_init(mr, owner, name, size);
1657 mr->alias = orig;
1658 mr->alias_offset = offset;
1659 }
1660
1661 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1662 struct Object *owner,
1663 const char *name,
1664 uint64_t size,
1665 Error **errp)
1666 {
1667 memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1668 mr->readonly = true;
1669 }
1670
1671 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1672 Object *owner,
1673 const MemoryRegionOps *ops,
1674 void *opaque,
1675 const char *name,
1676 uint64_t size,
1677 Error **errp)
1678 {
1679 Error *err = NULL;
1680 assert(ops);
1681 memory_region_init(mr, owner, name, size);
1682 mr->ops = ops;
1683 mr->opaque = opaque;
1684 mr->terminates = true;
1685 mr->rom_device = true;
1686 mr->destructor = memory_region_destructor_ram;
1687 mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
1688 if (err) {
1689 mr->size = int128_zero();
1690 object_unparent(OBJECT(mr));
1691 error_propagate(errp, err);
1692 }
1693 }
1694
1695 void memory_region_init_iommu(void *_iommu_mr,
1696 size_t instance_size,
1697 const char *mrtypename,
1698 Object *owner,
1699 const char *name,
1700 uint64_t size)
1701 {
1702 struct IOMMUMemoryRegion *iommu_mr;
1703 struct MemoryRegion *mr;
1704
1705 object_initialize(_iommu_mr, instance_size, mrtypename);
1706 mr = MEMORY_REGION(_iommu_mr);
1707 memory_region_do_init(mr, owner, name, size);
1708 iommu_mr = IOMMU_MEMORY_REGION(mr);
1709 mr->terminates = true; /* then re-forwards */
1710 QLIST_INIT(&iommu_mr->iommu_notify);
1711 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1712 }
1713
1714 static void memory_region_finalize(Object *obj)
1715 {
1716 MemoryRegion *mr = MEMORY_REGION(obj);
1717
1718 assert(!mr->container);
1719
1720 /* We know the region is not visible in any address space (it
1721 * does not have a container and cannot be a root either because
1722 * it has no references, so we can blindly clear mr->enabled.
1723 * memory_region_set_enabled instead could trigger a transaction
1724 * and cause an infinite loop.
1725 */
1726 mr->enabled = false;
1727 memory_region_transaction_begin();
1728 while (!QTAILQ_EMPTY(&mr->subregions)) {
1729 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1730 memory_region_del_subregion(mr, subregion);
1731 }
1732 memory_region_transaction_commit();
1733
1734 mr->destructor(mr);
1735 memory_region_clear_coalescing(mr);
1736 g_free((char *)mr->name);
1737 g_free(mr->ioeventfds);
1738 }
1739
1740 Object *memory_region_owner(MemoryRegion *mr)
1741 {
1742 Object *obj = OBJECT(mr);
1743 return obj->parent;
1744 }
1745
1746 void memory_region_ref(MemoryRegion *mr)
1747 {
1748 /* MMIO callbacks most likely will access data that belongs
1749 * to the owner, hence the need to ref/unref the owner whenever
1750 * the memory region is in use.
1751 *
1752 * The memory region is a child of its owner. As long as the
1753 * owner doesn't call unparent itself on the memory region,
1754 * ref-ing the owner will also keep the memory region alive.
1755 * Memory regions without an owner are supposed to never go away;
1756 * we do not ref/unref them because it slows down DMA sensibly.
1757 */
1758 if (mr && mr->owner) {
1759 object_ref(mr->owner);
1760 }
1761 }
1762
1763 void memory_region_unref(MemoryRegion *mr)
1764 {
1765 if (mr && mr->owner) {
1766 object_unref(mr->owner);
1767 }
1768 }
1769
1770 uint64_t memory_region_size(MemoryRegion *mr)
1771 {
1772 if (int128_eq(mr->size, int128_2_64())) {
1773 return UINT64_MAX;
1774 }
1775 return int128_get64(mr->size);
1776 }
1777
1778 const char *memory_region_name(const MemoryRegion *mr)
1779 {
1780 if (!mr->name) {
1781 ((MemoryRegion *)mr)->name =
1782 g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1783 }
1784 return mr->name;
1785 }
1786
1787 bool memory_region_is_ram_device(MemoryRegion *mr)
1788 {
1789 return mr->ram_device;
1790 }
1791
1792 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1793 {
1794 uint8_t mask = mr->dirty_log_mask;
1795 if (global_dirty_log && mr->ram_block) {
1796 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1797 }
1798 return mask;
1799 }
1800
1801 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1802 {
1803 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1804 }
1805
1806 static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1807 Error **errp)
1808 {
1809 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1810 IOMMUNotifier *iommu_notifier;
1811 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1812 int ret = 0;
1813
1814 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1815 flags |= iommu_notifier->notifier_flags;
1816 }
1817
1818 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1819 ret = imrc->notify_flag_changed(iommu_mr,
1820 iommu_mr->iommu_notify_flags,
1821 flags, errp);
1822 }
1823
1824 if (!ret) {
1825 iommu_mr->iommu_notify_flags = flags;
1826 }
1827 return ret;
1828 }
1829
1830 int memory_region_register_iommu_notifier(MemoryRegion *mr,
1831 IOMMUNotifier *n, Error **errp)
1832 {
1833 IOMMUMemoryRegion *iommu_mr;
1834 int ret;
1835
1836 if (mr->alias) {
1837 return memory_region_register_iommu_notifier(mr->alias, n, errp);
1838 }
1839
1840 /* We need to register for at least one bitfield */
1841 iommu_mr = IOMMU_MEMORY_REGION(mr);
1842 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1843 assert(n->start <= n->end);
1844 assert(n->iommu_idx >= 0 &&
1845 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1846
1847 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1848 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1849 if (ret) {
1850 QLIST_REMOVE(n, node);
1851 }
1852 return ret;
1853 }
1854
1855 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1856 {
1857 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1858
1859 if (imrc->get_min_page_size) {
1860 return imrc->get_min_page_size(iommu_mr);
1861 }
1862 return TARGET_PAGE_SIZE;
1863 }
1864
1865 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1866 {
1867 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1868 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1869 hwaddr addr, granularity;
1870 IOMMUTLBEntry iotlb;
1871
1872 /* If the IOMMU has its own replay callback, override */
1873 if (imrc->replay) {
1874 imrc->replay(iommu_mr, n);
1875 return;
1876 }
1877
1878 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1879
1880 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1881 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1882 if (iotlb.perm != IOMMU_NONE) {
1883 n->notify(n, &iotlb);
1884 }
1885
1886 /* if (2^64 - MR size) < granularity, it's possible to get an
1887 * infinite loop here. This should catch such a wraparound */
1888 if ((addr + granularity) < addr) {
1889 break;
1890 }
1891 }
1892 }
1893
1894 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1895 IOMMUNotifier *n)
1896 {
1897 IOMMUMemoryRegion *iommu_mr;
1898
1899 if (mr->alias) {
1900 memory_region_unregister_iommu_notifier(mr->alias, n);
1901 return;
1902 }
1903 QLIST_REMOVE(n, node);
1904 iommu_mr = IOMMU_MEMORY_REGION(mr);
1905 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
1906 }
1907
1908 void memory_region_notify_one(IOMMUNotifier *notifier,
1909 IOMMUTLBEntry *entry)
1910 {
1911 IOMMUNotifierFlag request_flags;
1912 hwaddr entry_end = entry->iova + entry->addr_mask;
1913
1914 /*
1915 * Skip the notification if the notification does not overlap
1916 * with registered range.
1917 */
1918 if (notifier->start > entry_end || notifier->end < entry->iova) {
1919 return;
1920 }
1921
1922 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
1923
1924 if (entry->perm & IOMMU_RW) {
1925 request_flags = IOMMU_NOTIFIER_MAP;
1926 } else {
1927 request_flags = IOMMU_NOTIFIER_UNMAP;
1928 }
1929
1930 if (notifier->notifier_flags & request_flags) {
1931 notifier->notify(notifier, entry);
1932 }
1933 }
1934
1935 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1936 int iommu_idx,
1937 IOMMUTLBEntry entry)
1938 {
1939 IOMMUNotifier *iommu_notifier;
1940
1941 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1942
1943 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1944 if (iommu_notifier->iommu_idx == iommu_idx) {
1945 memory_region_notify_one(iommu_notifier, &entry);
1946 }
1947 }
1948 }
1949
1950 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
1951 enum IOMMUMemoryRegionAttr attr,
1952 void *data)
1953 {
1954 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1955
1956 if (!imrc->get_attr) {
1957 return -EINVAL;
1958 }
1959
1960 return imrc->get_attr(iommu_mr, attr, data);
1961 }
1962
1963 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
1964 MemTxAttrs attrs)
1965 {
1966 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1967
1968 if (!imrc->attrs_to_index) {
1969 return 0;
1970 }
1971
1972 return imrc->attrs_to_index(iommu_mr, attrs);
1973 }
1974
1975 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
1976 {
1977 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1978
1979 if (!imrc->num_indexes) {
1980 return 1;
1981 }
1982
1983 return imrc->num_indexes(iommu_mr);
1984 }
1985
1986 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1987 {
1988 uint8_t mask = 1 << client;
1989 uint8_t old_logging;
1990
1991 assert(client == DIRTY_MEMORY_VGA);
1992 old_logging = mr->vga_logging_count;
1993 mr->vga_logging_count += log ? 1 : -1;
1994 if (!!old_logging == !!mr->vga_logging_count) {
1995 return;
1996 }
1997
1998 memory_region_transaction_begin();
1999 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2000 memory_region_update_pending |= mr->enabled;
2001 memory_region_transaction_commit();
2002 }
2003
2004 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2005 hwaddr size)
2006 {
2007 assert(mr->ram_block);
2008 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2009 size,
2010 memory_region_get_dirty_log_mask(mr));
2011 }
2012
2013 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
2014 {
2015 MemoryListener *listener;
2016 AddressSpace *as;
2017 FlatView *view;
2018 FlatRange *fr;
2019
2020 /* If the same address space has multiple log_sync listeners, we
2021 * visit that address space's FlatView multiple times. But because
2022 * log_sync listeners are rare, it's still cheaper than walking each
2023 * address space once.
2024 */
2025 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2026 if (!listener->log_sync) {
2027 continue;
2028 }
2029 as = listener->address_space;
2030 view = address_space_get_flatview(as);
2031 FOR_EACH_FLAT_RANGE(fr, view) {
2032 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2033 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2034 listener->log_sync(listener, &mrs);
2035 }
2036 }
2037 flatview_unref(view);
2038 }
2039 }
2040
2041 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2042 hwaddr len)
2043 {
2044 MemoryRegionSection mrs;
2045 MemoryListener *listener;
2046 AddressSpace *as;
2047 FlatView *view;
2048 FlatRange *fr;
2049 hwaddr sec_start, sec_end, sec_size;
2050
2051 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2052 if (!listener->log_clear) {
2053 continue;
2054 }
2055 as = listener->address_space;
2056 view = address_space_get_flatview(as);
2057 FOR_EACH_FLAT_RANGE(fr, view) {
2058 if (!fr->dirty_log_mask || fr->mr != mr) {
2059 /*
2060 * Clear dirty bitmap operation only applies to those
2061 * regions whose dirty logging is at least enabled
2062 */
2063 continue;
2064 }
2065
2066 mrs = section_from_flat_range(fr, view);
2067
2068 sec_start = MAX(mrs.offset_within_region, start);
2069 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2070 sec_end = MIN(sec_end, start + len);
2071
2072 if (sec_start >= sec_end) {
2073 /*
2074 * If this memory region section has no intersection
2075 * with the requested range, skip.
2076 */
2077 continue;
2078 }
2079
2080 /* Valid case; shrink the section if needed */
2081 mrs.offset_within_address_space +=
2082 sec_start - mrs.offset_within_region;
2083 mrs.offset_within_region = sec_start;
2084 sec_size = sec_end - sec_start;
2085 mrs.size = int128_make64(sec_size);
2086 listener->log_clear(listener, &mrs);
2087 }
2088 flatview_unref(view);
2089 }
2090 }
2091
2092 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2093 hwaddr addr,
2094 hwaddr size,
2095 unsigned client)
2096 {
2097 DirtyBitmapSnapshot *snapshot;
2098 assert(mr->ram_block);
2099 memory_region_sync_dirty_bitmap(mr);
2100 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2101 memory_global_after_dirty_log_sync();
2102 return snapshot;
2103 }
2104
2105 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2106 hwaddr addr, hwaddr size)
2107 {
2108 assert(mr->ram_block);
2109 return cpu_physical_memory_snapshot_get_dirty(snap,
2110 memory_region_get_ram_addr(mr) + addr, size);
2111 }
2112
2113 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2114 {
2115 if (mr->readonly != readonly) {
2116 memory_region_transaction_begin();
2117 mr->readonly = readonly;
2118 memory_region_update_pending |= mr->enabled;
2119 memory_region_transaction_commit();
2120 }
2121 }
2122
2123 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2124 {
2125 if (mr->nonvolatile != nonvolatile) {
2126 memory_region_transaction_begin();
2127 mr->nonvolatile = nonvolatile;
2128 memory_region_update_pending |= mr->enabled;
2129 memory_region_transaction_commit();
2130 }
2131 }
2132
2133 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2134 {
2135 if (mr->romd_mode != romd_mode) {
2136 memory_region_transaction_begin();
2137 mr->romd_mode = romd_mode;
2138 memory_region_update_pending |= mr->enabled;
2139 memory_region_transaction_commit();
2140 }
2141 }
2142
2143 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2144 hwaddr size, unsigned client)
2145 {
2146 assert(mr->ram_block);
2147 cpu_physical_memory_test_and_clear_dirty(
2148 memory_region_get_ram_addr(mr) + addr, size, client);
2149 }
2150
2151 int memory_region_get_fd(MemoryRegion *mr)
2152 {
2153 int fd;
2154
2155 RCU_READ_LOCK_GUARD();
2156 while (mr->alias) {
2157 mr = mr->alias;
2158 }
2159 fd = mr->ram_block->fd;
2160
2161 return fd;
2162 }
2163
2164 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2165 {
2166 void *ptr;
2167 uint64_t offset = 0;
2168
2169 RCU_READ_LOCK_GUARD();
2170 while (mr->alias) {
2171 offset += mr->alias_offset;
2172 mr = mr->alias;
2173 }
2174 assert(mr->ram_block);
2175 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2176
2177 return ptr;
2178 }
2179
2180 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2181 {
2182 RAMBlock *block;
2183
2184 block = qemu_ram_block_from_host(ptr, false, offset);
2185 if (!block) {
2186 return NULL;
2187 }
2188
2189 return block->mr;
2190 }
2191
2192 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2193 {
2194 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2195 }
2196
2197 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2198 {
2199 assert(mr->ram_block);
2200
2201 qemu_ram_resize(mr->ram_block, newsize, errp);
2202 }
2203
2204 void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2205 {
2206 if (mr->ram_block) {
2207 qemu_ram_msync(mr->ram_block, addr, size);
2208 }
2209 }
2210
2211 void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2212 {
2213 /*
2214 * Might be extended case needed to cover
2215 * different types of memory regions
2216 */
2217 if (mr->dirty_log_mask) {
2218 memory_region_msync(mr, addr, size);
2219 }
2220 }
2221
2222 /*
2223 * Call proper memory listeners about the change on the newly
2224 * added/removed CoalescedMemoryRange.
2225 */
2226 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2227 CoalescedMemoryRange *cmr,
2228 bool add)
2229 {
2230 AddressSpace *as;
2231 FlatView *view;
2232 FlatRange *fr;
2233
2234 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2235 view = address_space_get_flatview(as);
2236 FOR_EACH_FLAT_RANGE(fr, view) {
2237 if (fr->mr == mr) {
2238 flat_range_coalesced_io_notify(fr, as, cmr, add);
2239 }
2240 }
2241 flatview_unref(view);
2242 }
2243 }
2244
2245 void memory_region_set_coalescing(MemoryRegion *mr)
2246 {
2247 memory_region_clear_coalescing(mr);
2248 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2249 }
2250
2251 void memory_region_add_coalescing(MemoryRegion *mr,
2252 hwaddr offset,
2253 uint64_t size)
2254 {
2255 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2256
2257 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2258 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2259 memory_region_update_coalesced_range(mr, cmr, true);
2260 memory_region_set_flush_coalesced(mr);
2261 }
2262
2263 void memory_region_clear_coalescing(MemoryRegion *mr)
2264 {
2265 CoalescedMemoryRange *cmr;
2266
2267 if (QTAILQ_EMPTY(&mr->coalesced)) {
2268 return;
2269 }
2270
2271 qemu_flush_coalesced_mmio_buffer();
2272 mr->flush_coalesced_mmio = false;
2273
2274 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2275 cmr = QTAILQ_FIRST(&mr->coalesced);
2276 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2277 memory_region_update_coalesced_range(mr, cmr, false);
2278 g_free(cmr);
2279 }
2280 }
2281
2282 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2283 {
2284 mr->flush_coalesced_mmio = true;
2285 }
2286
2287 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2288 {
2289 qemu_flush_coalesced_mmio_buffer();
2290 if (QTAILQ_EMPTY(&mr->coalesced)) {
2291 mr->flush_coalesced_mmio = false;
2292 }
2293 }
2294
2295 static bool userspace_eventfd_warning;
2296
2297 void memory_region_add_eventfd(MemoryRegion *mr,
2298 hwaddr addr,
2299 unsigned size,
2300 bool match_data,
2301 uint64_t data,
2302 EventNotifier *e)
2303 {
2304 MemoryRegionIoeventfd mrfd = {
2305 .addr.start = int128_make64(addr),
2306 .addr.size = int128_make64(size),
2307 .match_data = match_data,
2308 .data = data,
2309 .e = e,
2310 };
2311 unsigned i;
2312
2313 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2314 userspace_eventfd_warning))) {
2315 userspace_eventfd_warning = true;
2316 error_report("Using eventfd without MMIO binding in KVM. "
2317 "Suboptimal performance expected");
2318 }
2319
2320 if (size) {
2321 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2322 }
2323 memory_region_transaction_begin();
2324 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2325 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2326 break;
2327 }
2328 }
2329 ++mr->ioeventfd_nb;
2330 mr->ioeventfds = g_realloc(mr->ioeventfds,
2331 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2332 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2333 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2334 mr->ioeventfds[i] = mrfd;
2335 ioeventfd_update_pending |= mr->enabled;
2336 memory_region_transaction_commit();
2337 }
2338
2339 void memory_region_del_eventfd(MemoryRegion *mr,
2340 hwaddr addr,
2341 unsigned size,
2342 bool match_data,
2343 uint64_t data,
2344 EventNotifier *e)
2345 {
2346 MemoryRegionIoeventfd mrfd = {
2347 .addr.start = int128_make64(addr),
2348 .addr.size = int128_make64(size),
2349 .match_data = match_data,
2350 .data = data,
2351 .e = e,
2352 };
2353 unsigned i;
2354
2355 if (size) {
2356 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2357 }
2358 memory_region_transaction_begin();
2359 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2360 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2361 break;
2362 }
2363 }
2364 assert(i != mr->ioeventfd_nb);
2365 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2366 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2367 --mr->ioeventfd_nb;
2368 mr->ioeventfds = g_realloc(mr->ioeventfds,
2369 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2370 ioeventfd_update_pending |= mr->enabled;
2371 memory_region_transaction_commit();
2372 }
2373
2374 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2375 {
2376 MemoryRegion *mr = subregion->container;
2377 MemoryRegion *other;
2378
2379 memory_region_transaction_begin();
2380
2381 memory_region_ref(subregion);
2382 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2383 if (subregion->priority >= other->priority) {
2384 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2385 goto done;
2386 }
2387 }
2388 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2389 done:
2390 memory_region_update_pending |= mr->enabled && subregion->enabled;
2391 memory_region_transaction_commit();
2392 }
2393
2394 static void memory_region_add_subregion_common(MemoryRegion *mr,
2395 hwaddr offset,
2396 MemoryRegion *subregion)
2397 {
2398 assert(!subregion->container);
2399 subregion->container = mr;
2400 subregion->addr = offset;
2401 memory_region_update_container_subregions(subregion);
2402 }
2403
2404 void memory_region_add_subregion(MemoryRegion *mr,
2405 hwaddr offset,
2406 MemoryRegion *subregion)
2407 {
2408 subregion->priority = 0;
2409 memory_region_add_subregion_common(mr, offset, subregion);
2410 }
2411
2412 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2413 hwaddr offset,
2414 MemoryRegion *subregion,
2415 int priority)
2416 {
2417 subregion->priority = priority;
2418 memory_region_add_subregion_common(mr, offset, subregion);
2419 }
2420
2421 void memory_region_del_subregion(MemoryRegion *mr,
2422 MemoryRegion *subregion)
2423 {
2424 memory_region_transaction_begin();
2425 assert(subregion->container == mr);
2426 subregion->container = NULL;
2427 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2428 memory_region_unref(subregion);
2429 memory_region_update_pending |= mr->enabled && subregion->enabled;
2430 memory_region_transaction_commit();
2431 }
2432
2433 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2434 {
2435 if (enabled == mr->enabled) {
2436 return;
2437 }
2438 memory_region_transaction_begin();
2439 mr->enabled = enabled;
2440 memory_region_update_pending = true;
2441 memory_region_transaction_commit();
2442 }
2443
2444 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2445 {
2446 Int128 s = int128_make64(size);
2447
2448 if (size == UINT64_MAX) {
2449 s = int128_2_64();
2450 }
2451 if (int128_eq(s, mr->size)) {
2452 return;
2453 }
2454 memory_region_transaction_begin();
2455 mr->size = s;
2456 memory_region_update_pending = true;
2457 memory_region_transaction_commit();
2458 }
2459
2460 static void memory_region_readd_subregion(MemoryRegion *mr)
2461 {
2462 MemoryRegion *container = mr->container;
2463
2464 if (container) {
2465 memory_region_transaction_begin();
2466 memory_region_ref(mr);
2467 memory_region_del_subregion(container, mr);
2468 mr->container = container;
2469 memory_region_update_container_subregions(mr);
2470 memory_region_unref(mr);
2471 memory_region_transaction_commit();
2472 }
2473 }
2474
2475 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2476 {
2477 if (addr != mr->addr) {
2478 mr->addr = addr;
2479 memory_region_readd_subregion(mr);
2480 }
2481 }
2482
2483 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2484 {
2485 assert(mr->alias);
2486
2487 if (offset == mr->alias_offset) {
2488 return;
2489 }
2490
2491 memory_region_transaction_begin();
2492 mr->alias_offset = offset;
2493 memory_region_update_pending |= mr->enabled;
2494 memory_region_transaction_commit();
2495 }
2496
2497 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2498 {
2499 return mr->align;
2500 }
2501
2502 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2503 {
2504 const AddrRange *addr = addr_;
2505 const FlatRange *fr = fr_;
2506
2507 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2508 return -1;
2509 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2510 return 1;
2511 }
2512 return 0;
2513 }
2514
2515 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2516 {
2517 return bsearch(&addr, view->ranges, view->nr,
2518 sizeof(FlatRange), cmp_flatrange_addr);
2519 }
2520
2521 bool memory_region_is_mapped(MemoryRegion *mr)
2522 {
2523 return mr->container ? true : false;
2524 }
2525
2526 /* Same as memory_region_find, but it does not add a reference to the
2527 * returned region. It must be called from an RCU critical section.
2528 */
2529 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2530 hwaddr addr, uint64_t size)
2531 {
2532 MemoryRegionSection ret = { .mr = NULL };
2533 MemoryRegion *root;
2534 AddressSpace *as;
2535 AddrRange range;
2536 FlatView *view;
2537 FlatRange *fr;
2538
2539 addr += mr->addr;
2540 for (root = mr; root->container; ) {
2541 root = root->container;
2542 addr += root->addr;
2543 }
2544
2545 as = memory_region_to_address_space(root);
2546 if (!as) {
2547 return ret;
2548 }
2549 range = addrrange_make(int128_make64(addr), int128_make64(size));
2550
2551 view = address_space_to_flatview(as);
2552 fr = flatview_lookup(view, range);
2553 if (!fr) {
2554 return ret;
2555 }
2556
2557 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2558 --fr;
2559 }
2560
2561 ret.mr = fr->mr;
2562 ret.fv = view;
2563 range = addrrange_intersection(range, fr->addr);
2564 ret.offset_within_region = fr->offset_in_region;
2565 ret.offset_within_region += int128_get64(int128_sub(range.start,
2566 fr->addr.start));
2567 ret.size = range.size;
2568 ret.offset_within_address_space = int128_get64(range.start);
2569 ret.readonly = fr->readonly;
2570 ret.nonvolatile = fr->nonvolatile;
2571 return ret;
2572 }
2573
2574 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2575 hwaddr addr, uint64_t size)
2576 {
2577 MemoryRegionSection ret;
2578 RCU_READ_LOCK_GUARD();
2579 ret = memory_region_find_rcu(mr, addr, size);
2580 if (ret.mr) {
2581 memory_region_ref(ret.mr);
2582 }
2583 return ret;
2584 }
2585
2586 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2587 {
2588 MemoryRegion *mr;
2589
2590 RCU_READ_LOCK_GUARD();
2591 mr = memory_region_find_rcu(container, addr, 1).mr;
2592 return mr && mr != container;
2593 }
2594
2595 void memory_global_dirty_log_sync(void)
2596 {
2597 memory_region_sync_dirty_bitmap(NULL);
2598 }
2599
2600 void memory_global_after_dirty_log_sync(void)
2601 {
2602 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2603 }
2604
2605 static VMChangeStateEntry *vmstate_change;
2606
2607 void memory_global_dirty_log_start(void)
2608 {
2609 if (vmstate_change) {
2610 qemu_del_vm_change_state_handler(vmstate_change);
2611 vmstate_change = NULL;
2612 }
2613
2614 global_dirty_log = true;
2615
2616 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2617
2618 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2619 memory_region_transaction_begin();
2620 memory_region_update_pending = true;
2621 memory_region_transaction_commit();
2622 }
2623
2624 static void memory_global_dirty_log_do_stop(void)
2625 {
2626 global_dirty_log = false;
2627
2628 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2629 memory_region_transaction_begin();
2630 memory_region_update_pending = true;
2631 memory_region_transaction_commit();
2632
2633 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2634 }
2635
2636 static void memory_vm_change_state_handler(void *opaque, int running,
2637 RunState state)
2638 {
2639 if (running) {
2640 memory_global_dirty_log_do_stop();
2641
2642 if (vmstate_change) {
2643 qemu_del_vm_change_state_handler(vmstate_change);
2644 vmstate_change = NULL;
2645 }
2646 }
2647 }
2648
2649 void memory_global_dirty_log_stop(void)
2650 {
2651 if (!runstate_is_running()) {
2652 if (vmstate_change) {
2653 return;
2654 }
2655 vmstate_change = qemu_add_vm_change_state_handler(
2656 memory_vm_change_state_handler, NULL);
2657 return;
2658 }
2659
2660 memory_global_dirty_log_do_stop();
2661 }
2662
2663 static void listener_add_address_space(MemoryListener *listener,
2664 AddressSpace *as)
2665 {
2666 FlatView *view;
2667 FlatRange *fr;
2668
2669 if (listener->begin) {
2670 listener->begin(listener);
2671 }
2672 if (global_dirty_log) {
2673 if (listener->log_global_start) {
2674 listener->log_global_start(listener);
2675 }
2676 }
2677
2678 view = address_space_get_flatview(as);
2679 FOR_EACH_FLAT_RANGE(fr, view) {
2680 MemoryRegionSection section = section_from_flat_range(fr, view);
2681
2682 if (listener->region_add) {
2683 listener->region_add(listener, &section);
2684 }
2685 if (fr->dirty_log_mask && listener->log_start) {
2686 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2687 }
2688 }
2689 if (listener->commit) {
2690 listener->commit(listener);
2691 }
2692 flatview_unref(view);
2693 }
2694
2695 static void listener_del_address_space(MemoryListener *listener,
2696 AddressSpace *as)
2697 {
2698 FlatView *view;
2699 FlatRange *fr;
2700
2701 if (listener->begin) {
2702 listener->begin(listener);
2703 }
2704 view = address_space_get_flatview(as);
2705 FOR_EACH_FLAT_RANGE(fr, view) {
2706 MemoryRegionSection section = section_from_flat_range(fr, view);
2707
2708 if (fr->dirty_log_mask && listener->log_stop) {
2709 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2710 }
2711 if (listener->region_del) {
2712 listener->region_del(listener, &section);
2713 }
2714 }
2715 if (listener->commit) {
2716 listener->commit(listener);
2717 }
2718 flatview_unref(view);
2719 }
2720
2721 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2722 {
2723 MemoryListener *other = NULL;
2724
2725 listener->address_space = as;
2726 if (QTAILQ_EMPTY(&memory_listeners)
2727 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
2728 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2729 } else {
2730 QTAILQ_FOREACH(other, &memory_listeners, link) {
2731 if (listener->priority < other->priority) {
2732 break;
2733 }
2734 }
2735 QTAILQ_INSERT_BEFORE(other, listener, link);
2736 }
2737
2738 if (QTAILQ_EMPTY(&as->listeners)
2739 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
2740 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2741 } else {
2742 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2743 if (listener->priority < other->priority) {
2744 break;
2745 }
2746 }
2747 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2748 }
2749
2750 listener_add_address_space(listener, as);
2751 }
2752
2753 void memory_listener_unregister(MemoryListener *listener)
2754 {
2755 if (!listener->address_space) {
2756 return;
2757 }
2758
2759 listener_del_address_space(listener, listener->address_space);
2760 QTAILQ_REMOVE(&memory_listeners, listener, link);
2761 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2762 listener->address_space = NULL;
2763 }
2764
2765 void address_space_remove_listeners(AddressSpace *as)
2766 {
2767 while (!QTAILQ_EMPTY(&as->listeners)) {
2768 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
2769 }
2770 }
2771
2772 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2773 {
2774 memory_region_ref(root);
2775 as->root = root;
2776 as->current_map = NULL;
2777 as->ioeventfd_nb = 0;
2778 as->ioeventfds = NULL;
2779 QTAILQ_INIT(&as->listeners);
2780 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2781 as->name = g_strdup(name ? name : "anonymous");
2782 address_space_update_topology(as);
2783 address_space_update_ioeventfds(as);
2784 }
2785
2786 static void do_address_space_destroy(AddressSpace *as)
2787 {
2788 assert(QTAILQ_EMPTY(&as->listeners));
2789
2790 flatview_unref(as->current_map);
2791 g_free(as->name);
2792 g_free(as->ioeventfds);
2793 memory_region_unref(as->root);
2794 }
2795
2796 void address_space_destroy(AddressSpace *as)
2797 {
2798 MemoryRegion *root = as->root;
2799
2800 /* Flush out anything from MemoryListeners listening in on this */
2801 memory_region_transaction_begin();
2802 as->root = NULL;
2803 memory_region_transaction_commit();
2804 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2805
2806 /* At this point, as->dispatch and as->current_map are dummy
2807 * entries that the guest should never use. Wait for the old
2808 * values to expire before freeing the data.
2809 */
2810 as->root = root;
2811 call_rcu(as, do_address_space_destroy, rcu);
2812 }
2813
2814 static const char *memory_region_type(MemoryRegion *mr)
2815 {
2816 if (mr->alias) {
2817 return memory_region_type(mr->alias);
2818 }
2819 if (memory_region_is_ram_device(mr)) {
2820 return "ramd";
2821 } else if (memory_region_is_romd(mr)) {
2822 return "romd";
2823 } else if (memory_region_is_rom(mr)) {
2824 return "rom";
2825 } else if (memory_region_is_ram(mr)) {
2826 return "ram";
2827 } else {
2828 return "i/o";
2829 }
2830 }
2831
2832 typedef struct MemoryRegionList MemoryRegionList;
2833
2834 struct MemoryRegionList {
2835 const MemoryRegion *mr;
2836 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2837 };
2838
2839 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
2840
2841 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2842 int128_sub((size), int128_one())) : 0)
2843 #define MTREE_INDENT " "
2844
2845 static void mtree_expand_owner(const char *label, Object *obj)
2846 {
2847 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
2848
2849 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
2850 if (dev && dev->id) {
2851 qemu_printf(" id=%s", dev->id);
2852 } else {
2853 char *canonical_path = object_get_canonical_path(obj);
2854 if (canonical_path) {
2855 qemu_printf(" path=%s", canonical_path);
2856 g_free(canonical_path);
2857 } else {
2858 qemu_printf(" type=%s", object_get_typename(obj));
2859 }
2860 }
2861 qemu_printf("}");
2862 }
2863
2864 static void mtree_print_mr_owner(const MemoryRegion *mr)
2865 {
2866 Object *owner = mr->owner;
2867 Object *parent = memory_region_owner((MemoryRegion *)mr);
2868
2869 if (!owner && !parent) {
2870 qemu_printf(" orphan");
2871 return;
2872 }
2873 if (owner) {
2874 mtree_expand_owner("owner", owner);
2875 }
2876 if (parent && parent != owner) {
2877 mtree_expand_owner("parent", parent);
2878 }
2879 }
2880
2881 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
2882 hwaddr base,
2883 MemoryRegionListHead *alias_print_queue,
2884 bool owner, bool display_disabled)
2885 {
2886 MemoryRegionList *new_ml, *ml, *next_ml;
2887 MemoryRegionListHead submr_print_queue;
2888 const MemoryRegion *submr;
2889 unsigned int i;
2890 hwaddr cur_start, cur_end;
2891
2892 if (!mr) {
2893 return;
2894 }
2895
2896 cur_start = base + mr->addr;
2897 cur_end = cur_start + MR_SIZE(mr->size);
2898
2899 /*
2900 * Try to detect overflow of memory region. This should never
2901 * happen normally. When it happens, we dump something to warn the
2902 * user who is observing this.
2903 */
2904 if (cur_start < base || cur_end < cur_start) {
2905 qemu_printf("[DETECTED OVERFLOW!] ");
2906 }
2907
2908 if (mr->alias) {
2909 MemoryRegionList *ml;
2910 bool found = false;
2911
2912 /* check if the alias is already in the queue */
2913 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2914 if (ml->mr == mr->alias) {
2915 found = true;
2916 }
2917 }
2918
2919 if (!found) {
2920 ml = g_new(MemoryRegionList, 1);
2921 ml->mr = mr->alias;
2922 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2923 }
2924 if (mr->enabled || display_disabled) {
2925 for (i = 0; i < level; i++) {
2926 qemu_printf(MTREE_INDENT);
2927 }
2928 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
2929 " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
2930 "-" TARGET_FMT_plx "%s",
2931 cur_start, cur_end,
2932 mr->priority,
2933 mr->nonvolatile ? "nv-" : "",
2934 memory_region_type((MemoryRegion *)mr),
2935 memory_region_name(mr),
2936 memory_region_name(mr->alias),
2937 mr->alias_offset,
2938 mr->alias_offset + MR_SIZE(mr->size),
2939 mr->enabled ? "" : " [disabled]");
2940 if (owner) {
2941 mtree_print_mr_owner(mr);
2942 }
2943 qemu_printf("\n");
2944 }
2945 } else {
2946 if (mr->enabled || display_disabled) {
2947 for (i = 0; i < level; i++) {
2948 qemu_printf(MTREE_INDENT);
2949 }
2950 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
2951 " (prio %d, %s%s): %s%s",
2952 cur_start, cur_end,
2953 mr->priority,
2954 mr->nonvolatile ? "nv-" : "",
2955 memory_region_type((MemoryRegion *)mr),
2956 memory_region_name(mr),
2957 mr->enabled ? "" : " [disabled]");
2958 if (owner) {
2959 mtree_print_mr_owner(mr);
2960 }
2961 qemu_printf("\n");
2962 }
2963 }
2964
2965 QTAILQ_INIT(&submr_print_queue);
2966
2967 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2968 new_ml = g_new(MemoryRegionList, 1);
2969 new_ml->mr = submr;
2970 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2971 if (new_ml->mr->addr < ml->mr->addr ||
2972 (new_ml->mr->addr == ml->mr->addr &&
2973 new_ml->mr->priority > ml->mr->priority)) {
2974 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
2975 new_ml = NULL;
2976 break;
2977 }
2978 }
2979 if (new_ml) {
2980 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
2981 }
2982 }
2983
2984 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
2985 mtree_print_mr(ml->mr, level + 1, cur_start,
2986 alias_print_queue, owner, display_disabled);
2987 }
2988
2989 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
2990 g_free(ml);
2991 }
2992 }
2993
2994 struct FlatViewInfo {
2995 int counter;
2996 bool dispatch_tree;
2997 bool owner;
2998 AccelClass *ac;
2999 };
3000
3001 static void mtree_print_flatview(gpointer key, gpointer value,
3002 gpointer user_data)
3003 {
3004 FlatView *view = key;
3005 GArray *fv_address_spaces = value;
3006 struct FlatViewInfo *fvi = user_data;
3007 FlatRange *range = &view->ranges[0];
3008 MemoryRegion *mr;
3009 int n = view->nr;
3010 int i;
3011 AddressSpace *as;
3012
3013 qemu_printf("FlatView #%d\n", fvi->counter);
3014 ++fvi->counter;
3015
3016 for (i = 0; i < fv_address_spaces->len; ++i) {
3017 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3018 qemu_printf(" AS \"%s\", root: %s",
3019 as->name, memory_region_name(as->root));
3020 if (as->root->alias) {
3021 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3022 }
3023 qemu_printf("\n");
3024 }
3025
3026 qemu_printf(" Root memory region: %s\n",
3027 view->root ? memory_region_name(view->root) : "(none)");
3028
3029 if (n <= 0) {
3030 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3031 return;
3032 }
3033
3034 while (n--) {
3035 mr = range->mr;
3036 if (range->offset_in_region) {
3037 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3038 " (prio %d, %s%s): %s @" TARGET_FMT_plx,
3039 int128_get64(range->addr.start),
3040 int128_get64(range->addr.start)
3041 + MR_SIZE(range->addr.size),
3042 mr->priority,
3043 range->nonvolatile ? "nv-" : "",
3044 range->readonly ? "rom" : memory_region_type(mr),
3045 memory_region_name(mr),
3046 range->offset_in_region);
3047 } else {
3048 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3049 " (prio %d, %s%s): %s",
3050 int128_get64(range->addr.start),
3051 int128_get64(range->addr.start)
3052 + MR_SIZE(range->addr.size),
3053 mr->priority,
3054 range->nonvolatile ? "nv-" : "",
3055 range->readonly ? "rom" : memory_region_type(mr),
3056 memory_region_name(mr));
3057 }
3058 if (fvi->owner) {
3059 mtree_print_mr_owner(mr);
3060 }
3061
3062 if (fvi->ac) {
3063 for (i = 0; i < fv_address_spaces->len; ++i) {
3064 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3065 if (fvi->ac->has_memory(current_machine, as,
3066 int128_get64(range->addr.start),
3067 MR_SIZE(range->addr.size) + 1)) {
3068 qemu_printf(" %s", fvi->ac->name);
3069 }
3070 }
3071 }
3072 qemu_printf("\n");
3073 range++;
3074 }
3075
3076 #if !defined(CONFIG_USER_ONLY)
3077 if (fvi->dispatch_tree && view->root) {
3078 mtree_print_dispatch(view->dispatch, view->root);
3079 }
3080 #endif
3081
3082 qemu_printf("\n");
3083 }
3084
3085 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3086 gpointer user_data)
3087 {
3088 FlatView *view = key;
3089 GArray *fv_address_spaces = value;
3090
3091 g_array_unref(fv_address_spaces);
3092 flatview_unref(view);
3093
3094 return true;
3095 }
3096
3097 void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3098 {
3099 MemoryRegionListHead ml_head;
3100 MemoryRegionList *ml, *ml2;
3101 AddressSpace *as;
3102
3103 if (flatview) {
3104 FlatView *view;
3105 struct FlatViewInfo fvi = {
3106 .counter = 0,
3107 .dispatch_tree = dispatch_tree,
3108 .owner = owner,
3109 };
3110 GArray *fv_address_spaces;
3111 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3112 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3113
3114 if (ac->has_memory) {
3115 fvi.ac = ac;
3116 }
3117
3118 /* Gather all FVs in one table */
3119 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3120 view = address_space_get_flatview(as);
3121
3122 fv_address_spaces = g_hash_table_lookup(views, view);
3123 if (!fv_address_spaces) {
3124 fv_address_spaces = g_array_new(false, false, sizeof(as));
3125 g_hash_table_insert(views, view, fv_address_spaces);
3126 }
3127
3128 g_array_append_val(fv_address_spaces, as);
3129 }
3130
3131 /* Print */
3132 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3133
3134 /* Free */
3135 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3136 g_hash_table_unref(views);
3137
3138 return;
3139 }
3140
3141 QTAILQ_INIT(&ml_head);
3142
3143 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3144 qemu_printf("address-space: %s\n", as->name);
3145 mtree_print_mr(as->root, 1, 0, &ml_head, owner, disabled);
3146 qemu_printf("\n");
3147 }
3148
3149 /* print aliased regions */
3150 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3151 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3152 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3153 qemu_printf("\n");
3154 }
3155
3156 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3157 g_free(ml);
3158 }
3159 }
3160
3161 void memory_region_init_ram(MemoryRegion *mr,
3162 struct Object *owner,
3163 const char *name,
3164 uint64_t size,
3165 Error **errp)
3166 {
3167 DeviceState *owner_dev;
3168 Error *err = NULL;
3169
3170 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3171 if (err) {
3172 error_propagate(errp, err);
3173 return;
3174 }
3175 /* This will assert if owner is neither NULL nor a DeviceState.
3176 * We only want the owner here for the purposes of defining a
3177 * unique name for migration. TODO: Ideally we should implement
3178 * a naming scheme for Objects which are not DeviceStates, in
3179 * which case we can relax this restriction.
3180 */
3181 owner_dev = DEVICE(owner);
3182 vmstate_register_ram(mr, owner_dev);
3183 }
3184
3185 void memory_region_init_rom(MemoryRegion *mr,
3186 struct Object *owner,
3187 const char *name,
3188 uint64_t size,
3189 Error **errp)
3190 {
3191 DeviceState *owner_dev;
3192 Error *err = NULL;
3193
3194 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3195 if (err) {
3196 error_propagate(errp, err);
3197 return;
3198 }
3199 /* This will assert if owner is neither NULL nor a DeviceState.
3200 * We only want the owner here for the purposes of defining a
3201 * unique name for migration. TODO: Ideally we should implement
3202 * a naming scheme for Objects which are not DeviceStates, in
3203 * which case we can relax this restriction.
3204 */
3205 owner_dev = DEVICE(owner);
3206 vmstate_register_ram(mr, owner_dev);
3207 }
3208
3209 void memory_region_init_rom_device(MemoryRegion *mr,
3210 struct Object *owner,
3211 const MemoryRegionOps *ops,
3212 void *opaque,
3213 const char *name,
3214 uint64_t size,
3215 Error **errp)
3216 {
3217 DeviceState *owner_dev;
3218 Error *err = NULL;
3219
3220 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3221 name, size, &err);
3222 if (err) {
3223 error_propagate(errp, err);
3224 return;
3225 }
3226 /* This will assert if owner is neither NULL nor a DeviceState.
3227 * We only want the owner here for the purposes of defining a
3228 * unique name for migration. TODO: Ideally we should implement
3229 * a naming scheme for Objects which are not DeviceStates, in
3230 * which case we can relax this restriction.
3231 */
3232 owner_dev = DEVICE(owner);
3233 vmstate_register_ram(mr, owner_dev);
3234 }
3235
3236 static const TypeInfo memory_region_info = {
3237 .parent = TYPE_OBJECT,
3238 .name = TYPE_MEMORY_REGION,
3239 .class_size = sizeof(MemoryRegionClass),
3240 .instance_size = sizeof(MemoryRegion),
3241 .instance_init = memory_region_initfn,
3242 .instance_finalize = memory_region_finalize,
3243 };
3244
3245 static const TypeInfo iommu_memory_region_info = {
3246 .parent = TYPE_MEMORY_REGION,
3247 .name = TYPE_IOMMU_MEMORY_REGION,
3248 .class_size = sizeof(IOMMUMemoryRegionClass),
3249 .instance_size = sizeof(IOMMUMemoryRegion),
3250 .instance_init = iommu_memory_region_initfn,
3251 .abstract = true,
3252 };
3253
3254 static void memory_register_types(void)
3255 {
3256 type_register_static(&memory_region_info);
3257 type_register_static(&iommu_memory_region_info);
3258 }
3259
3260 type_init(memory_register_types)
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