hw/hppa/machine.c

   1 /*
   2  * QEMU HPPA hardware system emulator.
   3  * Copyright 2018 Helge Deller <deller@gmx.de>
   4  */
   5
   6 #include "qemu/osdep.h"
   7 #include "qemu/datadir.h"
   8 #include "cpu.h"
   9 #include "elf.h"
  10 #include "hw/loader.h"
  11 #include "qemu/error-report.h"
  12 #include "sysemu/reset.h"
  13 #include "sysemu/sysemu.h"
  14 #include "sysemu/runstate.h"
  15 #include "hw/rtc/mc146818rtc.h"
  16 #include "hw/timer/i8254.h"
  17 #include "hw/char/serial.h"
  18 #include "hw/char/parallel.h"
  19 #include "hw/intc/i8259.h"
  20 #include "hw/input/lasips2.h"
  21 #include "hw/net/lasi_82596.h"
  22 #include "hw/nmi.h"
  23 #include "hw/pci/pci.h"
  24 #include "hw/pci-host/dino.h"
  25 #include "hw/misc/lasi.h"
  26 #include "hppa_hardware.h"
  27 #include "qemu/units.h"
  28 #include "qapi/error.h"
  29 #include "net/net.h"
  30 #include "qemu/log.h"
  31
  32 #define MIN_SEABIOS_HPPA_VERSION 6 /* require at least this fw version */
  33
  34 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10)
  35
  36 #define enable_lasi_lan()       0
  37
  38
  39 static void hppa_powerdown_req(Notifier *n, void *opaque)
  40 {
  41     hwaddr soft_power_reg = HPA_POWER_BUTTON;
  42     uint32_t val;
  43
  44     val = ldl_be_phys(&address_space_memory, soft_power_reg);
  45     if ((val >> 8) == 0) {
  46         /* immediately shut down when under hardware control */
  47         qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
  48         return;
  49     }
  50
  51     /* clear bit 31 to indicate that the power switch was pressed. */
  52     val &= ~1;
  53     stl_be_phys(&address_space_memory, soft_power_reg, val);
  54 }
  55
  56 static Notifier hppa_system_powerdown_notifier = {
  57     .notify = hppa_powerdown_req
  58 };
  59
  60 /* Fallback for unassigned PCI I/O operations.  Avoids MCHK.  */
  61 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size)
  62 {
  63     return 0;
  64 }
  65
  66 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size)
  67 {
  68 }
  69
  70 static const MemoryRegionOps hppa_pci_ignore_ops = {
  71     .read = ignore_read,
  72     .write = ignore_write,
  73     .endianness = DEVICE_BIG_ENDIAN,
  74     .valid = {
  75         .min_access_size = 1,
  76         .max_access_size = 8,
  77     },
  78     .impl = {
  79         .min_access_size = 1,
  80         .max_access_size = 8,
  81     },
  82 };
  83
  84 static ISABus *hppa_isa_bus(void)
  85 {
  86     ISABus *isa_bus;
  87     qemu_irq *isa_irqs;
  88     MemoryRegion *isa_region;
  89
  90     isa_region = g_new(MemoryRegion, 1);
  91     memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops,
  92                           NULL, "isa-io", 0x800);
  93     memory_region_add_subregion(get_system_memory(), IDE_HPA,
  94                                 isa_region);
  95
  96     isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region,
  97                           &error_abort);
  98     isa_irqs = i8259_init(isa_bus,
  99                           /* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */
 100                           NULL);
 101     isa_bus_register_input_irqs(isa_bus, isa_irqs);
 102
 103     return isa_bus;
 104 }
 105
 106 static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr)
 107 {
 108     addr &= (0x10000000 - 1);
 109     return addr;
 110 }
 111
 112 static HPPACPU *cpu[HPPA_MAX_CPUS];
 113 static uint64_t firmware_entry;
 114
 115 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
 116                             Error **errp)
 117 {
 118     fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
 119 }
 120
 121 static FWCfgState *create_fw_cfg(MachineState *ms)
 122 {
 123     FWCfgState *fw_cfg;
 124     uint64_t val;
 125     const char qemu_version[] = QEMU_VERSION;
 126
 127     fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4);
 128     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus);
 129     fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS);
 130     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size);
 131
 132     val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION);
 133     fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
 134                     g_memdup(&val, sizeof(val)), sizeof(val));
 135
 136     val = cpu_to_le64(HPPA_TLB_ENTRIES - HPPA_BTLB_ENTRIES);
 137     fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
 138                     g_memdup(&val, sizeof(val)), sizeof(val));
 139
 140     val = cpu_to_le64(HPA_POWER_BUTTON);
 141     fw_cfg_add_file(fw_cfg, "/etc/power-button-addr",
 142                     g_memdup(&val, sizeof(val)), sizeof(val));
 143
 144     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]);
 145     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 146
 147     fw_cfg_add_file(fw_cfg, "/etc/qemu-version",
 148                     g_memdup(qemu_version, sizeof(qemu_version)),
 149                     sizeof(qemu_version));
 150
 151     return fw_cfg;
 152 }
 153
 154 static LasiState *lasi_init(void)
 155 {
 156     DeviceState *dev;
 157
 158     dev = qdev_new(TYPE_LASI_CHIP);
 159     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 160
 161     return LASI_CHIP(dev);
 162 }
 163
 164 static DinoState *dino_init(MemoryRegion *addr_space)
 165 {
 166     DeviceState *dev;
 167
 168     dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE);
 169     object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space),
 170                              &error_fatal);
 171     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 172
 173     return DINO_PCI_HOST_BRIDGE(dev);
 174 }
 175
 176 static void machine_hppa_init(MachineState *machine)
 177 {
 178     const char *kernel_filename = machine->kernel_filename;
 179     const char *kernel_cmdline = machine->kernel_cmdline;
 180     const char *initrd_filename = machine->initrd_filename;
 181     MachineClass *mc = MACHINE_GET_CLASS(machine);
 182     DeviceState *dev, *dino_dev, *lasi_dev;
 183     PCIBus *pci_bus;
 184     ISABus *isa_bus;
 185     char *firmware_filename;
 186     uint64_t firmware_low, firmware_high;
 187     long size;
 188     uint64_t kernel_entry = 0, kernel_low, kernel_high;
 189     MemoryRegion *addr_space = get_system_memory();
 190     MemoryRegion *rom_region;
 191     MemoryRegion *cpu_region;
 192     long i;
 193     unsigned int smp_cpus = machine->smp.cpus;
 194     SysBusDevice *s;
 195
 196     /* Create CPUs.  */
 197     for (i = 0; i < smp_cpus; i++) {
 198         char *name = g_strdup_printf("cpu%ld-io-eir", i);
 199         cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type));
 200
 201         cpu_region = g_new(MemoryRegion, 1);
 202         memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops,
 203                               cpu[i], name, 4);
 204         memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000,
 205                                     cpu_region);
 206         g_free(name);
 207     }
 208
 209     /* Main memory region. */
 210     if (machine->ram_size > 3 * GiB) {
 211         error_report("RAM size is currently restricted to 3GB");
 212         exit(EXIT_FAILURE);
 213     }
 214     memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1);
 215
 216
 217     /* Init Lasi chip */
 218     lasi_dev = DEVICE(lasi_init());
 219     memory_region_add_subregion(addr_space, LASI_HPA,
 220                                 sysbus_mmio_get_region(
 221                                     SYS_BUS_DEVICE(lasi_dev), 0));
 222
 223     /* Init Dino (PCI host bus chip).  */
 224     dino_dev = DEVICE(dino_init(addr_space));
 225     memory_region_add_subregion(addr_space, DINO_HPA,
 226                                 sysbus_mmio_get_region(
 227                                     SYS_BUS_DEVICE(dino_dev), 0));
 228     pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci"));
 229     assert(pci_bus);
 230
 231     /* Create ISA bus. */
 232     isa_bus = hppa_isa_bus();
 233     assert(isa_bus);
 234
 235     /* Realtime clock, used by firmware for PDC_TOD call. */
 236     mc146818_rtc_init(isa_bus, 2000, NULL);
 237
 238     /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */
 239     serial_mm_init(addr_space, LASI_UART_HPA + 0x800, 0,
 240         qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16,
 241         serial_hd(0), DEVICE_BIG_ENDIAN);
 242
 243     serial_mm_init(addr_space, DINO_UART_HPA + 0x800, 0,
 244         qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16,
 245         serial_hd(1), DEVICE_BIG_ENDIAN);
 246
 247     /* Parallel port */
 248     parallel_mm_init(addr_space, LASI_LPT_HPA + 0x800, 0,
 249                      qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA),
 250                      parallel_hds[0]);
 251
 252     /* fw_cfg configuration interface */
 253     create_fw_cfg(machine);
 254
 255     /* SCSI disk setup. */
 256     dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
 257     lsi53c8xx_handle_legacy_cmdline(dev);
 258
 259     /* Graphics setup. */
 260     if (machine->enable_graphics && vga_interface_type != VGA_NONE) {
 261         vga_interface_created = true;
 262         dev = qdev_new("artist");
 263         s = SYS_BUS_DEVICE(dev);
 264         sysbus_realize_and_unref(s, &error_fatal);
 265         sysbus_mmio_map(s, 0, LASI_GFX_HPA);
 266         sysbus_mmio_map(s, 1, ARTIST_FB_ADDR);
 267     }
 268
 269     /* Network setup. */
 270     if (enable_lasi_lan()) {
 271         lasi_82596_init(addr_space, LASI_LAN_HPA,
 272                         qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA));
 273     }
 274
 275     for (i = 0; i < nb_nics; i++) {
 276         if (!enable_lasi_lan()) {
 277             pci_nic_init_nofail(&nd_table[i], pci_bus, mc->default_nic, NULL);
 278         }
 279     }
 280
 281     /* PS/2 Keyboard/Mouse */
 282     dev = qdev_new(TYPE_LASIPS2);
 283     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 284     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
 285                        qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA));
 286     memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA,
 287                                 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev),
 288                                                        0));
 289     memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA + 0x100,
 290                                 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev),
 291                                                        1));
 292
 293     /* register power switch emulation */
 294     qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier);
 295
 296     /* Load firmware.  Given that this is not "real" firmware,
 297        but one explicitly written for the emulation, we might as
 298        well load it directly from an ELF image.  */
 299     firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
 300                                        machine->firmware ?: "hppa-firmware.img");
 301     if (firmware_filename == NULL) {
 302         error_report("no firmware provided");
 303         exit(1);
 304     }
 305
 306     size = load_elf(firmware_filename, NULL, NULL, NULL,
 307                     &firmware_entry, &firmware_low, &firmware_high, NULL,
 308                     true, EM_PARISC, 0, 0);
 309
 310     /* Unfortunately, load_elf sign-extends reading elf32.  */
 311     firmware_entry = (target_ureg)firmware_entry;
 312     firmware_low = (target_ureg)firmware_low;
 313     firmware_high = (target_ureg)firmware_high;
 314
 315     if (size < 0) {
 316         error_report("could not load firmware '%s'", firmware_filename);
 317         exit(1);
 318     }
 319     qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64
 320                   "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n",
 321                   firmware_low, firmware_high, firmware_entry);
 322     if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) {
 323         error_report("Firmware overlaps with memory or IO space");
 324         exit(1);
 325     }
 326     g_free(firmware_filename);
 327
 328     rom_region = g_new(MemoryRegion, 1);
 329     memory_region_init_ram(rom_region, NULL, "firmware",
 330                            (FIRMWARE_END - FIRMWARE_START), &error_fatal);
 331     memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region);
 332
 333     /* Load kernel */
 334     if (kernel_filename) {
 335         size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys,
 336                         NULL, &kernel_entry, &kernel_low, &kernel_high, NULL,
 337                         true, EM_PARISC, 0, 0);
 338
 339         /* Unfortunately, load_elf sign-extends reading elf32.  */
 340         kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry);
 341         kernel_low = (target_ureg)kernel_low;
 342         kernel_high = (target_ureg)kernel_high;
 343
 344         if (size < 0) {
 345             error_report("could not load kernel '%s'", kernel_filename);
 346             exit(1);
 347         }
 348         qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64
 349                       "-0x%08" PRIx64 ", entry at 0x%08" PRIx64
 350                       ", size %" PRIu64 " kB\n",
 351                       kernel_low, kernel_high, kernel_entry, size / KiB);
 352
 353         if (kernel_cmdline) {
 354             cpu[0]->env.gr[24] = 0x4000;
 355             pstrcpy_targphys("cmdline", cpu[0]->env.gr[24],
 356                              TARGET_PAGE_SIZE, kernel_cmdline);
 357         }
 358
 359         if (initrd_filename) {
 360             ram_addr_t initrd_base;
 361             int64_t initrd_size;
 362
 363             initrd_size = get_image_size(initrd_filename);
 364             if (initrd_size < 0) {
 365                 error_report("could not load initial ram disk '%s'",
 366                              initrd_filename);
 367                 exit(1);
 368             }
 369
 370             /* Load the initrd image high in memory.
 371                Mirror the algorithm used by palo:
 372                (1) Due to sign-extension problems and PDC,
 373                put the initrd no higher than 1G.
 374                (2) Reserve 64k for stack.  */
 375             initrd_base = MIN(machine->ram_size, 1 * GiB);
 376             initrd_base = initrd_base - 64 * KiB;
 377             initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;
 378
 379             if (initrd_base < kernel_high) {
 380                 error_report("kernel and initial ram disk too large!");
 381                 exit(1);
 382             }
 383
 384             load_image_targphys(initrd_filename, initrd_base, initrd_size);
 385             cpu[0]->env.gr[23] = initrd_base;
 386             cpu[0]->env.gr[22] = initrd_base + initrd_size;
 387         }
 388     }
 389
 390     if (!kernel_entry) {
 391         /* When booting via firmware, tell firmware if we want interactive
 392          * mode (kernel_entry=1), and to boot from CD (gr[24]='d')
 393          * or hard disc * (gr[24]='c').
 394          */
 395         kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0;
 396         cpu[0]->env.gr[24] = machine->boot_config.order[0];
 397     }
 398
 399     /* We jump to the firmware entry routine and pass the
 400      * various parameters in registers. After firmware initialization,
 401      * firmware will start the Linux kernel with ramdisk and cmdline.
 402      */
 403     cpu[0]->env.gr[26] = machine->ram_size;
 404     cpu[0]->env.gr[25] = kernel_entry;
 405
 406     /* tell firmware how many SMP CPUs to present in inventory table */
 407     cpu[0]->env.gr[21] = smp_cpus;
 408
 409     /* tell firmware fw_cfg port */
 410     cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
 411 }
 412
 413 static void hppa_machine_reset(MachineState *ms, ShutdownCause reason)
 414 {
 415     unsigned int smp_cpus = ms->smp.cpus;
 416     int i;
 417
 418     qemu_devices_reset(reason);
 419
 420     /* Start all CPUs at the firmware entry point.
 421      *  Monarch CPU will initialize firmware, secondary CPUs
 422      *  will enter a small idle loop and wait for rendevouz. */
 423     for (i = 0; i < smp_cpus; i++) {
 424         CPUState *cs = CPU(cpu[i]);
 425
 426         cpu_set_pc(cs, firmware_entry);
 427         cpu[i]->env.psw = PSW_Q;
 428         cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000;
 429
 430         cs->exception_index = -1;
 431         cs->halted = 0;
 432
 433         /* clear any existing TLB and BTLB entries */
 434         memset(cpu[i]->env.tlb, 0, sizeof(cpu[i]->env.tlb));
 435         cpu[i]->env.tlb_last = HPPA_BTLB_ENTRIES;
 436     }
 437
 438     /* already initialized by machine_hppa_init()? */
 439     if (cpu[0]->env.gr[26] == ms->ram_size) {
 440         return;
 441     }
 442
 443     cpu[0]->env.gr[26] = ms->ram_size;
 444     cpu[0]->env.gr[25] = 0; /* no firmware boot menu */
 445     cpu[0]->env.gr[24] = 'c';
 446     /* gr22/gr23 unused, no initrd while reboot. */
 447     cpu[0]->env.gr[21] = smp_cpus;
 448     /* tell firmware fw_cfg port */
 449     cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
 450 }
 451
 452 static void hppa_nmi(NMIState *n, int cpu_index, Error **errp)
 453 {
 454     CPUState *cs;
 455
 456     CPU_FOREACH(cs) {
 457         cpu_interrupt(cs, CPU_INTERRUPT_NMI);
 458     }
 459 }
 460
 461 static void hppa_machine_init_class_init(ObjectClass *oc, void *data)
 462 {
 463     MachineClass *mc = MACHINE_CLASS(oc);
 464     NMIClass *nc = NMI_CLASS(oc);
 465
 466     mc->desc = "HPPA B160L machine";
 467     mc->default_cpu_type = TYPE_HPPA_CPU;
 468     mc->init = machine_hppa_init;
 469     mc->reset = hppa_machine_reset;
 470     mc->block_default_type = IF_SCSI;
 471     mc->max_cpus = HPPA_MAX_CPUS;
 472     mc->default_cpus = 1;
 473     mc->is_default = true;
 474     mc->default_ram_size = 512 * MiB;
 475     mc->default_boot_order = "cd";
 476     mc->default_ram_id = "ram";
 477     mc->default_nic = "tulip";
 478
 479     nc->nmi_monitor_handler = hppa_nmi;
 480 }
 481
 482 static const TypeInfo hppa_machine_init_typeinfo = {
 483     .name = MACHINE_TYPE_NAME("hppa"),
 484     .parent = TYPE_MACHINE,
 485     .class_init = hppa_machine_init_class_init,
 486     .interfaces = (InterfaceInfo[]) {
 487         { TYPE_NMI },
 488         { }
 489     },
 490 };
 491
 492 static void hppa_machine_init_register_types(void)
 493 {
 494     type_register_static(&hppa_machine_init_typeinfo);
 495 }
 496
 497 type_init(hppa_machine_init_register_types)