hw/ppc/ppc405_boards.c

   1 /*
   2  * QEMU PowerPC 405 evaluation boards emulation
   3  *
   4  * Copyright (c) 2007 Jocelyn Mayer
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "qemu/osdep.h"
  25 #include "qemu/units.h"
  26 #include "qapi/error.h"
  27 #include "qemu-common.h"
  28 #include "cpu.h"
  29 #include "hw/hw.h"
  30 #include "hw/ppc/ppc.h"
  31 #include "ppc405.h"
  32 #include "hw/timer/m48t59.h"
  33 #include "hw/block/flash.h"
  34 #include "sysemu/sysemu.h"
  35 #include "sysemu/qtest.h"
  36 #include "sysemu/block-backend.h"
  37 #include "hw/boards.h"
  38 #include "qemu/log.h"
  39 #include "qemu/error-report.h"
  40 #include "hw/loader.h"
  41 #include "exec/address-spaces.h"
  42
  43 #define BIOS_FILENAME "ppc405_rom.bin"
  44 #define BIOS_SIZE (2 * MiB)
  45
  46 #define KERNEL_LOAD_ADDR 0x00000000
  47 #define INITRD_LOAD_ADDR 0x01800000
  48
  49 #define USE_FLASH_BIOS
  50
  51 //#define DEBUG_BOARD_INIT
  52
  53 /*****************************************************************************/
  54 /* PPC405EP reference board (IBM) */
  55 /* Standalone board with:
  56  * - PowerPC 405EP CPU
  57  * - SDRAM (0x00000000)
  58  * - Flash (0xFFF80000)
  59  * - SRAM  (0xFFF00000)
  60  * - NVRAM (0xF0000000)
  61  * - FPGA  (0xF0300000)
  62  */
  63 typedef struct ref405ep_fpga_t ref405ep_fpga_t;
  64 struct ref405ep_fpga_t {
  65     uint8_t reg0;
  66     uint8_t reg1;
  67 };
  68
  69 static uint64_t ref405ep_fpga_readb(void *opaque, hwaddr addr, unsigned size)
  70 {
  71     ref405ep_fpga_t *fpga;
  72     uint32_t ret;
  73
  74     fpga = opaque;
  75     switch (addr) {
  76     case 0x0:
  77         ret = fpga->reg0;
  78         break;
  79     case 0x1:
  80         ret = fpga->reg1;
  81         break;
  82     default:
  83         ret = 0;
  84         break;
  85     }
  86
  87     return ret;
  88 }
  89
  90 static void ref405ep_fpga_writeb(void *opaque, hwaddr addr, uint64_t value,
  91                                  unsigned size)
  92 {
  93     ref405ep_fpga_t *fpga;
  94
  95     fpga = opaque;
  96     switch (addr) {
  97     case 0x0:
  98         /* Read only */
  99         break;
 100     case 0x1:
 101         fpga->reg1 = value;
 102         break;
 103     default:
 104         break;
 105     }
 106 }
 107
 108 static const MemoryRegionOps ref405ep_fpga_ops = {
 109     .read = ref405ep_fpga_readb,
 110     .write = ref405ep_fpga_writeb,
 111     .impl.min_access_size = 1,
 112     .impl.max_access_size = 1,
 113     .valid.min_access_size = 1,
 114     .valid.max_access_size = 4,
 115     .endianness = DEVICE_BIG_ENDIAN,
 116 };
 117
 118 static void ref405ep_fpga_reset (void *opaque)
 119 {
 120     ref405ep_fpga_t *fpga;
 121
 122     fpga = opaque;
 123     fpga->reg0 = 0x00;
 124     fpga->reg1 = 0x0F;
 125 }
 126
 127 static void ref405ep_fpga_init(MemoryRegion *sysmem, uint32_t base)
 128 {
 129     ref405ep_fpga_t *fpga;
 130     MemoryRegion *fpga_memory = g_new(MemoryRegion, 1);
 131
 132     fpga = g_malloc0(sizeof(ref405ep_fpga_t));
 133     memory_region_init_io(fpga_memory, NULL, &ref405ep_fpga_ops, fpga,
 134                           "fpga", 0x00000100);
 135     memory_region_add_subregion(sysmem, base, fpga_memory);
 136     qemu_register_reset(&ref405ep_fpga_reset, fpga);
 137 }
 138
 139 static void ref405ep_init(MachineState *machine)
 140 {
 141     ram_addr_t ram_size = machine->ram_size;
 142     const char *kernel_filename = machine->kernel_filename;
 143     const char *kernel_cmdline = machine->kernel_cmdline;
 144     const char *initrd_filename = machine->initrd_filename;
 145     char *filename;
 146     ppc4xx_bd_info_t bd;
 147     CPUPPCState *env;
 148     qemu_irq *pic;
 149     MemoryRegion *bios;
 150     MemoryRegion *sram = g_new(MemoryRegion, 1);
 151     ram_addr_t bdloc;
 152     MemoryRegion *ram_memories = g_malloc(2 * sizeof(*ram_memories));
 153     hwaddr ram_bases[2], ram_sizes[2];
 154     target_ulong sram_size;
 155     long bios_size;
 156     //int phy_addr = 0;
 157     //static int phy_addr = 1;
 158     target_ulong kernel_base, initrd_base;
 159     long kernel_size, initrd_size;
 160     int linux_boot;
 161     int fl_idx, fl_sectors, len;
 162     DriveInfo *dinfo;
 163     MemoryRegion *sysmem = get_system_memory();
 164
 165 #ifdef TARGET_PPCEMB
 166     if (!qtest_enabled()) {
 167         warn_report("qemu-system-ppcemb is deprecated, "
 168                     "please use qemu-system-ppc instead.");
 169     }
 170 #endif
 171
 172     /* XXX: fix this */
 173     memory_region_allocate_system_memory(&ram_memories[0], NULL, "ef405ep.ram",
 174                                          0x08000000);
 175     ram_bases[0] = 0;
 176     ram_sizes[0] = 0x08000000;
 177     memory_region_init(&ram_memories[1], NULL, "ef405ep.ram1", 0);
 178     ram_bases[1] = 0x00000000;
 179     ram_sizes[1] = 0x00000000;
 180     ram_size = 128 * MiB;
 181 #ifdef DEBUG_BOARD_INIT
 182     printf("%s: register cpu\n", __func__);
 183 #endif
 184     env = ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes,
 185                         33333333, &pic, kernel_filename == NULL ? 0 : 1);
 186     /* allocate SRAM */
 187     sram_size = 512 * KiB;
 188     memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size,
 189                            &error_fatal);
 190     memory_region_add_subregion(sysmem, 0xFFF00000, sram);
 191     /* allocate and load BIOS */
 192 #ifdef DEBUG_BOARD_INIT
 193     printf("%s: register BIOS\n", __func__);
 194 #endif
 195     fl_idx = 0;
 196 #ifdef USE_FLASH_BIOS
 197     dinfo = drive_get(IF_PFLASH, 0, fl_idx);
 198     if (dinfo) {
 199         BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
 200
 201         bios_size = blk_getlength(blk);
 202         fl_sectors = (bios_size + 65535) >> 16;
 203 #ifdef DEBUG_BOARD_INIT
 204         printf("Register parallel flash %d size %lx"
 205                " at addr %lx '%s' %d\n",
 206                fl_idx, bios_size, -bios_size,
 207                blk_name(blk), fl_sectors);
 208 #endif
 209         pflash_cfi02_register((uint32_t)(-bios_size),
 210                               NULL, "ef405ep.bios", bios_size,
 211                               blk, 65536, fl_sectors, 1,
 212                               2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
 213                               1);
 214         fl_idx++;
 215     } else
 216 #endif
 217     {
 218 #ifdef DEBUG_BOARD_INIT
 219         printf("Load BIOS from file\n");
 220 #endif
 221         bios = g_new(MemoryRegion, 1);
 222         memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE,
 223                                &error_fatal);
 224
 225         if (bios_name == NULL)
 226             bios_name = BIOS_FILENAME;
 227         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 228         if (filename) {
 229             bios_size = load_image(filename, memory_region_get_ram_ptr(bios));
 230             g_free(filename);
 231             if (bios_size < 0 || bios_size > BIOS_SIZE) {
 232                 error_report("Could not load PowerPC BIOS '%s'", bios_name);
 233                 exit(1);
 234             }
 235             bios_size = (bios_size + 0xfff) & ~0xfff;
 236             memory_region_add_subregion(sysmem, (uint32_t)(-bios_size), bios);
 237         } else if (!qtest_enabled() || kernel_filename != NULL) {
 238             error_report("Could not load PowerPC BIOS '%s'", bios_name);
 239             exit(1);
 240         } else {
 241             /* Avoid an uninitialized variable warning */
 242             bios_size = -1;
 243         }
 244         memory_region_set_readonly(bios, true);
 245     }
 246     /* Register FPGA */
 247 #ifdef DEBUG_BOARD_INIT
 248     printf("%s: register FPGA\n", __func__);
 249 #endif
 250     ref405ep_fpga_init(sysmem, 0xF0300000);
 251     /* Register NVRAM */
 252 #ifdef DEBUG_BOARD_INIT
 253     printf("%s: register NVRAM\n", __func__);
 254 #endif
 255     m48t59_init(NULL, 0xF0000000, 0, 8192, 1968, 8);
 256     /* Load kernel */
 257     linux_boot = (kernel_filename != NULL);
 258     if (linux_boot) {
 259 #ifdef DEBUG_BOARD_INIT
 260         printf("%s: load kernel\n", __func__);
 261 #endif
 262         memset(&bd, 0, sizeof(bd));
 263         bd.bi_memstart = 0x00000000;
 264         bd.bi_memsize = ram_size;
 265         bd.bi_flashstart = -bios_size;
 266         bd.bi_flashsize = -bios_size;
 267         bd.bi_flashoffset = 0;
 268         bd.bi_sramstart = 0xFFF00000;
 269         bd.bi_sramsize = sram_size;
 270         bd.bi_bootflags = 0;
 271         bd.bi_intfreq = 133333333;
 272         bd.bi_busfreq = 33333333;
 273         bd.bi_baudrate = 115200;
 274         bd.bi_s_version[0] = 'Q';
 275         bd.bi_s_version[1] = 'M';
 276         bd.bi_s_version[2] = 'U';
 277         bd.bi_s_version[3] = '\0';
 278         bd.bi_r_version[0] = 'Q';
 279         bd.bi_r_version[1] = 'E';
 280         bd.bi_r_version[2] = 'M';
 281         bd.bi_r_version[3] = 'U';
 282         bd.bi_r_version[4] = '\0';
 283         bd.bi_procfreq = 133333333;
 284         bd.bi_plb_busfreq = 33333333;
 285         bd.bi_pci_busfreq = 33333333;
 286         bd.bi_opbfreq = 33333333;
 287         bdloc = ppc405_set_bootinfo(env, &bd, 0x00000001);
 288         env->gpr[3] = bdloc;
 289         kernel_base = KERNEL_LOAD_ADDR;
 290         /* now we can load the kernel */
 291         kernel_size = load_image_targphys(kernel_filename, kernel_base,
 292                                           ram_size - kernel_base);
 293         if (kernel_size < 0) {
 294             error_report("could not load kernel '%s'", kernel_filename);
 295             exit(1);
 296         }
 297         printf("Load kernel size %ld at " TARGET_FMT_lx,
 298                kernel_size, kernel_base);
 299         /* load initrd */
 300         if (initrd_filename) {
 301             initrd_base = INITRD_LOAD_ADDR;
 302             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 303                                               ram_size - initrd_base);
 304             if (initrd_size < 0) {
 305                 error_report("could not load initial ram disk '%s'",
 306                              initrd_filename);
 307                 exit(1);
 308             }
 309         } else {
 310             initrd_base = 0;
 311             initrd_size = 0;
 312         }
 313         env->gpr[4] = initrd_base;
 314         env->gpr[5] = initrd_size;
 315         if (kernel_cmdline != NULL) {
 316             len = strlen(kernel_cmdline);
 317             bdloc -= ((len + 255) & ~255);
 318             cpu_physical_memory_write(bdloc, kernel_cmdline, len + 1);
 319             env->gpr[6] = bdloc;
 320             env->gpr[7] = bdloc + len;
 321         } else {
 322             env->gpr[6] = 0;
 323             env->gpr[7] = 0;
 324         }
 325         env->nip = KERNEL_LOAD_ADDR;
 326     } else {
 327         kernel_base = 0;
 328         kernel_size = 0;
 329         initrd_base = 0;
 330         initrd_size = 0;
 331         bdloc = 0;
 332     }
 333 #ifdef DEBUG_BOARD_INIT
 334     printf("bdloc " RAM_ADDR_FMT "\n", bdloc);
 335     printf("%s: Done\n", __func__);
 336 #endif
 337 }
 338
 339 static void ref405ep_class_init(ObjectClass *oc, void *data)
 340 {
 341     MachineClass *mc = MACHINE_CLASS(oc);
 342
 343     mc->desc = "ref405ep";
 344     mc->init = ref405ep_init;
 345 }
 346
 347 static const TypeInfo ref405ep_type = {
 348     .name = MACHINE_TYPE_NAME("ref405ep"),
 349     .parent = TYPE_MACHINE,
 350     .class_init = ref405ep_class_init,
 351 };
 352
 353 /*****************************************************************************/
 354 /* AMCC Taihu evaluation board */
 355 /* - PowerPC 405EP processor
 356  * - SDRAM               128 MB at 0x00000000
 357  * - Boot flash          2 MB   at 0xFFE00000
 358  * - Application flash   32 MB  at 0xFC000000
 359  * - 2 serial ports
 360  * - 2 ethernet PHY
 361  * - 1 USB 1.1 device    0x50000000
 362  * - 1 LCD display       0x50100000
 363  * - 1 CPLD              0x50100000
 364  * - 1 I2C EEPROM
 365  * - 1 I2C thermal sensor
 366  * - a set of LEDs
 367  * - bit-bang SPI port using GPIOs
 368  * - 1 EBC interface connector 0 0x50200000
 369  * - 1 cardbus controller + expansion slot.
 370  * - 1 PCI expansion slot.
 371  */
 372 typedef struct taihu_cpld_t taihu_cpld_t;
 373 struct taihu_cpld_t {
 374     uint8_t reg0;
 375     uint8_t reg1;
 376 };
 377
 378 static uint64_t taihu_cpld_read(void *opaque, hwaddr addr, unsigned size)
 379 {
 380     taihu_cpld_t *cpld;
 381     uint32_t ret;
 382
 383     cpld = opaque;
 384     switch (addr) {
 385     case 0x0:
 386         ret = cpld->reg0;
 387         break;
 388     case 0x1:
 389         ret = cpld->reg1;
 390         break;
 391     default:
 392         ret = 0;
 393         break;
 394     }
 395
 396     return ret;
 397 }
 398
 399 static void taihu_cpld_write(void *opaque, hwaddr addr,
 400                              uint64_t value, unsigned size)
 401 {
 402     taihu_cpld_t *cpld;
 403
 404     cpld = opaque;
 405     switch (addr) {
 406     case 0x0:
 407         /* Read only */
 408         break;
 409     case 0x1:
 410         cpld->reg1 = value;
 411         break;
 412     default:
 413         break;
 414     }
 415 }
 416
 417 static const MemoryRegionOps taihu_cpld_ops = {
 418     .read = taihu_cpld_read,
 419     .write = taihu_cpld_write,
 420     .impl = {
 421         .min_access_size = 1,
 422         .max_access_size = 1,
 423     },
 424     .endianness = DEVICE_NATIVE_ENDIAN,
 425 };
 426
 427 static void taihu_cpld_reset (void *opaque)
 428 {
 429     taihu_cpld_t *cpld;
 430
 431     cpld = opaque;
 432     cpld->reg0 = 0x01;
 433     cpld->reg1 = 0x80;
 434 }
 435
 436 static void taihu_cpld_init(MemoryRegion *sysmem, uint32_t base)
 437 {
 438     taihu_cpld_t *cpld;
 439     MemoryRegion *cpld_memory = g_new(MemoryRegion, 1);
 440
 441     cpld = g_malloc0(sizeof(taihu_cpld_t));
 442     memory_region_init_io(cpld_memory, NULL, &taihu_cpld_ops, cpld, "cpld", 0x100);
 443     memory_region_add_subregion(sysmem, base, cpld_memory);
 444     qemu_register_reset(&taihu_cpld_reset, cpld);
 445 }
 446
 447 static void taihu_405ep_init(MachineState *machine)
 448 {
 449     ram_addr_t ram_size = machine->ram_size;
 450     const char *kernel_filename = machine->kernel_filename;
 451     const char *initrd_filename = machine->initrd_filename;
 452     char *filename;
 453     qemu_irq *pic;
 454     MemoryRegion *sysmem = get_system_memory();
 455     MemoryRegion *bios;
 456     MemoryRegion *ram_memories = g_malloc(2 * sizeof(*ram_memories));
 457     MemoryRegion *ram = g_malloc0(sizeof(*ram));
 458     hwaddr ram_bases[2], ram_sizes[2];
 459     long bios_size;
 460     target_ulong kernel_base, initrd_base;
 461     long kernel_size, initrd_size;
 462     int linux_boot;
 463     int fl_idx, fl_sectors;
 464     DriveInfo *dinfo;
 465
 466 #ifdef TARGET_PPCEMB
 467     if (!qtest_enabled()) {
 468         warn_report("qemu-system-ppcemb is deprecated, "
 469                     "please use qemu-system-ppc instead.");
 470     }
 471 #endif
 472
 473     /* RAM is soldered to the board so the size cannot be changed */
 474     ram_size = 0x08000000;
 475     memory_region_allocate_system_memory(ram, NULL, "taihu_405ep.ram",
 476                                          ram_size);
 477
 478     ram_bases[0] = 0;
 479     ram_sizes[0] = 0x04000000;
 480     memory_region_init_alias(&ram_memories[0], NULL,
 481                              "taihu_405ep.ram-0", ram, ram_bases[0],
 482                              ram_sizes[0]);
 483     ram_bases[1] = 0x04000000;
 484     ram_sizes[1] = 0x04000000;
 485     memory_region_init_alias(&ram_memories[1], NULL,
 486                              "taihu_405ep.ram-1", ram, ram_bases[1],
 487                              ram_sizes[1]);
 488 #ifdef DEBUG_BOARD_INIT
 489     printf("%s: register cpu\n", __func__);
 490 #endif
 491     ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes,
 492                   33333333, &pic, kernel_filename == NULL ? 0 : 1);
 493     /* allocate and load BIOS */
 494 #ifdef DEBUG_BOARD_INIT
 495     printf("%s: register BIOS\n", __func__);
 496 #endif
 497     fl_idx = 0;
 498 #if defined(USE_FLASH_BIOS)
 499     dinfo = drive_get(IF_PFLASH, 0, fl_idx);
 500     if (dinfo) {
 501         BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
 502
 503         bios_size = blk_getlength(blk);
 504         /* XXX: should check that size is 2MB */
 505         //        bios_size = 2 * 1024 * 1024;
 506         fl_sectors = (bios_size + 65535) >> 16;
 507 #ifdef DEBUG_BOARD_INIT
 508         printf("Register parallel flash %d size %lx"
 509                " at addr %lx '%s' %d\n",
 510                fl_idx, bios_size, -bios_size,
 511                blk_name(blk), fl_sectors);
 512 #endif
 513         pflash_cfi02_register((uint32_t)(-bios_size),
 514                               NULL, "taihu_405ep.bios", bios_size,
 515                               blk, 65536, fl_sectors, 1,
 516                               4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
 517                               1);
 518         fl_idx++;
 519     } else
 520 #endif
 521     {
 522 #ifdef DEBUG_BOARD_INIT
 523         printf("Load BIOS from file\n");
 524 #endif
 525         if (bios_name == NULL)
 526             bios_name = BIOS_FILENAME;
 527         bios = g_new(MemoryRegion, 1);
 528         memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE,
 529                                &error_fatal);
 530         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 531         if (filename) {
 532             bios_size = load_image(filename, memory_region_get_ram_ptr(bios));
 533             g_free(filename);
 534             if (bios_size < 0 || bios_size > BIOS_SIZE) {
 535                 error_report("Could not load PowerPC BIOS '%s'", bios_name);
 536                 exit(1);
 537             }
 538             bios_size = (bios_size + 0xfff) & ~0xfff;
 539             memory_region_add_subregion(sysmem, (uint32_t)(-bios_size), bios);
 540         } else if (!qtest_enabled()) {
 541             error_report("Could not load PowerPC BIOS '%s'", bios_name);
 542             exit(1);
 543         }
 544         memory_region_set_readonly(bios, true);
 545     }
 546     /* Register Linux flash */
 547     dinfo = drive_get(IF_PFLASH, 0, fl_idx);
 548     if (dinfo) {
 549         BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
 550
 551         bios_size = blk_getlength(blk);
 552         /* XXX: should check that size is 32MB */
 553         bios_size = 32 * MiB;
 554         fl_sectors = (bios_size + 65535) >> 16;
 555 #ifdef DEBUG_BOARD_INIT
 556         printf("Register parallel flash %d size %lx"
 557                " at addr " TARGET_FMT_lx " '%s'\n",
 558                fl_idx, bios_size, (target_ulong)0xfc000000,
 559                blk_name(blk));
 560 #endif
 561         pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_size,
 562                               blk, 65536, fl_sectors, 1,
 563                               4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
 564                               1);
 565         fl_idx++;
 566     }
 567     /* Register CLPD & LCD display */
 568 #ifdef DEBUG_BOARD_INIT
 569     printf("%s: register CPLD\n", __func__);
 570 #endif
 571     taihu_cpld_init(sysmem, 0x50100000);
 572     /* Load kernel */
 573     linux_boot = (kernel_filename != NULL);
 574     if (linux_boot) {
 575 #ifdef DEBUG_BOARD_INIT
 576         printf("%s: load kernel\n", __func__);
 577 #endif
 578         kernel_base = KERNEL_LOAD_ADDR;
 579         /* now we can load the kernel */
 580         kernel_size = load_image_targphys(kernel_filename, kernel_base,
 581                                           ram_size - kernel_base);
 582         if (kernel_size < 0) {
 583             error_report("could not load kernel '%s'", kernel_filename);
 584             exit(1);
 585         }
 586         /* load initrd */
 587         if (initrd_filename) {
 588             initrd_base = INITRD_LOAD_ADDR;
 589             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 590                                               ram_size - initrd_base);
 591             if (initrd_size < 0) {
 592                 error_report("could not load initial ram disk '%s'",
 593                              initrd_filename);
 594                 exit(1);
 595             }
 596         } else {
 597             initrd_base = 0;
 598             initrd_size = 0;
 599         }
 600     } else {
 601         kernel_base = 0;
 602         kernel_size = 0;
 603         initrd_base = 0;
 604         initrd_size = 0;
 605     }
 606 #ifdef DEBUG_BOARD_INIT
 607     printf("%s: Done\n", __func__);
 608 #endif
 609 }
 610
 611 static void taihu_class_init(ObjectClass *oc, void *data)
 612 {
 613     MachineClass *mc = MACHINE_CLASS(oc);
 614
 615     mc->desc = "taihu";
 616     mc->init = taihu_405ep_init;
 617 }
 618
 619 static const TypeInfo taihu_type = {
 620     .name = MACHINE_TYPE_NAME("taihu"),
 621     .parent = TYPE_MACHINE,
 622     .class_init = taihu_class_init,
 623 };
 624
 625 static void ppc405_machine_init(void)
 626 {
 627     type_register_static(&ref405ep_type);
 628     type_register_static(&taihu_type);
 629 }
 630
 631 type_init(ppc405_machine_init)