tcg/loongarch64/tcg-insn-defs.c.inc

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * LoongArch instruction formats, opcodes, and encoders for TCG use.
   4  *
   5  * This file is auto-generated by genqemutcgdefs from
   6  * https://github.com/loongson-community/loongarch-opcodes,
   7  * from commit 8027da9a8157a8b47fc48ff1def292e09c5668bd.
   8  * DO NOT EDIT.
   9  */
  10
  11 typedef enum {
  12     OPC_CLZ_W = 0x00001400,
  13     OPC_CTZ_W = 0x00001c00,
  14     OPC_CLZ_D = 0x00002400,
  15     OPC_CTZ_D = 0x00002c00,
  16     OPC_REVB_2H = 0x00003000,
  17     OPC_REVB_2W = 0x00003800,
  18     OPC_REVB_D = 0x00003c00,
  19     OPC_SEXT_H = 0x00005800,
  20     OPC_SEXT_B = 0x00005c00,
  21     OPC_ADD_W = 0x00100000,
  22     OPC_ADD_D = 0x00108000,
  23     OPC_SUB_W = 0x00110000,
  24     OPC_SUB_D = 0x00118000,
  25     OPC_SLT = 0x00120000,
  26     OPC_SLTU = 0x00128000,
  27     OPC_MASKEQZ = 0x00130000,
  28     OPC_MASKNEZ = 0x00138000,
  29     OPC_NOR = 0x00140000,
  30     OPC_AND = 0x00148000,
  31     OPC_OR = 0x00150000,
  32     OPC_XOR = 0x00158000,
  33     OPC_ORN = 0x00160000,
  34     OPC_ANDN = 0x00168000,
  35     OPC_SLL_W = 0x00170000,
  36     OPC_SRL_W = 0x00178000,
  37     OPC_SRA_W = 0x00180000,
  38     OPC_SLL_D = 0x00188000,
  39     OPC_SRL_D = 0x00190000,
  40     OPC_SRA_D = 0x00198000,
  41     OPC_ROTR_W = 0x001b0000,
  42     OPC_ROTR_D = 0x001b8000,
  43     OPC_MUL_W = 0x001c0000,
  44     OPC_MULH_W = 0x001c8000,
  45     OPC_MULH_WU = 0x001d0000,
  46     OPC_MUL_D = 0x001d8000,
  47     OPC_MULH_D = 0x001e0000,
  48     OPC_MULH_DU = 0x001e8000,
  49     OPC_DIV_W = 0x00200000,
  50     OPC_MOD_W = 0x00208000,
  51     OPC_DIV_WU = 0x00210000,
  52     OPC_MOD_WU = 0x00218000,
  53     OPC_DIV_D = 0x00220000,
  54     OPC_MOD_D = 0x00228000,
  55     OPC_DIV_DU = 0x00230000,
  56     OPC_MOD_DU = 0x00238000,
  57     OPC_SLLI_W = 0x00408000,
  58     OPC_SLLI_D = 0x00410000,
  59     OPC_SRLI_W = 0x00448000,
  60     OPC_SRLI_D = 0x00450000,
  61     OPC_SRAI_W = 0x00488000,
  62     OPC_SRAI_D = 0x00490000,
  63     OPC_ROTRI_W = 0x004c8000,
  64     OPC_ROTRI_D = 0x004d0000,
  65     OPC_BSTRINS_W = 0x00600000,
  66     OPC_BSTRPICK_W = 0x00608000,
  67     OPC_BSTRINS_D = 0x00800000,
  68     OPC_BSTRPICK_D = 0x00c00000,
  69     OPC_SLTI = 0x02000000,
  70     OPC_SLTUI = 0x02400000,
  71     OPC_ADDI_W = 0x02800000,
  72     OPC_ADDI_D = 0x02c00000,
  73     OPC_CU52I_D = 0x03000000,
  74     OPC_ANDI = 0x03400000,
  75     OPC_ORI = 0x03800000,
  76     OPC_XORI = 0x03c00000,
  77     OPC_VFMADD_S = 0x09100000,
  78     OPC_VFMADD_D = 0x09200000,
  79     OPC_VFMSUB_S = 0x09500000,
  80     OPC_VFMSUB_D = 0x09600000,
  81     OPC_VFNMADD_S = 0x09900000,
  82     OPC_VFNMADD_D = 0x09a00000,
  83     OPC_VFNMSUB_S = 0x09d00000,
  84     OPC_VFNMSUB_D = 0x09e00000,
  85     OPC_VFCMP_CAF_S = 0x0c500000,
  86     OPC_VFCMP_SAF_S = 0x0c508000,
  87     OPC_VFCMP_CLT_S = 0x0c510000,
  88     OPC_VFCMP_SLT_S = 0x0c518000,
  89     OPC_VFCMP_CEQ_S = 0x0c520000,
  90     OPC_VFCMP_SEQ_S = 0x0c528000,
  91     OPC_VFCMP_CLE_S = 0x0c530000,
  92     OPC_VFCMP_SLE_S = 0x0c538000,
  93     OPC_VFCMP_CUN_S = 0x0c540000,
  94     OPC_VFCMP_SUN_S = 0x0c548000,
  95     OPC_VFCMP_CULT_S = 0x0c550000,
  96     OPC_VFCMP_SULT_S = 0x0c558000,
  97     OPC_VFCMP_CUEQ_S = 0x0c560000,
  98     OPC_VFCMP_SUEQ_S = 0x0c568000,
  99     OPC_VFCMP_CULE_S = 0x0c570000,
 100     OPC_VFCMP_SULE_S = 0x0c578000,
 101     OPC_VFCMP_CNE_S = 0x0c580000,
 102     OPC_VFCMP_SNE_S = 0x0c588000,
 103     OPC_VFCMP_COR_S = 0x0c5a0000,
 104     OPC_VFCMP_SOR_S = 0x0c5a8000,
 105     OPC_VFCMP_CUNE_S = 0x0c5c0000,
 106     OPC_VFCMP_SUNE_S = 0x0c5c8000,
 107     OPC_VFCMP_CAF_D = 0x0c600000,
 108     OPC_VFCMP_SAF_D = 0x0c608000,
 109     OPC_VFCMP_CLT_D = 0x0c610000,
 110     OPC_VFCMP_SLT_D = 0x0c618000,
 111     OPC_VFCMP_CEQ_D = 0x0c620000,
 112     OPC_VFCMP_SEQ_D = 0x0c628000,
 113     OPC_VFCMP_CLE_D = 0x0c630000,
 114     OPC_VFCMP_SLE_D = 0x0c638000,
 115     OPC_VFCMP_CUN_D = 0x0c640000,
 116     OPC_VFCMP_SUN_D = 0x0c648000,
 117     OPC_VFCMP_CULT_D = 0x0c650000,
 118     OPC_VFCMP_SULT_D = 0x0c658000,
 119     OPC_VFCMP_CUEQ_D = 0x0c660000,
 120     OPC_VFCMP_SUEQ_D = 0x0c668000,
 121     OPC_VFCMP_CULE_D = 0x0c670000,
 122     OPC_VFCMP_SULE_D = 0x0c678000,
 123     OPC_VFCMP_CNE_D = 0x0c680000,
 124     OPC_VFCMP_SNE_D = 0x0c688000,
 125     OPC_VFCMP_COR_D = 0x0c6a0000,
 126     OPC_VFCMP_SOR_D = 0x0c6a8000,
 127     OPC_VFCMP_CUNE_D = 0x0c6c0000,
 128     OPC_VFCMP_SUNE_D = 0x0c6c8000,
 129     OPC_VBITSEL_V = 0x0d100000,
 130     OPC_VSHUF_B = 0x0d500000,
 131     OPC_ADDU16I_D = 0x10000000,
 132     OPC_LU12I_W = 0x14000000,
 133     OPC_CU32I_D = 0x16000000,
 134     OPC_PCADDU2I = 0x18000000,
 135     OPC_PCALAU12I = 0x1a000000,
 136     OPC_PCADDU12I = 0x1c000000,
 137     OPC_PCADDU18I = 0x1e000000,
 138     OPC_LD_B = 0x28000000,
 139     OPC_LD_H = 0x28400000,
 140     OPC_LD_W = 0x28800000,
 141     OPC_LD_D = 0x28c00000,
 142     OPC_ST_B = 0x29000000,
 143     OPC_ST_H = 0x29400000,
 144     OPC_ST_W = 0x29800000,
 145     OPC_ST_D = 0x29c00000,
 146     OPC_LD_BU = 0x2a000000,
 147     OPC_LD_HU = 0x2a400000,
 148     OPC_LD_WU = 0x2a800000,
 149     OPC_VLD = 0x2c000000,
 150     OPC_VST = 0x2c400000,
 151     OPC_VLDREPL_D = 0x30100000,
 152     OPC_VLDREPL_W = 0x30200000,
 153     OPC_VLDREPL_H = 0x30400000,
 154     OPC_VLDREPL_B = 0x30800000,
 155     OPC_VSTELM_D = 0x31100000,
 156     OPC_VSTELM_W = 0x31200000,
 157     OPC_VSTELM_H = 0x31400000,
 158     OPC_VSTELM_B = 0x31800000,
 159     OPC_LDX_B = 0x38000000,
 160     OPC_LDX_H = 0x38040000,
 161     OPC_LDX_W = 0x38080000,
 162     OPC_LDX_D = 0x380c0000,
 163     OPC_STX_B = 0x38100000,
 164     OPC_STX_H = 0x38140000,
 165     OPC_STX_W = 0x38180000,
 166     OPC_STX_D = 0x381c0000,
 167     OPC_LDX_BU = 0x38200000,
 168     OPC_LDX_HU = 0x38240000,
 169     OPC_LDX_WU = 0x38280000,
 170     OPC_VLDX = 0x38400000,
 171     OPC_VSTX = 0x38440000,
 172     OPC_DBAR = 0x38720000,
 173     OPC_JIRL = 0x4c000000,
 174     OPC_B = 0x50000000,
 175     OPC_BL = 0x54000000,
 176     OPC_BEQ = 0x58000000,
 177     OPC_BNE = 0x5c000000,
 178     OPC_BGT = 0x60000000,
 179     OPC_BLE = 0x64000000,
 180     OPC_BGTU = 0x68000000,
 181     OPC_BLEU = 0x6c000000,
 182     OPC_VSEQ_B = 0x70000000,
 183     OPC_VSEQ_H = 0x70008000,
 184     OPC_VSEQ_W = 0x70010000,
 185     OPC_VSEQ_D = 0x70018000,
 186     OPC_VSLE_B = 0x70020000,
 187     OPC_VSLE_H = 0x70028000,
 188     OPC_VSLE_W = 0x70030000,
 189     OPC_VSLE_D = 0x70038000,
 190     OPC_VSLE_BU = 0x70040000,
 191     OPC_VSLE_HU = 0x70048000,
 192     OPC_VSLE_WU = 0x70050000,
 193     OPC_VSLE_DU = 0x70058000,
 194     OPC_VSLT_B = 0x70060000,
 195     OPC_VSLT_H = 0x70068000,
 196     OPC_VSLT_W = 0x70070000,
 197     OPC_VSLT_D = 0x70078000,
 198     OPC_VSLT_BU = 0x70080000,
 199     OPC_VSLT_HU = 0x70088000,
 200     OPC_VSLT_WU = 0x70090000,
 201     OPC_VSLT_DU = 0x70098000,
 202     OPC_VADD_B = 0x700a0000,
 203     OPC_VADD_H = 0x700a8000,
 204     OPC_VADD_W = 0x700b0000,
 205     OPC_VADD_D = 0x700b8000,
 206     OPC_VSUB_B = 0x700c0000,
 207     OPC_VSUB_H = 0x700c8000,
 208     OPC_VSUB_W = 0x700d0000,
 209     OPC_VSUB_D = 0x700d8000,
 210     OPC_VADDWEV_H_B = 0x701e0000,
 211     OPC_VADDWEV_W_H = 0x701e8000,
 212     OPC_VADDWEV_D_W = 0x701f0000,
 213     OPC_VADDWEV_Q_D = 0x701f8000,
 214     OPC_VSUBWEV_H_B = 0x70200000,
 215     OPC_VSUBWEV_W_H = 0x70208000,
 216     OPC_VSUBWEV_D_W = 0x70210000,
 217     OPC_VSUBWEV_Q_D = 0x70218000,
 218     OPC_VADDWOD_H_B = 0x70220000,
 219     OPC_VADDWOD_W_H = 0x70228000,
 220     OPC_VADDWOD_D_W = 0x70230000,
 221     OPC_VADDWOD_Q_D = 0x70238000,
 222     OPC_VSUBWOD_H_B = 0x70240000,
 223     OPC_VSUBWOD_W_H = 0x70248000,
 224     OPC_VSUBWOD_D_W = 0x70250000,
 225     OPC_VSUBWOD_Q_D = 0x70258000,
 226     OPC_VADDWEV_H_BU = 0x702e0000,
 227     OPC_VADDWEV_W_HU = 0x702e8000,
 228     OPC_VADDWEV_D_WU = 0x702f0000,
 229     OPC_VADDWEV_Q_DU = 0x702f8000,
 230     OPC_VSUBWEV_H_BU = 0x70300000,
 231     OPC_VSUBWEV_W_HU = 0x70308000,
 232     OPC_VSUBWEV_D_WU = 0x70310000,
 233     OPC_VSUBWEV_Q_DU = 0x70318000,
 234     OPC_VADDWOD_H_BU = 0x70320000,
 235     OPC_VADDWOD_W_HU = 0x70328000,
 236     OPC_VADDWOD_D_WU = 0x70330000,
 237     OPC_VADDWOD_Q_DU = 0x70338000,
 238     OPC_VSUBWOD_H_BU = 0x70340000,
 239     OPC_VSUBWOD_W_HU = 0x70348000,
 240     OPC_VSUBWOD_D_WU = 0x70350000,
 241     OPC_VSUBWOD_Q_DU = 0x70358000,
 242     OPC_VADDWEV_H_BU_B = 0x703e0000,
 243     OPC_VADDWEV_W_HU_H = 0x703e8000,
 244     OPC_VADDWEV_D_WU_W = 0x703f0000,
 245     OPC_VADDWEV_Q_DU_D = 0x703f8000,
 246     OPC_VADDWOD_H_BU_B = 0x70400000,
 247     OPC_VADDWOD_W_HU_H = 0x70408000,
 248     OPC_VADDWOD_D_WU_W = 0x70410000,
 249     OPC_VADDWOD_Q_DU_D = 0x70418000,
 250     OPC_VSADD_B = 0x70460000,
 251     OPC_VSADD_H = 0x70468000,
 252     OPC_VSADD_W = 0x70470000,
 253     OPC_VSADD_D = 0x70478000,
 254     OPC_VSSUB_B = 0x70480000,
 255     OPC_VSSUB_H = 0x70488000,
 256     OPC_VSSUB_W = 0x70490000,
 257     OPC_VSSUB_D = 0x70498000,
 258     OPC_VSADD_BU = 0x704a0000,
 259     OPC_VSADD_HU = 0x704a8000,
 260     OPC_VSADD_WU = 0x704b0000,
 261     OPC_VSADD_DU = 0x704b8000,
 262     OPC_VSSUB_BU = 0x704c0000,
 263     OPC_VSSUB_HU = 0x704c8000,
 264     OPC_VSSUB_WU = 0x704d0000,
 265     OPC_VSSUB_DU = 0x704d8000,
 266     OPC_VHADDW_H_B = 0x70540000,
 267     OPC_VHADDW_W_H = 0x70548000,
 268     OPC_VHADDW_D_W = 0x70550000,
 269     OPC_VHADDW_Q_D = 0x70558000,
 270     OPC_VHSUBW_H_B = 0x70560000,
 271     OPC_VHSUBW_W_H = 0x70568000,
 272     OPC_VHSUBW_D_W = 0x70570000,
 273     OPC_VHSUBW_Q_D = 0x70578000,
 274     OPC_VHADDW_HU_BU = 0x70580000,
 275     OPC_VHADDW_WU_HU = 0x70588000,
 276     OPC_VHADDW_DU_WU = 0x70590000,
 277     OPC_VHADDW_QU_DU = 0x70598000,
 278     OPC_VHSUBW_HU_BU = 0x705a0000,
 279     OPC_VHSUBW_WU_HU = 0x705a8000,
 280     OPC_VHSUBW_DU_WU = 0x705b0000,
 281     OPC_VHSUBW_QU_DU = 0x705b8000,
 282     OPC_VADDA_B = 0x705c0000,
 283     OPC_VADDA_H = 0x705c8000,
 284     OPC_VADDA_W = 0x705d0000,
 285     OPC_VADDA_D = 0x705d8000,
 286     OPC_VABSD_B = 0x70600000,
 287     OPC_VABSD_H = 0x70608000,
 288     OPC_VABSD_W = 0x70610000,
 289     OPC_VABSD_D = 0x70618000,
 290     OPC_VABSD_BU = 0x70620000,
 291     OPC_VABSD_HU = 0x70628000,
 292     OPC_VABSD_WU = 0x70630000,
 293     OPC_VABSD_DU = 0x70638000,
 294     OPC_VAVG_B = 0x70640000,
 295     OPC_VAVG_H = 0x70648000,
 296     OPC_VAVG_W = 0x70650000,
 297     OPC_VAVG_D = 0x70658000,
 298     OPC_VAVG_BU = 0x70660000,
 299     OPC_VAVG_HU = 0x70668000,
 300     OPC_VAVG_WU = 0x70670000,
 301     OPC_VAVG_DU = 0x70678000,
 302     OPC_VAVGR_B = 0x70680000,
 303     OPC_VAVGR_H = 0x70688000,
 304     OPC_VAVGR_W = 0x70690000,
 305     OPC_VAVGR_D = 0x70698000,
 306     OPC_VAVGR_BU = 0x706a0000,
 307     OPC_VAVGR_HU = 0x706a8000,
 308     OPC_VAVGR_WU = 0x706b0000,
 309     OPC_VAVGR_DU = 0x706b8000,
 310     OPC_VMAX_B = 0x70700000,
 311     OPC_VMAX_H = 0x70708000,
 312     OPC_VMAX_W = 0x70710000,
 313     OPC_VMAX_D = 0x70718000,
 314     OPC_VMIN_B = 0x70720000,
 315     OPC_VMIN_H = 0x70728000,
 316     OPC_VMIN_W = 0x70730000,
 317     OPC_VMIN_D = 0x70738000,
 318     OPC_VMAX_BU = 0x70740000,
 319     OPC_VMAX_HU = 0x70748000,
 320     OPC_VMAX_WU = 0x70750000,
 321     OPC_VMAX_DU = 0x70758000,
 322     OPC_VMIN_BU = 0x70760000,
 323     OPC_VMIN_HU = 0x70768000,
 324     OPC_VMIN_WU = 0x70770000,
 325     OPC_VMIN_DU = 0x70778000,
 326     OPC_VMUL_B = 0x70840000,
 327     OPC_VMUL_H = 0x70848000,
 328     OPC_VMUL_W = 0x70850000,
 329     OPC_VMUL_D = 0x70858000,
 330     OPC_VMUH_B = 0x70860000,
 331     OPC_VMUH_H = 0x70868000,
 332     OPC_VMUH_W = 0x70870000,
 333     OPC_VMUH_D = 0x70878000,
 334     OPC_VMUH_BU = 0x70880000,
 335     OPC_VMUH_HU = 0x70888000,
 336     OPC_VMUH_WU = 0x70890000,
 337     OPC_VMUH_DU = 0x70898000,
 338     OPC_VMULWEV_H_B = 0x70900000,
 339     OPC_VMULWEV_W_H = 0x70908000,
 340     OPC_VMULWEV_D_W = 0x70910000,
 341     OPC_VMULWEV_Q_D = 0x70918000,
 342     OPC_VMULWOD_H_B = 0x70920000,
 343     OPC_VMULWOD_W_H = 0x70928000,
 344     OPC_VMULWOD_D_W = 0x70930000,
 345     OPC_VMULWOD_Q_D = 0x70938000,
 346     OPC_VMULWEV_H_BU = 0x70980000,
 347     OPC_VMULWEV_W_HU = 0x70988000,
 348     OPC_VMULWEV_D_WU = 0x70990000,
 349     OPC_VMULWEV_Q_DU = 0x70998000,
 350     OPC_VMULWOD_H_BU = 0x709a0000,
 351     OPC_VMULWOD_W_HU = 0x709a8000,
 352     OPC_VMULWOD_D_WU = 0x709b0000,
 353     OPC_VMULWOD_Q_DU = 0x709b8000,
 354     OPC_VMULWEV_H_BU_B = 0x70a00000,
 355     OPC_VMULWEV_W_HU_H = 0x70a08000,
 356     OPC_VMULWEV_D_WU_W = 0x70a10000,
 357     OPC_VMULWEV_Q_DU_D = 0x70a18000,
 358     OPC_VMULWOD_H_BU_B = 0x70a20000,
 359     OPC_VMULWOD_W_HU_H = 0x70a28000,
 360     OPC_VMULWOD_D_WU_W = 0x70a30000,
 361     OPC_VMULWOD_Q_DU_D = 0x70a38000,
 362     OPC_VMADD_B = 0x70a80000,
 363     OPC_VMADD_H = 0x70a88000,
 364     OPC_VMADD_W = 0x70a90000,
 365     OPC_VMADD_D = 0x70a98000,
 366     OPC_VMSUB_B = 0x70aa0000,
 367     OPC_VMSUB_H = 0x70aa8000,
 368     OPC_VMSUB_W = 0x70ab0000,
 369     OPC_VMSUB_D = 0x70ab8000,
 370     OPC_VMADDWEV_H_B = 0x70ac0000,
 371     OPC_VMADDWEV_W_H = 0x70ac8000,
 372     OPC_VMADDWEV_D_W = 0x70ad0000,
 373     OPC_VMADDWEV_Q_D = 0x70ad8000,
 374     OPC_VMADDWOD_H_B = 0x70ae0000,
 375     OPC_VMADDWOD_W_H = 0x70ae8000,
 376     OPC_VMADDWOD_D_W = 0x70af0000,
 377     OPC_VMADDWOD_Q_D = 0x70af8000,
 378     OPC_VMADDWEV_H_BU = 0x70b40000,
 379     OPC_VMADDWEV_W_HU = 0x70b48000,
 380     OPC_VMADDWEV_D_WU = 0x70b50000,
 381     OPC_VMADDWEV_Q_DU = 0x70b58000,
 382     OPC_VMADDWOD_H_BU = 0x70b60000,
 383     OPC_VMADDWOD_W_HU = 0x70b68000,
 384     OPC_VMADDWOD_D_WU = 0x70b70000,
 385     OPC_VMADDWOD_Q_DU = 0x70b78000,
 386     OPC_VMADDWEV_H_BU_B = 0x70bc0000,
 387     OPC_VMADDWEV_W_HU_H = 0x70bc8000,
 388     OPC_VMADDWEV_D_WU_W = 0x70bd0000,
 389     OPC_VMADDWEV_Q_DU_D = 0x70bd8000,
 390     OPC_VMADDWOD_H_BU_B = 0x70be0000,
 391     OPC_VMADDWOD_W_HU_H = 0x70be8000,
 392     OPC_VMADDWOD_D_WU_W = 0x70bf0000,
 393     OPC_VMADDWOD_Q_DU_D = 0x70bf8000,
 394     OPC_VDIV_B = 0x70e00000,
 395     OPC_VDIV_H = 0x70e08000,
 396     OPC_VDIV_W = 0x70e10000,
 397     OPC_VDIV_D = 0x70e18000,
 398     OPC_VMOD_B = 0x70e20000,
 399     OPC_VMOD_H = 0x70e28000,
 400     OPC_VMOD_W = 0x70e30000,
 401     OPC_VMOD_D = 0x70e38000,
 402     OPC_VDIV_BU = 0x70e40000,
 403     OPC_VDIV_HU = 0x70e48000,
 404     OPC_VDIV_WU = 0x70e50000,
 405     OPC_VDIV_DU = 0x70e58000,
 406     OPC_VMOD_BU = 0x70e60000,
 407     OPC_VMOD_HU = 0x70e68000,
 408     OPC_VMOD_WU = 0x70e70000,
 409     OPC_VMOD_DU = 0x70e78000,
 410     OPC_VSLL_B = 0x70e80000,
 411     OPC_VSLL_H = 0x70e88000,
 412     OPC_VSLL_W = 0x70e90000,
 413     OPC_VSLL_D = 0x70e98000,
 414     OPC_VSRL_B = 0x70ea0000,
 415     OPC_VSRL_H = 0x70ea8000,
 416     OPC_VSRL_W = 0x70eb0000,
 417     OPC_VSRL_D = 0x70eb8000,
 418     OPC_VSRA_B = 0x70ec0000,
 419     OPC_VSRA_H = 0x70ec8000,
 420     OPC_VSRA_W = 0x70ed0000,
 421     OPC_VSRA_D = 0x70ed8000,
 422     OPC_VROTR_B = 0x70ee0000,
 423     OPC_VROTR_H = 0x70ee8000,
 424     OPC_VROTR_W = 0x70ef0000,
 425     OPC_VROTR_D = 0x70ef8000,
 426     OPC_VSRLR_B = 0x70f00000,
 427     OPC_VSRLR_H = 0x70f08000,
 428     OPC_VSRLR_W = 0x70f10000,
 429     OPC_VSRLR_D = 0x70f18000,
 430     OPC_VSRAR_B = 0x70f20000,
 431     OPC_VSRAR_H = 0x70f28000,
 432     OPC_VSRAR_W = 0x70f30000,
 433     OPC_VSRAR_D = 0x70f38000,
 434     OPC_VSRLN_B_H = 0x70f48000,
 435     OPC_VSRLN_H_W = 0x70f50000,
 436     OPC_VSRLN_W_D = 0x70f58000,
 437     OPC_VSRAN_B_H = 0x70f68000,
 438     OPC_VSRAN_H_W = 0x70f70000,
 439     OPC_VSRAN_W_D = 0x70f78000,
 440     OPC_VSRLRN_B_H = 0x70f88000,
 441     OPC_VSRLRN_H_W = 0x70f90000,
 442     OPC_VSRLRN_W_D = 0x70f98000,
 443     OPC_VSRARN_B_H = 0x70fa8000,
 444     OPC_VSRARN_H_W = 0x70fb0000,
 445     OPC_VSRARN_W_D = 0x70fb8000,
 446     OPC_VSSRLN_B_H = 0x70fc8000,
 447     OPC_VSSRLN_H_W = 0x70fd0000,
 448     OPC_VSSRLN_W_D = 0x70fd8000,
 449     OPC_VSSRAN_B_H = 0x70fe8000,
 450     OPC_VSSRAN_H_W = 0x70ff0000,
 451     OPC_VSSRAN_W_D = 0x70ff8000,
 452     OPC_VSSRLRN_B_H = 0x71008000,
 453     OPC_VSSRLRN_H_W = 0x71010000,
 454     OPC_VSSRLRN_W_D = 0x71018000,
 455     OPC_VSSRARN_B_H = 0x71028000,
 456     OPC_VSSRARN_H_W = 0x71030000,
 457     OPC_VSSRARN_W_D = 0x71038000,
 458     OPC_VSSRLN_BU_H = 0x71048000,
 459     OPC_VSSRLN_HU_W = 0x71050000,
 460     OPC_VSSRLN_WU_D = 0x71058000,
 461     OPC_VSSRAN_BU_H = 0x71068000,
 462     OPC_VSSRAN_HU_W = 0x71070000,
 463     OPC_VSSRAN_WU_D = 0x71078000,
 464     OPC_VSSRLRN_BU_H = 0x71088000,
 465     OPC_VSSRLRN_HU_W = 0x71090000,
 466     OPC_VSSRLRN_WU_D = 0x71098000,
 467     OPC_VSSRARN_BU_H = 0x710a8000,
 468     OPC_VSSRARN_HU_W = 0x710b0000,
 469     OPC_VSSRARN_WU_D = 0x710b8000,
 470     OPC_VBITCLR_B = 0x710c0000,
 471     OPC_VBITCLR_H = 0x710c8000,
 472     OPC_VBITCLR_W = 0x710d0000,
 473     OPC_VBITCLR_D = 0x710d8000,
 474     OPC_VBITSET_B = 0x710e0000,
 475     OPC_VBITSET_H = 0x710e8000,
 476     OPC_VBITSET_W = 0x710f0000,
 477     OPC_VBITSET_D = 0x710f8000,
 478     OPC_VBITREV_B = 0x71100000,
 479     OPC_VBITREV_H = 0x71108000,
 480     OPC_VBITREV_W = 0x71110000,
 481     OPC_VBITREV_D = 0x71118000,
 482     OPC_VPACKEV_B = 0x71160000,
 483     OPC_VPACKEV_H = 0x71168000,
 484     OPC_VPACKEV_W = 0x71170000,
 485     OPC_VPACKEV_D = 0x71178000,
 486     OPC_VPACKOD_B = 0x71180000,
 487     OPC_VPACKOD_H = 0x71188000,
 488     OPC_VPACKOD_W = 0x71190000,
 489     OPC_VPACKOD_D = 0x71198000,
 490     OPC_VILVL_B = 0x711a0000,
 491     OPC_VILVL_H = 0x711a8000,
 492     OPC_VILVL_W = 0x711b0000,
 493     OPC_VILVL_D = 0x711b8000,
 494     OPC_VILVH_B = 0x711c0000,
 495     OPC_VILVH_H = 0x711c8000,
 496     OPC_VILVH_W = 0x711d0000,
 497     OPC_VILVH_D = 0x711d8000,
 498     OPC_VPICKEV_B = 0x711e0000,
 499     OPC_VPICKEV_H = 0x711e8000,
 500     OPC_VPICKEV_W = 0x711f0000,
 501     OPC_VPICKEV_D = 0x711f8000,
 502     OPC_VPICKOD_B = 0x71200000,
 503     OPC_VPICKOD_H = 0x71208000,
 504     OPC_VPICKOD_W = 0x71210000,
 505     OPC_VPICKOD_D = 0x71218000,
 506     OPC_VREPLVE_B = 0x71220000,
 507     OPC_VREPLVE_H = 0x71228000,
 508     OPC_VREPLVE_W = 0x71230000,
 509     OPC_VREPLVE_D = 0x71238000,
 510     OPC_VAND_V = 0x71260000,
 511     OPC_VOR_V = 0x71268000,
 512     OPC_VXOR_V = 0x71270000,
 513     OPC_VNOR_V = 0x71278000,
 514     OPC_VANDN_V = 0x71280000,
 515     OPC_VORN_V = 0x71288000,
 516     OPC_VFRSTP_B = 0x712b0000,
 517     OPC_VFRSTP_H = 0x712b8000,
 518     OPC_VADD_Q = 0x712d0000,
 519     OPC_VSUB_Q = 0x712d8000,
 520     OPC_VSIGNCOV_B = 0x712e0000,
 521     OPC_VSIGNCOV_H = 0x712e8000,
 522     OPC_VSIGNCOV_W = 0x712f0000,
 523     OPC_VSIGNCOV_D = 0x712f8000,
 524     OPC_VFADD_S = 0x71308000,
 525     OPC_VFADD_D = 0x71310000,
 526     OPC_VFSUB_S = 0x71328000,
 527     OPC_VFSUB_D = 0x71330000,
 528     OPC_VFMUL_S = 0x71388000,
 529     OPC_VFMUL_D = 0x71390000,
 530     OPC_VFDIV_S = 0x713a8000,
 531     OPC_VFDIV_D = 0x713b0000,
 532     OPC_VFMAX_S = 0x713c8000,
 533     OPC_VFMAX_D = 0x713d0000,
 534     OPC_VFMIN_S = 0x713e8000,
 535     OPC_VFMIN_D = 0x713f0000,
 536     OPC_VFMAXA_S = 0x71408000,
 537     OPC_VFMAXA_D = 0x71410000,
 538     OPC_VFMINA_S = 0x71428000,
 539     OPC_VFMINA_D = 0x71430000,
 540     OPC_VFCVT_H_S = 0x71460000,
 541     OPC_VFCVT_S_D = 0x71468000,
 542     OPC_VFFINT_S_L = 0x71480000,
 543     OPC_VFTINT_W_D = 0x71498000,
 544     OPC_VFTINTRM_W_D = 0x714a0000,
 545     OPC_VFTINTRP_W_D = 0x714a8000,
 546     OPC_VFTINTRZ_W_D = 0x714b0000,
 547     OPC_VFTINTRNE_W_D = 0x714b8000,
 548     OPC_VSHUF_H = 0x717a8000,
 549     OPC_VSHUF_W = 0x717b0000,
 550     OPC_VSHUF_D = 0x717b8000,
 551     OPC_VSEQI_B = 0x72800000,
 552     OPC_VSEQI_H = 0x72808000,
 553     OPC_VSEQI_W = 0x72810000,
 554     OPC_VSEQI_D = 0x72818000,
 555     OPC_VSLEI_B = 0x72820000,
 556     OPC_VSLEI_H = 0x72828000,
 557     OPC_VSLEI_W = 0x72830000,
 558     OPC_VSLEI_D = 0x72838000,
 559     OPC_VSLEI_BU = 0x72840000,
 560     OPC_VSLEI_HU = 0x72848000,
 561     OPC_VSLEI_WU = 0x72850000,
 562     OPC_VSLEI_DU = 0x72858000,
 563     OPC_VSLTI_B = 0x72860000,
 564     OPC_VSLTI_H = 0x72868000,
 565     OPC_VSLTI_W = 0x72870000,
 566     OPC_VSLTI_D = 0x72878000,
 567     OPC_VSLTI_BU = 0x72880000,
 568     OPC_VSLTI_HU = 0x72888000,
 569     OPC_VSLTI_WU = 0x72890000,
 570     OPC_VSLTI_DU = 0x72898000,
 571     OPC_VADDI_BU = 0x728a0000,
 572     OPC_VADDI_HU = 0x728a8000,
 573     OPC_VADDI_WU = 0x728b0000,
 574     OPC_VADDI_DU = 0x728b8000,
 575     OPC_VSUBI_BU = 0x728c0000,
 576     OPC_VSUBI_HU = 0x728c8000,
 577     OPC_VSUBI_WU = 0x728d0000,
 578     OPC_VSUBI_DU = 0x728d8000,
 579     OPC_VBSLL_V = 0x728e0000,
 580     OPC_VBSRL_V = 0x728e8000,
 581     OPC_VMAXI_B = 0x72900000,
 582     OPC_VMAXI_H = 0x72908000,
 583     OPC_VMAXI_W = 0x72910000,
 584     OPC_VMAXI_D = 0x72918000,
 585     OPC_VMINI_B = 0x72920000,
 586     OPC_VMINI_H = 0x72928000,
 587     OPC_VMINI_W = 0x72930000,
 588     OPC_VMINI_D = 0x72938000,
 589     OPC_VMAXI_BU = 0x72940000,
 590     OPC_VMAXI_HU = 0x72948000,
 591     OPC_VMAXI_WU = 0x72950000,
 592     OPC_VMAXI_DU = 0x72958000,
 593     OPC_VMINI_BU = 0x72960000,
 594     OPC_VMINI_HU = 0x72968000,
 595     OPC_VMINI_WU = 0x72970000,
 596     OPC_VMINI_DU = 0x72978000,
 597     OPC_VFRSTPI_B = 0x729a0000,
 598     OPC_VFRSTPI_H = 0x729a8000,
 599     OPC_VCLO_B = 0x729c0000,
 600     OPC_VCLO_H = 0x729c0400,
 601     OPC_VCLO_W = 0x729c0800,
 602     OPC_VCLO_D = 0x729c0c00,
 603     OPC_VCLZ_B = 0x729c1000,
 604     OPC_VCLZ_H = 0x729c1400,
 605     OPC_VCLZ_W = 0x729c1800,
 606     OPC_VCLZ_D = 0x729c1c00,
 607     OPC_VPCNT_B = 0x729c2000,
 608     OPC_VPCNT_H = 0x729c2400,
 609     OPC_VPCNT_W = 0x729c2800,
 610     OPC_VPCNT_D = 0x729c2c00,
 611     OPC_VNEG_B = 0x729c3000,
 612     OPC_VNEG_H = 0x729c3400,
 613     OPC_VNEG_W = 0x729c3800,
 614     OPC_VNEG_D = 0x729c3c00,
 615     OPC_VMSKLTZ_B = 0x729c4000,
 616     OPC_VMSKLTZ_H = 0x729c4400,
 617     OPC_VMSKLTZ_W = 0x729c4800,
 618     OPC_VMSKLTZ_D = 0x729c4c00,
 619     OPC_VMSKGEZ_B = 0x729c5000,
 620     OPC_VMSKNZ_B = 0x729c6000,
 621     OPC_VSETEQZ_V = 0x729c9800,
 622     OPC_VSETNEZ_V = 0x729c9c00,
 623     OPC_VSETANYEQZ_B = 0x729ca000,
 624     OPC_VSETANYEQZ_H = 0x729ca400,
 625     OPC_VSETANYEQZ_W = 0x729ca800,
 626     OPC_VSETANYEQZ_D = 0x729cac00,
 627     OPC_VSETALLNEZ_B = 0x729cb000,
 628     OPC_VSETALLNEZ_H = 0x729cb400,
 629     OPC_VSETALLNEZ_W = 0x729cb800,
 630     OPC_VSETALLNEZ_D = 0x729cbc00,
 631     OPC_VFLOGB_S = 0x729cc400,
 632     OPC_VFLOGB_D = 0x729cc800,
 633     OPC_VFCLASS_S = 0x729cd400,
 634     OPC_VFCLASS_D = 0x729cd800,
 635     OPC_VFSQRT_S = 0x729ce400,
 636     OPC_VFSQRT_D = 0x729ce800,
 637     OPC_VFRECIP_S = 0x729cf400,
 638     OPC_VFRECIP_D = 0x729cf800,
 639     OPC_VFRSQRT_S = 0x729d0400,
 640     OPC_VFRSQRT_D = 0x729d0800,
 641     OPC_VFRINT_S = 0x729d3400,
 642     OPC_VFRINT_D = 0x729d3800,
 643     OPC_VFRINTRM_S = 0x729d4400,
 644     OPC_VFRINTRM_D = 0x729d4800,
 645     OPC_VFRINTRP_S = 0x729d5400,
 646     OPC_VFRINTRP_D = 0x729d5800,
 647     OPC_VFRINTRZ_S = 0x729d6400,
 648     OPC_VFRINTRZ_D = 0x729d6800,
 649     OPC_VFRINTRNE_S = 0x729d7400,
 650     OPC_VFRINTRNE_D = 0x729d7800,
 651     OPC_VFCVTL_S_H = 0x729de800,
 652     OPC_VFCVTH_S_H = 0x729dec00,
 653     OPC_VFCVTL_D_S = 0x729df000,
 654     OPC_VFCVTH_D_S = 0x729df400,
 655     OPC_VFFINT_S_W = 0x729e0000,
 656     OPC_VFFINT_S_WU = 0x729e0400,
 657     OPC_VFFINT_D_L = 0x729e0800,
 658     OPC_VFFINT_D_LU = 0x729e0c00,
 659     OPC_VFFINTL_D_W = 0x729e1000,
 660     OPC_VFFINTH_D_W = 0x729e1400,
 661     OPC_VFTINT_W_S = 0x729e3000,
 662     OPC_VFTINT_L_D = 0x729e3400,
 663     OPC_VFTINTRM_W_S = 0x729e3800,
 664     OPC_VFTINTRM_L_D = 0x729e3c00,
 665     OPC_VFTINTRP_W_S = 0x729e4000,
 666     OPC_VFTINTRP_L_D = 0x729e4400,
 667     OPC_VFTINTRZ_W_S = 0x729e4800,
 668     OPC_VFTINTRZ_L_D = 0x729e4c00,
 669     OPC_VFTINTRNE_W_S = 0x729e5000,
 670     OPC_VFTINTRNE_L_D = 0x729e5400,
 671     OPC_VFTINT_WU_S = 0x729e5800,
 672     OPC_VFTINT_LU_D = 0x729e5c00,
 673     OPC_VFTINTRZ_WU_S = 0x729e7000,
 674     OPC_VFTINTRZ_LU_D = 0x729e7400,
 675     OPC_VFTINTL_L_S = 0x729e8000,
 676     OPC_VFTINTH_L_S = 0x729e8400,
 677     OPC_VFTINTRML_L_S = 0x729e8800,
 678     OPC_VFTINTRMH_L_S = 0x729e8c00,
 679     OPC_VFTINTRPL_L_S = 0x729e9000,
 680     OPC_VFTINTRPH_L_S = 0x729e9400,
 681     OPC_VFTINTRZL_L_S = 0x729e9800,
 682     OPC_VFTINTRZH_L_S = 0x729e9c00,
 683     OPC_VFTINTRNEL_L_S = 0x729ea000,
 684     OPC_VFTINTRNEH_L_S = 0x729ea400,
 685     OPC_VEXTH_H_B = 0x729ee000,
 686     OPC_VEXTH_W_H = 0x729ee400,
 687     OPC_VEXTH_D_W = 0x729ee800,
 688     OPC_VEXTH_Q_D = 0x729eec00,
 689     OPC_VEXTH_HU_BU = 0x729ef000,
 690     OPC_VEXTH_WU_HU = 0x729ef400,
 691     OPC_VEXTH_DU_WU = 0x729ef800,
 692     OPC_VEXTH_QU_DU = 0x729efc00,
 693     OPC_VREPLGR2VR_B = 0x729f0000,
 694     OPC_VREPLGR2VR_H = 0x729f0400,
 695     OPC_VREPLGR2VR_W = 0x729f0800,
 696     OPC_VREPLGR2VR_D = 0x729f0c00,
 697     OPC_VROTRI_B = 0x72a02000,
 698     OPC_VROTRI_H = 0x72a04000,
 699     OPC_VROTRI_W = 0x72a08000,
 700     OPC_VROTRI_D = 0x72a10000,
 701     OPC_VSRLRI_B = 0x72a42000,
 702     OPC_VSRLRI_H = 0x72a44000,
 703     OPC_VSRLRI_W = 0x72a48000,
 704     OPC_VSRLRI_D = 0x72a50000,
 705     OPC_VSRARI_B = 0x72a82000,
 706     OPC_VSRARI_H = 0x72a84000,
 707     OPC_VSRARI_W = 0x72a88000,
 708     OPC_VSRARI_D = 0x72a90000,
 709     OPC_VINSGR2VR_B = 0x72eb8000,
 710     OPC_VINSGR2VR_H = 0x72ebc000,
 711     OPC_VINSGR2VR_W = 0x72ebe000,
 712     OPC_VINSGR2VR_D = 0x72ebf000,
 713     OPC_VPICKVE2GR_B = 0x72ef8000,
 714     OPC_VPICKVE2GR_H = 0x72efc000,
 715     OPC_VPICKVE2GR_W = 0x72efe000,
 716     OPC_VPICKVE2GR_D = 0x72eff000,
 717     OPC_VPICKVE2GR_BU = 0x72f38000,
 718     OPC_VPICKVE2GR_HU = 0x72f3c000,
 719     OPC_VPICKVE2GR_WU = 0x72f3e000,
 720     OPC_VPICKVE2GR_DU = 0x72f3f000,
 721     OPC_VREPLVEI_B = 0x72f78000,
 722     OPC_VREPLVEI_H = 0x72f7c000,
 723     OPC_VREPLVEI_W = 0x72f7e000,
 724     OPC_VREPLVEI_D = 0x72f7f000,
 725     OPC_VSLLWIL_H_B = 0x73082000,
 726     OPC_VSLLWIL_W_H = 0x73084000,
 727     OPC_VSLLWIL_D_W = 0x73088000,
 728     OPC_VEXTL_Q_D = 0x73090000,
 729     OPC_VSLLWIL_HU_BU = 0x730c2000,
 730     OPC_VSLLWIL_WU_HU = 0x730c4000,
 731     OPC_VSLLWIL_DU_WU = 0x730c8000,
 732     OPC_VEXTL_QU_DU = 0x730d0000,
 733     OPC_VBITCLRI_B = 0x73102000,
 734     OPC_VBITCLRI_H = 0x73104000,
 735     OPC_VBITCLRI_W = 0x73108000,
 736     OPC_VBITCLRI_D = 0x73110000,
 737     OPC_VBITSETI_B = 0x73142000,
 738     OPC_VBITSETI_H = 0x73144000,
 739     OPC_VBITSETI_W = 0x73148000,
 740     OPC_VBITSETI_D = 0x73150000,
 741     OPC_VBITREVI_B = 0x73182000,
 742     OPC_VBITREVI_H = 0x73184000,
 743     OPC_VBITREVI_W = 0x73188000,
 744     OPC_VBITREVI_D = 0x73190000,
 745     OPC_VSAT_B = 0x73242000,
 746     OPC_VSAT_H = 0x73244000,
 747     OPC_VSAT_W = 0x73248000,
 748     OPC_VSAT_D = 0x73250000,
 749     OPC_VSAT_BU = 0x73282000,
 750     OPC_VSAT_HU = 0x73284000,
 751     OPC_VSAT_WU = 0x73288000,
 752     OPC_VSAT_DU = 0x73290000,
 753     OPC_VSLLI_B = 0x732c2000,
 754     OPC_VSLLI_H = 0x732c4000,
 755     OPC_VSLLI_W = 0x732c8000,
 756     OPC_VSLLI_D = 0x732d0000,
 757     OPC_VSRLI_B = 0x73302000,
 758     OPC_VSRLI_H = 0x73304000,
 759     OPC_VSRLI_W = 0x73308000,
 760     OPC_VSRLI_D = 0x73310000,
 761     OPC_VSRAI_B = 0x73342000,
 762     OPC_VSRAI_H = 0x73344000,
 763     OPC_VSRAI_W = 0x73348000,
 764     OPC_VSRAI_D = 0x73350000,
 765     OPC_VSRLNI_B_H = 0x73404000,
 766     OPC_VSRLNI_H_W = 0x73408000,
 767     OPC_VSRLNI_W_D = 0x73410000,
 768     OPC_VSRLNI_D_Q = 0x73420000,
 769     OPC_VSRLRNI_B_H = 0x73444000,
 770     OPC_VSRLRNI_H_W = 0x73448000,
 771     OPC_VSRLRNI_W_D = 0x73450000,
 772     OPC_VSRLRNI_D_Q = 0x73460000,
 773     OPC_VSSRLNI_B_H = 0x73484000,
 774     OPC_VSSRLNI_H_W = 0x73488000,
 775     OPC_VSSRLNI_W_D = 0x73490000,
 776     OPC_VSSRLNI_D_Q = 0x734a0000,
 777     OPC_VSSRLNI_BU_H = 0x734c4000,
 778     OPC_VSSRLNI_HU_W = 0x734c8000,
 779     OPC_VSSRLNI_WU_D = 0x734d0000,
 780     OPC_VSSRLNI_DU_Q = 0x734e0000,
 781     OPC_VSSRLRNI_B_H = 0x73504000,
 782     OPC_VSSRLRNI_H_W = 0x73508000,
 783     OPC_VSSRLRNI_W_D = 0x73510000,
 784     OPC_VSSRLRNI_D_Q = 0x73520000,
 785     OPC_VSSRLRNI_BU_H = 0x73544000,
 786     OPC_VSSRLRNI_HU_W = 0x73548000,
 787     OPC_VSSRLRNI_WU_D = 0x73550000,
 788     OPC_VSSRLRNI_DU_Q = 0x73560000,
 789     OPC_VSRANI_B_H = 0x73584000,
 790     OPC_VSRANI_H_W = 0x73588000,
 791     OPC_VSRANI_W_D = 0x73590000,
 792     OPC_VSRANI_D_Q = 0x735a0000,
 793     OPC_VSRARNI_B_H = 0x735c4000,
 794     OPC_VSRARNI_H_W = 0x735c8000,
 795     OPC_VSRARNI_W_D = 0x735d0000,
 796     OPC_VSRARNI_D_Q = 0x735e0000,
 797     OPC_VSSRANI_B_H = 0x73604000,
 798     OPC_VSSRANI_H_W = 0x73608000,
 799     OPC_VSSRANI_W_D = 0x73610000,
 800     OPC_VSSRANI_D_Q = 0x73620000,
 801     OPC_VSSRANI_BU_H = 0x73644000,
 802     OPC_VSSRANI_HU_W = 0x73648000,
 803     OPC_VSSRANI_WU_D = 0x73650000,
 804     OPC_VSSRANI_DU_Q = 0x73660000,
 805     OPC_VSSRARNI_B_H = 0x73684000,
 806     OPC_VSSRARNI_H_W = 0x73688000,
 807     OPC_VSSRARNI_W_D = 0x73690000,
 808     OPC_VSSRARNI_D_Q = 0x736a0000,
 809     OPC_VSSRARNI_BU_H = 0x736c4000,
 810     OPC_VSSRARNI_HU_W = 0x736c8000,
 811     OPC_VSSRARNI_WU_D = 0x736d0000,
 812     OPC_VSSRARNI_DU_Q = 0x736e0000,
 813     OPC_VEXTRINS_D = 0x73800000,
 814     OPC_VEXTRINS_W = 0x73840000,
 815     OPC_VEXTRINS_H = 0x73880000,
 816     OPC_VEXTRINS_B = 0x738c0000,
 817     OPC_VSHUF4I_B = 0x73900000,
 818     OPC_VSHUF4I_H = 0x73940000,
 819     OPC_VSHUF4I_W = 0x73980000,
 820     OPC_VSHUF4I_D = 0x739c0000,
 821     OPC_VBITSELI_B = 0x73c40000,
 822     OPC_VANDI_B = 0x73d00000,
 823     OPC_VORI_B = 0x73d40000,
 824     OPC_VXORI_B = 0x73d80000,
 825     OPC_VNORI_B = 0x73dc0000,
 826     OPC_VLDI = 0x73e00000,
 827     OPC_VPERMI_W = 0x73e40000,
 828 } LoongArchInsn;
 829
 830 static int32_t __attribute__((unused))
 831 encode_d_slot(LoongArchInsn opc, uint32_t d)
 832 {
 833     return opc | d;
 834 }
 835
 836 static int32_t __attribute__((unused))
 837 encode_dj_slots(LoongArchInsn opc, uint32_t d, uint32_t j)
 838 {
 839     return opc | d | j << 5;
 840 }
 841
 842 static int32_t __attribute__((unused))
 843 encode_djk_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k)
 844 {
 845     return opc | d | j << 5 | k << 10;
 846 }
 847
 848 static int32_t __attribute__((unused))
 849 encode_djka_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k,
 850                   uint32_t a)
 851 {
 852     return opc | d | j << 5 | k << 10 | a << 15;
 853 }
 854
 855 static int32_t __attribute__((unused))
 856 encode_djkm_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k,
 857                   uint32_t m)
 858 {
 859     return opc | d | j << 5 | k << 10 | m << 16;
 860 }
 861
 862 static int32_t __attribute__((unused))
 863 encode_djkn_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k,
 864                   uint32_t n)
 865 {
 866     return opc | d | j << 5 | k << 10 | n << 18;
 867 }
 868
 869 static int32_t __attribute__((unused))
 870 encode_dk_slots(LoongArchInsn opc, uint32_t d, uint32_t k)
 871 {
 872     return opc | d | k << 10;
 873 }
 874
 875 static int32_t __attribute__((unused))
 876 encode_cdvj_insn(LoongArchInsn opc, TCGReg cd, TCGReg vj)
 877 {
 878     tcg_debug_assert(cd >= 0 && cd <= 0x7);
 879     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
 880     return encode_dj_slots(opc, cd, vj & 0x1f);
 881 }
 882
 883 static int32_t __attribute__((unused))
 884 encode_dj_insn(LoongArchInsn opc, TCGReg d, TCGReg j)
 885 {
 886     tcg_debug_assert(d >= 0 && d <= 0x1f);
 887     tcg_debug_assert(j >= 0 && j <= 0x1f);
 888     return encode_dj_slots(opc, d, j);
 889 }
 890
 891 static int32_t __attribute__((unused))
 892 encode_djk_insn(LoongArchInsn opc, TCGReg d, TCGReg j, TCGReg k)
 893 {
 894     tcg_debug_assert(d >= 0 && d <= 0x1f);
 895     tcg_debug_assert(j >= 0 && j <= 0x1f);
 896     tcg_debug_assert(k >= 0 && k <= 0x1f);
 897     return encode_djk_slots(opc, d, j, k);
 898 }
 899
 900 static int32_t __attribute__((unused))
 901 encode_djsk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, int32_t sk12)
 902 {
 903     tcg_debug_assert(d >= 0 && d <= 0x1f);
 904     tcg_debug_assert(j >= 0 && j <= 0x1f);
 905     tcg_debug_assert(sk12 >= -0x800 && sk12 <= 0x7ff);
 906     return encode_djk_slots(opc, d, j, sk12 & 0xfff);
 907 }
 908
 909 static int32_t __attribute__((unused))
 910 encode_djsk16_insn(LoongArchInsn opc, TCGReg d, TCGReg j, int32_t sk16)
 911 {
 912     tcg_debug_assert(d >= 0 && d <= 0x1f);
 913     tcg_debug_assert(j >= 0 && j <= 0x1f);
 914     tcg_debug_assert(sk16 >= -0x8000 && sk16 <= 0x7fff);
 915     return encode_djk_slots(opc, d, j, sk16 & 0xffff);
 916 }
 917
 918 static int32_t __attribute__((unused))
 919 encode_djuk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk12)
 920 {
 921     tcg_debug_assert(d >= 0 && d <= 0x1f);
 922     tcg_debug_assert(j >= 0 && j <= 0x1f);
 923     tcg_debug_assert(uk12 <= 0xfff);
 924     return encode_djk_slots(opc, d, j, uk12);
 925 }
 926
 927 static int32_t __attribute__((unused))
 928 encode_djuk5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk5)
 929 {
 930     tcg_debug_assert(d >= 0 && d <= 0x1f);
 931     tcg_debug_assert(j >= 0 && j <= 0x1f);
 932     tcg_debug_assert(uk5 <= 0x1f);
 933     return encode_djk_slots(opc, d, j, uk5);
 934 }
 935
 936 static int32_t __attribute__((unused))
 937 encode_djuk5um5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk5,
 938                      uint32_t um5)
 939 {
 940     tcg_debug_assert(d >= 0 && d <= 0x1f);
 941     tcg_debug_assert(j >= 0 && j <= 0x1f);
 942     tcg_debug_assert(uk5 <= 0x1f);
 943     tcg_debug_assert(um5 <= 0x1f);
 944     return encode_djkm_slots(opc, d, j, uk5, um5);
 945 }
 946
 947 static int32_t __attribute__((unused))
 948 encode_djuk6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk6)
 949 {
 950     tcg_debug_assert(d >= 0 && d <= 0x1f);
 951     tcg_debug_assert(j >= 0 && j <= 0x1f);
 952     tcg_debug_assert(uk6 <= 0x3f);
 953     return encode_djk_slots(opc, d, j, uk6);
 954 }
 955
 956 static int32_t __attribute__((unused))
 957 encode_djuk6um6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk6,
 958                      uint32_t um6)
 959 {
 960     tcg_debug_assert(d >= 0 && d <= 0x1f);
 961     tcg_debug_assert(j >= 0 && j <= 0x1f);
 962     tcg_debug_assert(uk6 <= 0x3f);
 963     tcg_debug_assert(um6 <= 0x3f);
 964     return encode_djkm_slots(opc, d, j, uk6, um6);
 965 }
 966
 967 static int32_t __attribute__((unused))
 968 encode_dsj20_insn(LoongArchInsn opc, TCGReg d, int32_t sj20)
 969 {
 970     tcg_debug_assert(d >= 0 && d <= 0x1f);
 971     tcg_debug_assert(sj20 >= -0x80000 && sj20 <= 0x7ffff);
 972     return encode_dj_slots(opc, d, sj20 & 0xfffff);
 973 }
 974
 975 static int32_t __attribute__((unused))
 976 encode_dvjuk1_insn(LoongArchInsn opc, TCGReg d, TCGReg vj, uint32_t uk1)
 977 {
 978     tcg_debug_assert(d >= 0 && d <= 0x1f);
 979     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
 980     tcg_debug_assert(uk1 <= 0x1);
 981     return encode_djk_slots(opc, d, vj & 0x1f, uk1);
 982 }
 983
 984 static int32_t __attribute__((unused))
 985 encode_dvjuk2_insn(LoongArchInsn opc, TCGReg d, TCGReg vj, uint32_t uk2)
 986 {
 987     tcg_debug_assert(d >= 0 && d <= 0x1f);
 988     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
 989     tcg_debug_assert(uk2 <= 0x3);
 990     return encode_djk_slots(opc, d, vj & 0x1f, uk2);
 991 }
 992
 993 static int32_t __attribute__((unused))
 994 encode_dvjuk3_insn(LoongArchInsn opc, TCGReg d, TCGReg vj, uint32_t uk3)
 995 {
 996     tcg_debug_assert(d >= 0 && d <= 0x1f);
 997     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
 998     tcg_debug_assert(uk3 <= 0x7);
 999     return encode_djk_slots(opc, d, vj & 0x1f, uk3);
1000 }
1001
1002 static int32_t __attribute__((unused))
1003 encode_dvjuk4_insn(LoongArchInsn opc, TCGReg d, TCGReg vj, uint32_t uk4)
1004 {
1005     tcg_debug_assert(d >= 0 && d <= 0x1f);
1006     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1007     tcg_debug_assert(uk4 <= 0xf);
1008     return encode_djk_slots(opc, d, vj & 0x1f, uk4);
1009 }
1010
1011 static int32_t __attribute__((unused))
1012 encode_sd10k16_insn(LoongArchInsn opc, int32_t sd10k16)
1013 {
1014     tcg_debug_assert(sd10k16 >= -0x2000000 && sd10k16 <= 0x1ffffff);
1015     return encode_dk_slots(opc, (sd10k16 >> 16) & 0x3ff, sd10k16 & 0xffff);
1016 }
1017
1018 static int32_t __attribute__((unused))
1019 encode_ud15_insn(LoongArchInsn opc, uint32_t ud15)
1020 {
1021     tcg_debug_assert(ud15 <= 0x7fff);
1022     return encode_d_slot(opc, ud15);
1023 }
1024
1025 static int32_t __attribute__((unused))
1026 encode_vdj_insn(LoongArchInsn opc, TCGReg vd, TCGReg j)
1027 {
1028     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1029     tcg_debug_assert(j >= 0 && j <= 0x1f);
1030     return encode_dj_slots(opc, vd & 0x1f, j);
1031 }
1032
1033 static int32_t __attribute__((unused))
1034 encode_vdjk_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, TCGReg k)
1035 {
1036     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1037     tcg_debug_assert(j >= 0 && j <= 0x1f);
1038     tcg_debug_assert(k >= 0 && k <= 0x1f);
1039     return encode_djk_slots(opc, vd & 0x1f, j, k);
1040 }
1041
1042 static int32_t __attribute__((unused))
1043 encode_vdjsk10_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk10)
1044 {
1045     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1046     tcg_debug_assert(j >= 0 && j <= 0x1f);
1047     tcg_debug_assert(sk10 >= -0x200 && sk10 <= 0x1ff);
1048     return encode_djk_slots(opc, vd & 0x1f, j, sk10 & 0x3ff);
1049 }
1050
1051 static int32_t __attribute__((unused))
1052 encode_vdjsk11_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk11)
1053 {
1054     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1055     tcg_debug_assert(j >= 0 && j <= 0x1f);
1056     tcg_debug_assert(sk11 >= -0x400 && sk11 <= 0x3ff);
1057     return encode_djk_slots(opc, vd & 0x1f, j, sk11 & 0x7ff);
1058 }
1059
1060 static int32_t __attribute__((unused))
1061 encode_vdjsk12_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk12)
1062 {
1063     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1064     tcg_debug_assert(j >= 0 && j <= 0x1f);
1065     tcg_debug_assert(sk12 >= -0x800 && sk12 <= 0x7ff);
1066     return encode_djk_slots(opc, vd & 0x1f, j, sk12 & 0xfff);
1067 }
1068
1069 static int32_t __attribute__((unused))
1070 encode_vdjsk8un1_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk8,
1071                       uint32_t un1)
1072 {
1073     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1074     tcg_debug_assert(j >= 0 && j <= 0x1f);
1075     tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f);
1076     tcg_debug_assert(un1 <= 0x1);
1077     return encode_djkn_slots(opc, vd & 0x1f, j, sk8 & 0xff, un1);
1078 }
1079
1080 static int32_t __attribute__((unused))
1081 encode_vdjsk8un2_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk8,
1082                       uint32_t un2)
1083 {
1084     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1085     tcg_debug_assert(j >= 0 && j <= 0x1f);
1086     tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f);
1087     tcg_debug_assert(un2 <= 0x3);
1088     return encode_djkn_slots(opc, vd & 0x1f, j, sk8 & 0xff, un2);
1089 }
1090
1091 static int32_t __attribute__((unused))
1092 encode_vdjsk8un3_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk8,
1093                       uint32_t un3)
1094 {
1095     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1096     tcg_debug_assert(j >= 0 && j <= 0x1f);
1097     tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f);
1098     tcg_debug_assert(un3 <= 0x7);
1099     return encode_djkn_slots(opc, vd & 0x1f, j, sk8 & 0xff, un3);
1100 }
1101
1102 static int32_t __attribute__((unused))
1103 encode_vdjsk8un4_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk8,
1104                       uint32_t un4)
1105 {
1106     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1107     tcg_debug_assert(j >= 0 && j <= 0x1f);
1108     tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f);
1109     tcg_debug_assert(un4 <= 0xf);
1110     return encode_djkn_slots(opc, vd & 0x1f, j, sk8 & 0xff, un4);
1111 }
1112
1113 static int32_t __attribute__((unused))
1114 encode_vdjsk9_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk9)
1115 {
1116     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1117     tcg_debug_assert(j >= 0 && j <= 0x1f);
1118     tcg_debug_assert(sk9 >= -0x100 && sk9 <= 0xff);
1119     return encode_djk_slots(opc, vd & 0x1f, j, sk9 & 0x1ff);
1120 }
1121
1122 static int32_t __attribute__((unused))
1123 encode_vdjuk1_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, uint32_t uk1)
1124 {
1125     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1126     tcg_debug_assert(j >= 0 && j <= 0x1f);
1127     tcg_debug_assert(uk1 <= 0x1);
1128     return encode_djk_slots(opc, vd & 0x1f, j, uk1);
1129 }
1130
1131 static int32_t __attribute__((unused))
1132 encode_vdjuk2_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, uint32_t uk2)
1133 {
1134     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1135     tcg_debug_assert(j >= 0 && j <= 0x1f);
1136     tcg_debug_assert(uk2 <= 0x3);
1137     return encode_djk_slots(opc, vd & 0x1f, j, uk2);
1138 }
1139
1140 static int32_t __attribute__((unused))
1141 encode_vdjuk3_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, uint32_t uk3)
1142 {
1143     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1144     tcg_debug_assert(j >= 0 && j <= 0x1f);
1145     tcg_debug_assert(uk3 <= 0x7);
1146     return encode_djk_slots(opc, vd & 0x1f, j, uk3);
1147 }
1148
1149 static int32_t __attribute__((unused))
1150 encode_vdjuk4_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, uint32_t uk4)
1151 {
1152     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1153     tcg_debug_assert(j >= 0 && j <= 0x1f);
1154     tcg_debug_assert(uk4 <= 0xf);
1155     return encode_djk_slots(opc, vd & 0x1f, j, uk4);
1156 }
1157
1158 static int32_t __attribute__((unused))
1159 encode_vdsj13_insn(LoongArchInsn opc, TCGReg vd, int32_t sj13)
1160 {
1161     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1162     tcg_debug_assert(sj13 >= -0x1000 && sj13 <= 0xfff);
1163     return encode_dj_slots(opc, vd & 0x1f, sj13 & 0x1fff);
1164 }
1165
1166 static int32_t __attribute__((unused))
1167 encode_vdvj_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj)
1168 {
1169     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1170     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1171     return encode_dj_slots(opc, vd & 0x1f, vj & 0x1f);
1172 }
1173
1174 static int32_t __attribute__((unused))
1175 encode_vdvjk_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, TCGReg k)
1176 {
1177     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1178     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1179     tcg_debug_assert(k >= 0 && k <= 0x1f);
1180     return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, k);
1181 }
1182
1183 static int32_t __attribute__((unused))
1184 encode_vdvjsk5_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, int32_t sk5)
1185 {
1186     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1187     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1188     tcg_debug_assert(sk5 >= -0x10 && sk5 <= 0xf);
1189     return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, sk5 & 0x1f);
1190 }
1191
1192 static int32_t __attribute__((unused))
1193 encode_vdvjuk1_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk1)
1194 {
1195     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1196     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1197     tcg_debug_assert(uk1 <= 0x1);
1198     return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk1);
1199 }
1200
1201 static int32_t __attribute__((unused))
1202 encode_vdvjuk2_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk2)
1203 {
1204     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1205     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1206     tcg_debug_assert(uk2 <= 0x3);
1207     return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk2);
1208 }
1209
1210 static int32_t __attribute__((unused))
1211 encode_vdvjuk3_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk3)
1212 {
1213     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1214     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1215     tcg_debug_assert(uk3 <= 0x7);
1216     return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk3);
1217 }
1218
1219 static int32_t __attribute__((unused))
1220 encode_vdvjuk4_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk4)
1221 {
1222     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1223     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1224     tcg_debug_assert(uk4 <= 0xf);
1225     return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk4);
1226 }
1227
1228 static int32_t __attribute__((unused))
1229 encode_vdvjuk5_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk5)
1230 {
1231     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1232     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1233     tcg_debug_assert(uk5 <= 0x1f);
1234     return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk5);
1235 }
1236
1237 static int32_t __attribute__((unused))
1238 encode_vdvjuk6_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk6)
1239 {
1240     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1241     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1242     tcg_debug_assert(uk6 <= 0x3f);
1243     return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk6);
1244 }
1245
1246 static int32_t __attribute__((unused))
1247 encode_vdvjuk7_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk7)
1248 {
1249     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1250     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1251     tcg_debug_assert(uk7 <= 0x7f);
1252     return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk7);
1253 }
1254
1255 static int32_t __attribute__((unused))
1256 encode_vdvjuk8_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk8)
1257 {
1258     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1259     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1260     tcg_debug_assert(uk8 <= 0xff);
1261     return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk8);
1262 }
1263
1264 static int32_t __attribute__((unused))
1265 encode_vdvjvk_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, TCGReg vk)
1266 {
1267     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1268     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1269     tcg_debug_assert(vk >= 0x20 && vk <= 0x3f);
1270     return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, vk & 0x1f);
1271 }
1272
1273 static int32_t __attribute__((unused))
1274 encode_vdvjvkva_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, TCGReg vk,
1275                      TCGReg va)
1276 {
1277     tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1278     tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1279     tcg_debug_assert(vk >= 0x20 && vk <= 0x3f);
1280     tcg_debug_assert(va >= 0x20 && va <= 0x3f);
1281     return encode_djka_slots(opc, vd & 0x1f, vj & 0x1f, vk & 0x1f, va & 0x1f);
1282 }
1283
1284 /* Emits the `clz.w d, j` instruction.  */
1285 static void __attribute__((unused))
1286 tcg_out_opc_clz_w(TCGContext *s, TCGReg d, TCGReg j)
1287 {
1288     tcg_out32(s, encode_dj_insn(OPC_CLZ_W, d, j));
1289 }
1290
1291 /* Emits the `ctz.w d, j` instruction.  */
1292 static void __attribute__((unused))
1293 tcg_out_opc_ctz_w(TCGContext *s, TCGReg d, TCGReg j)
1294 {
1295     tcg_out32(s, encode_dj_insn(OPC_CTZ_W, d, j));
1296 }
1297
1298 /* Emits the `clz.d d, j` instruction.  */
1299 static void __attribute__((unused))
1300 tcg_out_opc_clz_d(TCGContext *s, TCGReg d, TCGReg j)
1301 {
1302     tcg_out32(s, encode_dj_insn(OPC_CLZ_D, d, j));
1303 }
1304
1305 /* Emits the `ctz.d d, j` instruction.  */
1306 static void __attribute__((unused))
1307 tcg_out_opc_ctz_d(TCGContext *s, TCGReg d, TCGReg j)
1308 {
1309     tcg_out32(s, encode_dj_insn(OPC_CTZ_D, d, j));
1310 }
1311
1312 /* Emits the `revb.2h d, j` instruction.  */
1313 static void __attribute__((unused))
1314 tcg_out_opc_revb_2h(TCGContext *s, TCGReg d, TCGReg j)
1315 {
1316     tcg_out32(s, encode_dj_insn(OPC_REVB_2H, d, j));
1317 }
1318
1319 /* Emits the `revb.2w d, j` instruction.  */
1320 static void __attribute__((unused))
1321 tcg_out_opc_revb_2w(TCGContext *s, TCGReg d, TCGReg j)
1322 {
1323     tcg_out32(s, encode_dj_insn(OPC_REVB_2W, d, j));
1324 }
1325
1326 /* Emits the `revb.d d, j` instruction.  */
1327 static void __attribute__((unused))
1328 tcg_out_opc_revb_d(TCGContext *s, TCGReg d, TCGReg j)
1329 {
1330     tcg_out32(s, encode_dj_insn(OPC_REVB_D, d, j));
1331 }
1332
1333 /* Emits the `sext.h d, j` instruction.  */
1334 static void __attribute__((unused))
1335 tcg_out_opc_sext_h(TCGContext *s, TCGReg d, TCGReg j)
1336 {
1337     tcg_out32(s, encode_dj_insn(OPC_SEXT_H, d, j));
1338 }
1339
1340 /* Emits the `sext.b d, j` instruction.  */
1341 static void __attribute__((unused))
1342 tcg_out_opc_sext_b(TCGContext *s, TCGReg d, TCGReg j)
1343 {
1344     tcg_out32(s, encode_dj_insn(OPC_SEXT_B, d, j));
1345 }
1346
1347 /* Emits the `add.w d, j, k` instruction.  */
1348 static void __attribute__((unused))
1349 tcg_out_opc_add_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1350 {
1351     tcg_out32(s, encode_djk_insn(OPC_ADD_W, d, j, k));
1352 }
1353
1354 /* Emits the `add.d d, j, k` instruction.  */
1355 static void __attribute__((unused))
1356 tcg_out_opc_add_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1357 {
1358     tcg_out32(s, encode_djk_insn(OPC_ADD_D, d, j, k));
1359 }
1360
1361 /* Emits the `sub.w d, j, k` instruction.  */
1362 static void __attribute__((unused))
1363 tcg_out_opc_sub_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1364 {
1365     tcg_out32(s, encode_djk_insn(OPC_SUB_W, d, j, k));
1366 }
1367
1368 /* Emits the `sub.d d, j, k` instruction.  */
1369 static void __attribute__((unused))
1370 tcg_out_opc_sub_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1371 {
1372     tcg_out32(s, encode_djk_insn(OPC_SUB_D, d, j, k));
1373 }
1374
1375 /* Emits the `slt d, j, k` instruction.  */
1376 static void __attribute__((unused))
1377 tcg_out_opc_slt(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1378 {
1379     tcg_out32(s, encode_djk_insn(OPC_SLT, d, j, k));
1380 }
1381
1382 /* Emits the `sltu d, j, k` instruction.  */
1383 static void __attribute__((unused))
1384 tcg_out_opc_sltu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1385 {
1386     tcg_out32(s, encode_djk_insn(OPC_SLTU, d, j, k));
1387 }
1388
1389 /* Emits the `maskeqz d, j, k` instruction.  */
1390 static void __attribute__((unused))
1391 tcg_out_opc_maskeqz(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1392 {
1393     tcg_out32(s, encode_djk_insn(OPC_MASKEQZ, d, j, k));
1394 }
1395
1396 /* Emits the `masknez d, j, k` instruction.  */
1397 static void __attribute__((unused))
1398 tcg_out_opc_masknez(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1399 {
1400     tcg_out32(s, encode_djk_insn(OPC_MASKNEZ, d, j, k));
1401 }
1402
1403 /* Emits the `nor d, j, k` instruction.  */
1404 static void __attribute__((unused))
1405 tcg_out_opc_nor(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1406 {
1407     tcg_out32(s, encode_djk_insn(OPC_NOR, d, j, k));
1408 }
1409
1410 /* Emits the `and d, j, k` instruction.  */
1411 static void __attribute__((unused))
1412 tcg_out_opc_and(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1413 {
1414     tcg_out32(s, encode_djk_insn(OPC_AND, d, j, k));
1415 }
1416
1417 /* Emits the `or d, j, k` instruction.  */
1418 static void __attribute__((unused))
1419 tcg_out_opc_or(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1420 {
1421     tcg_out32(s, encode_djk_insn(OPC_OR, d, j, k));
1422 }
1423
1424 /* Emits the `xor d, j, k` instruction.  */
1425 static void __attribute__((unused))
1426 tcg_out_opc_xor(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1427 {
1428     tcg_out32(s, encode_djk_insn(OPC_XOR, d, j, k));
1429 }
1430
1431 /* Emits the `orn d, j, k` instruction.  */
1432 static void __attribute__((unused))
1433 tcg_out_opc_orn(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1434 {
1435     tcg_out32(s, encode_djk_insn(OPC_ORN, d, j, k));
1436 }
1437
1438 /* Emits the `andn d, j, k` instruction.  */
1439 static void __attribute__((unused))
1440 tcg_out_opc_andn(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1441 {
1442     tcg_out32(s, encode_djk_insn(OPC_ANDN, d, j, k));
1443 }
1444
1445 /* Emits the `sll.w d, j, k` instruction.  */
1446 static void __attribute__((unused))
1447 tcg_out_opc_sll_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1448 {
1449     tcg_out32(s, encode_djk_insn(OPC_SLL_W, d, j, k));
1450 }
1451
1452 /* Emits the `srl.w d, j, k` instruction.  */
1453 static void __attribute__((unused))
1454 tcg_out_opc_srl_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1455 {
1456     tcg_out32(s, encode_djk_insn(OPC_SRL_W, d, j, k));
1457 }
1458
1459 /* Emits the `sra.w d, j, k` instruction.  */
1460 static void __attribute__((unused))
1461 tcg_out_opc_sra_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1462 {
1463     tcg_out32(s, encode_djk_insn(OPC_SRA_W, d, j, k));
1464 }
1465
1466 /* Emits the `sll.d d, j, k` instruction.  */
1467 static void __attribute__((unused))
1468 tcg_out_opc_sll_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1469 {
1470     tcg_out32(s, encode_djk_insn(OPC_SLL_D, d, j, k));
1471 }
1472
1473 /* Emits the `srl.d d, j, k` instruction.  */
1474 static void __attribute__((unused))
1475 tcg_out_opc_srl_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1476 {
1477     tcg_out32(s, encode_djk_insn(OPC_SRL_D, d, j, k));
1478 }
1479
1480 /* Emits the `sra.d d, j, k` instruction.  */
1481 static void __attribute__((unused))
1482 tcg_out_opc_sra_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1483 {
1484     tcg_out32(s, encode_djk_insn(OPC_SRA_D, d, j, k));
1485 }
1486
1487 /* Emits the `rotr.w d, j, k` instruction.  */
1488 static void __attribute__((unused))
1489 tcg_out_opc_rotr_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1490 {
1491     tcg_out32(s, encode_djk_insn(OPC_ROTR_W, d, j, k));
1492 }
1493
1494 /* Emits the `rotr.d d, j, k` instruction.  */
1495 static void __attribute__((unused))
1496 tcg_out_opc_rotr_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1497 {
1498     tcg_out32(s, encode_djk_insn(OPC_ROTR_D, d, j, k));
1499 }
1500
1501 /* Emits the `mul.w d, j, k` instruction.  */
1502 static void __attribute__((unused))
1503 tcg_out_opc_mul_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1504 {
1505     tcg_out32(s, encode_djk_insn(OPC_MUL_W, d, j, k));
1506 }
1507
1508 /* Emits the `mulh.w d, j, k` instruction.  */
1509 static void __attribute__((unused))
1510 tcg_out_opc_mulh_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1511 {
1512     tcg_out32(s, encode_djk_insn(OPC_MULH_W, d, j, k));
1513 }
1514
1515 /* Emits the `mulh.wu d, j, k` instruction.  */
1516 static void __attribute__((unused))
1517 tcg_out_opc_mulh_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1518 {
1519     tcg_out32(s, encode_djk_insn(OPC_MULH_WU, d, j, k));
1520 }
1521
1522 /* Emits the `mul.d d, j, k` instruction.  */
1523 static void __attribute__((unused))
1524 tcg_out_opc_mul_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1525 {
1526     tcg_out32(s, encode_djk_insn(OPC_MUL_D, d, j, k));
1527 }
1528
1529 /* Emits the `mulh.d d, j, k` instruction.  */
1530 static void __attribute__((unused))
1531 tcg_out_opc_mulh_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1532 {
1533     tcg_out32(s, encode_djk_insn(OPC_MULH_D, d, j, k));
1534 }
1535
1536 /* Emits the `mulh.du d, j, k` instruction.  */
1537 static void __attribute__((unused))
1538 tcg_out_opc_mulh_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1539 {
1540     tcg_out32(s, encode_djk_insn(OPC_MULH_DU, d, j, k));
1541 }
1542
1543 /* Emits the `div.w d, j, k` instruction.  */
1544 static void __attribute__((unused))
1545 tcg_out_opc_div_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1546 {
1547     tcg_out32(s, encode_djk_insn(OPC_DIV_W, d, j, k));
1548 }
1549
1550 /* Emits the `mod.w d, j, k` instruction.  */
1551 static void __attribute__((unused))
1552 tcg_out_opc_mod_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1553 {
1554     tcg_out32(s, encode_djk_insn(OPC_MOD_W, d, j, k));
1555 }
1556
1557 /* Emits the `div.wu d, j, k` instruction.  */
1558 static void __attribute__((unused))
1559 tcg_out_opc_div_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1560 {
1561     tcg_out32(s, encode_djk_insn(OPC_DIV_WU, d, j, k));
1562 }
1563
1564 /* Emits the `mod.wu d, j, k` instruction.  */
1565 static void __attribute__((unused))
1566 tcg_out_opc_mod_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1567 {
1568     tcg_out32(s, encode_djk_insn(OPC_MOD_WU, d, j, k));
1569 }
1570
1571 /* Emits the `div.d d, j, k` instruction.  */
1572 static void __attribute__((unused))
1573 tcg_out_opc_div_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1574 {
1575     tcg_out32(s, encode_djk_insn(OPC_DIV_D, d, j, k));
1576 }
1577
1578 /* Emits the `mod.d d, j, k` instruction.  */
1579 static void __attribute__((unused))
1580 tcg_out_opc_mod_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1581 {
1582     tcg_out32(s, encode_djk_insn(OPC_MOD_D, d, j, k));
1583 }
1584
1585 /* Emits the `div.du d, j, k` instruction.  */
1586 static void __attribute__((unused))
1587 tcg_out_opc_div_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1588 {
1589     tcg_out32(s, encode_djk_insn(OPC_DIV_DU, d, j, k));
1590 }
1591
1592 /* Emits the `mod.du d, j, k` instruction.  */
1593 static void __attribute__((unused))
1594 tcg_out_opc_mod_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1595 {
1596     tcg_out32(s, encode_djk_insn(OPC_MOD_DU, d, j, k));
1597 }
1598
1599 /* Emits the `slli.w d, j, uk5` instruction.  */
1600 static void __attribute__((unused))
1601 tcg_out_opc_slli_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5)
1602 {
1603     tcg_out32(s, encode_djuk5_insn(OPC_SLLI_W, d, j, uk5));
1604 }
1605
1606 /* Emits the `slli.d d, j, uk6` instruction.  */
1607 static void __attribute__((unused))
1608 tcg_out_opc_slli_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6)
1609 {
1610     tcg_out32(s, encode_djuk6_insn(OPC_SLLI_D, d, j, uk6));
1611 }
1612
1613 /* Emits the `srli.w d, j, uk5` instruction.  */
1614 static void __attribute__((unused))
1615 tcg_out_opc_srli_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5)
1616 {
1617     tcg_out32(s, encode_djuk5_insn(OPC_SRLI_W, d, j, uk5));
1618 }
1619
1620 /* Emits the `srli.d d, j, uk6` instruction.  */
1621 static void __attribute__((unused))
1622 tcg_out_opc_srli_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6)
1623 {
1624     tcg_out32(s, encode_djuk6_insn(OPC_SRLI_D, d, j, uk6));
1625 }
1626
1627 /* Emits the `srai.w d, j, uk5` instruction.  */
1628 static void __attribute__((unused))
1629 tcg_out_opc_srai_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5)
1630 {
1631     tcg_out32(s, encode_djuk5_insn(OPC_SRAI_W, d, j, uk5));
1632 }
1633
1634 /* Emits the `srai.d d, j, uk6` instruction.  */
1635 static void __attribute__((unused))
1636 tcg_out_opc_srai_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6)
1637 {
1638     tcg_out32(s, encode_djuk6_insn(OPC_SRAI_D, d, j, uk6));
1639 }
1640
1641 /* Emits the `rotri.w d, j, uk5` instruction.  */
1642 static void __attribute__((unused))
1643 tcg_out_opc_rotri_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5)
1644 {
1645     tcg_out32(s, encode_djuk5_insn(OPC_ROTRI_W, d, j, uk5));
1646 }
1647
1648 /* Emits the `rotri.d d, j, uk6` instruction.  */
1649 static void __attribute__((unused))
1650 tcg_out_opc_rotri_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6)
1651 {
1652     tcg_out32(s, encode_djuk6_insn(OPC_ROTRI_D, d, j, uk6));
1653 }
1654
1655 /* Emits the `bstrins.w d, j, uk5, um5` instruction.  */
1656 static void __attribute__((unused))
1657 tcg_out_opc_bstrins_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5,
1658                       uint32_t um5)
1659 {
1660     tcg_out32(s, encode_djuk5um5_insn(OPC_BSTRINS_W, d, j, uk5, um5));
1661 }
1662
1663 /* Emits the `bstrpick.w d, j, uk5, um5` instruction.  */
1664 static void __attribute__((unused))
1665 tcg_out_opc_bstrpick_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5,
1666                        uint32_t um5)
1667 {
1668     tcg_out32(s, encode_djuk5um5_insn(OPC_BSTRPICK_W, d, j, uk5, um5));
1669 }
1670
1671 /* Emits the `bstrins.d d, j, uk6, um6` instruction.  */
1672 static void __attribute__((unused))
1673 tcg_out_opc_bstrins_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6,
1674                       uint32_t um6)
1675 {
1676     tcg_out32(s, encode_djuk6um6_insn(OPC_BSTRINS_D, d, j, uk6, um6));
1677 }
1678
1679 /* Emits the `bstrpick.d d, j, uk6, um6` instruction.  */
1680 static void __attribute__((unused))
1681 tcg_out_opc_bstrpick_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6,
1682                        uint32_t um6)
1683 {
1684     tcg_out32(s, encode_djuk6um6_insn(OPC_BSTRPICK_D, d, j, uk6, um6));
1685 }
1686
1687 /* Emits the `slti d, j, sk12` instruction.  */
1688 static void __attribute__((unused))
1689 tcg_out_opc_slti(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
1690 {
1691     tcg_out32(s, encode_djsk12_insn(OPC_SLTI, d, j, sk12));
1692 }
1693
1694 /* Emits the `sltui d, j, sk12` instruction.  */
1695 static void __attribute__((unused))
1696 tcg_out_opc_sltui(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
1697 {
1698     tcg_out32(s, encode_djsk12_insn(OPC_SLTUI, d, j, sk12));
1699 }
1700
1701 /* Emits the `addi.w d, j, sk12` instruction.  */
1702 static void __attribute__((unused))
1703 tcg_out_opc_addi_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
1704 {
1705     tcg_out32(s, encode_djsk12_insn(OPC_ADDI_W, d, j, sk12));
1706 }
1707
1708 /* Emits the `addi.d d, j, sk12` instruction.  */
1709 static void __attribute__((unused))
1710 tcg_out_opc_addi_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
1711 {
1712     tcg_out32(s, encode_djsk12_insn(OPC_ADDI_D, d, j, sk12));
1713 }
1714
1715 /* Emits the `cu52i.d d, j, sk12` instruction.  */
1716 static void __attribute__((unused))
1717 tcg_out_opc_cu52i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
1718 {
1719     tcg_out32(s, encode_djsk12_insn(OPC_CU52I_D, d, j, sk12));
1720 }
1721
1722 /* Emits the `andi d, j, uk12` instruction.  */
1723 static void __attribute__((unused))
1724 tcg_out_opc_andi(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12)
1725 {
1726     tcg_out32(s, encode_djuk12_insn(OPC_ANDI, d, j, uk12));
1727 }
1728
1729 /* Emits the `ori d, j, uk12` instruction.  */
1730 static void __attribute__((unused))
1731 tcg_out_opc_ori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12)
1732 {
1733     tcg_out32(s, encode_djuk12_insn(OPC_ORI, d, j, uk12));
1734 }
1735
1736 /* Emits the `xori d, j, uk12` instruction.  */
1737 static void __attribute__((unused))
1738 tcg_out_opc_xori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12)
1739 {
1740     tcg_out32(s, encode_djuk12_insn(OPC_XORI, d, j, uk12));
1741 }
1742
1743 /* Emits the `vfmadd.s vd, vj, vk, va` instruction.  */
1744 static void __attribute__((unused))
1745 tcg_out_opc_vfmadd_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1746 {
1747     tcg_out32(s, encode_vdvjvkva_insn(OPC_VFMADD_S, vd, vj, vk, va));
1748 }
1749
1750 /* Emits the `vfmadd.d vd, vj, vk, va` instruction.  */
1751 static void __attribute__((unused))
1752 tcg_out_opc_vfmadd_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1753 {
1754     tcg_out32(s, encode_vdvjvkva_insn(OPC_VFMADD_D, vd, vj, vk, va));
1755 }
1756
1757 /* Emits the `vfmsub.s vd, vj, vk, va` instruction.  */
1758 static void __attribute__((unused))
1759 tcg_out_opc_vfmsub_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1760 {
1761     tcg_out32(s, encode_vdvjvkva_insn(OPC_VFMSUB_S, vd, vj, vk, va));
1762 }
1763
1764 /* Emits the `vfmsub.d vd, vj, vk, va` instruction.  */
1765 static void __attribute__((unused))
1766 tcg_out_opc_vfmsub_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1767 {
1768     tcg_out32(s, encode_vdvjvkva_insn(OPC_VFMSUB_D, vd, vj, vk, va));
1769 }
1770
1771 /* Emits the `vfnmadd.s vd, vj, vk, va` instruction.  */
1772 static void __attribute__((unused))
1773 tcg_out_opc_vfnmadd_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1774 {
1775     tcg_out32(s, encode_vdvjvkva_insn(OPC_VFNMADD_S, vd, vj, vk, va));
1776 }
1777
1778 /* Emits the `vfnmadd.d vd, vj, vk, va` instruction.  */
1779 static void __attribute__((unused))
1780 tcg_out_opc_vfnmadd_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1781 {
1782     tcg_out32(s, encode_vdvjvkva_insn(OPC_VFNMADD_D, vd, vj, vk, va));
1783 }
1784
1785 /* Emits the `vfnmsub.s vd, vj, vk, va` instruction.  */
1786 static void __attribute__((unused))
1787 tcg_out_opc_vfnmsub_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1788 {
1789     tcg_out32(s, encode_vdvjvkva_insn(OPC_VFNMSUB_S, vd, vj, vk, va));
1790 }
1791
1792 /* Emits the `vfnmsub.d vd, vj, vk, va` instruction.  */
1793 static void __attribute__((unused))
1794 tcg_out_opc_vfnmsub_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1795 {
1796     tcg_out32(s, encode_vdvjvkva_insn(OPC_VFNMSUB_D, vd, vj, vk, va));
1797 }
1798
1799 /* Emits the `vfcmp.caf.s vd, vj, vk` instruction.  */
1800 static void __attribute__((unused))
1801 tcg_out_opc_vfcmp_caf_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1802 {
1803     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CAF_S, vd, vj, vk));
1804 }
1805
1806 /* Emits the `vfcmp.saf.s vd, vj, vk` instruction.  */
1807 static void __attribute__((unused))
1808 tcg_out_opc_vfcmp_saf_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1809 {
1810     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SAF_S, vd, vj, vk));
1811 }
1812
1813 /* Emits the `vfcmp.clt.s vd, vj, vk` instruction.  */
1814 static void __attribute__((unused))
1815 tcg_out_opc_vfcmp_clt_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1816 {
1817     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CLT_S, vd, vj, vk));
1818 }
1819
1820 /* Emits the `vfcmp.slt.s vd, vj, vk` instruction.  */
1821 static void __attribute__((unused))
1822 tcg_out_opc_vfcmp_slt_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1823 {
1824     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SLT_S, vd, vj, vk));
1825 }
1826
1827 /* Emits the `vfcmp.ceq.s vd, vj, vk` instruction.  */
1828 static void __attribute__((unused))
1829 tcg_out_opc_vfcmp_ceq_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1830 {
1831     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CEQ_S, vd, vj, vk));
1832 }
1833
1834 /* Emits the `vfcmp.seq.s vd, vj, vk` instruction.  */
1835 static void __attribute__((unused))
1836 tcg_out_opc_vfcmp_seq_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1837 {
1838     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SEQ_S, vd, vj, vk));
1839 }
1840
1841 /* Emits the `vfcmp.cle.s vd, vj, vk` instruction.  */
1842 static void __attribute__((unused))
1843 tcg_out_opc_vfcmp_cle_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1844 {
1845     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CLE_S, vd, vj, vk));
1846 }
1847
1848 /* Emits the `vfcmp.sle.s vd, vj, vk` instruction.  */
1849 static void __attribute__((unused))
1850 tcg_out_opc_vfcmp_sle_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1851 {
1852     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SLE_S, vd, vj, vk));
1853 }
1854
1855 /* Emits the `vfcmp.cun.s vd, vj, vk` instruction.  */
1856 static void __attribute__((unused))
1857 tcg_out_opc_vfcmp_cun_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1858 {
1859     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CUN_S, vd, vj, vk));
1860 }
1861
1862 /* Emits the `vfcmp.sun.s vd, vj, vk` instruction.  */
1863 static void __attribute__((unused))
1864 tcg_out_opc_vfcmp_sun_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1865 {
1866     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SUN_S, vd, vj, vk));
1867 }
1868
1869 /* Emits the `vfcmp.cult.s vd, vj, vk` instruction.  */
1870 static void __attribute__((unused))
1871 tcg_out_opc_vfcmp_cult_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1872 {
1873     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CULT_S, vd, vj, vk));
1874 }
1875
1876 /* Emits the `vfcmp.sult.s vd, vj, vk` instruction.  */
1877 static void __attribute__((unused))
1878 tcg_out_opc_vfcmp_sult_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1879 {
1880     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SULT_S, vd, vj, vk));
1881 }
1882
1883 /* Emits the `vfcmp.cueq.s vd, vj, vk` instruction.  */
1884 static void __attribute__((unused))
1885 tcg_out_opc_vfcmp_cueq_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1886 {
1887     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CUEQ_S, vd, vj, vk));
1888 }
1889
1890 /* Emits the `vfcmp.sueq.s vd, vj, vk` instruction.  */
1891 static void __attribute__((unused))
1892 tcg_out_opc_vfcmp_sueq_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1893 {
1894     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SUEQ_S, vd, vj, vk));
1895 }
1896
1897 /* Emits the `vfcmp.cule.s vd, vj, vk` instruction.  */
1898 static void __attribute__((unused))
1899 tcg_out_opc_vfcmp_cule_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1900 {
1901     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CULE_S, vd, vj, vk));
1902 }
1903
1904 /* Emits the `vfcmp.sule.s vd, vj, vk` instruction.  */
1905 static void __attribute__((unused))
1906 tcg_out_opc_vfcmp_sule_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1907 {
1908     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SULE_S, vd, vj, vk));
1909 }
1910
1911 /* Emits the `vfcmp.cne.s vd, vj, vk` instruction.  */
1912 static void __attribute__((unused))
1913 tcg_out_opc_vfcmp_cne_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1914 {
1915     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CNE_S, vd, vj, vk));
1916 }
1917
1918 /* Emits the `vfcmp.sne.s vd, vj, vk` instruction.  */
1919 static void __attribute__((unused))
1920 tcg_out_opc_vfcmp_sne_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1921 {
1922     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SNE_S, vd, vj, vk));
1923 }
1924
1925 /* Emits the `vfcmp.cor.s vd, vj, vk` instruction.  */
1926 static void __attribute__((unused))
1927 tcg_out_opc_vfcmp_cor_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1928 {
1929     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_COR_S, vd, vj, vk));
1930 }
1931
1932 /* Emits the `vfcmp.sor.s vd, vj, vk` instruction.  */
1933 static void __attribute__((unused))
1934 tcg_out_opc_vfcmp_sor_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1935 {
1936     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SOR_S, vd, vj, vk));
1937 }
1938
1939 /* Emits the `vfcmp.cune.s vd, vj, vk` instruction.  */
1940 static void __attribute__((unused))
1941 tcg_out_opc_vfcmp_cune_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1942 {
1943     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CUNE_S, vd, vj, vk));
1944 }
1945
1946 /* Emits the `vfcmp.sune.s vd, vj, vk` instruction.  */
1947 static void __attribute__((unused))
1948 tcg_out_opc_vfcmp_sune_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1949 {
1950     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SUNE_S, vd, vj, vk));
1951 }
1952
1953 /* Emits the `vfcmp.caf.d vd, vj, vk` instruction.  */
1954 static void __attribute__((unused))
1955 tcg_out_opc_vfcmp_caf_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1956 {
1957     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CAF_D, vd, vj, vk));
1958 }
1959
1960 /* Emits the `vfcmp.saf.d vd, vj, vk` instruction.  */
1961 static void __attribute__((unused))
1962 tcg_out_opc_vfcmp_saf_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1963 {
1964     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SAF_D, vd, vj, vk));
1965 }
1966
1967 /* Emits the `vfcmp.clt.d vd, vj, vk` instruction.  */
1968 static void __attribute__((unused))
1969 tcg_out_opc_vfcmp_clt_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1970 {
1971     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CLT_D, vd, vj, vk));
1972 }
1973
1974 /* Emits the `vfcmp.slt.d vd, vj, vk` instruction.  */
1975 static void __attribute__((unused))
1976 tcg_out_opc_vfcmp_slt_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1977 {
1978     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SLT_D, vd, vj, vk));
1979 }
1980
1981 /* Emits the `vfcmp.ceq.d vd, vj, vk` instruction.  */
1982 static void __attribute__((unused))
1983 tcg_out_opc_vfcmp_ceq_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1984 {
1985     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CEQ_D, vd, vj, vk));
1986 }
1987
1988 /* Emits the `vfcmp.seq.d vd, vj, vk` instruction.  */
1989 static void __attribute__((unused))
1990 tcg_out_opc_vfcmp_seq_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1991 {
1992     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SEQ_D, vd, vj, vk));
1993 }
1994
1995 /* Emits the `vfcmp.cle.d vd, vj, vk` instruction.  */
1996 static void __attribute__((unused))
1997 tcg_out_opc_vfcmp_cle_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
1998 {
1999     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CLE_D, vd, vj, vk));
2000 }
2001
2002 /* Emits the `vfcmp.sle.d vd, vj, vk` instruction.  */
2003 static void __attribute__((unused))
2004 tcg_out_opc_vfcmp_sle_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2005 {
2006     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SLE_D, vd, vj, vk));
2007 }
2008
2009 /* Emits the `vfcmp.cun.d vd, vj, vk` instruction.  */
2010 static void __attribute__((unused))
2011 tcg_out_opc_vfcmp_cun_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2012 {
2013     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CUN_D, vd, vj, vk));
2014 }
2015
2016 /* Emits the `vfcmp.sun.d vd, vj, vk` instruction.  */
2017 static void __attribute__((unused))
2018 tcg_out_opc_vfcmp_sun_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2019 {
2020     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SUN_D, vd, vj, vk));
2021 }
2022
2023 /* Emits the `vfcmp.cult.d vd, vj, vk` instruction.  */
2024 static void __attribute__((unused))
2025 tcg_out_opc_vfcmp_cult_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2026 {
2027     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CULT_D, vd, vj, vk));
2028 }
2029
2030 /* Emits the `vfcmp.sult.d vd, vj, vk` instruction.  */
2031 static void __attribute__((unused))
2032 tcg_out_opc_vfcmp_sult_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2033 {
2034     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SULT_D, vd, vj, vk));
2035 }
2036
2037 /* Emits the `vfcmp.cueq.d vd, vj, vk` instruction.  */
2038 static void __attribute__((unused))
2039 tcg_out_opc_vfcmp_cueq_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2040 {
2041     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CUEQ_D, vd, vj, vk));
2042 }
2043
2044 /* Emits the `vfcmp.sueq.d vd, vj, vk` instruction.  */
2045 static void __attribute__((unused))
2046 tcg_out_opc_vfcmp_sueq_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2047 {
2048     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SUEQ_D, vd, vj, vk));
2049 }
2050
2051 /* Emits the `vfcmp.cule.d vd, vj, vk` instruction.  */
2052 static void __attribute__((unused))
2053 tcg_out_opc_vfcmp_cule_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2054 {
2055     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CULE_D, vd, vj, vk));
2056 }
2057
2058 /* Emits the `vfcmp.sule.d vd, vj, vk` instruction.  */
2059 static void __attribute__((unused))
2060 tcg_out_opc_vfcmp_sule_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2061 {
2062     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SULE_D, vd, vj, vk));
2063 }
2064
2065 /* Emits the `vfcmp.cne.d vd, vj, vk` instruction.  */
2066 static void __attribute__((unused))
2067 tcg_out_opc_vfcmp_cne_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2068 {
2069     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CNE_D, vd, vj, vk));
2070 }
2071
2072 /* Emits the `vfcmp.sne.d vd, vj, vk` instruction.  */
2073 static void __attribute__((unused))
2074 tcg_out_opc_vfcmp_sne_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2075 {
2076     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SNE_D, vd, vj, vk));
2077 }
2078
2079 /* Emits the `vfcmp.cor.d vd, vj, vk` instruction.  */
2080 static void __attribute__((unused))
2081 tcg_out_opc_vfcmp_cor_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2082 {
2083     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_COR_D, vd, vj, vk));
2084 }
2085
2086 /* Emits the `vfcmp.sor.d vd, vj, vk` instruction.  */
2087 static void __attribute__((unused))
2088 tcg_out_opc_vfcmp_sor_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2089 {
2090     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SOR_D, vd, vj, vk));
2091 }
2092
2093 /* Emits the `vfcmp.cune.d vd, vj, vk` instruction.  */
2094 static void __attribute__((unused))
2095 tcg_out_opc_vfcmp_cune_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2096 {
2097     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_CUNE_D, vd, vj, vk));
2098 }
2099
2100 /* Emits the `vfcmp.sune.d vd, vj, vk` instruction.  */
2101 static void __attribute__((unused))
2102 tcg_out_opc_vfcmp_sune_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2103 {
2104     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCMP_SUNE_D, vd, vj, vk));
2105 }
2106
2107 /* Emits the `vbitsel.v vd, vj, vk, va` instruction.  */
2108 static void __attribute__((unused))
2109 tcg_out_opc_vbitsel_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
2110 {
2111     tcg_out32(s, encode_vdvjvkva_insn(OPC_VBITSEL_V, vd, vj, vk, va));
2112 }
2113
2114 /* Emits the `vshuf.b vd, vj, vk, va` instruction.  */
2115 static void __attribute__((unused))
2116 tcg_out_opc_vshuf_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
2117 {
2118     tcg_out32(s, encode_vdvjvkva_insn(OPC_VSHUF_B, vd, vj, vk, va));
2119 }
2120
2121 /* Emits the `addu16i.d d, j, sk16` instruction.  */
2122 static void __attribute__((unused))
2123 tcg_out_opc_addu16i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
2124 {
2125     tcg_out32(s, encode_djsk16_insn(OPC_ADDU16I_D, d, j, sk16));
2126 }
2127
2128 /* Emits the `lu12i.w d, sj20` instruction.  */
2129 static void __attribute__((unused))
2130 tcg_out_opc_lu12i_w(TCGContext *s, TCGReg d, int32_t sj20)
2131 {
2132     tcg_out32(s, encode_dsj20_insn(OPC_LU12I_W, d, sj20));
2133 }
2134
2135 /* Emits the `cu32i.d d, sj20` instruction.  */
2136 static void __attribute__((unused))
2137 tcg_out_opc_cu32i_d(TCGContext *s, TCGReg d, int32_t sj20)
2138 {
2139     tcg_out32(s, encode_dsj20_insn(OPC_CU32I_D, d, sj20));
2140 }
2141
2142 /* Emits the `pcaddu2i d, sj20` instruction.  */
2143 static void __attribute__((unused))
2144 tcg_out_opc_pcaddu2i(TCGContext *s, TCGReg d, int32_t sj20)
2145 {
2146     tcg_out32(s, encode_dsj20_insn(OPC_PCADDU2I, d, sj20));
2147 }
2148
2149 /* Emits the `pcalau12i d, sj20` instruction.  */
2150 static void __attribute__((unused))
2151 tcg_out_opc_pcalau12i(TCGContext *s, TCGReg d, int32_t sj20)
2152 {
2153     tcg_out32(s, encode_dsj20_insn(OPC_PCALAU12I, d, sj20));
2154 }
2155
2156 /* Emits the `pcaddu12i d, sj20` instruction.  */
2157 static void __attribute__((unused))
2158 tcg_out_opc_pcaddu12i(TCGContext *s, TCGReg d, int32_t sj20)
2159 {
2160     tcg_out32(s, encode_dsj20_insn(OPC_PCADDU12I, d, sj20));
2161 }
2162
2163 /* Emits the `pcaddu18i d, sj20` instruction.  */
2164 static void __attribute__((unused))
2165 tcg_out_opc_pcaddu18i(TCGContext *s, TCGReg d, int32_t sj20)
2166 {
2167     tcg_out32(s, encode_dsj20_insn(OPC_PCADDU18I, d, sj20));
2168 }
2169
2170 /* Emits the `ld.b d, j, sk12` instruction.  */
2171 static void __attribute__((unused))
2172 tcg_out_opc_ld_b(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
2173 {
2174     tcg_out32(s, encode_djsk12_insn(OPC_LD_B, d, j, sk12));
2175 }
2176
2177 /* Emits the `ld.h d, j, sk12` instruction.  */
2178 static void __attribute__((unused))
2179 tcg_out_opc_ld_h(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
2180 {
2181     tcg_out32(s, encode_djsk12_insn(OPC_LD_H, d, j, sk12));
2182 }
2183
2184 /* Emits the `ld.w d, j, sk12` instruction.  */
2185 static void __attribute__((unused))
2186 tcg_out_opc_ld_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
2187 {
2188     tcg_out32(s, encode_djsk12_insn(OPC_LD_W, d, j, sk12));
2189 }
2190
2191 /* Emits the `ld.d d, j, sk12` instruction.  */
2192 static void __attribute__((unused))
2193 tcg_out_opc_ld_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
2194 {
2195     tcg_out32(s, encode_djsk12_insn(OPC_LD_D, d, j, sk12));
2196 }
2197
2198 /* Emits the `st.b d, j, sk12` instruction.  */
2199 static void __attribute__((unused))
2200 tcg_out_opc_st_b(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
2201 {
2202     tcg_out32(s, encode_djsk12_insn(OPC_ST_B, d, j, sk12));
2203 }
2204
2205 /* Emits the `st.h d, j, sk12` instruction.  */
2206 static void __attribute__((unused))
2207 tcg_out_opc_st_h(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
2208 {
2209     tcg_out32(s, encode_djsk12_insn(OPC_ST_H, d, j, sk12));
2210 }
2211
2212 /* Emits the `st.w d, j, sk12` instruction.  */
2213 static void __attribute__((unused))
2214 tcg_out_opc_st_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
2215 {
2216     tcg_out32(s, encode_djsk12_insn(OPC_ST_W, d, j, sk12));
2217 }
2218
2219 /* Emits the `st.d d, j, sk12` instruction.  */
2220 static void __attribute__((unused))
2221 tcg_out_opc_st_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
2222 {
2223     tcg_out32(s, encode_djsk12_insn(OPC_ST_D, d, j, sk12));
2224 }
2225
2226 /* Emits the `ld.bu d, j, sk12` instruction.  */
2227 static void __attribute__((unused))
2228 tcg_out_opc_ld_bu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
2229 {
2230     tcg_out32(s, encode_djsk12_insn(OPC_LD_BU, d, j, sk12));
2231 }
2232
2233 /* Emits the `ld.hu d, j, sk12` instruction.  */
2234 static void __attribute__((unused))
2235 tcg_out_opc_ld_hu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
2236 {
2237     tcg_out32(s, encode_djsk12_insn(OPC_LD_HU, d, j, sk12));
2238 }
2239
2240 /* Emits the `ld.wu d, j, sk12` instruction.  */
2241 static void __attribute__((unused))
2242 tcg_out_opc_ld_wu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
2243 {
2244     tcg_out32(s, encode_djsk12_insn(OPC_LD_WU, d, j, sk12));
2245 }
2246
2247 /* Emits the `vld vd, j, sk12` instruction.  */
2248 static void __attribute__((unused))
2249 tcg_out_opc_vld(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk12)
2250 {
2251     tcg_out32(s, encode_vdjsk12_insn(OPC_VLD, vd, j, sk12));
2252 }
2253
2254 /* Emits the `vst vd, j, sk12` instruction.  */
2255 static void __attribute__((unused))
2256 tcg_out_opc_vst(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk12)
2257 {
2258     tcg_out32(s, encode_vdjsk12_insn(OPC_VST, vd, j, sk12));
2259 }
2260
2261 /* Emits the `vldrepl.d vd, j, sk9` instruction.  */
2262 static void __attribute__((unused))
2263 tcg_out_opc_vldrepl_d(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk9)
2264 {
2265     tcg_out32(s, encode_vdjsk9_insn(OPC_VLDREPL_D, vd, j, sk9));
2266 }
2267
2268 /* Emits the `vldrepl.w vd, j, sk10` instruction.  */
2269 static void __attribute__((unused))
2270 tcg_out_opc_vldrepl_w(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk10)
2271 {
2272     tcg_out32(s, encode_vdjsk10_insn(OPC_VLDREPL_W, vd, j, sk10));
2273 }
2274
2275 /* Emits the `vldrepl.h vd, j, sk11` instruction.  */
2276 static void __attribute__((unused))
2277 tcg_out_opc_vldrepl_h(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk11)
2278 {
2279     tcg_out32(s, encode_vdjsk11_insn(OPC_VLDREPL_H, vd, j, sk11));
2280 }
2281
2282 /* Emits the `vldrepl.b vd, j, sk12` instruction.  */
2283 static void __attribute__((unused))
2284 tcg_out_opc_vldrepl_b(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk12)
2285 {
2286     tcg_out32(s, encode_vdjsk12_insn(OPC_VLDREPL_B, vd, j, sk12));
2287 }
2288
2289 /* Emits the `vstelm.d vd, j, sk8, un1` instruction.  */
2290 static void __attribute__((unused))
2291 tcg_out_opc_vstelm_d(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk8,
2292                      uint32_t un1)
2293 {
2294     tcg_out32(s, encode_vdjsk8un1_insn(OPC_VSTELM_D, vd, j, sk8, un1));
2295 }
2296
2297 /* Emits the `vstelm.w vd, j, sk8, un2` instruction.  */
2298 static void __attribute__((unused))
2299 tcg_out_opc_vstelm_w(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk8,
2300                      uint32_t un2)
2301 {
2302     tcg_out32(s, encode_vdjsk8un2_insn(OPC_VSTELM_W, vd, j, sk8, un2));
2303 }
2304
2305 /* Emits the `vstelm.h vd, j, sk8, un3` instruction.  */
2306 static void __attribute__((unused))
2307 tcg_out_opc_vstelm_h(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk8,
2308                      uint32_t un3)
2309 {
2310     tcg_out32(s, encode_vdjsk8un3_insn(OPC_VSTELM_H, vd, j, sk8, un3));
2311 }
2312
2313 /* Emits the `vstelm.b vd, j, sk8, un4` instruction.  */
2314 static void __attribute__((unused))
2315 tcg_out_opc_vstelm_b(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk8,
2316                      uint32_t un4)
2317 {
2318     tcg_out32(s, encode_vdjsk8un4_insn(OPC_VSTELM_B, vd, j, sk8, un4));
2319 }
2320
2321 /* Emits the `ldx.b d, j, k` instruction.  */
2322 static void __attribute__((unused))
2323 tcg_out_opc_ldx_b(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
2324 {
2325     tcg_out32(s, encode_djk_insn(OPC_LDX_B, d, j, k));
2326 }
2327
2328 /* Emits the `ldx.h d, j, k` instruction.  */
2329 static void __attribute__((unused))
2330 tcg_out_opc_ldx_h(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
2331 {
2332     tcg_out32(s, encode_djk_insn(OPC_LDX_H, d, j, k));
2333 }
2334
2335 /* Emits the `ldx.w d, j, k` instruction.  */
2336 static void __attribute__((unused))
2337 tcg_out_opc_ldx_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
2338 {
2339     tcg_out32(s, encode_djk_insn(OPC_LDX_W, d, j, k));
2340 }
2341
2342 /* Emits the `ldx.d d, j, k` instruction.  */
2343 static void __attribute__((unused))
2344 tcg_out_opc_ldx_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
2345 {
2346     tcg_out32(s, encode_djk_insn(OPC_LDX_D, d, j, k));
2347 }
2348
2349 /* Emits the `stx.b d, j, k` instruction.  */
2350 static void __attribute__((unused))
2351 tcg_out_opc_stx_b(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
2352 {
2353     tcg_out32(s, encode_djk_insn(OPC_STX_B, d, j, k));
2354 }
2355
2356 /* Emits the `stx.h d, j, k` instruction.  */
2357 static void __attribute__((unused))
2358 tcg_out_opc_stx_h(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
2359 {
2360     tcg_out32(s, encode_djk_insn(OPC_STX_H, d, j, k));
2361 }
2362
2363 /* Emits the `stx.w d, j, k` instruction.  */
2364 static void __attribute__((unused))
2365 tcg_out_opc_stx_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
2366 {
2367     tcg_out32(s, encode_djk_insn(OPC_STX_W, d, j, k));
2368 }
2369
2370 /* Emits the `stx.d d, j, k` instruction.  */
2371 static void __attribute__((unused))
2372 tcg_out_opc_stx_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
2373 {
2374     tcg_out32(s, encode_djk_insn(OPC_STX_D, d, j, k));
2375 }
2376
2377 /* Emits the `ldx.bu d, j, k` instruction.  */
2378 static void __attribute__((unused))
2379 tcg_out_opc_ldx_bu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
2380 {
2381     tcg_out32(s, encode_djk_insn(OPC_LDX_BU, d, j, k));
2382 }
2383
2384 /* Emits the `ldx.hu d, j, k` instruction.  */
2385 static void __attribute__((unused))
2386 tcg_out_opc_ldx_hu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
2387 {
2388     tcg_out32(s, encode_djk_insn(OPC_LDX_HU, d, j, k));
2389 }
2390
2391 /* Emits the `ldx.wu d, j, k` instruction.  */
2392 static void __attribute__((unused))
2393 tcg_out_opc_ldx_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
2394 {
2395     tcg_out32(s, encode_djk_insn(OPC_LDX_WU, d, j, k));
2396 }
2397
2398 /* Emits the `vldx vd, j, k` instruction.  */
2399 static void __attribute__((unused))
2400 tcg_out_opc_vldx(TCGContext *s, TCGReg vd, TCGReg j, TCGReg k)
2401 {
2402     tcg_out32(s, encode_vdjk_insn(OPC_VLDX, vd, j, k));
2403 }
2404
2405 /* Emits the `vstx vd, j, k` instruction.  */
2406 static void __attribute__((unused))
2407 tcg_out_opc_vstx(TCGContext *s, TCGReg vd, TCGReg j, TCGReg k)
2408 {
2409     tcg_out32(s, encode_vdjk_insn(OPC_VSTX, vd, j, k));
2410 }
2411
2412 /* Emits the `dbar ud15` instruction.  */
2413 static void __attribute__((unused))
2414 tcg_out_opc_dbar(TCGContext *s, uint32_t ud15)
2415 {
2416     tcg_out32(s, encode_ud15_insn(OPC_DBAR, ud15));
2417 }
2418
2419 /* Emits the `jirl d, j, sk16` instruction.  */
2420 static void __attribute__((unused))
2421 tcg_out_opc_jirl(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
2422 {
2423     tcg_out32(s, encode_djsk16_insn(OPC_JIRL, d, j, sk16));
2424 }
2425
2426 /* Emits the `b sd10k16` instruction.  */
2427 static void __attribute__((unused))
2428 tcg_out_opc_b(TCGContext *s, int32_t sd10k16)
2429 {
2430     tcg_out32(s, encode_sd10k16_insn(OPC_B, sd10k16));
2431 }
2432
2433 /* Emits the `bl sd10k16` instruction.  */
2434 static void __attribute__((unused))
2435 tcg_out_opc_bl(TCGContext *s, int32_t sd10k16)
2436 {
2437     tcg_out32(s, encode_sd10k16_insn(OPC_BL, sd10k16));
2438 }
2439
2440 /* Emits the `beq d, j, sk16` instruction.  */
2441 static void __attribute__((unused))
2442 tcg_out_opc_beq(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
2443 {
2444     tcg_out32(s, encode_djsk16_insn(OPC_BEQ, d, j, sk16));
2445 }
2446
2447 /* Emits the `bne d, j, sk16` instruction.  */
2448 static void __attribute__((unused))
2449 tcg_out_opc_bne(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
2450 {
2451     tcg_out32(s, encode_djsk16_insn(OPC_BNE, d, j, sk16));
2452 }
2453
2454 /* Emits the `bgt d, j, sk16` instruction.  */
2455 static void __attribute__((unused))
2456 tcg_out_opc_bgt(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
2457 {
2458     tcg_out32(s, encode_djsk16_insn(OPC_BGT, d, j, sk16));
2459 }
2460
2461 /* Emits the `ble d, j, sk16` instruction.  */
2462 static void __attribute__((unused))
2463 tcg_out_opc_ble(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
2464 {
2465     tcg_out32(s, encode_djsk16_insn(OPC_BLE, d, j, sk16));
2466 }
2467
2468 /* Emits the `bgtu d, j, sk16` instruction.  */
2469 static void __attribute__((unused))
2470 tcg_out_opc_bgtu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
2471 {
2472     tcg_out32(s, encode_djsk16_insn(OPC_BGTU, d, j, sk16));
2473 }
2474
2475 /* Emits the `bleu d, j, sk16` instruction.  */
2476 static void __attribute__((unused))
2477 tcg_out_opc_bleu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
2478 {
2479     tcg_out32(s, encode_djsk16_insn(OPC_BLEU, d, j, sk16));
2480 }
2481
2482 /* Emits the `vseq.b vd, vj, vk` instruction.  */
2483 static void __attribute__((unused))
2484 tcg_out_opc_vseq_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2485 {
2486     tcg_out32(s, encode_vdvjvk_insn(OPC_VSEQ_B, vd, vj, vk));
2487 }
2488
2489 /* Emits the `vseq.h vd, vj, vk` instruction.  */
2490 static void __attribute__((unused))
2491 tcg_out_opc_vseq_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2492 {
2493     tcg_out32(s, encode_vdvjvk_insn(OPC_VSEQ_H, vd, vj, vk));
2494 }
2495
2496 /* Emits the `vseq.w vd, vj, vk` instruction.  */
2497 static void __attribute__((unused))
2498 tcg_out_opc_vseq_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2499 {
2500     tcg_out32(s, encode_vdvjvk_insn(OPC_VSEQ_W, vd, vj, vk));
2501 }
2502
2503 /* Emits the `vseq.d vd, vj, vk` instruction.  */
2504 static void __attribute__((unused))
2505 tcg_out_opc_vseq_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2506 {
2507     tcg_out32(s, encode_vdvjvk_insn(OPC_VSEQ_D, vd, vj, vk));
2508 }
2509
2510 /* Emits the `vsle.b vd, vj, vk` instruction.  */
2511 static void __attribute__((unused))
2512 tcg_out_opc_vsle_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2513 {
2514     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_B, vd, vj, vk));
2515 }
2516
2517 /* Emits the `vsle.h vd, vj, vk` instruction.  */
2518 static void __attribute__((unused))
2519 tcg_out_opc_vsle_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2520 {
2521     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_H, vd, vj, vk));
2522 }
2523
2524 /* Emits the `vsle.w vd, vj, vk` instruction.  */
2525 static void __attribute__((unused))
2526 tcg_out_opc_vsle_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2527 {
2528     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_W, vd, vj, vk));
2529 }
2530
2531 /* Emits the `vsle.d vd, vj, vk` instruction.  */
2532 static void __attribute__((unused))
2533 tcg_out_opc_vsle_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2534 {
2535     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_D, vd, vj, vk));
2536 }
2537
2538 /* Emits the `vsle.bu vd, vj, vk` instruction.  */
2539 static void __attribute__((unused))
2540 tcg_out_opc_vsle_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2541 {
2542     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_BU, vd, vj, vk));
2543 }
2544
2545 /* Emits the `vsle.hu vd, vj, vk` instruction.  */
2546 static void __attribute__((unused))
2547 tcg_out_opc_vsle_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2548 {
2549     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_HU, vd, vj, vk));
2550 }
2551
2552 /* Emits the `vsle.wu vd, vj, vk` instruction.  */
2553 static void __attribute__((unused))
2554 tcg_out_opc_vsle_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2555 {
2556     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_WU, vd, vj, vk));
2557 }
2558
2559 /* Emits the `vsle.du vd, vj, vk` instruction.  */
2560 static void __attribute__((unused))
2561 tcg_out_opc_vsle_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2562 {
2563     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_DU, vd, vj, vk));
2564 }
2565
2566 /* Emits the `vslt.b vd, vj, vk` instruction.  */
2567 static void __attribute__((unused))
2568 tcg_out_opc_vslt_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2569 {
2570     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_B, vd, vj, vk));
2571 }
2572
2573 /* Emits the `vslt.h vd, vj, vk` instruction.  */
2574 static void __attribute__((unused))
2575 tcg_out_opc_vslt_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2576 {
2577     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_H, vd, vj, vk));
2578 }
2579
2580 /* Emits the `vslt.w vd, vj, vk` instruction.  */
2581 static void __attribute__((unused))
2582 tcg_out_opc_vslt_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2583 {
2584     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_W, vd, vj, vk));
2585 }
2586
2587 /* Emits the `vslt.d vd, vj, vk` instruction.  */
2588 static void __attribute__((unused))
2589 tcg_out_opc_vslt_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2590 {
2591     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_D, vd, vj, vk));
2592 }
2593
2594 /* Emits the `vslt.bu vd, vj, vk` instruction.  */
2595 static void __attribute__((unused))
2596 tcg_out_opc_vslt_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2597 {
2598     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_BU, vd, vj, vk));
2599 }
2600
2601 /* Emits the `vslt.hu vd, vj, vk` instruction.  */
2602 static void __attribute__((unused))
2603 tcg_out_opc_vslt_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2604 {
2605     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_HU, vd, vj, vk));
2606 }
2607
2608 /* Emits the `vslt.wu vd, vj, vk` instruction.  */
2609 static void __attribute__((unused))
2610 tcg_out_opc_vslt_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2611 {
2612     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_WU, vd, vj, vk));
2613 }
2614
2615 /* Emits the `vslt.du vd, vj, vk` instruction.  */
2616 static void __attribute__((unused))
2617 tcg_out_opc_vslt_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2618 {
2619     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_DU, vd, vj, vk));
2620 }
2621
2622 /* Emits the `vadd.b vd, vj, vk` instruction.  */
2623 static void __attribute__((unused))
2624 tcg_out_opc_vadd_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2625 {
2626     tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_B, vd, vj, vk));
2627 }
2628
2629 /* Emits the `vadd.h vd, vj, vk` instruction.  */
2630 static void __attribute__((unused))
2631 tcg_out_opc_vadd_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2632 {
2633     tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_H, vd, vj, vk));
2634 }
2635
2636 /* Emits the `vadd.w vd, vj, vk` instruction.  */
2637 static void __attribute__((unused))
2638 tcg_out_opc_vadd_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2639 {
2640     tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_W, vd, vj, vk));
2641 }
2642
2643 /* Emits the `vadd.d vd, vj, vk` instruction.  */
2644 static void __attribute__((unused))
2645 tcg_out_opc_vadd_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2646 {
2647     tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_D, vd, vj, vk));
2648 }
2649
2650 /* Emits the `vsub.b vd, vj, vk` instruction.  */
2651 static void __attribute__((unused))
2652 tcg_out_opc_vsub_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2653 {
2654     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_B, vd, vj, vk));
2655 }
2656
2657 /* Emits the `vsub.h vd, vj, vk` instruction.  */
2658 static void __attribute__((unused))
2659 tcg_out_opc_vsub_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2660 {
2661     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_H, vd, vj, vk));
2662 }
2663
2664 /* Emits the `vsub.w vd, vj, vk` instruction.  */
2665 static void __attribute__((unused))
2666 tcg_out_opc_vsub_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2667 {
2668     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_W, vd, vj, vk));
2669 }
2670
2671 /* Emits the `vsub.d vd, vj, vk` instruction.  */
2672 static void __attribute__((unused))
2673 tcg_out_opc_vsub_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2674 {
2675     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_D, vd, vj, vk));
2676 }
2677
2678 /* Emits the `vaddwev.h.b vd, vj, vk` instruction.  */
2679 static void __attribute__((unused))
2680 tcg_out_opc_vaddwev_h_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2681 {
2682     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWEV_H_B, vd, vj, vk));
2683 }
2684
2685 /* Emits the `vaddwev.w.h vd, vj, vk` instruction.  */
2686 static void __attribute__((unused))
2687 tcg_out_opc_vaddwev_w_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2688 {
2689     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWEV_W_H, vd, vj, vk));
2690 }
2691
2692 /* Emits the `vaddwev.d.w vd, vj, vk` instruction.  */
2693 static void __attribute__((unused))
2694 tcg_out_opc_vaddwev_d_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2695 {
2696     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWEV_D_W, vd, vj, vk));
2697 }
2698
2699 /* Emits the `vaddwev.q.d vd, vj, vk` instruction.  */
2700 static void __attribute__((unused))
2701 tcg_out_opc_vaddwev_q_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2702 {
2703     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWEV_Q_D, vd, vj, vk));
2704 }
2705
2706 /* Emits the `vsubwev.h.b vd, vj, vk` instruction.  */
2707 static void __attribute__((unused))
2708 tcg_out_opc_vsubwev_h_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2709 {
2710     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWEV_H_B, vd, vj, vk));
2711 }
2712
2713 /* Emits the `vsubwev.w.h vd, vj, vk` instruction.  */
2714 static void __attribute__((unused))
2715 tcg_out_opc_vsubwev_w_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2716 {
2717     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWEV_W_H, vd, vj, vk));
2718 }
2719
2720 /* Emits the `vsubwev.d.w vd, vj, vk` instruction.  */
2721 static void __attribute__((unused))
2722 tcg_out_opc_vsubwev_d_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2723 {
2724     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWEV_D_W, vd, vj, vk));
2725 }
2726
2727 /* Emits the `vsubwev.q.d vd, vj, vk` instruction.  */
2728 static void __attribute__((unused))
2729 tcg_out_opc_vsubwev_q_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2730 {
2731     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWEV_Q_D, vd, vj, vk));
2732 }
2733
2734 /* Emits the `vaddwod.h.b vd, vj, vk` instruction.  */
2735 static void __attribute__((unused))
2736 tcg_out_opc_vaddwod_h_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2737 {
2738     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWOD_H_B, vd, vj, vk));
2739 }
2740
2741 /* Emits the `vaddwod.w.h vd, vj, vk` instruction.  */
2742 static void __attribute__((unused))
2743 tcg_out_opc_vaddwod_w_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2744 {
2745     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWOD_W_H, vd, vj, vk));
2746 }
2747
2748 /* Emits the `vaddwod.d.w vd, vj, vk` instruction.  */
2749 static void __attribute__((unused))
2750 tcg_out_opc_vaddwod_d_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2751 {
2752     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWOD_D_W, vd, vj, vk));
2753 }
2754
2755 /* Emits the `vaddwod.q.d vd, vj, vk` instruction.  */
2756 static void __attribute__((unused))
2757 tcg_out_opc_vaddwod_q_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2758 {
2759     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWOD_Q_D, vd, vj, vk));
2760 }
2761
2762 /* Emits the `vsubwod.h.b vd, vj, vk` instruction.  */
2763 static void __attribute__((unused))
2764 tcg_out_opc_vsubwod_h_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2765 {
2766     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWOD_H_B, vd, vj, vk));
2767 }
2768
2769 /* Emits the `vsubwod.w.h vd, vj, vk` instruction.  */
2770 static void __attribute__((unused))
2771 tcg_out_opc_vsubwod_w_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2772 {
2773     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWOD_W_H, vd, vj, vk));
2774 }
2775
2776 /* Emits the `vsubwod.d.w vd, vj, vk` instruction.  */
2777 static void __attribute__((unused))
2778 tcg_out_opc_vsubwod_d_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2779 {
2780     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWOD_D_W, vd, vj, vk));
2781 }
2782
2783 /* Emits the `vsubwod.q.d vd, vj, vk` instruction.  */
2784 static void __attribute__((unused))
2785 tcg_out_opc_vsubwod_q_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2786 {
2787     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWOD_Q_D, vd, vj, vk));
2788 }
2789
2790 /* Emits the `vaddwev.h.bu vd, vj, vk` instruction.  */
2791 static void __attribute__((unused))
2792 tcg_out_opc_vaddwev_h_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2793 {
2794     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWEV_H_BU, vd, vj, vk));
2795 }
2796
2797 /* Emits the `vaddwev.w.hu vd, vj, vk` instruction.  */
2798 static void __attribute__((unused))
2799 tcg_out_opc_vaddwev_w_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2800 {
2801     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWEV_W_HU, vd, vj, vk));
2802 }
2803
2804 /* Emits the `vaddwev.d.wu vd, vj, vk` instruction.  */
2805 static void __attribute__((unused))
2806 tcg_out_opc_vaddwev_d_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2807 {
2808     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWEV_D_WU, vd, vj, vk));
2809 }
2810
2811 /* Emits the `vaddwev.q.du vd, vj, vk` instruction.  */
2812 static void __attribute__((unused))
2813 tcg_out_opc_vaddwev_q_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2814 {
2815     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWEV_Q_DU, vd, vj, vk));
2816 }
2817
2818 /* Emits the `vsubwev.h.bu vd, vj, vk` instruction.  */
2819 static void __attribute__((unused))
2820 tcg_out_opc_vsubwev_h_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2821 {
2822     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWEV_H_BU, vd, vj, vk));
2823 }
2824
2825 /* Emits the `vsubwev.w.hu vd, vj, vk` instruction.  */
2826 static void __attribute__((unused))
2827 tcg_out_opc_vsubwev_w_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2828 {
2829     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWEV_W_HU, vd, vj, vk));
2830 }
2831
2832 /* Emits the `vsubwev.d.wu vd, vj, vk` instruction.  */
2833 static void __attribute__((unused))
2834 tcg_out_opc_vsubwev_d_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2835 {
2836     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWEV_D_WU, vd, vj, vk));
2837 }
2838
2839 /* Emits the `vsubwev.q.du vd, vj, vk` instruction.  */
2840 static void __attribute__((unused))
2841 tcg_out_opc_vsubwev_q_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2842 {
2843     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWEV_Q_DU, vd, vj, vk));
2844 }
2845
2846 /* Emits the `vaddwod.h.bu vd, vj, vk` instruction.  */
2847 static void __attribute__((unused))
2848 tcg_out_opc_vaddwod_h_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2849 {
2850     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWOD_H_BU, vd, vj, vk));
2851 }
2852
2853 /* Emits the `vaddwod.w.hu vd, vj, vk` instruction.  */
2854 static void __attribute__((unused))
2855 tcg_out_opc_vaddwod_w_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2856 {
2857     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWOD_W_HU, vd, vj, vk));
2858 }
2859
2860 /* Emits the `vaddwod.d.wu vd, vj, vk` instruction.  */
2861 static void __attribute__((unused))
2862 tcg_out_opc_vaddwod_d_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2863 {
2864     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWOD_D_WU, vd, vj, vk));
2865 }
2866
2867 /* Emits the `vaddwod.q.du vd, vj, vk` instruction.  */
2868 static void __attribute__((unused))
2869 tcg_out_opc_vaddwod_q_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2870 {
2871     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWOD_Q_DU, vd, vj, vk));
2872 }
2873
2874 /* Emits the `vsubwod.h.bu vd, vj, vk` instruction.  */
2875 static void __attribute__((unused))
2876 tcg_out_opc_vsubwod_h_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2877 {
2878     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWOD_H_BU, vd, vj, vk));
2879 }
2880
2881 /* Emits the `vsubwod.w.hu vd, vj, vk` instruction.  */
2882 static void __attribute__((unused))
2883 tcg_out_opc_vsubwod_w_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2884 {
2885     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWOD_W_HU, vd, vj, vk));
2886 }
2887
2888 /* Emits the `vsubwod.d.wu vd, vj, vk` instruction.  */
2889 static void __attribute__((unused))
2890 tcg_out_opc_vsubwod_d_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2891 {
2892     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWOD_D_WU, vd, vj, vk));
2893 }
2894
2895 /* Emits the `vsubwod.q.du vd, vj, vk` instruction.  */
2896 static void __attribute__((unused))
2897 tcg_out_opc_vsubwod_q_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2898 {
2899     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUBWOD_Q_DU, vd, vj, vk));
2900 }
2901
2902 /* Emits the `vaddwev.h.bu.b vd, vj, vk` instruction.  */
2903 static void __attribute__((unused))
2904 tcg_out_opc_vaddwev_h_bu_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2905 {
2906     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWEV_H_BU_B, vd, vj, vk));
2907 }
2908
2909 /* Emits the `vaddwev.w.hu.h vd, vj, vk` instruction.  */
2910 static void __attribute__((unused))
2911 tcg_out_opc_vaddwev_w_hu_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2912 {
2913     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWEV_W_HU_H, vd, vj, vk));
2914 }
2915
2916 /* Emits the `vaddwev.d.wu.w vd, vj, vk` instruction.  */
2917 static void __attribute__((unused))
2918 tcg_out_opc_vaddwev_d_wu_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2919 {
2920     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWEV_D_WU_W, vd, vj, vk));
2921 }
2922
2923 /* Emits the `vaddwev.q.du.d vd, vj, vk` instruction.  */
2924 static void __attribute__((unused))
2925 tcg_out_opc_vaddwev_q_du_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2926 {
2927     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWEV_Q_DU_D, vd, vj, vk));
2928 }
2929
2930 /* Emits the `vaddwod.h.bu.b vd, vj, vk` instruction.  */
2931 static void __attribute__((unused))
2932 tcg_out_opc_vaddwod_h_bu_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2933 {
2934     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWOD_H_BU_B, vd, vj, vk));
2935 }
2936
2937 /* Emits the `vaddwod.w.hu.h vd, vj, vk` instruction.  */
2938 static void __attribute__((unused))
2939 tcg_out_opc_vaddwod_w_hu_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2940 {
2941     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWOD_W_HU_H, vd, vj, vk));
2942 }
2943
2944 /* Emits the `vaddwod.d.wu.w vd, vj, vk` instruction.  */
2945 static void __attribute__((unused))
2946 tcg_out_opc_vaddwod_d_wu_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2947 {
2948     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWOD_D_WU_W, vd, vj, vk));
2949 }
2950
2951 /* Emits the `vaddwod.q.du.d vd, vj, vk` instruction.  */
2952 static void __attribute__((unused))
2953 tcg_out_opc_vaddwod_q_du_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2954 {
2955     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDWOD_Q_DU_D, vd, vj, vk));
2956 }
2957
2958 /* Emits the `vsadd.b vd, vj, vk` instruction.  */
2959 static void __attribute__((unused))
2960 tcg_out_opc_vsadd_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2961 {
2962     tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_B, vd, vj, vk));
2963 }
2964
2965 /* Emits the `vsadd.h vd, vj, vk` instruction.  */
2966 static void __attribute__((unused))
2967 tcg_out_opc_vsadd_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2968 {
2969     tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_H, vd, vj, vk));
2970 }
2971
2972 /* Emits the `vsadd.w vd, vj, vk` instruction.  */
2973 static void __attribute__((unused))
2974 tcg_out_opc_vsadd_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2975 {
2976     tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_W, vd, vj, vk));
2977 }
2978
2979 /* Emits the `vsadd.d vd, vj, vk` instruction.  */
2980 static void __attribute__((unused))
2981 tcg_out_opc_vsadd_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2982 {
2983     tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_D, vd, vj, vk));
2984 }
2985
2986 /* Emits the `vssub.b vd, vj, vk` instruction.  */
2987 static void __attribute__((unused))
2988 tcg_out_opc_vssub_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2989 {
2990     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_B, vd, vj, vk));
2991 }
2992
2993 /* Emits the `vssub.h vd, vj, vk` instruction.  */
2994 static void __attribute__((unused))
2995 tcg_out_opc_vssub_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2996 {
2997     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_H, vd, vj, vk));
2998 }
2999
3000 /* Emits the `vssub.w vd, vj, vk` instruction.  */
3001 static void __attribute__((unused))
3002 tcg_out_opc_vssub_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3003 {
3004     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_W, vd, vj, vk));
3005 }
3006
3007 /* Emits the `vssub.d vd, vj, vk` instruction.  */
3008 static void __attribute__((unused))
3009 tcg_out_opc_vssub_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3010 {
3011     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_D, vd, vj, vk));
3012 }
3013
3014 /* Emits the `vsadd.bu vd, vj, vk` instruction.  */
3015 static void __attribute__((unused))
3016 tcg_out_opc_vsadd_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3017 {
3018     tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_BU, vd, vj, vk));
3019 }
3020
3021 /* Emits the `vsadd.hu vd, vj, vk` instruction.  */
3022 static void __attribute__((unused))
3023 tcg_out_opc_vsadd_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3024 {
3025     tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_HU, vd, vj, vk));
3026 }
3027
3028 /* Emits the `vsadd.wu vd, vj, vk` instruction.  */
3029 static void __attribute__((unused))
3030 tcg_out_opc_vsadd_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3031 {
3032     tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_WU, vd, vj, vk));
3033 }
3034
3035 /* Emits the `vsadd.du vd, vj, vk` instruction.  */
3036 static void __attribute__((unused))
3037 tcg_out_opc_vsadd_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3038 {
3039     tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_DU, vd, vj, vk));
3040 }
3041
3042 /* Emits the `vssub.bu vd, vj, vk` instruction.  */
3043 static void __attribute__((unused))
3044 tcg_out_opc_vssub_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3045 {
3046     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_BU, vd, vj, vk));
3047 }
3048
3049 /* Emits the `vssub.hu vd, vj, vk` instruction.  */
3050 static void __attribute__((unused))
3051 tcg_out_opc_vssub_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3052 {
3053     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_HU, vd, vj, vk));
3054 }
3055
3056 /* Emits the `vssub.wu vd, vj, vk` instruction.  */
3057 static void __attribute__((unused))
3058 tcg_out_opc_vssub_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3059 {
3060     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_WU, vd, vj, vk));
3061 }
3062
3063 /* Emits the `vssub.du vd, vj, vk` instruction.  */
3064 static void __attribute__((unused))
3065 tcg_out_opc_vssub_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3066 {
3067     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_DU, vd, vj, vk));
3068 }
3069
3070 /* Emits the `vhaddw.h.b vd, vj, vk` instruction.  */
3071 static void __attribute__((unused))
3072 tcg_out_opc_vhaddw_h_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3073 {
3074     tcg_out32(s, encode_vdvjvk_insn(OPC_VHADDW_H_B, vd, vj, vk));
3075 }
3076
3077 /* Emits the `vhaddw.w.h vd, vj, vk` instruction.  */
3078 static void __attribute__((unused))
3079 tcg_out_opc_vhaddw_w_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3080 {
3081     tcg_out32(s, encode_vdvjvk_insn(OPC_VHADDW_W_H, vd, vj, vk));
3082 }
3083
3084 /* Emits the `vhaddw.d.w vd, vj, vk` instruction.  */
3085 static void __attribute__((unused))
3086 tcg_out_opc_vhaddw_d_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3087 {
3088     tcg_out32(s, encode_vdvjvk_insn(OPC_VHADDW_D_W, vd, vj, vk));
3089 }
3090
3091 /* Emits the `vhaddw.q.d vd, vj, vk` instruction.  */
3092 static void __attribute__((unused))
3093 tcg_out_opc_vhaddw_q_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3094 {
3095     tcg_out32(s, encode_vdvjvk_insn(OPC_VHADDW_Q_D, vd, vj, vk));
3096 }
3097
3098 /* Emits the `vhsubw.h.b vd, vj, vk` instruction.  */
3099 static void __attribute__((unused))
3100 tcg_out_opc_vhsubw_h_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3101 {
3102     tcg_out32(s, encode_vdvjvk_insn(OPC_VHSUBW_H_B, vd, vj, vk));
3103 }
3104
3105 /* Emits the `vhsubw.w.h vd, vj, vk` instruction.  */
3106 static void __attribute__((unused))
3107 tcg_out_opc_vhsubw_w_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3108 {
3109     tcg_out32(s, encode_vdvjvk_insn(OPC_VHSUBW_W_H, vd, vj, vk));
3110 }
3111
3112 /* Emits the `vhsubw.d.w vd, vj, vk` instruction.  */
3113 static void __attribute__((unused))
3114 tcg_out_opc_vhsubw_d_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3115 {
3116     tcg_out32(s, encode_vdvjvk_insn(OPC_VHSUBW_D_W, vd, vj, vk));
3117 }
3118
3119 /* Emits the `vhsubw.q.d vd, vj, vk` instruction.  */
3120 static void __attribute__((unused))
3121 tcg_out_opc_vhsubw_q_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3122 {
3123     tcg_out32(s, encode_vdvjvk_insn(OPC_VHSUBW_Q_D, vd, vj, vk));
3124 }
3125
3126 /* Emits the `vhaddw.hu.bu vd, vj, vk` instruction.  */
3127 static void __attribute__((unused))
3128 tcg_out_opc_vhaddw_hu_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3129 {
3130     tcg_out32(s, encode_vdvjvk_insn(OPC_VHADDW_HU_BU, vd, vj, vk));
3131 }
3132
3133 /* Emits the `vhaddw.wu.hu vd, vj, vk` instruction.  */
3134 static void __attribute__((unused))
3135 tcg_out_opc_vhaddw_wu_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3136 {
3137     tcg_out32(s, encode_vdvjvk_insn(OPC_VHADDW_WU_HU, vd, vj, vk));
3138 }
3139
3140 /* Emits the `vhaddw.du.wu vd, vj, vk` instruction.  */
3141 static void __attribute__((unused))
3142 tcg_out_opc_vhaddw_du_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3143 {
3144     tcg_out32(s, encode_vdvjvk_insn(OPC_VHADDW_DU_WU, vd, vj, vk));
3145 }
3146
3147 /* Emits the `vhaddw.qu.du vd, vj, vk` instruction.  */
3148 static void __attribute__((unused))
3149 tcg_out_opc_vhaddw_qu_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3150 {
3151     tcg_out32(s, encode_vdvjvk_insn(OPC_VHADDW_QU_DU, vd, vj, vk));
3152 }
3153
3154 /* Emits the `vhsubw.hu.bu vd, vj, vk` instruction.  */
3155 static void __attribute__((unused))
3156 tcg_out_opc_vhsubw_hu_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3157 {
3158     tcg_out32(s, encode_vdvjvk_insn(OPC_VHSUBW_HU_BU, vd, vj, vk));
3159 }
3160
3161 /* Emits the `vhsubw.wu.hu vd, vj, vk` instruction.  */
3162 static void __attribute__((unused))
3163 tcg_out_opc_vhsubw_wu_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3164 {
3165     tcg_out32(s, encode_vdvjvk_insn(OPC_VHSUBW_WU_HU, vd, vj, vk));
3166 }
3167
3168 /* Emits the `vhsubw.du.wu vd, vj, vk` instruction.  */
3169 static void __attribute__((unused))
3170 tcg_out_opc_vhsubw_du_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3171 {
3172     tcg_out32(s, encode_vdvjvk_insn(OPC_VHSUBW_DU_WU, vd, vj, vk));
3173 }
3174
3175 /* Emits the `vhsubw.qu.du vd, vj, vk` instruction.  */
3176 static void __attribute__((unused))
3177 tcg_out_opc_vhsubw_qu_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3178 {
3179     tcg_out32(s, encode_vdvjvk_insn(OPC_VHSUBW_QU_DU, vd, vj, vk));
3180 }
3181
3182 /* Emits the `vadda.b vd, vj, vk` instruction.  */
3183 static void __attribute__((unused))
3184 tcg_out_opc_vadda_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3185 {
3186     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDA_B, vd, vj, vk));
3187 }
3188
3189 /* Emits the `vadda.h vd, vj, vk` instruction.  */
3190 static void __attribute__((unused))
3191 tcg_out_opc_vadda_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3192 {
3193     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDA_H, vd, vj, vk));
3194 }
3195
3196 /* Emits the `vadda.w vd, vj, vk` instruction.  */
3197 static void __attribute__((unused))
3198 tcg_out_opc_vadda_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3199 {
3200     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDA_W, vd, vj, vk));
3201 }
3202
3203 /* Emits the `vadda.d vd, vj, vk` instruction.  */
3204 static void __attribute__((unused))
3205 tcg_out_opc_vadda_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3206 {
3207     tcg_out32(s, encode_vdvjvk_insn(OPC_VADDA_D, vd, vj, vk));
3208 }
3209
3210 /* Emits the `vabsd.b vd, vj, vk` instruction.  */
3211 static void __attribute__((unused))
3212 tcg_out_opc_vabsd_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3213 {
3214     tcg_out32(s, encode_vdvjvk_insn(OPC_VABSD_B, vd, vj, vk));
3215 }
3216
3217 /* Emits the `vabsd.h vd, vj, vk` instruction.  */
3218 static void __attribute__((unused))
3219 tcg_out_opc_vabsd_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3220 {
3221     tcg_out32(s, encode_vdvjvk_insn(OPC_VABSD_H, vd, vj, vk));
3222 }
3223
3224 /* Emits the `vabsd.w vd, vj, vk` instruction.  */
3225 static void __attribute__((unused))
3226 tcg_out_opc_vabsd_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3227 {
3228     tcg_out32(s, encode_vdvjvk_insn(OPC_VABSD_W, vd, vj, vk));
3229 }
3230
3231 /* Emits the `vabsd.d vd, vj, vk` instruction.  */
3232 static void __attribute__((unused))
3233 tcg_out_opc_vabsd_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3234 {
3235     tcg_out32(s, encode_vdvjvk_insn(OPC_VABSD_D, vd, vj, vk));
3236 }
3237
3238 /* Emits the `vabsd.bu vd, vj, vk` instruction.  */
3239 static void __attribute__((unused))
3240 tcg_out_opc_vabsd_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3241 {
3242     tcg_out32(s, encode_vdvjvk_insn(OPC_VABSD_BU, vd, vj, vk));
3243 }
3244
3245 /* Emits the `vabsd.hu vd, vj, vk` instruction.  */
3246 static void __attribute__((unused))
3247 tcg_out_opc_vabsd_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3248 {
3249     tcg_out32(s, encode_vdvjvk_insn(OPC_VABSD_HU, vd, vj, vk));
3250 }
3251
3252 /* Emits the `vabsd.wu vd, vj, vk` instruction.  */
3253 static void __attribute__((unused))
3254 tcg_out_opc_vabsd_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3255 {
3256     tcg_out32(s, encode_vdvjvk_insn(OPC_VABSD_WU, vd, vj, vk));
3257 }
3258
3259 /* Emits the `vabsd.du vd, vj, vk` instruction.  */
3260 static void __attribute__((unused))
3261 tcg_out_opc_vabsd_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3262 {
3263     tcg_out32(s, encode_vdvjvk_insn(OPC_VABSD_DU, vd, vj, vk));
3264 }
3265
3266 /* Emits the `vavg.b vd, vj, vk` instruction.  */
3267 static void __attribute__((unused))
3268 tcg_out_opc_vavg_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3269 {
3270     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVG_B, vd, vj, vk));
3271 }
3272
3273 /* Emits the `vavg.h vd, vj, vk` instruction.  */
3274 static void __attribute__((unused))
3275 tcg_out_opc_vavg_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3276 {
3277     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVG_H, vd, vj, vk));
3278 }
3279
3280 /* Emits the `vavg.w vd, vj, vk` instruction.  */
3281 static void __attribute__((unused))
3282 tcg_out_opc_vavg_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3283 {
3284     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVG_W, vd, vj, vk));
3285 }
3286
3287 /* Emits the `vavg.d vd, vj, vk` instruction.  */
3288 static void __attribute__((unused))
3289 tcg_out_opc_vavg_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3290 {
3291     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVG_D, vd, vj, vk));
3292 }
3293
3294 /* Emits the `vavg.bu vd, vj, vk` instruction.  */
3295 static void __attribute__((unused))
3296 tcg_out_opc_vavg_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3297 {
3298     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVG_BU, vd, vj, vk));
3299 }
3300
3301 /* Emits the `vavg.hu vd, vj, vk` instruction.  */
3302 static void __attribute__((unused))
3303 tcg_out_opc_vavg_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3304 {
3305     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVG_HU, vd, vj, vk));
3306 }
3307
3308 /* Emits the `vavg.wu vd, vj, vk` instruction.  */
3309 static void __attribute__((unused))
3310 tcg_out_opc_vavg_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3311 {
3312     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVG_WU, vd, vj, vk));
3313 }
3314
3315 /* Emits the `vavg.du vd, vj, vk` instruction.  */
3316 static void __attribute__((unused))
3317 tcg_out_opc_vavg_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3318 {
3319     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVG_DU, vd, vj, vk));
3320 }
3321
3322 /* Emits the `vavgr.b vd, vj, vk` instruction.  */
3323 static void __attribute__((unused))
3324 tcg_out_opc_vavgr_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3325 {
3326     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVGR_B, vd, vj, vk));
3327 }
3328
3329 /* Emits the `vavgr.h vd, vj, vk` instruction.  */
3330 static void __attribute__((unused))
3331 tcg_out_opc_vavgr_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3332 {
3333     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVGR_H, vd, vj, vk));
3334 }
3335
3336 /* Emits the `vavgr.w vd, vj, vk` instruction.  */
3337 static void __attribute__((unused))
3338 tcg_out_opc_vavgr_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3339 {
3340     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVGR_W, vd, vj, vk));
3341 }
3342
3343 /* Emits the `vavgr.d vd, vj, vk` instruction.  */
3344 static void __attribute__((unused))
3345 tcg_out_opc_vavgr_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3346 {
3347     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVGR_D, vd, vj, vk));
3348 }
3349
3350 /* Emits the `vavgr.bu vd, vj, vk` instruction.  */
3351 static void __attribute__((unused))
3352 tcg_out_opc_vavgr_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3353 {
3354     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVGR_BU, vd, vj, vk));
3355 }
3356
3357 /* Emits the `vavgr.hu vd, vj, vk` instruction.  */
3358 static void __attribute__((unused))
3359 tcg_out_opc_vavgr_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3360 {
3361     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVGR_HU, vd, vj, vk));
3362 }
3363
3364 /* Emits the `vavgr.wu vd, vj, vk` instruction.  */
3365 static void __attribute__((unused))
3366 tcg_out_opc_vavgr_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3367 {
3368     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVGR_WU, vd, vj, vk));
3369 }
3370
3371 /* Emits the `vavgr.du vd, vj, vk` instruction.  */
3372 static void __attribute__((unused))
3373 tcg_out_opc_vavgr_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3374 {
3375     tcg_out32(s, encode_vdvjvk_insn(OPC_VAVGR_DU, vd, vj, vk));
3376 }
3377
3378 /* Emits the `vmax.b vd, vj, vk` instruction.  */
3379 static void __attribute__((unused))
3380 tcg_out_opc_vmax_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3381 {
3382     tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_B, vd, vj, vk));
3383 }
3384
3385 /* Emits the `vmax.h vd, vj, vk` instruction.  */
3386 static void __attribute__((unused))
3387 tcg_out_opc_vmax_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3388 {
3389     tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_H, vd, vj, vk));
3390 }
3391
3392 /* Emits the `vmax.w vd, vj, vk` instruction.  */
3393 static void __attribute__((unused))
3394 tcg_out_opc_vmax_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3395 {
3396     tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_W, vd, vj, vk));
3397 }
3398
3399 /* Emits the `vmax.d vd, vj, vk` instruction.  */
3400 static void __attribute__((unused))
3401 tcg_out_opc_vmax_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3402 {
3403     tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_D, vd, vj, vk));
3404 }
3405
3406 /* Emits the `vmin.b vd, vj, vk` instruction.  */
3407 static void __attribute__((unused))
3408 tcg_out_opc_vmin_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3409 {
3410     tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_B, vd, vj, vk));
3411 }
3412
3413 /* Emits the `vmin.h vd, vj, vk` instruction.  */
3414 static void __attribute__((unused))
3415 tcg_out_opc_vmin_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3416 {
3417     tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_H, vd, vj, vk));
3418 }
3419
3420 /* Emits the `vmin.w vd, vj, vk` instruction.  */
3421 static void __attribute__((unused))
3422 tcg_out_opc_vmin_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3423 {
3424     tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_W, vd, vj, vk));
3425 }
3426
3427 /* Emits the `vmin.d vd, vj, vk` instruction.  */
3428 static void __attribute__((unused))
3429 tcg_out_opc_vmin_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3430 {
3431     tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_D, vd, vj, vk));
3432 }
3433
3434 /* Emits the `vmax.bu vd, vj, vk` instruction.  */
3435 static void __attribute__((unused))
3436 tcg_out_opc_vmax_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3437 {
3438     tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_BU, vd, vj, vk));
3439 }
3440
3441 /* Emits the `vmax.hu vd, vj, vk` instruction.  */
3442 static void __attribute__((unused))
3443 tcg_out_opc_vmax_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3444 {
3445     tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_HU, vd, vj, vk));
3446 }
3447
3448 /* Emits the `vmax.wu vd, vj, vk` instruction.  */
3449 static void __attribute__((unused))
3450 tcg_out_opc_vmax_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3451 {
3452     tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_WU, vd, vj, vk));
3453 }
3454
3455 /* Emits the `vmax.du vd, vj, vk` instruction.  */
3456 static void __attribute__((unused))
3457 tcg_out_opc_vmax_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3458 {
3459     tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_DU, vd, vj, vk));
3460 }
3461
3462 /* Emits the `vmin.bu vd, vj, vk` instruction.  */
3463 static void __attribute__((unused))
3464 tcg_out_opc_vmin_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3465 {
3466     tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_BU, vd, vj, vk));
3467 }
3468
3469 /* Emits the `vmin.hu vd, vj, vk` instruction.  */
3470 static void __attribute__((unused))
3471 tcg_out_opc_vmin_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3472 {
3473     tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_HU, vd, vj, vk));
3474 }
3475
3476 /* Emits the `vmin.wu vd, vj, vk` instruction.  */
3477 static void __attribute__((unused))
3478 tcg_out_opc_vmin_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3479 {
3480     tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_WU, vd, vj, vk));
3481 }
3482
3483 /* Emits the `vmin.du vd, vj, vk` instruction.  */
3484 static void __attribute__((unused))
3485 tcg_out_opc_vmin_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3486 {
3487     tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_DU, vd, vj, vk));
3488 }
3489
3490 /* Emits the `vmul.b vd, vj, vk` instruction.  */
3491 static void __attribute__((unused))
3492 tcg_out_opc_vmul_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3493 {
3494     tcg_out32(s, encode_vdvjvk_insn(OPC_VMUL_B, vd, vj, vk));
3495 }
3496
3497 /* Emits the `vmul.h vd, vj, vk` instruction.  */
3498 static void __attribute__((unused))
3499 tcg_out_opc_vmul_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3500 {
3501     tcg_out32(s, encode_vdvjvk_insn(OPC_VMUL_H, vd, vj, vk));
3502 }
3503
3504 /* Emits the `vmul.w vd, vj, vk` instruction.  */
3505 static void __attribute__((unused))
3506 tcg_out_opc_vmul_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3507 {
3508     tcg_out32(s, encode_vdvjvk_insn(OPC_VMUL_W, vd, vj, vk));
3509 }
3510
3511 /* Emits the `vmul.d vd, vj, vk` instruction.  */
3512 static void __attribute__((unused))
3513 tcg_out_opc_vmul_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3514 {
3515     tcg_out32(s, encode_vdvjvk_insn(OPC_VMUL_D, vd, vj, vk));
3516 }
3517
3518 /* Emits the `vmuh.b vd, vj, vk` instruction.  */
3519 static void __attribute__((unused))
3520 tcg_out_opc_vmuh_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3521 {
3522     tcg_out32(s, encode_vdvjvk_insn(OPC_VMUH_B, vd, vj, vk));
3523 }
3524
3525 /* Emits the `vmuh.h vd, vj, vk` instruction.  */
3526 static void __attribute__((unused))
3527 tcg_out_opc_vmuh_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3528 {
3529     tcg_out32(s, encode_vdvjvk_insn(OPC_VMUH_H, vd, vj, vk));
3530 }
3531
3532 /* Emits the `vmuh.w vd, vj, vk` instruction.  */
3533 static void __attribute__((unused))
3534 tcg_out_opc_vmuh_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3535 {
3536     tcg_out32(s, encode_vdvjvk_insn(OPC_VMUH_W, vd, vj, vk));
3537 }
3538
3539 /* Emits the `vmuh.d vd, vj, vk` instruction.  */
3540 static void __attribute__((unused))
3541 tcg_out_opc_vmuh_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3542 {
3543     tcg_out32(s, encode_vdvjvk_insn(OPC_VMUH_D, vd, vj, vk));
3544 }
3545
3546 /* Emits the `vmuh.bu vd, vj, vk` instruction.  */
3547 static void __attribute__((unused))
3548 tcg_out_opc_vmuh_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3549 {
3550     tcg_out32(s, encode_vdvjvk_insn(OPC_VMUH_BU, vd, vj, vk));
3551 }
3552
3553 /* Emits the `vmuh.hu vd, vj, vk` instruction.  */
3554 static void __attribute__((unused))
3555 tcg_out_opc_vmuh_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3556 {
3557     tcg_out32(s, encode_vdvjvk_insn(OPC_VMUH_HU, vd, vj, vk));
3558 }
3559
3560 /* Emits the `vmuh.wu vd, vj, vk` instruction.  */
3561 static void __attribute__((unused))
3562 tcg_out_opc_vmuh_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3563 {
3564     tcg_out32(s, encode_vdvjvk_insn(OPC_VMUH_WU, vd, vj, vk));
3565 }
3566
3567 /* Emits the `vmuh.du vd, vj, vk` instruction.  */
3568 static void __attribute__((unused))
3569 tcg_out_opc_vmuh_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3570 {
3571     tcg_out32(s, encode_vdvjvk_insn(OPC_VMUH_DU, vd, vj, vk));
3572 }
3573
3574 /* Emits the `vmulwev.h.b vd, vj, vk` instruction.  */
3575 static void __attribute__((unused))
3576 tcg_out_opc_vmulwev_h_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3577 {
3578     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWEV_H_B, vd, vj, vk));
3579 }
3580
3581 /* Emits the `vmulwev.w.h vd, vj, vk` instruction.  */
3582 static void __attribute__((unused))
3583 tcg_out_opc_vmulwev_w_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3584 {
3585     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWEV_W_H, vd, vj, vk));
3586 }
3587
3588 /* Emits the `vmulwev.d.w vd, vj, vk` instruction.  */
3589 static void __attribute__((unused))
3590 tcg_out_opc_vmulwev_d_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3591 {
3592     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWEV_D_W, vd, vj, vk));
3593 }
3594
3595 /* Emits the `vmulwev.q.d vd, vj, vk` instruction.  */
3596 static void __attribute__((unused))
3597 tcg_out_opc_vmulwev_q_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3598 {
3599     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWEV_Q_D, vd, vj, vk));
3600 }
3601
3602 /* Emits the `vmulwod.h.b vd, vj, vk` instruction.  */
3603 static void __attribute__((unused))
3604 tcg_out_opc_vmulwod_h_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3605 {
3606     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWOD_H_B, vd, vj, vk));
3607 }
3608
3609 /* Emits the `vmulwod.w.h vd, vj, vk` instruction.  */
3610 static void __attribute__((unused))
3611 tcg_out_opc_vmulwod_w_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3612 {
3613     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWOD_W_H, vd, vj, vk));
3614 }
3615
3616 /* Emits the `vmulwod.d.w vd, vj, vk` instruction.  */
3617 static void __attribute__((unused))
3618 tcg_out_opc_vmulwod_d_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3619 {
3620     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWOD_D_W, vd, vj, vk));
3621 }
3622
3623 /* Emits the `vmulwod.q.d vd, vj, vk` instruction.  */
3624 static void __attribute__((unused))
3625 tcg_out_opc_vmulwod_q_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3626 {
3627     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWOD_Q_D, vd, vj, vk));
3628 }
3629
3630 /* Emits the `vmulwev.h.bu vd, vj, vk` instruction.  */
3631 static void __attribute__((unused))
3632 tcg_out_opc_vmulwev_h_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3633 {
3634     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWEV_H_BU, vd, vj, vk));
3635 }
3636
3637 /* Emits the `vmulwev.w.hu vd, vj, vk` instruction.  */
3638 static void __attribute__((unused))
3639 tcg_out_opc_vmulwev_w_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3640 {
3641     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWEV_W_HU, vd, vj, vk));
3642 }
3643
3644 /* Emits the `vmulwev.d.wu vd, vj, vk` instruction.  */
3645 static void __attribute__((unused))
3646 tcg_out_opc_vmulwev_d_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3647 {
3648     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWEV_D_WU, vd, vj, vk));
3649 }
3650
3651 /* Emits the `vmulwev.q.du vd, vj, vk` instruction.  */
3652 static void __attribute__((unused))
3653 tcg_out_opc_vmulwev_q_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3654 {
3655     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWEV_Q_DU, vd, vj, vk));
3656 }
3657
3658 /* Emits the `vmulwod.h.bu vd, vj, vk` instruction.  */
3659 static void __attribute__((unused))
3660 tcg_out_opc_vmulwod_h_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3661 {
3662     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWOD_H_BU, vd, vj, vk));
3663 }
3664
3665 /* Emits the `vmulwod.w.hu vd, vj, vk` instruction.  */
3666 static void __attribute__((unused))
3667 tcg_out_opc_vmulwod_w_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3668 {
3669     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWOD_W_HU, vd, vj, vk));
3670 }
3671
3672 /* Emits the `vmulwod.d.wu vd, vj, vk` instruction.  */
3673 static void __attribute__((unused))
3674 tcg_out_opc_vmulwod_d_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3675 {
3676     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWOD_D_WU, vd, vj, vk));
3677 }
3678
3679 /* Emits the `vmulwod.q.du vd, vj, vk` instruction.  */
3680 static void __attribute__((unused))
3681 tcg_out_opc_vmulwod_q_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3682 {
3683     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWOD_Q_DU, vd, vj, vk));
3684 }
3685
3686 /* Emits the `vmulwev.h.bu.b vd, vj, vk` instruction.  */
3687 static void __attribute__((unused))
3688 tcg_out_opc_vmulwev_h_bu_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3689 {
3690     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWEV_H_BU_B, vd, vj, vk));
3691 }
3692
3693 /* Emits the `vmulwev.w.hu.h vd, vj, vk` instruction.  */
3694 static void __attribute__((unused))
3695 tcg_out_opc_vmulwev_w_hu_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3696 {
3697     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWEV_W_HU_H, vd, vj, vk));
3698 }
3699
3700 /* Emits the `vmulwev.d.wu.w vd, vj, vk` instruction.  */
3701 static void __attribute__((unused))
3702 tcg_out_opc_vmulwev_d_wu_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3703 {
3704     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWEV_D_WU_W, vd, vj, vk));
3705 }
3706
3707 /* Emits the `vmulwev.q.du.d vd, vj, vk` instruction.  */
3708 static void __attribute__((unused))
3709 tcg_out_opc_vmulwev_q_du_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3710 {
3711     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWEV_Q_DU_D, vd, vj, vk));
3712 }
3713
3714 /* Emits the `vmulwod.h.bu.b vd, vj, vk` instruction.  */
3715 static void __attribute__((unused))
3716 tcg_out_opc_vmulwod_h_bu_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3717 {
3718     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWOD_H_BU_B, vd, vj, vk));
3719 }
3720
3721 /* Emits the `vmulwod.w.hu.h vd, vj, vk` instruction.  */
3722 static void __attribute__((unused))
3723 tcg_out_opc_vmulwod_w_hu_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3724 {
3725     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWOD_W_HU_H, vd, vj, vk));
3726 }
3727
3728 /* Emits the `vmulwod.d.wu.w vd, vj, vk` instruction.  */
3729 static void __attribute__((unused))
3730 tcg_out_opc_vmulwod_d_wu_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3731 {
3732     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWOD_D_WU_W, vd, vj, vk));
3733 }
3734
3735 /* Emits the `vmulwod.q.du.d vd, vj, vk` instruction.  */
3736 static void __attribute__((unused))
3737 tcg_out_opc_vmulwod_q_du_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3738 {
3739     tcg_out32(s, encode_vdvjvk_insn(OPC_VMULWOD_Q_DU_D, vd, vj, vk));
3740 }
3741
3742 /* Emits the `vmadd.b vd, vj, vk` instruction.  */
3743 static void __attribute__((unused))
3744 tcg_out_opc_vmadd_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3745 {
3746     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADD_B, vd, vj, vk));
3747 }
3748
3749 /* Emits the `vmadd.h vd, vj, vk` instruction.  */
3750 static void __attribute__((unused))
3751 tcg_out_opc_vmadd_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3752 {
3753     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADD_H, vd, vj, vk));
3754 }
3755
3756 /* Emits the `vmadd.w vd, vj, vk` instruction.  */
3757 static void __attribute__((unused))
3758 tcg_out_opc_vmadd_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3759 {
3760     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADD_W, vd, vj, vk));
3761 }
3762
3763 /* Emits the `vmadd.d vd, vj, vk` instruction.  */
3764 static void __attribute__((unused))
3765 tcg_out_opc_vmadd_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3766 {
3767     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADD_D, vd, vj, vk));
3768 }
3769
3770 /* Emits the `vmsub.b vd, vj, vk` instruction.  */
3771 static void __attribute__((unused))
3772 tcg_out_opc_vmsub_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3773 {
3774     tcg_out32(s, encode_vdvjvk_insn(OPC_VMSUB_B, vd, vj, vk));
3775 }
3776
3777 /* Emits the `vmsub.h vd, vj, vk` instruction.  */
3778 static void __attribute__((unused))
3779 tcg_out_opc_vmsub_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3780 {
3781     tcg_out32(s, encode_vdvjvk_insn(OPC_VMSUB_H, vd, vj, vk));
3782 }
3783
3784 /* Emits the `vmsub.w vd, vj, vk` instruction.  */
3785 static void __attribute__((unused))
3786 tcg_out_opc_vmsub_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3787 {
3788     tcg_out32(s, encode_vdvjvk_insn(OPC_VMSUB_W, vd, vj, vk));
3789 }
3790
3791 /* Emits the `vmsub.d vd, vj, vk` instruction.  */
3792 static void __attribute__((unused))
3793 tcg_out_opc_vmsub_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3794 {
3795     tcg_out32(s, encode_vdvjvk_insn(OPC_VMSUB_D, vd, vj, vk));
3796 }
3797
3798 /* Emits the `vmaddwev.h.b vd, vj, vk` instruction.  */
3799 static void __attribute__((unused))
3800 tcg_out_opc_vmaddwev_h_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3801 {
3802     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWEV_H_B, vd, vj, vk));
3803 }
3804
3805 /* Emits the `vmaddwev.w.h vd, vj, vk` instruction.  */
3806 static void __attribute__((unused))
3807 tcg_out_opc_vmaddwev_w_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3808 {
3809     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWEV_W_H, vd, vj, vk));
3810 }
3811
3812 /* Emits the `vmaddwev.d.w vd, vj, vk` instruction.  */
3813 static void __attribute__((unused))
3814 tcg_out_opc_vmaddwev_d_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3815 {
3816     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWEV_D_W, vd, vj, vk));
3817 }
3818
3819 /* Emits the `vmaddwev.q.d vd, vj, vk` instruction.  */
3820 static void __attribute__((unused))
3821 tcg_out_opc_vmaddwev_q_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3822 {
3823     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWEV_Q_D, vd, vj, vk));
3824 }
3825
3826 /* Emits the `vmaddwod.h.b vd, vj, vk` instruction.  */
3827 static void __attribute__((unused))
3828 tcg_out_opc_vmaddwod_h_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3829 {
3830     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWOD_H_B, vd, vj, vk));
3831 }
3832
3833 /* Emits the `vmaddwod.w.h vd, vj, vk` instruction.  */
3834 static void __attribute__((unused))
3835 tcg_out_opc_vmaddwod_w_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3836 {
3837     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWOD_W_H, vd, vj, vk));
3838 }
3839
3840 /* Emits the `vmaddwod.d.w vd, vj, vk` instruction.  */
3841 static void __attribute__((unused))
3842 tcg_out_opc_vmaddwod_d_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3843 {
3844     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWOD_D_W, vd, vj, vk));
3845 }
3846
3847 /* Emits the `vmaddwod.q.d vd, vj, vk` instruction.  */
3848 static void __attribute__((unused))
3849 tcg_out_opc_vmaddwod_q_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3850 {
3851     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWOD_Q_D, vd, vj, vk));
3852 }
3853
3854 /* Emits the `vmaddwev.h.bu vd, vj, vk` instruction.  */
3855 static void __attribute__((unused))
3856 tcg_out_opc_vmaddwev_h_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3857 {
3858     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWEV_H_BU, vd, vj, vk));
3859 }
3860
3861 /* Emits the `vmaddwev.w.hu vd, vj, vk` instruction.  */
3862 static void __attribute__((unused))
3863 tcg_out_opc_vmaddwev_w_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3864 {
3865     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWEV_W_HU, vd, vj, vk));
3866 }
3867
3868 /* Emits the `vmaddwev.d.wu vd, vj, vk` instruction.  */
3869 static void __attribute__((unused))
3870 tcg_out_opc_vmaddwev_d_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3871 {
3872     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWEV_D_WU, vd, vj, vk));
3873 }
3874
3875 /* Emits the `vmaddwev.q.du vd, vj, vk` instruction.  */
3876 static void __attribute__((unused))
3877 tcg_out_opc_vmaddwev_q_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3878 {
3879     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWEV_Q_DU, vd, vj, vk));
3880 }
3881
3882 /* Emits the `vmaddwod.h.bu vd, vj, vk` instruction.  */
3883 static void __attribute__((unused))
3884 tcg_out_opc_vmaddwod_h_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3885 {
3886     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWOD_H_BU, vd, vj, vk));
3887 }
3888
3889 /* Emits the `vmaddwod.w.hu vd, vj, vk` instruction.  */
3890 static void __attribute__((unused))
3891 tcg_out_opc_vmaddwod_w_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3892 {
3893     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWOD_W_HU, vd, vj, vk));
3894 }
3895
3896 /* Emits the `vmaddwod.d.wu vd, vj, vk` instruction.  */
3897 static void __attribute__((unused))
3898 tcg_out_opc_vmaddwod_d_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3899 {
3900     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWOD_D_WU, vd, vj, vk));
3901 }
3902
3903 /* Emits the `vmaddwod.q.du vd, vj, vk` instruction.  */
3904 static void __attribute__((unused))
3905 tcg_out_opc_vmaddwod_q_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3906 {
3907     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWOD_Q_DU, vd, vj, vk));
3908 }
3909
3910 /* Emits the `vmaddwev.h.bu.b vd, vj, vk` instruction.  */
3911 static void __attribute__((unused))
3912 tcg_out_opc_vmaddwev_h_bu_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3913 {
3914     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWEV_H_BU_B, vd, vj, vk));
3915 }
3916
3917 /* Emits the `vmaddwev.w.hu.h vd, vj, vk` instruction.  */
3918 static void __attribute__((unused))
3919 tcg_out_opc_vmaddwev_w_hu_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3920 {
3921     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWEV_W_HU_H, vd, vj, vk));
3922 }
3923
3924 /* Emits the `vmaddwev.d.wu.w vd, vj, vk` instruction.  */
3925 static void __attribute__((unused))
3926 tcg_out_opc_vmaddwev_d_wu_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3927 {
3928     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWEV_D_WU_W, vd, vj, vk));
3929 }
3930
3931 /* Emits the `vmaddwev.q.du.d vd, vj, vk` instruction.  */
3932 static void __attribute__((unused))
3933 tcg_out_opc_vmaddwev_q_du_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3934 {
3935     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWEV_Q_DU_D, vd, vj, vk));
3936 }
3937
3938 /* Emits the `vmaddwod.h.bu.b vd, vj, vk` instruction.  */
3939 static void __attribute__((unused))
3940 tcg_out_opc_vmaddwod_h_bu_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3941 {
3942     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWOD_H_BU_B, vd, vj, vk));
3943 }
3944
3945 /* Emits the `vmaddwod.w.hu.h vd, vj, vk` instruction.  */
3946 static void __attribute__((unused))
3947 tcg_out_opc_vmaddwod_w_hu_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3948 {
3949     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWOD_W_HU_H, vd, vj, vk));
3950 }
3951
3952 /* Emits the `vmaddwod.d.wu.w vd, vj, vk` instruction.  */
3953 static void __attribute__((unused))
3954 tcg_out_opc_vmaddwod_d_wu_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3955 {
3956     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWOD_D_WU_W, vd, vj, vk));
3957 }
3958
3959 /* Emits the `vmaddwod.q.du.d vd, vj, vk` instruction.  */
3960 static void __attribute__((unused))
3961 tcg_out_opc_vmaddwod_q_du_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3962 {
3963     tcg_out32(s, encode_vdvjvk_insn(OPC_VMADDWOD_Q_DU_D, vd, vj, vk));
3964 }
3965
3966 /* Emits the `vdiv.b vd, vj, vk` instruction.  */
3967 static void __attribute__((unused))
3968 tcg_out_opc_vdiv_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3969 {
3970     tcg_out32(s, encode_vdvjvk_insn(OPC_VDIV_B, vd, vj, vk));
3971 }
3972
3973 /* Emits the `vdiv.h vd, vj, vk` instruction.  */
3974 static void __attribute__((unused))
3975 tcg_out_opc_vdiv_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3976 {
3977     tcg_out32(s, encode_vdvjvk_insn(OPC_VDIV_H, vd, vj, vk));
3978 }
3979
3980 /* Emits the `vdiv.w vd, vj, vk` instruction.  */
3981 static void __attribute__((unused))
3982 tcg_out_opc_vdiv_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3983 {
3984     tcg_out32(s, encode_vdvjvk_insn(OPC_VDIV_W, vd, vj, vk));
3985 }
3986
3987 /* Emits the `vdiv.d vd, vj, vk` instruction.  */
3988 static void __attribute__((unused))
3989 tcg_out_opc_vdiv_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3990 {
3991     tcg_out32(s, encode_vdvjvk_insn(OPC_VDIV_D, vd, vj, vk));
3992 }
3993
3994 /* Emits the `vmod.b vd, vj, vk` instruction.  */
3995 static void __attribute__((unused))
3996 tcg_out_opc_vmod_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3997 {
3998     tcg_out32(s, encode_vdvjvk_insn(OPC_VMOD_B, vd, vj, vk));
3999 }
4000
4001 /* Emits the `vmod.h vd, vj, vk` instruction.  */
4002 static void __attribute__((unused))
4003 tcg_out_opc_vmod_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4004 {
4005     tcg_out32(s, encode_vdvjvk_insn(OPC_VMOD_H, vd, vj, vk));
4006 }
4007
4008 /* Emits the `vmod.w vd, vj, vk` instruction.  */
4009 static void __attribute__((unused))
4010 tcg_out_opc_vmod_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4011 {
4012     tcg_out32(s, encode_vdvjvk_insn(OPC_VMOD_W, vd, vj, vk));
4013 }
4014
4015 /* Emits the `vmod.d vd, vj, vk` instruction.  */
4016 static void __attribute__((unused))
4017 tcg_out_opc_vmod_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4018 {
4019     tcg_out32(s, encode_vdvjvk_insn(OPC_VMOD_D, vd, vj, vk));
4020 }
4021
4022 /* Emits the `vdiv.bu vd, vj, vk` instruction.  */
4023 static void __attribute__((unused))
4024 tcg_out_opc_vdiv_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4025 {
4026     tcg_out32(s, encode_vdvjvk_insn(OPC_VDIV_BU, vd, vj, vk));
4027 }
4028
4029 /* Emits the `vdiv.hu vd, vj, vk` instruction.  */
4030 static void __attribute__((unused))
4031 tcg_out_opc_vdiv_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4032 {
4033     tcg_out32(s, encode_vdvjvk_insn(OPC_VDIV_HU, vd, vj, vk));
4034 }
4035
4036 /* Emits the `vdiv.wu vd, vj, vk` instruction.  */
4037 static void __attribute__((unused))
4038 tcg_out_opc_vdiv_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4039 {
4040     tcg_out32(s, encode_vdvjvk_insn(OPC_VDIV_WU, vd, vj, vk));
4041 }
4042
4043 /* Emits the `vdiv.du vd, vj, vk` instruction.  */
4044 static void __attribute__((unused))
4045 tcg_out_opc_vdiv_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4046 {
4047     tcg_out32(s, encode_vdvjvk_insn(OPC_VDIV_DU, vd, vj, vk));
4048 }
4049
4050 /* Emits the `vmod.bu vd, vj, vk` instruction.  */
4051 static void __attribute__((unused))
4052 tcg_out_opc_vmod_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4053 {
4054     tcg_out32(s, encode_vdvjvk_insn(OPC_VMOD_BU, vd, vj, vk));
4055 }
4056
4057 /* Emits the `vmod.hu vd, vj, vk` instruction.  */
4058 static void __attribute__((unused))
4059 tcg_out_opc_vmod_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4060 {
4061     tcg_out32(s, encode_vdvjvk_insn(OPC_VMOD_HU, vd, vj, vk));
4062 }
4063
4064 /* Emits the `vmod.wu vd, vj, vk` instruction.  */
4065 static void __attribute__((unused))
4066 tcg_out_opc_vmod_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4067 {
4068     tcg_out32(s, encode_vdvjvk_insn(OPC_VMOD_WU, vd, vj, vk));
4069 }
4070
4071 /* Emits the `vmod.du vd, vj, vk` instruction.  */
4072 static void __attribute__((unused))
4073 tcg_out_opc_vmod_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4074 {
4075     tcg_out32(s, encode_vdvjvk_insn(OPC_VMOD_DU, vd, vj, vk));
4076 }
4077
4078 /* Emits the `vsll.b vd, vj, vk` instruction.  */
4079 static void __attribute__((unused))
4080 tcg_out_opc_vsll_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4081 {
4082     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLL_B, vd, vj, vk));
4083 }
4084
4085 /* Emits the `vsll.h vd, vj, vk` instruction.  */
4086 static void __attribute__((unused))
4087 tcg_out_opc_vsll_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4088 {
4089     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLL_H, vd, vj, vk));
4090 }
4091
4092 /* Emits the `vsll.w vd, vj, vk` instruction.  */
4093 static void __attribute__((unused))
4094 tcg_out_opc_vsll_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4095 {
4096     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLL_W, vd, vj, vk));
4097 }
4098
4099 /* Emits the `vsll.d vd, vj, vk` instruction.  */
4100 static void __attribute__((unused))
4101 tcg_out_opc_vsll_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4102 {
4103     tcg_out32(s, encode_vdvjvk_insn(OPC_VSLL_D, vd, vj, vk));
4104 }
4105
4106 /* Emits the `vsrl.b vd, vj, vk` instruction.  */
4107 static void __attribute__((unused))
4108 tcg_out_opc_vsrl_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4109 {
4110     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRL_B, vd, vj, vk));
4111 }
4112
4113 /* Emits the `vsrl.h vd, vj, vk` instruction.  */
4114 static void __attribute__((unused))
4115 tcg_out_opc_vsrl_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4116 {
4117     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRL_H, vd, vj, vk));
4118 }
4119
4120 /* Emits the `vsrl.w vd, vj, vk` instruction.  */
4121 static void __attribute__((unused))
4122 tcg_out_opc_vsrl_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4123 {
4124     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRL_W, vd, vj, vk));
4125 }
4126
4127 /* Emits the `vsrl.d vd, vj, vk` instruction.  */
4128 static void __attribute__((unused))
4129 tcg_out_opc_vsrl_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4130 {
4131     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRL_D, vd, vj, vk));
4132 }
4133
4134 /* Emits the `vsra.b vd, vj, vk` instruction.  */
4135 static void __attribute__((unused))
4136 tcg_out_opc_vsra_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4137 {
4138     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRA_B, vd, vj, vk));
4139 }
4140
4141 /* Emits the `vsra.h vd, vj, vk` instruction.  */
4142 static void __attribute__((unused))
4143 tcg_out_opc_vsra_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4144 {
4145     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRA_H, vd, vj, vk));
4146 }
4147
4148 /* Emits the `vsra.w vd, vj, vk` instruction.  */
4149 static void __attribute__((unused))
4150 tcg_out_opc_vsra_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4151 {
4152     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRA_W, vd, vj, vk));
4153 }
4154
4155 /* Emits the `vsra.d vd, vj, vk` instruction.  */
4156 static void __attribute__((unused))
4157 tcg_out_opc_vsra_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4158 {
4159     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRA_D, vd, vj, vk));
4160 }
4161
4162 /* Emits the `vrotr.b vd, vj, vk` instruction.  */
4163 static void __attribute__((unused))
4164 tcg_out_opc_vrotr_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4165 {
4166     tcg_out32(s, encode_vdvjvk_insn(OPC_VROTR_B, vd, vj, vk));
4167 }
4168
4169 /* Emits the `vrotr.h vd, vj, vk` instruction.  */
4170 static void __attribute__((unused))
4171 tcg_out_opc_vrotr_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4172 {
4173     tcg_out32(s, encode_vdvjvk_insn(OPC_VROTR_H, vd, vj, vk));
4174 }
4175
4176 /* Emits the `vrotr.w vd, vj, vk` instruction.  */
4177 static void __attribute__((unused))
4178 tcg_out_opc_vrotr_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4179 {
4180     tcg_out32(s, encode_vdvjvk_insn(OPC_VROTR_W, vd, vj, vk));
4181 }
4182
4183 /* Emits the `vrotr.d vd, vj, vk` instruction.  */
4184 static void __attribute__((unused))
4185 tcg_out_opc_vrotr_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4186 {
4187     tcg_out32(s, encode_vdvjvk_insn(OPC_VROTR_D, vd, vj, vk));
4188 }
4189
4190 /* Emits the `vsrlr.b vd, vj, vk` instruction.  */
4191 static void __attribute__((unused))
4192 tcg_out_opc_vsrlr_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4193 {
4194     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRLR_B, vd, vj, vk));
4195 }
4196
4197 /* Emits the `vsrlr.h vd, vj, vk` instruction.  */
4198 static void __attribute__((unused))
4199 tcg_out_opc_vsrlr_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4200 {
4201     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRLR_H, vd, vj, vk));
4202 }
4203
4204 /* Emits the `vsrlr.w vd, vj, vk` instruction.  */
4205 static void __attribute__((unused))
4206 tcg_out_opc_vsrlr_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4207 {
4208     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRLR_W, vd, vj, vk));
4209 }
4210
4211 /* Emits the `vsrlr.d vd, vj, vk` instruction.  */
4212 static void __attribute__((unused))
4213 tcg_out_opc_vsrlr_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4214 {
4215     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRLR_D, vd, vj, vk));
4216 }
4217
4218 /* Emits the `vsrar.b vd, vj, vk` instruction.  */
4219 static void __attribute__((unused))
4220 tcg_out_opc_vsrar_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4221 {
4222     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRAR_B, vd, vj, vk));
4223 }
4224
4225 /* Emits the `vsrar.h vd, vj, vk` instruction.  */
4226 static void __attribute__((unused))
4227 tcg_out_opc_vsrar_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4228 {
4229     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRAR_H, vd, vj, vk));
4230 }
4231
4232 /* Emits the `vsrar.w vd, vj, vk` instruction.  */
4233 static void __attribute__((unused))
4234 tcg_out_opc_vsrar_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4235 {
4236     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRAR_W, vd, vj, vk));
4237 }
4238
4239 /* Emits the `vsrar.d vd, vj, vk` instruction.  */
4240 static void __attribute__((unused))
4241 tcg_out_opc_vsrar_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4242 {
4243     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRAR_D, vd, vj, vk));
4244 }
4245
4246 /* Emits the `vsrln.b.h vd, vj, vk` instruction.  */
4247 static void __attribute__((unused))
4248 tcg_out_opc_vsrln_b_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4249 {
4250     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRLN_B_H, vd, vj, vk));
4251 }
4252
4253 /* Emits the `vsrln.h.w vd, vj, vk` instruction.  */
4254 static void __attribute__((unused))
4255 tcg_out_opc_vsrln_h_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4256 {
4257     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRLN_H_W, vd, vj, vk));
4258 }
4259
4260 /* Emits the `vsrln.w.d vd, vj, vk` instruction.  */
4261 static void __attribute__((unused))
4262 tcg_out_opc_vsrln_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4263 {
4264     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRLN_W_D, vd, vj, vk));
4265 }
4266
4267 /* Emits the `vsran.b.h vd, vj, vk` instruction.  */
4268 static void __attribute__((unused))
4269 tcg_out_opc_vsran_b_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4270 {
4271     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRAN_B_H, vd, vj, vk));
4272 }
4273
4274 /* Emits the `vsran.h.w vd, vj, vk` instruction.  */
4275 static void __attribute__((unused))
4276 tcg_out_opc_vsran_h_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4277 {
4278     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRAN_H_W, vd, vj, vk));
4279 }
4280
4281 /* Emits the `vsran.w.d vd, vj, vk` instruction.  */
4282 static void __attribute__((unused))
4283 tcg_out_opc_vsran_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4284 {
4285     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRAN_W_D, vd, vj, vk));
4286 }
4287
4288 /* Emits the `vsrlrn.b.h vd, vj, vk` instruction.  */
4289 static void __attribute__((unused))
4290 tcg_out_opc_vsrlrn_b_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4291 {
4292     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRLRN_B_H, vd, vj, vk));
4293 }
4294
4295 /* Emits the `vsrlrn.h.w vd, vj, vk` instruction.  */
4296 static void __attribute__((unused))
4297 tcg_out_opc_vsrlrn_h_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4298 {
4299     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRLRN_H_W, vd, vj, vk));
4300 }
4301
4302 /* Emits the `vsrlrn.w.d vd, vj, vk` instruction.  */
4303 static void __attribute__((unused))
4304 tcg_out_opc_vsrlrn_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4305 {
4306     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRLRN_W_D, vd, vj, vk));
4307 }
4308
4309 /* Emits the `vsrarn.b.h vd, vj, vk` instruction.  */
4310 static void __attribute__((unused))
4311 tcg_out_opc_vsrarn_b_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4312 {
4313     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRARN_B_H, vd, vj, vk));
4314 }
4315
4316 /* Emits the `vsrarn.h.w vd, vj, vk` instruction.  */
4317 static void __attribute__((unused))
4318 tcg_out_opc_vsrarn_h_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4319 {
4320     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRARN_H_W, vd, vj, vk));
4321 }
4322
4323 /* Emits the `vsrarn.w.d vd, vj, vk` instruction.  */
4324 static void __attribute__((unused))
4325 tcg_out_opc_vsrarn_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4326 {
4327     tcg_out32(s, encode_vdvjvk_insn(OPC_VSRARN_W_D, vd, vj, vk));
4328 }
4329
4330 /* Emits the `vssrln.b.h vd, vj, vk` instruction.  */
4331 static void __attribute__((unused))
4332 tcg_out_opc_vssrln_b_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4333 {
4334     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRLN_B_H, vd, vj, vk));
4335 }
4336
4337 /* Emits the `vssrln.h.w vd, vj, vk` instruction.  */
4338 static void __attribute__((unused))
4339 tcg_out_opc_vssrln_h_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4340 {
4341     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRLN_H_W, vd, vj, vk));
4342 }
4343
4344 /* Emits the `vssrln.w.d vd, vj, vk` instruction.  */
4345 static void __attribute__((unused))
4346 tcg_out_opc_vssrln_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4347 {
4348     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRLN_W_D, vd, vj, vk));
4349 }
4350
4351 /* Emits the `vssran.b.h vd, vj, vk` instruction.  */
4352 static void __attribute__((unused))
4353 tcg_out_opc_vssran_b_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4354 {
4355     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRAN_B_H, vd, vj, vk));
4356 }
4357
4358 /* Emits the `vssran.h.w vd, vj, vk` instruction.  */
4359 static void __attribute__((unused))
4360 tcg_out_opc_vssran_h_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4361 {
4362     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRAN_H_W, vd, vj, vk));
4363 }
4364
4365 /* Emits the `vssran.w.d vd, vj, vk` instruction.  */
4366 static void __attribute__((unused))
4367 tcg_out_opc_vssran_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4368 {
4369     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRAN_W_D, vd, vj, vk));
4370 }
4371
4372 /* Emits the `vssrlrn.b.h vd, vj, vk` instruction.  */
4373 static void __attribute__((unused))
4374 tcg_out_opc_vssrlrn_b_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4375 {
4376     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRLRN_B_H, vd, vj, vk));
4377 }
4378
4379 /* Emits the `vssrlrn.h.w vd, vj, vk` instruction.  */
4380 static void __attribute__((unused))
4381 tcg_out_opc_vssrlrn_h_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4382 {
4383     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRLRN_H_W, vd, vj, vk));
4384 }
4385
4386 /* Emits the `vssrlrn.w.d vd, vj, vk` instruction.  */
4387 static void __attribute__((unused))
4388 tcg_out_opc_vssrlrn_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4389 {
4390     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRLRN_W_D, vd, vj, vk));
4391 }
4392
4393 /* Emits the `vssrarn.b.h vd, vj, vk` instruction.  */
4394 static void __attribute__((unused))
4395 tcg_out_opc_vssrarn_b_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4396 {
4397     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRARN_B_H, vd, vj, vk));
4398 }
4399
4400 /* Emits the `vssrarn.h.w vd, vj, vk` instruction.  */
4401 static void __attribute__((unused))
4402 tcg_out_opc_vssrarn_h_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4403 {
4404     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRARN_H_W, vd, vj, vk));
4405 }
4406
4407 /* Emits the `vssrarn.w.d vd, vj, vk` instruction.  */
4408 static void __attribute__((unused))
4409 tcg_out_opc_vssrarn_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4410 {
4411     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRARN_W_D, vd, vj, vk));
4412 }
4413
4414 /* Emits the `vssrln.bu.h vd, vj, vk` instruction.  */
4415 static void __attribute__((unused))
4416 tcg_out_opc_vssrln_bu_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4417 {
4418     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRLN_BU_H, vd, vj, vk));
4419 }
4420
4421 /* Emits the `vssrln.hu.w vd, vj, vk` instruction.  */
4422 static void __attribute__((unused))
4423 tcg_out_opc_vssrln_hu_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4424 {
4425     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRLN_HU_W, vd, vj, vk));
4426 }
4427
4428 /* Emits the `vssrln.wu.d vd, vj, vk` instruction.  */
4429 static void __attribute__((unused))
4430 tcg_out_opc_vssrln_wu_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4431 {
4432     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRLN_WU_D, vd, vj, vk));
4433 }
4434
4435 /* Emits the `vssran.bu.h vd, vj, vk` instruction.  */
4436 static void __attribute__((unused))
4437 tcg_out_opc_vssran_bu_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4438 {
4439     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRAN_BU_H, vd, vj, vk));
4440 }
4441
4442 /* Emits the `vssran.hu.w vd, vj, vk` instruction.  */
4443 static void __attribute__((unused))
4444 tcg_out_opc_vssran_hu_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4445 {
4446     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRAN_HU_W, vd, vj, vk));
4447 }
4448
4449 /* Emits the `vssran.wu.d vd, vj, vk` instruction.  */
4450 static void __attribute__((unused))
4451 tcg_out_opc_vssran_wu_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4452 {
4453     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRAN_WU_D, vd, vj, vk));
4454 }
4455
4456 /* Emits the `vssrlrn.bu.h vd, vj, vk` instruction.  */
4457 static void __attribute__((unused))
4458 tcg_out_opc_vssrlrn_bu_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4459 {
4460     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRLRN_BU_H, vd, vj, vk));
4461 }
4462
4463 /* Emits the `vssrlrn.hu.w vd, vj, vk` instruction.  */
4464 static void __attribute__((unused))
4465 tcg_out_opc_vssrlrn_hu_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4466 {
4467     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRLRN_HU_W, vd, vj, vk));
4468 }
4469
4470 /* Emits the `vssrlrn.wu.d vd, vj, vk` instruction.  */
4471 static void __attribute__((unused))
4472 tcg_out_opc_vssrlrn_wu_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4473 {
4474     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRLRN_WU_D, vd, vj, vk));
4475 }
4476
4477 /* Emits the `vssrarn.bu.h vd, vj, vk` instruction.  */
4478 static void __attribute__((unused))
4479 tcg_out_opc_vssrarn_bu_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4480 {
4481     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRARN_BU_H, vd, vj, vk));
4482 }
4483
4484 /* Emits the `vssrarn.hu.w vd, vj, vk` instruction.  */
4485 static void __attribute__((unused))
4486 tcg_out_opc_vssrarn_hu_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4487 {
4488     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRARN_HU_W, vd, vj, vk));
4489 }
4490
4491 /* Emits the `vssrarn.wu.d vd, vj, vk` instruction.  */
4492 static void __attribute__((unused))
4493 tcg_out_opc_vssrarn_wu_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4494 {
4495     tcg_out32(s, encode_vdvjvk_insn(OPC_VSSRARN_WU_D, vd, vj, vk));
4496 }
4497
4498 /* Emits the `vbitclr.b vd, vj, vk` instruction.  */
4499 static void __attribute__((unused))
4500 tcg_out_opc_vbitclr_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4501 {
4502     tcg_out32(s, encode_vdvjvk_insn(OPC_VBITCLR_B, vd, vj, vk));
4503 }
4504
4505 /* Emits the `vbitclr.h vd, vj, vk` instruction.  */
4506 static void __attribute__((unused))
4507 tcg_out_opc_vbitclr_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4508 {
4509     tcg_out32(s, encode_vdvjvk_insn(OPC_VBITCLR_H, vd, vj, vk));
4510 }
4511
4512 /* Emits the `vbitclr.w vd, vj, vk` instruction.  */
4513 static void __attribute__((unused))
4514 tcg_out_opc_vbitclr_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4515 {
4516     tcg_out32(s, encode_vdvjvk_insn(OPC_VBITCLR_W, vd, vj, vk));
4517 }
4518
4519 /* Emits the `vbitclr.d vd, vj, vk` instruction.  */
4520 static void __attribute__((unused))
4521 tcg_out_opc_vbitclr_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4522 {
4523     tcg_out32(s, encode_vdvjvk_insn(OPC_VBITCLR_D, vd, vj, vk));
4524 }
4525
4526 /* Emits the `vbitset.b vd, vj, vk` instruction.  */
4527 static void __attribute__((unused))
4528 tcg_out_opc_vbitset_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4529 {
4530     tcg_out32(s, encode_vdvjvk_insn(OPC_VBITSET_B, vd, vj, vk));
4531 }
4532
4533 /* Emits the `vbitset.h vd, vj, vk` instruction.  */
4534 static void __attribute__((unused))
4535 tcg_out_opc_vbitset_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4536 {
4537     tcg_out32(s, encode_vdvjvk_insn(OPC_VBITSET_H, vd, vj, vk));
4538 }
4539
4540 /* Emits the `vbitset.w vd, vj, vk` instruction.  */
4541 static void __attribute__((unused))
4542 tcg_out_opc_vbitset_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4543 {
4544     tcg_out32(s, encode_vdvjvk_insn(OPC_VBITSET_W, vd, vj, vk));
4545 }
4546
4547 /* Emits the `vbitset.d vd, vj, vk` instruction.  */
4548 static void __attribute__((unused))
4549 tcg_out_opc_vbitset_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4550 {
4551     tcg_out32(s, encode_vdvjvk_insn(OPC_VBITSET_D, vd, vj, vk));
4552 }
4553
4554 /* Emits the `vbitrev.b vd, vj, vk` instruction.  */
4555 static void __attribute__((unused))
4556 tcg_out_opc_vbitrev_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4557 {
4558     tcg_out32(s, encode_vdvjvk_insn(OPC_VBITREV_B, vd, vj, vk));
4559 }
4560
4561 /* Emits the `vbitrev.h vd, vj, vk` instruction.  */
4562 static void __attribute__((unused))
4563 tcg_out_opc_vbitrev_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4564 {
4565     tcg_out32(s, encode_vdvjvk_insn(OPC_VBITREV_H, vd, vj, vk));
4566 }
4567
4568 /* Emits the `vbitrev.w vd, vj, vk` instruction.  */
4569 static void __attribute__((unused))
4570 tcg_out_opc_vbitrev_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4571 {
4572     tcg_out32(s, encode_vdvjvk_insn(OPC_VBITREV_W, vd, vj, vk));
4573 }
4574
4575 /* Emits the `vbitrev.d vd, vj, vk` instruction.  */
4576 static void __attribute__((unused))
4577 tcg_out_opc_vbitrev_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4578 {
4579     tcg_out32(s, encode_vdvjvk_insn(OPC_VBITREV_D, vd, vj, vk));
4580 }
4581
4582 /* Emits the `vpackev.b vd, vj, vk` instruction.  */
4583 static void __attribute__((unused))
4584 tcg_out_opc_vpackev_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4585 {
4586     tcg_out32(s, encode_vdvjvk_insn(OPC_VPACKEV_B, vd, vj, vk));
4587 }
4588
4589 /* Emits the `vpackev.h vd, vj, vk` instruction.  */
4590 static void __attribute__((unused))
4591 tcg_out_opc_vpackev_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4592 {
4593     tcg_out32(s, encode_vdvjvk_insn(OPC_VPACKEV_H, vd, vj, vk));
4594 }
4595
4596 /* Emits the `vpackev.w vd, vj, vk` instruction.  */
4597 static void __attribute__((unused))
4598 tcg_out_opc_vpackev_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4599 {
4600     tcg_out32(s, encode_vdvjvk_insn(OPC_VPACKEV_W, vd, vj, vk));
4601 }
4602
4603 /* Emits the `vpackev.d vd, vj, vk` instruction.  */
4604 static void __attribute__((unused))
4605 tcg_out_opc_vpackev_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4606 {
4607     tcg_out32(s, encode_vdvjvk_insn(OPC_VPACKEV_D, vd, vj, vk));
4608 }
4609
4610 /* Emits the `vpackod.b vd, vj, vk` instruction.  */
4611 static void __attribute__((unused))
4612 tcg_out_opc_vpackod_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4613 {
4614     tcg_out32(s, encode_vdvjvk_insn(OPC_VPACKOD_B, vd, vj, vk));
4615 }
4616
4617 /* Emits the `vpackod.h vd, vj, vk` instruction.  */
4618 static void __attribute__((unused))
4619 tcg_out_opc_vpackod_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4620 {
4621     tcg_out32(s, encode_vdvjvk_insn(OPC_VPACKOD_H, vd, vj, vk));
4622 }
4623
4624 /* Emits the `vpackod.w vd, vj, vk` instruction.  */
4625 static void __attribute__((unused))
4626 tcg_out_opc_vpackod_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4627 {
4628     tcg_out32(s, encode_vdvjvk_insn(OPC_VPACKOD_W, vd, vj, vk));
4629 }
4630
4631 /* Emits the `vpackod.d vd, vj, vk` instruction.  */
4632 static void __attribute__((unused))
4633 tcg_out_opc_vpackod_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4634 {
4635     tcg_out32(s, encode_vdvjvk_insn(OPC_VPACKOD_D, vd, vj, vk));
4636 }
4637
4638 /* Emits the `vilvl.b vd, vj, vk` instruction.  */
4639 static void __attribute__((unused))
4640 tcg_out_opc_vilvl_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4641 {
4642     tcg_out32(s, encode_vdvjvk_insn(OPC_VILVL_B, vd, vj, vk));
4643 }
4644
4645 /* Emits the `vilvl.h vd, vj, vk` instruction.  */
4646 static void __attribute__((unused))
4647 tcg_out_opc_vilvl_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4648 {
4649     tcg_out32(s, encode_vdvjvk_insn(OPC_VILVL_H, vd, vj, vk));
4650 }
4651
4652 /* Emits the `vilvl.w vd, vj, vk` instruction.  */
4653 static void __attribute__((unused))
4654 tcg_out_opc_vilvl_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4655 {
4656     tcg_out32(s, encode_vdvjvk_insn(OPC_VILVL_W, vd, vj, vk));
4657 }
4658
4659 /* Emits the `vilvl.d vd, vj, vk` instruction.  */
4660 static void __attribute__((unused))
4661 tcg_out_opc_vilvl_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4662 {
4663     tcg_out32(s, encode_vdvjvk_insn(OPC_VILVL_D, vd, vj, vk));
4664 }
4665
4666 /* Emits the `vilvh.b vd, vj, vk` instruction.  */
4667 static void __attribute__((unused))
4668 tcg_out_opc_vilvh_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4669 {
4670     tcg_out32(s, encode_vdvjvk_insn(OPC_VILVH_B, vd, vj, vk));
4671 }
4672
4673 /* Emits the `vilvh.h vd, vj, vk` instruction.  */
4674 static void __attribute__((unused))
4675 tcg_out_opc_vilvh_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4676 {
4677     tcg_out32(s, encode_vdvjvk_insn(OPC_VILVH_H, vd, vj, vk));
4678 }
4679
4680 /* Emits the `vilvh.w vd, vj, vk` instruction.  */
4681 static void __attribute__((unused))
4682 tcg_out_opc_vilvh_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4683 {
4684     tcg_out32(s, encode_vdvjvk_insn(OPC_VILVH_W, vd, vj, vk));
4685 }
4686
4687 /* Emits the `vilvh.d vd, vj, vk` instruction.  */
4688 static void __attribute__((unused))
4689 tcg_out_opc_vilvh_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4690 {
4691     tcg_out32(s, encode_vdvjvk_insn(OPC_VILVH_D, vd, vj, vk));
4692 }
4693
4694 /* Emits the `vpickev.b vd, vj, vk` instruction.  */
4695 static void __attribute__((unused))
4696 tcg_out_opc_vpickev_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4697 {
4698     tcg_out32(s, encode_vdvjvk_insn(OPC_VPICKEV_B, vd, vj, vk));
4699 }
4700
4701 /* Emits the `vpickev.h vd, vj, vk` instruction.  */
4702 static void __attribute__((unused))
4703 tcg_out_opc_vpickev_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4704 {
4705     tcg_out32(s, encode_vdvjvk_insn(OPC_VPICKEV_H, vd, vj, vk));
4706 }
4707
4708 /* Emits the `vpickev.w vd, vj, vk` instruction.  */
4709 static void __attribute__((unused))
4710 tcg_out_opc_vpickev_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4711 {
4712     tcg_out32(s, encode_vdvjvk_insn(OPC_VPICKEV_W, vd, vj, vk));
4713 }
4714
4715 /* Emits the `vpickev.d vd, vj, vk` instruction.  */
4716 static void __attribute__((unused))
4717 tcg_out_opc_vpickev_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4718 {
4719     tcg_out32(s, encode_vdvjvk_insn(OPC_VPICKEV_D, vd, vj, vk));
4720 }
4721
4722 /* Emits the `vpickod.b vd, vj, vk` instruction.  */
4723 static void __attribute__((unused))
4724 tcg_out_opc_vpickod_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4725 {
4726     tcg_out32(s, encode_vdvjvk_insn(OPC_VPICKOD_B, vd, vj, vk));
4727 }
4728
4729 /* Emits the `vpickod.h vd, vj, vk` instruction.  */
4730 static void __attribute__((unused))
4731 tcg_out_opc_vpickod_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4732 {
4733     tcg_out32(s, encode_vdvjvk_insn(OPC_VPICKOD_H, vd, vj, vk));
4734 }
4735
4736 /* Emits the `vpickod.w vd, vj, vk` instruction.  */
4737 static void __attribute__((unused))
4738 tcg_out_opc_vpickod_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4739 {
4740     tcg_out32(s, encode_vdvjvk_insn(OPC_VPICKOD_W, vd, vj, vk));
4741 }
4742
4743 /* Emits the `vpickod.d vd, vj, vk` instruction.  */
4744 static void __attribute__((unused))
4745 tcg_out_opc_vpickod_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4746 {
4747     tcg_out32(s, encode_vdvjvk_insn(OPC_VPICKOD_D, vd, vj, vk));
4748 }
4749
4750 /* Emits the `vreplve.b vd, vj, k` instruction.  */
4751 static void __attribute__((unused))
4752 tcg_out_opc_vreplve_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg k)
4753 {
4754     tcg_out32(s, encode_vdvjk_insn(OPC_VREPLVE_B, vd, vj, k));
4755 }
4756
4757 /* Emits the `vreplve.h vd, vj, k` instruction.  */
4758 static void __attribute__((unused))
4759 tcg_out_opc_vreplve_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg k)
4760 {
4761     tcg_out32(s, encode_vdvjk_insn(OPC_VREPLVE_H, vd, vj, k));
4762 }
4763
4764 /* Emits the `vreplve.w vd, vj, k` instruction.  */
4765 static void __attribute__((unused))
4766 tcg_out_opc_vreplve_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg k)
4767 {
4768     tcg_out32(s, encode_vdvjk_insn(OPC_VREPLVE_W, vd, vj, k));
4769 }
4770
4771 /* Emits the `vreplve.d vd, vj, k` instruction.  */
4772 static void __attribute__((unused))
4773 tcg_out_opc_vreplve_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg k)
4774 {
4775     tcg_out32(s, encode_vdvjk_insn(OPC_VREPLVE_D, vd, vj, k));
4776 }
4777
4778 /* Emits the `vand.v vd, vj, vk` instruction.  */
4779 static void __attribute__((unused))
4780 tcg_out_opc_vand_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4781 {
4782     tcg_out32(s, encode_vdvjvk_insn(OPC_VAND_V, vd, vj, vk));
4783 }
4784
4785 /* Emits the `vor.v vd, vj, vk` instruction.  */
4786 static void __attribute__((unused))
4787 tcg_out_opc_vor_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4788 {
4789     tcg_out32(s, encode_vdvjvk_insn(OPC_VOR_V, vd, vj, vk));
4790 }
4791
4792 /* Emits the `vxor.v vd, vj, vk` instruction.  */
4793 static void __attribute__((unused))
4794 tcg_out_opc_vxor_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4795 {
4796     tcg_out32(s, encode_vdvjvk_insn(OPC_VXOR_V, vd, vj, vk));
4797 }
4798
4799 /* Emits the `vnor.v vd, vj, vk` instruction.  */
4800 static void __attribute__((unused))
4801 tcg_out_opc_vnor_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4802 {
4803     tcg_out32(s, encode_vdvjvk_insn(OPC_VNOR_V, vd, vj, vk));
4804 }
4805
4806 /* Emits the `vandn.v vd, vj, vk` instruction.  */
4807 static void __attribute__((unused))
4808 tcg_out_opc_vandn_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4809 {
4810     tcg_out32(s, encode_vdvjvk_insn(OPC_VANDN_V, vd, vj, vk));
4811 }
4812
4813 /* Emits the `vorn.v vd, vj, vk` instruction.  */
4814 static void __attribute__((unused))
4815 tcg_out_opc_vorn_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4816 {
4817     tcg_out32(s, encode_vdvjvk_insn(OPC_VORN_V, vd, vj, vk));
4818 }
4819
4820 /* Emits the `vfrstp.b vd, vj, vk` instruction.  */
4821 static void __attribute__((unused))
4822 tcg_out_opc_vfrstp_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4823 {
4824     tcg_out32(s, encode_vdvjvk_insn(OPC_VFRSTP_B, vd, vj, vk));
4825 }
4826
4827 /* Emits the `vfrstp.h vd, vj, vk` instruction.  */
4828 static void __attribute__((unused))
4829 tcg_out_opc_vfrstp_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4830 {
4831     tcg_out32(s, encode_vdvjvk_insn(OPC_VFRSTP_H, vd, vj, vk));
4832 }
4833
4834 /* Emits the `vadd.q vd, vj, vk` instruction.  */
4835 static void __attribute__((unused))
4836 tcg_out_opc_vadd_q(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4837 {
4838     tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_Q, vd, vj, vk));
4839 }
4840
4841 /* Emits the `vsub.q vd, vj, vk` instruction.  */
4842 static void __attribute__((unused))
4843 tcg_out_opc_vsub_q(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4844 {
4845     tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_Q, vd, vj, vk));
4846 }
4847
4848 /* Emits the `vsigncov.b vd, vj, vk` instruction.  */
4849 static void __attribute__((unused))
4850 tcg_out_opc_vsigncov_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4851 {
4852     tcg_out32(s, encode_vdvjvk_insn(OPC_VSIGNCOV_B, vd, vj, vk));
4853 }
4854
4855 /* Emits the `vsigncov.h vd, vj, vk` instruction.  */
4856 static void __attribute__((unused))
4857 tcg_out_opc_vsigncov_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4858 {
4859     tcg_out32(s, encode_vdvjvk_insn(OPC_VSIGNCOV_H, vd, vj, vk));
4860 }
4861
4862 /* Emits the `vsigncov.w vd, vj, vk` instruction.  */
4863 static void __attribute__((unused))
4864 tcg_out_opc_vsigncov_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4865 {
4866     tcg_out32(s, encode_vdvjvk_insn(OPC_VSIGNCOV_W, vd, vj, vk));
4867 }
4868
4869 /* Emits the `vsigncov.d vd, vj, vk` instruction.  */
4870 static void __attribute__((unused))
4871 tcg_out_opc_vsigncov_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4872 {
4873     tcg_out32(s, encode_vdvjvk_insn(OPC_VSIGNCOV_D, vd, vj, vk));
4874 }
4875
4876 /* Emits the `vfadd.s vd, vj, vk` instruction.  */
4877 static void __attribute__((unused))
4878 tcg_out_opc_vfadd_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4879 {
4880     tcg_out32(s, encode_vdvjvk_insn(OPC_VFADD_S, vd, vj, vk));
4881 }
4882
4883 /* Emits the `vfadd.d vd, vj, vk` instruction.  */
4884 static void __attribute__((unused))
4885 tcg_out_opc_vfadd_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4886 {
4887     tcg_out32(s, encode_vdvjvk_insn(OPC_VFADD_D, vd, vj, vk));
4888 }
4889
4890 /* Emits the `vfsub.s vd, vj, vk` instruction.  */
4891 static void __attribute__((unused))
4892 tcg_out_opc_vfsub_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4893 {
4894     tcg_out32(s, encode_vdvjvk_insn(OPC_VFSUB_S, vd, vj, vk));
4895 }
4896
4897 /* Emits the `vfsub.d vd, vj, vk` instruction.  */
4898 static void __attribute__((unused))
4899 tcg_out_opc_vfsub_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4900 {
4901     tcg_out32(s, encode_vdvjvk_insn(OPC_VFSUB_D, vd, vj, vk));
4902 }
4903
4904 /* Emits the `vfmul.s vd, vj, vk` instruction.  */
4905 static void __attribute__((unused))
4906 tcg_out_opc_vfmul_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4907 {
4908     tcg_out32(s, encode_vdvjvk_insn(OPC_VFMUL_S, vd, vj, vk));
4909 }
4910
4911 /* Emits the `vfmul.d vd, vj, vk` instruction.  */
4912 static void __attribute__((unused))
4913 tcg_out_opc_vfmul_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4914 {
4915     tcg_out32(s, encode_vdvjvk_insn(OPC_VFMUL_D, vd, vj, vk));
4916 }
4917
4918 /* Emits the `vfdiv.s vd, vj, vk` instruction.  */
4919 static void __attribute__((unused))
4920 tcg_out_opc_vfdiv_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4921 {
4922     tcg_out32(s, encode_vdvjvk_insn(OPC_VFDIV_S, vd, vj, vk));
4923 }
4924
4925 /* Emits the `vfdiv.d vd, vj, vk` instruction.  */
4926 static void __attribute__((unused))
4927 tcg_out_opc_vfdiv_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4928 {
4929     tcg_out32(s, encode_vdvjvk_insn(OPC_VFDIV_D, vd, vj, vk));
4930 }
4931
4932 /* Emits the `vfmax.s vd, vj, vk` instruction.  */
4933 static void __attribute__((unused))
4934 tcg_out_opc_vfmax_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4935 {
4936     tcg_out32(s, encode_vdvjvk_insn(OPC_VFMAX_S, vd, vj, vk));
4937 }
4938
4939 /* Emits the `vfmax.d vd, vj, vk` instruction.  */
4940 static void __attribute__((unused))
4941 tcg_out_opc_vfmax_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4942 {
4943     tcg_out32(s, encode_vdvjvk_insn(OPC_VFMAX_D, vd, vj, vk));
4944 }
4945
4946 /* Emits the `vfmin.s vd, vj, vk` instruction.  */
4947 static void __attribute__((unused))
4948 tcg_out_opc_vfmin_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4949 {
4950     tcg_out32(s, encode_vdvjvk_insn(OPC_VFMIN_S, vd, vj, vk));
4951 }
4952
4953 /* Emits the `vfmin.d vd, vj, vk` instruction.  */
4954 static void __attribute__((unused))
4955 tcg_out_opc_vfmin_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4956 {
4957     tcg_out32(s, encode_vdvjvk_insn(OPC_VFMIN_D, vd, vj, vk));
4958 }
4959
4960 /* Emits the `vfmaxa.s vd, vj, vk` instruction.  */
4961 static void __attribute__((unused))
4962 tcg_out_opc_vfmaxa_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4963 {
4964     tcg_out32(s, encode_vdvjvk_insn(OPC_VFMAXA_S, vd, vj, vk));
4965 }
4966
4967 /* Emits the `vfmaxa.d vd, vj, vk` instruction.  */
4968 static void __attribute__((unused))
4969 tcg_out_opc_vfmaxa_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4970 {
4971     tcg_out32(s, encode_vdvjvk_insn(OPC_VFMAXA_D, vd, vj, vk));
4972 }
4973
4974 /* Emits the `vfmina.s vd, vj, vk` instruction.  */
4975 static void __attribute__((unused))
4976 tcg_out_opc_vfmina_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4977 {
4978     tcg_out32(s, encode_vdvjvk_insn(OPC_VFMINA_S, vd, vj, vk));
4979 }
4980
4981 /* Emits the `vfmina.d vd, vj, vk` instruction.  */
4982 static void __attribute__((unused))
4983 tcg_out_opc_vfmina_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4984 {
4985     tcg_out32(s, encode_vdvjvk_insn(OPC_VFMINA_D, vd, vj, vk));
4986 }
4987
4988 /* Emits the `vfcvt.h.s vd, vj, vk` instruction.  */
4989 static void __attribute__((unused))
4990 tcg_out_opc_vfcvt_h_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4991 {
4992     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCVT_H_S, vd, vj, vk));
4993 }
4994
4995 /* Emits the `vfcvt.s.d vd, vj, vk` instruction.  */
4996 static void __attribute__((unused))
4997 tcg_out_opc_vfcvt_s_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
4998 {
4999     tcg_out32(s, encode_vdvjvk_insn(OPC_VFCVT_S_D, vd, vj, vk));
5000 }
5001
5002 /* Emits the `vffint.s.l vd, vj, vk` instruction.  */
5003 static void __attribute__((unused))
5004 tcg_out_opc_vffint_s_l(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
5005 {
5006     tcg_out32(s, encode_vdvjvk_insn(OPC_VFFINT_S_L, vd, vj, vk));
5007 }
5008
5009 /* Emits the `vftint.w.d vd, vj, vk` instruction.  */
5010 static void __attribute__((unused))
5011 tcg_out_opc_vftint_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
5012 {
5013     tcg_out32(s, encode_vdvjvk_insn(OPC_VFTINT_W_D, vd, vj, vk));
5014 }
5015
5016 /* Emits the `vftintrm.w.d vd, vj, vk` instruction.  */
5017 static void __attribute__((unused))
5018 tcg_out_opc_vftintrm_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
5019 {
5020     tcg_out32(s, encode_vdvjvk_insn(OPC_VFTINTRM_W_D, vd, vj, vk));
5021 }
5022
5023 /* Emits the `vftintrp.w.d vd, vj, vk` instruction.  */
5024 static void __attribute__((unused))
5025 tcg_out_opc_vftintrp_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
5026 {
5027     tcg_out32(s, encode_vdvjvk_insn(OPC_VFTINTRP_W_D, vd, vj, vk));
5028 }
5029
5030 /* Emits the `vftintrz.w.d vd, vj, vk` instruction.  */
5031 static void __attribute__((unused))
5032 tcg_out_opc_vftintrz_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
5033 {
5034     tcg_out32(s, encode_vdvjvk_insn(OPC_VFTINTRZ_W_D, vd, vj, vk));
5035 }
5036
5037 /* Emits the `vftintrne.w.d vd, vj, vk` instruction.  */
5038 static void __attribute__((unused))
5039 tcg_out_opc_vftintrne_w_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
5040 {
5041     tcg_out32(s, encode_vdvjvk_insn(OPC_VFTINTRNE_W_D, vd, vj, vk));
5042 }
5043
5044 /* Emits the `vshuf.h vd, vj, vk` instruction.  */
5045 static void __attribute__((unused))
5046 tcg_out_opc_vshuf_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
5047 {
5048     tcg_out32(s, encode_vdvjvk_insn(OPC_VSHUF_H, vd, vj, vk));
5049 }
5050
5051 /* Emits the `vshuf.w vd, vj, vk` instruction.  */
5052 static void __attribute__((unused))
5053 tcg_out_opc_vshuf_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
5054 {
5055     tcg_out32(s, encode_vdvjvk_insn(OPC_VSHUF_W, vd, vj, vk));
5056 }
5057
5058 /* Emits the `vshuf.d vd, vj, vk` instruction.  */
5059 static void __attribute__((unused))
5060 tcg_out_opc_vshuf_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
5061 {
5062     tcg_out32(s, encode_vdvjvk_insn(OPC_VSHUF_D, vd, vj, vk));
5063 }
5064
5065 /* Emits the `vseqi.b vd, vj, sk5` instruction.  */
5066 static void __attribute__((unused))
5067 tcg_out_opc_vseqi_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5068 {
5069     tcg_out32(s, encode_vdvjsk5_insn(OPC_VSEQI_B, vd, vj, sk5));
5070 }
5071
5072 /* Emits the `vseqi.h vd, vj, sk5` instruction.  */
5073 static void __attribute__((unused))
5074 tcg_out_opc_vseqi_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5075 {
5076     tcg_out32(s, encode_vdvjsk5_insn(OPC_VSEQI_H, vd, vj, sk5));
5077 }
5078
5079 /* Emits the `vseqi.w vd, vj, sk5` instruction.  */
5080 static void __attribute__((unused))
5081 tcg_out_opc_vseqi_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5082 {
5083     tcg_out32(s, encode_vdvjsk5_insn(OPC_VSEQI_W, vd, vj, sk5));
5084 }
5085
5086 /* Emits the `vseqi.d vd, vj, sk5` instruction.  */
5087 static void __attribute__((unused))
5088 tcg_out_opc_vseqi_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5089 {
5090     tcg_out32(s, encode_vdvjsk5_insn(OPC_VSEQI_D, vd, vj, sk5));
5091 }
5092
5093 /* Emits the `vslei.b vd, vj, sk5` instruction.  */
5094 static void __attribute__((unused))
5095 tcg_out_opc_vslei_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5096 {
5097     tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLEI_B, vd, vj, sk5));
5098 }
5099
5100 /* Emits the `vslei.h vd, vj, sk5` instruction.  */
5101 static void __attribute__((unused))
5102 tcg_out_opc_vslei_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5103 {
5104     tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLEI_H, vd, vj, sk5));
5105 }
5106
5107 /* Emits the `vslei.w vd, vj, sk5` instruction.  */
5108 static void __attribute__((unused))
5109 tcg_out_opc_vslei_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5110 {
5111     tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLEI_W, vd, vj, sk5));
5112 }
5113
5114 /* Emits the `vslei.d vd, vj, sk5` instruction.  */
5115 static void __attribute__((unused))
5116 tcg_out_opc_vslei_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5117 {
5118     tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLEI_D, vd, vj, sk5));
5119 }
5120
5121 /* Emits the `vslei.bu vd, vj, uk5` instruction.  */
5122 static void __attribute__((unused))
5123 tcg_out_opc_vslei_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5124 {
5125     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLEI_BU, vd, vj, uk5));
5126 }
5127
5128 /* Emits the `vslei.hu vd, vj, uk5` instruction.  */
5129 static void __attribute__((unused))
5130 tcg_out_opc_vslei_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5131 {
5132     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLEI_HU, vd, vj, uk5));
5133 }
5134
5135 /* Emits the `vslei.wu vd, vj, uk5` instruction.  */
5136 static void __attribute__((unused))
5137 tcg_out_opc_vslei_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5138 {
5139     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLEI_WU, vd, vj, uk5));
5140 }
5141
5142 /* Emits the `vslei.du vd, vj, uk5` instruction.  */
5143 static void __attribute__((unused))
5144 tcg_out_opc_vslei_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5145 {
5146     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLEI_DU, vd, vj, uk5));
5147 }
5148
5149 /* Emits the `vslti.b vd, vj, sk5` instruction.  */
5150 static void __attribute__((unused))
5151 tcg_out_opc_vslti_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5152 {
5153     tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLTI_B, vd, vj, sk5));
5154 }
5155
5156 /* Emits the `vslti.h vd, vj, sk5` instruction.  */
5157 static void __attribute__((unused))
5158 tcg_out_opc_vslti_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5159 {
5160     tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLTI_H, vd, vj, sk5));
5161 }
5162
5163 /* Emits the `vslti.w vd, vj, sk5` instruction.  */
5164 static void __attribute__((unused))
5165 tcg_out_opc_vslti_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5166 {
5167     tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLTI_W, vd, vj, sk5));
5168 }
5169
5170 /* Emits the `vslti.d vd, vj, sk5` instruction.  */
5171 static void __attribute__((unused))
5172 tcg_out_opc_vslti_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5173 {
5174     tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLTI_D, vd, vj, sk5));
5175 }
5176
5177 /* Emits the `vslti.bu vd, vj, uk5` instruction.  */
5178 static void __attribute__((unused))
5179 tcg_out_opc_vslti_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5180 {
5181     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLTI_BU, vd, vj, uk5));
5182 }
5183
5184 /* Emits the `vslti.hu vd, vj, uk5` instruction.  */
5185 static void __attribute__((unused))
5186 tcg_out_opc_vslti_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5187 {
5188     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLTI_HU, vd, vj, uk5));
5189 }
5190
5191 /* Emits the `vslti.wu vd, vj, uk5` instruction.  */
5192 static void __attribute__((unused))
5193 tcg_out_opc_vslti_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5194 {
5195     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLTI_WU, vd, vj, uk5));
5196 }
5197
5198 /* Emits the `vslti.du vd, vj, uk5` instruction.  */
5199 static void __attribute__((unused))
5200 tcg_out_opc_vslti_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5201 {
5202     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLTI_DU, vd, vj, uk5));
5203 }
5204
5205 /* Emits the `vaddi.bu vd, vj, uk5` instruction.  */
5206 static void __attribute__((unused))
5207 tcg_out_opc_vaddi_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5208 {
5209     tcg_out32(s, encode_vdvjuk5_insn(OPC_VADDI_BU, vd, vj, uk5));
5210 }
5211
5212 /* Emits the `vaddi.hu vd, vj, uk5` instruction.  */
5213 static void __attribute__((unused))
5214 tcg_out_opc_vaddi_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5215 {
5216     tcg_out32(s, encode_vdvjuk5_insn(OPC_VADDI_HU, vd, vj, uk5));
5217 }
5218
5219 /* Emits the `vaddi.wu vd, vj, uk5` instruction.  */
5220 static void __attribute__((unused))
5221 tcg_out_opc_vaddi_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5222 {
5223     tcg_out32(s, encode_vdvjuk5_insn(OPC_VADDI_WU, vd, vj, uk5));
5224 }
5225
5226 /* Emits the `vaddi.du vd, vj, uk5` instruction.  */
5227 static void __attribute__((unused))
5228 tcg_out_opc_vaddi_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5229 {
5230     tcg_out32(s, encode_vdvjuk5_insn(OPC_VADDI_DU, vd, vj, uk5));
5231 }
5232
5233 /* Emits the `vsubi.bu vd, vj, uk5` instruction.  */
5234 static void __attribute__((unused))
5235 tcg_out_opc_vsubi_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5236 {
5237     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSUBI_BU, vd, vj, uk5));
5238 }
5239
5240 /* Emits the `vsubi.hu vd, vj, uk5` instruction.  */
5241 static void __attribute__((unused))
5242 tcg_out_opc_vsubi_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5243 {
5244     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSUBI_HU, vd, vj, uk5));
5245 }
5246
5247 /* Emits the `vsubi.wu vd, vj, uk5` instruction.  */
5248 static void __attribute__((unused))
5249 tcg_out_opc_vsubi_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5250 {
5251     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSUBI_WU, vd, vj, uk5));
5252 }
5253
5254 /* Emits the `vsubi.du vd, vj, uk5` instruction.  */
5255 static void __attribute__((unused))
5256 tcg_out_opc_vsubi_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5257 {
5258     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSUBI_DU, vd, vj, uk5));
5259 }
5260
5261 /* Emits the `vbsll.v vd, vj, uk5` instruction.  */
5262 static void __attribute__((unused))
5263 tcg_out_opc_vbsll_v(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5264 {
5265     tcg_out32(s, encode_vdvjuk5_insn(OPC_VBSLL_V, vd, vj, uk5));
5266 }
5267
5268 /* Emits the `vbsrl.v vd, vj, uk5` instruction.  */
5269 static void __attribute__((unused))
5270 tcg_out_opc_vbsrl_v(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5271 {
5272     tcg_out32(s, encode_vdvjuk5_insn(OPC_VBSRL_V, vd, vj, uk5));
5273 }
5274
5275 /* Emits the `vmaxi.b vd, vj, sk5` instruction.  */
5276 static void __attribute__((unused))
5277 tcg_out_opc_vmaxi_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5278 {
5279     tcg_out32(s, encode_vdvjsk5_insn(OPC_VMAXI_B, vd, vj, sk5));
5280 }
5281
5282 /* Emits the `vmaxi.h vd, vj, sk5` instruction.  */
5283 static void __attribute__((unused))
5284 tcg_out_opc_vmaxi_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5285 {
5286     tcg_out32(s, encode_vdvjsk5_insn(OPC_VMAXI_H, vd, vj, sk5));
5287 }
5288
5289 /* Emits the `vmaxi.w vd, vj, sk5` instruction.  */
5290 static void __attribute__((unused))
5291 tcg_out_opc_vmaxi_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5292 {
5293     tcg_out32(s, encode_vdvjsk5_insn(OPC_VMAXI_W, vd, vj, sk5));
5294 }
5295
5296 /* Emits the `vmaxi.d vd, vj, sk5` instruction.  */
5297 static void __attribute__((unused))
5298 tcg_out_opc_vmaxi_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5299 {
5300     tcg_out32(s, encode_vdvjsk5_insn(OPC_VMAXI_D, vd, vj, sk5));
5301 }
5302
5303 /* Emits the `vmini.b vd, vj, sk5` instruction.  */
5304 static void __attribute__((unused))
5305 tcg_out_opc_vmini_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5306 {
5307     tcg_out32(s, encode_vdvjsk5_insn(OPC_VMINI_B, vd, vj, sk5));
5308 }
5309
5310 /* Emits the `vmini.h vd, vj, sk5` instruction.  */
5311 static void __attribute__((unused))
5312 tcg_out_opc_vmini_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5313 {
5314     tcg_out32(s, encode_vdvjsk5_insn(OPC_VMINI_H, vd, vj, sk5));
5315 }
5316
5317 /* Emits the `vmini.w vd, vj, sk5` instruction.  */
5318 static void __attribute__((unused))
5319 tcg_out_opc_vmini_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5320 {
5321     tcg_out32(s, encode_vdvjsk5_insn(OPC_VMINI_W, vd, vj, sk5));
5322 }
5323
5324 /* Emits the `vmini.d vd, vj, sk5` instruction.  */
5325 static void __attribute__((unused))
5326 tcg_out_opc_vmini_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
5327 {
5328     tcg_out32(s, encode_vdvjsk5_insn(OPC_VMINI_D, vd, vj, sk5));
5329 }
5330
5331 /* Emits the `vmaxi.bu vd, vj, uk5` instruction.  */
5332 static void __attribute__((unused))
5333 tcg_out_opc_vmaxi_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5334 {
5335     tcg_out32(s, encode_vdvjuk5_insn(OPC_VMAXI_BU, vd, vj, uk5));
5336 }
5337
5338 /* Emits the `vmaxi.hu vd, vj, uk5` instruction.  */
5339 static void __attribute__((unused))
5340 tcg_out_opc_vmaxi_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5341 {
5342     tcg_out32(s, encode_vdvjuk5_insn(OPC_VMAXI_HU, vd, vj, uk5));
5343 }
5344
5345 /* Emits the `vmaxi.wu vd, vj, uk5` instruction.  */
5346 static void __attribute__((unused))
5347 tcg_out_opc_vmaxi_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5348 {
5349     tcg_out32(s, encode_vdvjuk5_insn(OPC_VMAXI_WU, vd, vj, uk5));
5350 }
5351
5352 /* Emits the `vmaxi.du vd, vj, uk5` instruction.  */
5353 static void __attribute__((unused))
5354 tcg_out_opc_vmaxi_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5355 {
5356     tcg_out32(s, encode_vdvjuk5_insn(OPC_VMAXI_DU, vd, vj, uk5));
5357 }
5358
5359 /* Emits the `vmini.bu vd, vj, uk5` instruction.  */
5360 static void __attribute__((unused))
5361 tcg_out_opc_vmini_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5362 {
5363     tcg_out32(s, encode_vdvjuk5_insn(OPC_VMINI_BU, vd, vj, uk5));
5364 }
5365
5366 /* Emits the `vmini.hu vd, vj, uk5` instruction.  */
5367 static void __attribute__((unused))
5368 tcg_out_opc_vmini_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5369 {
5370     tcg_out32(s, encode_vdvjuk5_insn(OPC_VMINI_HU, vd, vj, uk5));
5371 }
5372
5373 /* Emits the `vmini.wu vd, vj, uk5` instruction.  */
5374 static void __attribute__((unused))
5375 tcg_out_opc_vmini_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5376 {
5377     tcg_out32(s, encode_vdvjuk5_insn(OPC_VMINI_WU, vd, vj, uk5));
5378 }
5379
5380 /* Emits the `vmini.du vd, vj, uk5` instruction.  */
5381 static void __attribute__((unused))
5382 tcg_out_opc_vmini_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5383 {
5384     tcg_out32(s, encode_vdvjuk5_insn(OPC_VMINI_DU, vd, vj, uk5));
5385 }
5386
5387 /* Emits the `vfrstpi.b vd, vj, uk5` instruction.  */
5388 static void __attribute__((unused))
5389 tcg_out_opc_vfrstpi_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5390 {
5391     tcg_out32(s, encode_vdvjuk5_insn(OPC_VFRSTPI_B, vd, vj, uk5));
5392 }
5393
5394 /* Emits the `vfrstpi.h vd, vj, uk5` instruction.  */
5395 static void __attribute__((unused))
5396 tcg_out_opc_vfrstpi_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
5397 {
5398     tcg_out32(s, encode_vdvjuk5_insn(OPC_VFRSTPI_H, vd, vj, uk5));
5399 }
5400
5401 /* Emits the `vclo.b vd, vj` instruction.  */
5402 static void __attribute__((unused))
5403 tcg_out_opc_vclo_b(TCGContext *s, TCGReg vd, TCGReg vj)
5404 {
5405     tcg_out32(s, encode_vdvj_insn(OPC_VCLO_B, vd, vj));
5406 }
5407
5408 /* Emits the `vclo.h vd, vj` instruction.  */
5409 static void __attribute__((unused))
5410 tcg_out_opc_vclo_h(TCGContext *s, TCGReg vd, TCGReg vj)
5411 {
5412     tcg_out32(s, encode_vdvj_insn(OPC_VCLO_H, vd, vj));
5413 }
5414
5415 /* Emits the `vclo.w vd, vj` instruction.  */
5416 static void __attribute__((unused))
5417 tcg_out_opc_vclo_w(TCGContext *s, TCGReg vd, TCGReg vj)
5418 {
5419     tcg_out32(s, encode_vdvj_insn(OPC_VCLO_W, vd, vj));
5420 }
5421
5422 /* Emits the `vclo.d vd, vj` instruction.  */
5423 static void __attribute__((unused))
5424 tcg_out_opc_vclo_d(TCGContext *s, TCGReg vd, TCGReg vj)
5425 {
5426     tcg_out32(s, encode_vdvj_insn(OPC_VCLO_D, vd, vj));
5427 }
5428
5429 /* Emits the `vclz.b vd, vj` instruction.  */
5430 static void __attribute__((unused))
5431 tcg_out_opc_vclz_b(TCGContext *s, TCGReg vd, TCGReg vj)
5432 {
5433     tcg_out32(s, encode_vdvj_insn(OPC_VCLZ_B, vd, vj));
5434 }
5435
5436 /* Emits the `vclz.h vd, vj` instruction.  */
5437 static void __attribute__((unused))
5438 tcg_out_opc_vclz_h(TCGContext *s, TCGReg vd, TCGReg vj)
5439 {
5440     tcg_out32(s, encode_vdvj_insn(OPC_VCLZ_H, vd, vj));
5441 }
5442
5443 /* Emits the `vclz.w vd, vj` instruction.  */
5444 static void __attribute__((unused))
5445 tcg_out_opc_vclz_w(TCGContext *s, TCGReg vd, TCGReg vj)
5446 {
5447     tcg_out32(s, encode_vdvj_insn(OPC_VCLZ_W, vd, vj));
5448 }
5449
5450 /* Emits the `vclz.d vd, vj` instruction.  */
5451 static void __attribute__((unused))
5452 tcg_out_opc_vclz_d(TCGContext *s, TCGReg vd, TCGReg vj)
5453 {
5454     tcg_out32(s, encode_vdvj_insn(OPC_VCLZ_D, vd, vj));
5455 }
5456
5457 /* Emits the `vpcnt.b vd, vj` instruction.  */
5458 static void __attribute__((unused))
5459 tcg_out_opc_vpcnt_b(TCGContext *s, TCGReg vd, TCGReg vj)
5460 {
5461     tcg_out32(s, encode_vdvj_insn(OPC_VPCNT_B, vd, vj));
5462 }
5463
5464 /* Emits the `vpcnt.h vd, vj` instruction.  */
5465 static void __attribute__((unused))
5466 tcg_out_opc_vpcnt_h(TCGContext *s, TCGReg vd, TCGReg vj)
5467 {
5468     tcg_out32(s, encode_vdvj_insn(OPC_VPCNT_H, vd, vj));
5469 }
5470
5471 /* Emits the `vpcnt.w vd, vj` instruction.  */
5472 static void __attribute__((unused))
5473 tcg_out_opc_vpcnt_w(TCGContext *s, TCGReg vd, TCGReg vj)
5474 {
5475     tcg_out32(s, encode_vdvj_insn(OPC_VPCNT_W, vd, vj));
5476 }
5477
5478 /* Emits the `vpcnt.d vd, vj` instruction.  */
5479 static void __attribute__((unused))
5480 tcg_out_opc_vpcnt_d(TCGContext *s, TCGReg vd, TCGReg vj)
5481 {
5482     tcg_out32(s, encode_vdvj_insn(OPC_VPCNT_D, vd, vj));
5483 }
5484
5485 /* Emits the `vneg.b vd, vj` instruction.  */
5486 static void __attribute__((unused))
5487 tcg_out_opc_vneg_b(TCGContext *s, TCGReg vd, TCGReg vj)
5488 {
5489     tcg_out32(s, encode_vdvj_insn(OPC_VNEG_B, vd, vj));
5490 }
5491
5492 /* Emits the `vneg.h vd, vj` instruction.  */
5493 static void __attribute__((unused))
5494 tcg_out_opc_vneg_h(TCGContext *s, TCGReg vd, TCGReg vj)
5495 {
5496     tcg_out32(s, encode_vdvj_insn(OPC_VNEG_H, vd, vj));
5497 }
5498
5499 /* Emits the `vneg.w vd, vj` instruction.  */
5500 static void __attribute__((unused))
5501 tcg_out_opc_vneg_w(TCGContext *s, TCGReg vd, TCGReg vj)
5502 {
5503     tcg_out32(s, encode_vdvj_insn(OPC_VNEG_W, vd, vj));
5504 }
5505
5506 /* Emits the `vneg.d vd, vj` instruction.  */
5507 static void __attribute__((unused))
5508 tcg_out_opc_vneg_d(TCGContext *s, TCGReg vd, TCGReg vj)
5509 {
5510     tcg_out32(s, encode_vdvj_insn(OPC_VNEG_D, vd, vj));
5511 }
5512
5513 /* Emits the `vmskltz.b vd, vj` instruction.  */
5514 static void __attribute__((unused))
5515 tcg_out_opc_vmskltz_b(TCGContext *s, TCGReg vd, TCGReg vj)
5516 {
5517     tcg_out32(s, encode_vdvj_insn(OPC_VMSKLTZ_B, vd, vj));
5518 }
5519
5520 /* Emits the `vmskltz.h vd, vj` instruction.  */
5521 static void __attribute__((unused))
5522 tcg_out_opc_vmskltz_h(TCGContext *s, TCGReg vd, TCGReg vj)
5523 {
5524     tcg_out32(s, encode_vdvj_insn(OPC_VMSKLTZ_H, vd, vj));
5525 }
5526
5527 /* Emits the `vmskltz.w vd, vj` instruction.  */
5528 static void __attribute__((unused))
5529 tcg_out_opc_vmskltz_w(TCGContext *s, TCGReg vd, TCGReg vj)
5530 {
5531     tcg_out32(s, encode_vdvj_insn(OPC_VMSKLTZ_W, vd, vj));
5532 }
5533
5534 /* Emits the `vmskltz.d vd, vj` instruction.  */
5535 static void __attribute__((unused))
5536 tcg_out_opc_vmskltz_d(TCGContext *s, TCGReg vd, TCGReg vj)
5537 {
5538     tcg_out32(s, encode_vdvj_insn(OPC_VMSKLTZ_D, vd, vj));
5539 }
5540
5541 /* Emits the `vmskgez.b vd, vj` instruction.  */
5542 static void __attribute__((unused))
5543 tcg_out_opc_vmskgez_b(TCGContext *s, TCGReg vd, TCGReg vj)
5544 {
5545     tcg_out32(s, encode_vdvj_insn(OPC_VMSKGEZ_B, vd, vj));
5546 }
5547
5548 /* Emits the `vmsknz.b vd, vj` instruction.  */
5549 static void __attribute__((unused))
5550 tcg_out_opc_vmsknz_b(TCGContext *s, TCGReg vd, TCGReg vj)
5551 {
5552     tcg_out32(s, encode_vdvj_insn(OPC_VMSKNZ_B, vd, vj));
5553 }
5554
5555 /* Emits the `vseteqz.v cd, vj` instruction.  */
5556 static void __attribute__((unused))
5557 tcg_out_opc_vseteqz_v(TCGContext *s, TCGReg cd, TCGReg vj)
5558 {
5559     tcg_out32(s, encode_cdvj_insn(OPC_VSETEQZ_V, cd, vj));
5560 }
5561
5562 /* Emits the `vsetnez.v cd, vj` instruction.  */
5563 static void __attribute__((unused))
5564 tcg_out_opc_vsetnez_v(TCGContext *s, TCGReg cd, TCGReg vj)
5565 {
5566     tcg_out32(s, encode_cdvj_insn(OPC_VSETNEZ_V, cd, vj));
5567 }
5568
5569 /* Emits the `vsetanyeqz.b cd, vj` instruction.  */
5570 static void __attribute__((unused))
5571 tcg_out_opc_vsetanyeqz_b(TCGContext *s, TCGReg cd, TCGReg vj)
5572 {
5573     tcg_out32(s, encode_cdvj_insn(OPC_VSETANYEQZ_B, cd, vj));
5574 }
5575
5576 /* Emits the `vsetanyeqz.h cd, vj` instruction.  */
5577 static void __attribute__((unused))
5578 tcg_out_opc_vsetanyeqz_h(TCGContext *s, TCGReg cd, TCGReg vj)
5579 {
5580     tcg_out32(s, encode_cdvj_insn(OPC_VSETANYEQZ_H, cd, vj));
5581 }
5582
5583 /* Emits the `vsetanyeqz.w cd, vj` instruction.  */
5584 static void __attribute__((unused))
5585 tcg_out_opc_vsetanyeqz_w(TCGContext *s, TCGReg cd, TCGReg vj)
5586 {
5587     tcg_out32(s, encode_cdvj_insn(OPC_VSETANYEQZ_W, cd, vj));
5588 }
5589
5590 /* Emits the `vsetanyeqz.d cd, vj` instruction.  */
5591 static void __attribute__((unused))
5592 tcg_out_opc_vsetanyeqz_d(TCGContext *s, TCGReg cd, TCGReg vj)
5593 {
5594     tcg_out32(s, encode_cdvj_insn(OPC_VSETANYEQZ_D, cd, vj));
5595 }
5596
5597 /* Emits the `vsetallnez.b cd, vj` instruction.  */
5598 static void __attribute__((unused))
5599 tcg_out_opc_vsetallnez_b(TCGContext *s, TCGReg cd, TCGReg vj)
5600 {
5601     tcg_out32(s, encode_cdvj_insn(OPC_VSETALLNEZ_B, cd, vj));
5602 }
5603
5604 /* Emits the `vsetallnez.h cd, vj` instruction.  */
5605 static void __attribute__((unused))
5606 tcg_out_opc_vsetallnez_h(TCGContext *s, TCGReg cd, TCGReg vj)
5607 {
5608     tcg_out32(s, encode_cdvj_insn(OPC_VSETALLNEZ_H, cd, vj));
5609 }
5610
5611 /* Emits the `vsetallnez.w cd, vj` instruction.  */
5612 static void __attribute__((unused))
5613 tcg_out_opc_vsetallnez_w(TCGContext *s, TCGReg cd, TCGReg vj)
5614 {
5615     tcg_out32(s, encode_cdvj_insn(OPC_VSETALLNEZ_W, cd, vj));
5616 }
5617
5618 /* Emits the `vsetallnez.d cd, vj` instruction.  */
5619 static void __attribute__((unused))
5620 tcg_out_opc_vsetallnez_d(TCGContext *s, TCGReg cd, TCGReg vj)
5621 {
5622     tcg_out32(s, encode_cdvj_insn(OPC_VSETALLNEZ_D, cd, vj));
5623 }
5624
5625 /* Emits the `vflogb.s vd, vj` instruction.  */
5626 static void __attribute__((unused))
5627 tcg_out_opc_vflogb_s(TCGContext *s, TCGReg vd, TCGReg vj)
5628 {
5629     tcg_out32(s, encode_vdvj_insn(OPC_VFLOGB_S, vd, vj));
5630 }
5631
5632 /* Emits the `vflogb.d vd, vj` instruction.  */
5633 static void __attribute__((unused))
5634 tcg_out_opc_vflogb_d(TCGContext *s, TCGReg vd, TCGReg vj)
5635 {
5636     tcg_out32(s, encode_vdvj_insn(OPC_VFLOGB_D, vd, vj));
5637 }
5638
5639 /* Emits the `vfclass.s vd, vj` instruction.  */
5640 static void __attribute__((unused))
5641 tcg_out_opc_vfclass_s(TCGContext *s, TCGReg vd, TCGReg vj)
5642 {
5643     tcg_out32(s, encode_vdvj_insn(OPC_VFCLASS_S, vd, vj));
5644 }
5645
5646 /* Emits the `vfclass.d vd, vj` instruction.  */
5647 static void __attribute__((unused))
5648 tcg_out_opc_vfclass_d(TCGContext *s, TCGReg vd, TCGReg vj)
5649 {
5650     tcg_out32(s, encode_vdvj_insn(OPC_VFCLASS_D, vd, vj));
5651 }
5652
5653 /* Emits the `vfsqrt.s vd, vj` instruction.  */
5654 static void __attribute__((unused))
5655 tcg_out_opc_vfsqrt_s(TCGContext *s, TCGReg vd, TCGReg vj)
5656 {
5657     tcg_out32(s, encode_vdvj_insn(OPC_VFSQRT_S, vd, vj));
5658 }
5659
5660 /* Emits the `vfsqrt.d vd, vj` instruction.  */
5661 static void __attribute__((unused))
5662 tcg_out_opc_vfsqrt_d(TCGContext *s, TCGReg vd, TCGReg vj)
5663 {
5664     tcg_out32(s, encode_vdvj_insn(OPC_VFSQRT_D, vd, vj));
5665 }
5666
5667 /* Emits the `vfrecip.s vd, vj` instruction.  */
5668 static void __attribute__((unused))
5669 tcg_out_opc_vfrecip_s(TCGContext *s, TCGReg vd, TCGReg vj)
5670 {
5671     tcg_out32(s, encode_vdvj_insn(OPC_VFRECIP_S, vd, vj));
5672 }
5673
5674 /* Emits the `vfrecip.d vd, vj` instruction.  */
5675 static void __attribute__((unused))
5676 tcg_out_opc_vfrecip_d(TCGContext *s, TCGReg vd, TCGReg vj)
5677 {
5678     tcg_out32(s, encode_vdvj_insn(OPC_VFRECIP_D, vd, vj));
5679 }
5680
5681 /* Emits the `vfrsqrt.s vd, vj` instruction.  */
5682 static void __attribute__((unused))
5683 tcg_out_opc_vfrsqrt_s(TCGContext *s, TCGReg vd, TCGReg vj)
5684 {
5685     tcg_out32(s, encode_vdvj_insn(OPC_VFRSQRT_S, vd, vj));
5686 }
5687
5688 /* Emits the `vfrsqrt.d vd, vj` instruction.  */
5689 static void __attribute__((unused))
5690 tcg_out_opc_vfrsqrt_d(TCGContext *s, TCGReg vd, TCGReg vj)
5691 {
5692     tcg_out32(s, encode_vdvj_insn(OPC_VFRSQRT_D, vd, vj));
5693 }
5694
5695 /* Emits the `vfrint.s vd, vj` instruction.  */
5696 static void __attribute__((unused))
5697 tcg_out_opc_vfrint_s(TCGContext *s, TCGReg vd, TCGReg vj)
5698 {
5699     tcg_out32(s, encode_vdvj_insn(OPC_VFRINT_S, vd, vj));
5700 }
5701
5702 /* Emits the `vfrint.d vd, vj` instruction.  */
5703 static void __attribute__((unused))
5704 tcg_out_opc_vfrint_d(TCGContext *s, TCGReg vd, TCGReg vj)
5705 {
5706     tcg_out32(s, encode_vdvj_insn(OPC_VFRINT_D, vd, vj));
5707 }
5708
5709 /* Emits the `vfrintrm.s vd, vj` instruction.  */
5710 static void __attribute__((unused))
5711 tcg_out_opc_vfrintrm_s(TCGContext *s, TCGReg vd, TCGReg vj)
5712 {
5713     tcg_out32(s, encode_vdvj_insn(OPC_VFRINTRM_S, vd, vj));
5714 }
5715
5716 /* Emits the `vfrintrm.d vd, vj` instruction.  */
5717 static void __attribute__((unused))
5718 tcg_out_opc_vfrintrm_d(TCGContext *s, TCGReg vd, TCGReg vj)
5719 {
5720     tcg_out32(s, encode_vdvj_insn(OPC_VFRINTRM_D, vd, vj));
5721 }
5722
5723 /* Emits the `vfrintrp.s vd, vj` instruction.  */
5724 static void __attribute__((unused))
5725 tcg_out_opc_vfrintrp_s(TCGContext *s, TCGReg vd, TCGReg vj)
5726 {
5727     tcg_out32(s, encode_vdvj_insn(OPC_VFRINTRP_S, vd, vj));
5728 }
5729
5730 /* Emits the `vfrintrp.d vd, vj` instruction.  */
5731 static void __attribute__((unused))
5732 tcg_out_opc_vfrintrp_d(TCGContext *s, TCGReg vd, TCGReg vj)
5733 {
5734     tcg_out32(s, encode_vdvj_insn(OPC_VFRINTRP_D, vd, vj));
5735 }
5736
5737 /* Emits the `vfrintrz.s vd, vj` instruction.  */
5738 static void __attribute__((unused))
5739 tcg_out_opc_vfrintrz_s(TCGContext *s, TCGReg vd, TCGReg vj)
5740 {
5741     tcg_out32(s, encode_vdvj_insn(OPC_VFRINTRZ_S, vd, vj));
5742 }
5743
5744 /* Emits the `vfrintrz.d vd, vj` instruction.  */
5745 static void __attribute__((unused))
5746 tcg_out_opc_vfrintrz_d(TCGContext *s, TCGReg vd, TCGReg vj)
5747 {
5748     tcg_out32(s, encode_vdvj_insn(OPC_VFRINTRZ_D, vd, vj));
5749 }
5750
5751 /* Emits the `vfrintrne.s vd, vj` instruction.  */
5752 static void __attribute__((unused))
5753 tcg_out_opc_vfrintrne_s(TCGContext *s, TCGReg vd, TCGReg vj)
5754 {
5755     tcg_out32(s, encode_vdvj_insn(OPC_VFRINTRNE_S, vd, vj));
5756 }
5757
5758 /* Emits the `vfrintrne.d vd, vj` instruction.  */
5759 static void __attribute__((unused))
5760 tcg_out_opc_vfrintrne_d(TCGContext *s, TCGReg vd, TCGReg vj)
5761 {
5762     tcg_out32(s, encode_vdvj_insn(OPC_VFRINTRNE_D, vd, vj));
5763 }
5764
5765 /* Emits the `vfcvtl.s.h vd, vj` instruction.  */
5766 static void __attribute__((unused))
5767 tcg_out_opc_vfcvtl_s_h(TCGContext *s, TCGReg vd, TCGReg vj)
5768 {
5769     tcg_out32(s, encode_vdvj_insn(OPC_VFCVTL_S_H, vd, vj));
5770 }
5771
5772 /* Emits the `vfcvth.s.h vd, vj` instruction.  */
5773 static void __attribute__((unused))
5774 tcg_out_opc_vfcvth_s_h(TCGContext *s, TCGReg vd, TCGReg vj)
5775 {
5776     tcg_out32(s, encode_vdvj_insn(OPC_VFCVTH_S_H, vd, vj));
5777 }
5778
5779 /* Emits the `vfcvtl.d.s vd, vj` instruction.  */
5780 static void __attribute__((unused))
5781 tcg_out_opc_vfcvtl_d_s(TCGContext *s, TCGReg vd, TCGReg vj)
5782 {
5783     tcg_out32(s, encode_vdvj_insn(OPC_VFCVTL_D_S, vd, vj));
5784 }
5785
5786 /* Emits the `vfcvth.d.s vd, vj` instruction.  */
5787 static void __attribute__((unused))
5788 tcg_out_opc_vfcvth_d_s(TCGContext *s, TCGReg vd, TCGReg vj)
5789 {
5790     tcg_out32(s, encode_vdvj_insn(OPC_VFCVTH_D_S, vd, vj));
5791 }
5792
5793 /* Emits the `vffint.s.w vd, vj` instruction.  */
5794 static void __attribute__((unused))
5795 tcg_out_opc_vffint_s_w(TCGContext *s, TCGReg vd, TCGReg vj)
5796 {
5797     tcg_out32(s, encode_vdvj_insn(OPC_VFFINT_S_W, vd, vj));
5798 }
5799
5800 /* Emits the `vffint.s.wu vd, vj` instruction.  */
5801 static void __attribute__((unused))
5802 tcg_out_opc_vffint_s_wu(TCGContext *s, TCGReg vd, TCGReg vj)
5803 {
5804     tcg_out32(s, encode_vdvj_insn(OPC_VFFINT_S_WU, vd, vj));
5805 }
5806
5807 /* Emits the `vffint.d.l vd, vj` instruction.  */
5808 static void __attribute__((unused))
5809 tcg_out_opc_vffint_d_l(TCGContext *s, TCGReg vd, TCGReg vj)
5810 {
5811     tcg_out32(s, encode_vdvj_insn(OPC_VFFINT_D_L, vd, vj));
5812 }
5813
5814 /* Emits the `vffint.d.lu vd, vj` instruction.  */
5815 static void __attribute__((unused))
5816 tcg_out_opc_vffint_d_lu(TCGContext *s, TCGReg vd, TCGReg vj)
5817 {
5818     tcg_out32(s, encode_vdvj_insn(OPC_VFFINT_D_LU, vd, vj));
5819 }
5820
5821 /* Emits the `vffintl.d.w vd, vj` instruction.  */
5822 static void __attribute__((unused))
5823 tcg_out_opc_vffintl_d_w(TCGContext *s, TCGReg vd, TCGReg vj)
5824 {
5825     tcg_out32(s, encode_vdvj_insn(OPC_VFFINTL_D_W, vd, vj));
5826 }
5827
5828 /* Emits the `vffinth.d.w vd, vj` instruction.  */
5829 static void __attribute__((unused))
5830 tcg_out_opc_vffinth_d_w(TCGContext *s, TCGReg vd, TCGReg vj)
5831 {
5832     tcg_out32(s, encode_vdvj_insn(OPC_VFFINTH_D_W, vd, vj));
5833 }
5834
5835 /* Emits the `vftint.w.s vd, vj` instruction.  */
5836 static void __attribute__((unused))
5837 tcg_out_opc_vftint_w_s(TCGContext *s, TCGReg vd, TCGReg vj)
5838 {
5839     tcg_out32(s, encode_vdvj_insn(OPC_VFTINT_W_S, vd, vj));
5840 }
5841
5842 /* Emits the `vftint.l.d vd, vj` instruction.  */
5843 static void __attribute__((unused))
5844 tcg_out_opc_vftint_l_d(TCGContext *s, TCGReg vd, TCGReg vj)
5845 {
5846     tcg_out32(s, encode_vdvj_insn(OPC_VFTINT_L_D, vd, vj));
5847 }
5848
5849 /* Emits the `vftintrm.w.s vd, vj` instruction.  */
5850 static void __attribute__((unused))
5851 tcg_out_opc_vftintrm_w_s(TCGContext *s, TCGReg vd, TCGReg vj)
5852 {
5853     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRM_W_S, vd, vj));
5854 }
5855
5856 /* Emits the `vftintrm.l.d vd, vj` instruction.  */
5857 static void __attribute__((unused))
5858 tcg_out_opc_vftintrm_l_d(TCGContext *s, TCGReg vd, TCGReg vj)
5859 {
5860     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRM_L_D, vd, vj));
5861 }
5862
5863 /* Emits the `vftintrp.w.s vd, vj` instruction.  */
5864 static void __attribute__((unused))
5865 tcg_out_opc_vftintrp_w_s(TCGContext *s, TCGReg vd, TCGReg vj)
5866 {
5867     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRP_W_S, vd, vj));
5868 }
5869
5870 /* Emits the `vftintrp.l.d vd, vj` instruction.  */
5871 static void __attribute__((unused))
5872 tcg_out_opc_vftintrp_l_d(TCGContext *s, TCGReg vd, TCGReg vj)
5873 {
5874     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRP_L_D, vd, vj));
5875 }
5876
5877 /* Emits the `vftintrz.w.s vd, vj` instruction.  */
5878 static void __attribute__((unused))
5879 tcg_out_opc_vftintrz_w_s(TCGContext *s, TCGReg vd, TCGReg vj)
5880 {
5881     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRZ_W_S, vd, vj));
5882 }
5883
5884 /* Emits the `vftintrz.l.d vd, vj` instruction.  */
5885 static void __attribute__((unused))
5886 tcg_out_opc_vftintrz_l_d(TCGContext *s, TCGReg vd, TCGReg vj)
5887 {
5888     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRZ_L_D, vd, vj));
5889 }
5890
5891 /* Emits the `vftintrne.w.s vd, vj` instruction.  */
5892 static void __attribute__((unused))
5893 tcg_out_opc_vftintrne_w_s(TCGContext *s, TCGReg vd, TCGReg vj)
5894 {
5895     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRNE_W_S, vd, vj));
5896 }
5897
5898 /* Emits the `vftintrne.l.d vd, vj` instruction.  */
5899 static void __attribute__((unused))
5900 tcg_out_opc_vftintrne_l_d(TCGContext *s, TCGReg vd, TCGReg vj)
5901 {
5902     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRNE_L_D, vd, vj));
5903 }
5904
5905 /* Emits the `vftint.wu.s vd, vj` instruction.  */
5906 static void __attribute__((unused))
5907 tcg_out_opc_vftint_wu_s(TCGContext *s, TCGReg vd, TCGReg vj)
5908 {
5909     tcg_out32(s, encode_vdvj_insn(OPC_VFTINT_WU_S, vd, vj));
5910 }
5911
5912 /* Emits the `vftint.lu.d vd, vj` instruction.  */
5913 static void __attribute__((unused))
5914 tcg_out_opc_vftint_lu_d(TCGContext *s, TCGReg vd, TCGReg vj)
5915 {
5916     tcg_out32(s, encode_vdvj_insn(OPC_VFTINT_LU_D, vd, vj));
5917 }
5918
5919 /* Emits the `vftintrz.wu.s vd, vj` instruction.  */
5920 static void __attribute__((unused))
5921 tcg_out_opc_vftintrz_wu_s(TCGContext *s, TCGReg vd, TCGReg vj)
5922 {
5923     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRZ_WU_S, vd, vj));
5924 }
5925
5926 /* Emits the `vftintrz.lu.d vd, vj` instruction.  */
5927 static void __attribute__((unused))
5928 tcg_out_opc_vftintrz_lu_d(TCGContext *s, TCGReg vd, TCGReg vj)
5929 {
5930     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRZ_LU_D, vd, vj));
5931 }
5932
5933 /* Emits the `vftintl.l.s vd, vj` instruction.  */
5934 static void __attribute__((unused))
5935 tcg_out_opc_vftintl_l_s(TCGContext *s, TCGReg vd, TCGReg vj)
5936 {
5937     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTL_L_S, vd, vj));
5938 }
5939
5940 /* Emits the `vftinth.l.s vd, vj` instruction.  */
5941 static void __attribute__((unused))
5942 tcg_out_opc_vftinth_l_s(TCGContext *s, TCGReg vd, TCGReg vj)
5943 {
5944     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTH_L_S, vd, vj));
5945 }
5946
5947 /* Emits the `vftintrml.l.s vd, vj` instruction.  */
5948 static void __attribute__((unused))
5949 tcg_out_opc_vftintrml_l_s(TCGContext *s, TCGReg vd, TCGReg vj)
5950 {
5951     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRML_L_S, vd, vj));
5952 }
5953
5954 /* Emits the `vftintrmh.l.s vd, vj` instruction.  */
5955 static void __attribute__((unused))
5956 tcg_out_opc_vftintrmh_l_s(TCGContext *s, TCGReg vd, TCGReg vj)
5957 {
5958     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRMH_L_S, vd, vj));
5959 }
5960
5961 /* Emits the `vftintrpl.l.s vd, vj` instruction.  */
5962 static void __attribute__((unused))
5963 tcg_out_opc_vftintrpl_l_s(TCGContext *s, TCGReg vd, TCGReg vj)
5964 {
5965     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRPL_L_S, vd, vj));
5966 }
5967
5968 /* Emits the `vftintrph.l.s vd, vj` instruction.  */
5969 static void __attribute__((unused))
5970 tcg_out_opc_vftintrph_l_s(TCGContext *s, TCGReg vd, TCGReg vj)
5971 {
5972     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRPH_L_S, vd, vj));
5973 }
5974
5975 /* Emits the `vftintrzl.l.s vd, vj` instruction.  */
5976 static void __attribute__((unused))
5977 tcg_out_opc_vftintrzl_l_s(TCGContext *s, TCGReg vd, TCGReg vj)
5978 {
5979     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRZL_L_S, vd, vj));
5980 }
5981
5982 /* Emits the `vftintrzh.l.s vd, vj` instruction.  */
5983 static void __attribute__((unused))
5984 tcg_out_opc_vftintrzh_l_s(TCGContext *s, TCGReg vd, TCGReg vj)
5985 {
5986     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRZH_L_S, vd, vj));
5987 }
5988
5989 /* Emits the `vftintrnel.l.s vd, vj` instruction.  */
5990 static void __attribute__((unused))
5991 tcg_out_opc_vftintrnel_l_s(TCGContext *s, TCGReg vd, TCGReg vj)
5992 {
5993     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRNEL_L_S, vd, vj));
5994 }
5995
5996 /* Emits the `vftintrneh.l.s vd, vj` instruction.  */
5997 static void __attribute__((unused))
5998 tcg_out_opc_vftintrneh_l_s(TCGContext *s, TCGReg vd, TCGReg vj)
5999 {
6000     tcg_out32(s, encode_vdvj_insn(OPC_VFTINTRNEH_L_S, vd, vj));
6001 }
6002
6003 /* Emits the `vexth.h.b vd, vj` instruction.  */
6004 static void __attribute__((unused))
6005 tcg_out_opc_vexth_h_b(TCGContext *s, TCGReg vd, TCGReg vj)
6006 {
6007     tcg_out32(s, encode_vdvj_insn(OPC_VEXTH_H_B, vd, vj));
6008 }
6009
6010 /* Emits the `vexth.w.h vd, vj` instruction.  */
6011 static void __attribute__((unused))
6012 tcg_out_opc_vexth_w_h(TCGContext *s, TCGReg vd, TCGReg vj)
6013 {
6014     tcg_out32(s, encode_vdvj_insn(OPC_VEXTH_W_H, vd, vj));
6015 }
6016
6017 /* Emits the `vexth.d.w vd, vj` instruction.  */
6018 static void __attribute__((unused))
6019 tcg_out_opc_vexth_d_w(TCGContext *s, TCGReg vd, TCGReg vj)
6020 {
6021     tcg_out32(s, encode_vdvj_insn(OPC_VEXTH_D_W, vd, vj));
6022 }
6023
6024 /* Emits the `vexth.q.d vd, vj` instruction.  */
6025 static void __attribute__((unused))
6026 tcg_out_opc_vexth_q_d(TCGContext *s, TCGReg vd, TCGReg vj)
6027 {
6028     tcg_out32(s, encode_vdvj_insn(OPC_VEXTH_Q_D, vd, vj));
6029 }
6030
6031 /* Emits the `vexth.hu.bu vd, vj` instruction.  */
6032 static void __attribute__((unused))
6033 tcg_out_opc_vexth_hu_bu(TCGContext *s, TCGReg vd, TCGReg vj)
6034 {
6035     tcg_out32(s, encode_vdvj_insn(OPC_VEXTH_HU_BU, vd, vj));
6036 }
6037
6038 /* Emits the `vexth.wu.hu vd, vj` instruction.  */
6039 static void __attribute__((unused))
6040 tcg_out_opc_vexth_wu_hu(TCGContext *s, TCGReg vd, TCGReg vj)
6041 {
6042     tcg_out32(s, encode_vdvj_insn(OPC_VEXTH_WU_HU, vd, vj));
6043 }
6044
6045 /* Emits the `vexth.du.wu vd, vj` instruction.  */
6046 static void __attribute__((unused))
6047 tcg_out_opc_vexth_du_wu(TCGContext *s, TCGReg vd, TCGReg vj)
6048 {
6049     tcg_out32(s, encode_vdvj_insn(OPC_VEXTH_DU_WU, vd, vj));
6050 }
6051
6052 /* Emits the `vexth.qu.du vd, vj` instruction.  */
6053 static void __attribute__((unused))
6054 tcg_out_opc_vexth_qu_du(TCGContext *s, TCGReg vd, TCGReg vj)
6055 {
6056     tcg_out32(s, encode_vdvj_insn(OPC_VEXTH_QU_DU, vd, vj));
6057 }
6058
6059 /* Emits the `vreplgr2vr.b vd, j` instruction.  */
6060 static void __attribute__((unused))
6061 tcg_out_opc_vreplgr2vr_b(TCGContext *s, TCGReg vd, TCGReg j)
6062 {
6063     tcg_out32(s, encode_vdj_insn(OPC_VREPLGR2VR_B, vd, j));
6064 }
6065
6066 /* Emits the `vreplgr2vr.h vd, j` instruction.  */
6067 static void __attribute__((unused))
6068 tcg_out_opc_vreplgr2vr_h(TCGContext *s, TCGReg vd, TCGReg j)
6069 {
6070     tcg_out32(s, encode_vdj_insn(OPC_VREPLGR2VR_H, vd, j));
6071 }
6072
6073 /* Emits the `vreplgr2vr.w vd, j` instruction.  */
6074 static void __attribute__((unused))
6075 tcg_out_opc_vreplgr2vr_w(TCGContext *s, TCGReg vd, TCGReg j)
6076 {
6077     tcg_out32(s, encode_vdj_insn(OPC_VREPLGR2VR_W, vd, j));
6078 }
6079
6080 /* Emits the `vreplgr2vr.d vd, j` instruction.  */
6081 static void __attribute__((unused))
6082 tcg_out_opc_vreplgr2vr_d(TCGContext *s, TCGReg vd, TCGReg j)
6083 {
6084     tcg_out32(s, encode_vdj_insn(OPC_VREPLGR2VR_D, vd, j));
6085 }
6086
6087 /* Emits the `vrotri.b vd, vj, uk3` instruction.  */
6088 static void __attribute__((unused))
6089 tcg_out_opc_vrotri_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6090 {
6091     tcg_out32(s, encode_vdvjuk3_insn(OPC_VROTRI_B, vd, vj, uk3));
6092 }
6093
6094 /* Emits the `vrotri.h vd, vj, uk4` instruction.  */
6095 static void __attribute__((unused))
6096 tcg_out_opc_vrotri_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6097 {
6098     tcg_out32(s, encode_vdvjuk4_insn(OPC_VROTRI_H, vd, vj, uk4));
6099 }
6100
6101 /* Emits the `vrotri.w vd, vj, uk5` instruction.  */
6102 static void __attribute__((unused))
6103 tcg_out_opc_vrotri_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6104 {
6105     tcg_out32(s, encode_vdvjuk5_insn(OPC_VROTRI_W, vd, vj, uk5));
6106 }
6107
6108 /* Emits the `vrotri.d vd, vj, uk6` instruction.  */
6109 static void __attribute__((unused))
6110 tcg_out_opc_vrotri_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6111 {
6112     tcg_out32(s, encode_vdvjuk6_insn(OPC_VROTRI_D, vd, vj, uk6));
6113 }
6114
6115 /* Emits the `vsrlri.b vd, vj, uk3` instruction.  */
6116 static void __attribute__((unused))
6117 tcg_out_opc_vsrlri_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6118 {
6119     tcg_out32(s, encode_vdvjuk3_insn(OPC_VSRLRI_B, vd, vj, uk3));
6120 }
6121
6122 /* Emits the `vsrlri.h vd, vj, uk4` instruction.  */
6123 static void __attribute__((unused))
6124 tcg_out_opc_vsrlri_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6125 {
6126     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSRLRI_H, vd, vj, uk4));
6127 }
6128
6129 /* Emits the `vsrlri.w vd, vj, uk5` instruction.  */
6130 static void __attribute__((unused))
6131 tcg_out_opc_vsrlri_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6132 {
6133     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSRLRI_W, vd, vj, uk5));
6134 }
6135
6136 /* Emits the `vsrlri.d vd, vj, uk6` instruction.  */
6137 static void __attribute__((unused))
6138 tcg_out_opc_vsrlri_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6139 {
6140     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSRLRI_D, vd, vj, uk6));
6141 }
6142
6143 /* Emits the `vsrari.b vd, vj, uk3` instruction.  */
6144 static void __attribute__((unused))
6145 tcg_out_opc_vsrari_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6146 {
6147     tcg_out32(s, encode_vdvjuk3_insn(OPC_VSRARI_B, vd, vj, uk3));
6148 }
6149
6150 /* Emits the `vsrari.h vd, vj, uk4` instruction.  */
6151 static void __attribute__((unused))
6152 tcg_out_opc_vsrari_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6153 {
6154     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSRARI_H, vd, vj, uk4));
6155 }
6156
6157 /* Emits the `vsrari.w vd, vj, uk5` instruction.  */
6158 static void __attribute__((unused))
6159 tcg_out_opc_vsrari_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6160 {
6161     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSRARI_W, vd, vj, uk5));
6162 }
6163
6164 /* Emits the `vsrari.d vd, vj, uk6` instruction.  */
6165 static void __attribute__((unused))
6166 tcg_out_opc_vsrari_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6167 {
6168     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSRARI_D, vd, vj, uk6));
6169 }
6170
6171 /* Emits the `vinsgr2vr.b vd, j, uk4` instruction.  */
6172 static void __attribute__((unused))
6173 tcg_out_opc_vinsgr2vr_b(TCGContext *s, TCGReg vd, TCGReg j, uint32_t uk4)
6174 {
6175     tcg_out32(s, encode_vdjuk4_insn(OPC_VINSGR2VR_B, vd, j, uk4));
6176 }
6177
6178 /* Emits the `vinsgr2vr.h vd, j, uk3` instruction.  */
6179 static void __attribute__((unused))
6180 tcg_out_opc_vinsgr2vr_h(TCGContext *s, TCGReg vd, TCGReg j, uint32_t uk3)
6181 {
6182     tcg_out32(s, encode_vdjuk3_insn(OPC_VINSGR2VR_H, vd, j, uk3));
6183 }
6184
6185 /* Emits the `vinsgr2vr.w vd, j, uk2` instruction.  */
6186 static void __attribute__((unused))
6187 tcg_out_opc_vinsgr2vr_w(TCGContext *s, TCGReg vd, TCGReg j, uint32_t uk2)
6188 {
6189     tcg_out32(s, encode_vdjuk2_insn(OPC_VINSGR2VR_W, vd, j, uk2));
6190 }
6191
6192 /* Emits the `vinsgr2vr.d vd, j, uk1` instruction.  */
6193 static void __attribute__((unused))
6194 tcg_out_opc_vinsgr2vr_d(TCGContext *s, TCGReg vd, TCGReg j, uint32_t uk1)
6195 {
6196     tcg_out32(s, encode_vdjuk1_insn(OPC_VINSGR2VR_D, vd, j, uk1));
6197 }
6198
6199 /* Emits the `vpickve2gr.b d, vj, uk4` instruction.  */
6200 static void __attribute__((unused))
6201 tcg_out_opc_vpickve2gr_b(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk4)
6202 {
6203     tcg_out32(s, encode_dvjuk4_insn(OPC_VPICKVE2GR_B, d, vj, uk4));
6204 }
6205
6206 /* Emits the `vpickve2gr.h d, vj, uk3` instruction.  */
6207 static void __attribute__((unused))
6208 tcg_out_opc_vpickve2gr_h(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk3)
6209 {
6210     tcg_out32(s, encode_dvjuk3_insn(OPC_VPICKVE2GR_H, d, vj, uk3));
6211 }
6212
6213 /* Emits the `vpickve2gr.w d, vj, uk2` instruction.  */
6214 static void __attribute__((unused))
6215 tcg_out_opc_vpickve2gr_w(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk2)
6216 {
6217     tcg_out32(s, encode_dvjuk2_insn(OPC_VPICKVE2GR_W, d, vj, uk2));
6218 }
6219
6220 /* Emits the `vpickve2gr.d d, vj, uk1` instruction.  */
6221 static void __attribute__((unused))
6222 tcg_out_opc_vpickve2gr_d(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk1)
6223 {
6224     tcg_out32(s, encode_dvjuk1_insn(OPC_VPICKVE2GR_D, d, vj, uk1));
6225 }
6226
6227 /* Emits the `vpickve2gr.bu d, vj, uk4` instruction.  */
6228 static void __attribute__((unused))
6229 tcg_out_opc_vpickve2gr_bu(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk4)
6230 {
6231     tcg_out32(s, encode_dvjuk4_insn(OPC_VPICKVE2GR_BU, d, vj, uk4));
6232 }
6233
6234 /* Emits the `vpickve2gr.hu d, vj, uk3` instruction.  */
6235 static void __attribute__((unused))
6236 tcg_out_opc_vpickve2gr_hu(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk3)
6237 {
6238     tcg_out32(s, encode_dvjuk3_insn(OPC_VPICKVE2GR_HU, d, vj, uk3));
6239 }
6240
6241 /* Emits the `vpickve2gr.wu d, vj, uk2` instruction.  */
6242 static void __attribute__((unused))
6243 tcg_out_opc_vpickve2gr_wu(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk2)
6244 {
6245     tcg_out32(s, encode_dvjuk2_insn(OPC_VPICKVE2GR_WU, d, vj, uk2));
6246 }
6247
6248 /* Emits the `vpickve2gr.du d, vj, uk1` instruction.  */
6249 static void __attribute__((unused))
6250 tcg_out_opc_vpickve2gr_du(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk1)
6251 {
6252     tcg_out32(s, encode_dvjuk1_insn(OPC_VPICKVE2GR_DU, d, vj, uk1));
6253 }
6254
6255 /* Emits the `vreplvei.b vd, vj, uk4` instruction.  */
6256 static void __attribute__((unused))
6257 tcg_out_opc_vreplvei_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6258 {
6259     tcg_out32(s, encode_vdvjuk4_insn(OPC_VREPLVEI_B, vd, vj, uk4));
6260 }
6261
6262 /* Emits the `vreplvei.h vd, vj, uk3` instruction.  */
6263 static void __attribute__((unused))
6264 tcg_out_opc_vreplvei_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6265 {
6266     tcg_out32(s, encode_vdvjuk3_insn(OPC_VREPLVEI_H, vd, vj, uk3));
6267 }
6268
6269 /* Emits the `vreplvei.w vd, vj, uk2` instruction.  */
6270 static void __attribute__((unused))
6271 tcg_out_opc_vreplvei_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk2)
6272 {
6273     tcg_out32(s, encode_vdvjuk2_insn(OPC_VREPLVEI_W, vd, vj, uk2));
6274 }
6275
6276 /* Emits the `vreplvei.d vd, vj, uk1` instruction.  */
6277 static void __attribute__((unused))
6278 tcg_out_opc_vreplvei_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk1)
6279 {
6280     tcg_out32(s, encode_vdvjuk1_insn(OPC_VREPLVEI_D, vd, vj, uk1));
6281 }
6282
6283 /* Emits the `vsllwil.h.b vd, vj, uk3` instruction.  */
6284 static void __attribute__((unused))
6285 tcg_out_opc_vsllwil_h_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6286 {
6287     tcg_out32(s, encode_vdvjuk3_insn(OPC_VSLLWIL_H_B, vd, vj, uk3));
6288 }
6289
6290 /* Emits the `vsllwil.w.h vd, vj, uk4` instruction.  */
6291 static void __attribute__((unused))
6292 tcg_out_opc_vsllwil_w_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6293 {
6294     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSLLWIL_W_H, vd, vj, uk4));
6295 }
6296
6297 /* Emits the `vsllwil.d.w vd, vj, uk5` instruction.  */
6298 static void __attribute__((unused))
6299 tcg_out_opc_vsllwil_d_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6300 {
6301     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLLWIL_D_W, vd, vj, uk5));
6302 }
6303
6304 /* Emits the `vextl.q.d vd, vj` instruction.  */
6305 static void __attribute__((unused))
6306 tcg_out_opc_vextl_q_d(TCGContext *s, TCGReg vd, TCGReg vj)
6307 {
6308     tcg_out32(s, encode_vdvj_insn(OPC_VEXTL_Q_D, vd, vj));
6309 }
6310
6311 /* Emits the `vsllwil.hu.bu vd, vj, uk3` instruction.  */
6312 static void __attribute__((unused))
6313 tcg_out_opc_vsllwil_hu_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6314 {
6315     tcg_out32(s, encode_vdvjuk3_insn(OPC_VSLLWIL_HU_BU, vd, vj, uk3));
6316 }
6317
6318 /* Emits the `vsllwil.wu.hu vd, vj, uk4` instruction.  */
6319 static void __attribute__((unused))
6320 tcg_out_opc_vsllwil_wu_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6321 {
6322     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSLLWIL_WU_HU, vd, vj, uk4));
6323 }
6324
6325 /* Emits the `vsllwil.du.wu vd, vj, uk5` instruction.  */
6326 static void __attribute__((unused))
6327 tcg_out_opc_vsllwil_du_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6328 {
6329     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLLWIL_DU_WU, vd, vj, uk5));
6330 }
6331
6332 /* Emits the `vextl.qu.du vd, vj` instruction.  */
6333 static void __attribute__((unused))
6334 tcg_out_opc_vextl_qu_du(TCGContext *s, TCGReg vd, TCGReg vj)
6335 {
6336     tcg_out32(s, encode_vdvj_insn(OPC_VEXTL_QU_DU, vd, vj));
6337 }
6338
6339 /* Emits the `vbitclri.b vd, vj, uk3` instruction.  */
6340 static void __attribute__((unused))
6341 tcg_out_opc_vbitclri_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6342 {
6343     tcg_out32(s, encode_vdvjuk3_insn(OPC_VBITCLRI_B, vd, vj, uk3));
6344 }
6345
6346 /* Emits the `vbitclri.h vd, vj, uk4` instruction.  */
6347 static void __attribute__((unused))
6348 tcg_out_opc_vbitclri_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6349 {
6350     tcg_out32(s, encode_vdvjuk4_insn(OPC_VBITCLRI_H, vd, vj, uk4));
6351 }
6352
6353 /* Emits the `vbitclri.w vd, vj, uk5` instruction.  */
6354 static void __attribute__((unused))
6355 tcg_out_opc_vbitclri_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6356 {
6357     tcg_out32(s, encode_vdvjuk5_insn(OPC_VBITCLRI_W, vd, vj, uk5));
6358 }
6359
6360 /* Emits the `vbitclri.d vd, vj, uk6` instruction.  */
6361 static void __attribute__((unused))
6362 tcg_out_opc_vbitclri_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6363 {
6364     tcg_out32(s, encode_vdvjuk6_insn(OPC_VBITCLRI_D, vd, vj, uk6));
6365 }
6366
6367 /* Emits the `vbitseti.b vd, vj, uk3` instruction.  */
6368 static void __attribute__((unused))
6369 tcg_out_opc_vbitseti_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6370 {
6371     tcg_out32(s, encode_vdvjuk3_insn(OPC_VBITSETI_B, vd, vj, uk3));
6372 }
6373
6374 /* Emits the `vbitseti.h vd, vj, uk4` instruction.  */
6375 static void __attribute__((unused))
6376 tcg_out_opc_vbitseti_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6377 {
6378     tcg_out32(s, encode_vdvjuk4_insn(OPC_VBITSETI_H, vd, vj, uk4));
6379 }
6380
6381 /* Emits the `vbitseti.w vd, vj, uk5` instruction.  */
6382 static void __attribute__((unused))
6383 tcg_out_opc_vbitseti_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6384 {
6385     tcg_out32(s, encode_vdvjuk5_insn(OPC_VBITSETI_W, vd, vj, uk5));
6386 }
6387
6388 /* Emits the `vbitseti.d vd, vj, uk6` instruction.  */
6389 static void __attribute__((unused))
6390 tcg_out_opc_vbitseti_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6391 {
6392     tcg_out32(s, encode_vdvjuk6_insn(OPC_VBITSETI_D, vd, vj, uk6));
6393 }
6394
6395 /* Emits the `vbitrevi.b vd, vj, uk3` instruction.  */
6396 static void __attribute__((unused))
6397 tcg_out_opc_vbitrevi_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6398 {
6399     tcg_out32(s, encode_vdvjuk3_insn(OPC_VBITREVI_B, vd, vj, uk3));
6400 }
6401
6402 /* Emits the `vbitrevi.h vd, vj, uk4` instruction.  */
6403 static void __attribute__((unused))
6404 tcg_out_opc_vbitrevi_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6405 {
6406     tcg_out32(s, encode_vdvjuk4_insn(OPC_VBITREVI_H, vd, vj, uk4));
6407 }
6408
6409 /* Emits the `vbitrevi.w vd, vj, uk5` instruction.  */
6410 static void __attribute__((unused))
6411 tcg_out_opc_vbitrevi_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6412 {
6413     tcg_out32(s, encode_vdvjuk5_insn(OPC_VBITREVI_W, vd, vj, uk5));
6414 }
6415
6416 /* Emits the `vbitrevi.d vd, vj, uk6` instruction.  */
6417 static void __attribute__((unused))
6418 tcg_out_opc_vbitrevi_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6419 {
6420     tcg_out32(s, encode_vdvjuk6_insn(OPC_VBITREVI_D, vd, vj, uk6));
6421 }
6422
6423 /* Emits the `vsat.b vd, vj, uk3` instruction.  */
6424 static void __attribute__((unused))
6425 tcg_out_opc_vsat_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6426 {
6427     tcg_out32(s, encode_vdvjuk3_insn(OPC_VSAT_B, vd, vj, uk3));
6428 }
6429
6430 /* Emits the `vsat.h vd, vj, uk4` instruction.  */
6431 static void __attribute__((unused))
6432 tcg_out_opc_vsat_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6433 {
6434     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSAT_H, vd, vj, uk4));
6435 }
6436
6437 /* Emits the `vsat.w vd, vj, uk5` instruction.  */
6438 static void __attribute__((unused))
6439 tcg_out_opc_vsat_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6440 {
6441     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSAT_W, vd, vj, uk5));
6442 }
6443
6444 /* Emits the `vsat.d vd, vj, uk6` instruction.  */
6445 static void __attribute__((unused))
6446 tcg_out_opc_vsat_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6447 {
6448     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSAT_D, vd, vj, uk6));
6449 }
6450
6451 /* Emits the `vsat.bu vd, vj, uk3` instruction.  */
6452 static void __attribute__((unused))
6453 tcg_out_opc_vsat_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6454 {
6455     tcg_out32(s, encode_vdvjuk3_insn(OPC_VSAT_BU, vd, vj, uk3));
6456 }
6457
6458 /* Emits the `vsat.hu vd, vj, uk4` instruction.  */
6459 static void __attribute__((unused))
6460 tcg_out_opc_vsat_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6461 {
6462     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSAT_HU, vd, vj, uk4));
6463 }
6464
6465 /* Emits the `vsat.wu vd, vj, uk5` instruction.  */
6466 static void __attribute__((unused))
6467 tcg_out_opc_vsat_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6468 {
6469     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSAT_WU, vd, vj, uk5));
6470 }
6471
6472 /* Emits the `vsat.du vd, vj, uk6` instruction.  */
6473 static void __attribute__((unused))
6474 tcg_out_opc_vsat_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6475 {
6476     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSAT_DU, vd, vj, uk6));
6477 }
6478
6479 /* Emits the `vslli.b vd, vj, uk3` instruction.  */
6480 static void __attribute__((unused))
6481 tcg_out_opc_vslli_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6482 {
6483     tcg_out32(s, encode_vdvjuk3_insn(OPC_VSLLI_B, vd, vj, uk3));
6484 }
6485
6486 /* Emits the `vslli.h vd, vj, uk4` instruction.  */
6487 static void __attribute__((unused))
6488 tcg_out_opc_vslli_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6489 {
6490     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSLLI_H, vd, vj, uk4));
6491 }
6492
6493 /* Emits the `vslli.w vd, vj, uk5` instruction.  */
6494 static void __attribute__((unused))
6495 tcg_out_opc_vslli_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6496 {
6497     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLLI_W, vd, vj, uk5));
6498 }
6499
6500 /* Emits the `vslli.d vd, vj, uk6` instruction.  */
6501 static void __attribute__((unused))
6502 tcg_out_opc_vslli_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6503 {
6504     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSLLI_D, vd, vj, uk6));
6505 }
6506
6507 /* Emits the `vsrli.b vd, vj, uk3` instruction.  */
6508 static void __attribute__((unused))
6509 tcg_out_opc_vsrli_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6510 {
6511     tcg_out32(s, encode_vdvjuk3_insn(OPC_VSRLI_B, vd, vj, uk3));
6512 }
6513
6514 /* Emits the `vsrli.h vd, vj, uk4` instruction.  */
6515 static void __attribute__((unused))
6516 tcg_out_opc_vsrli_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6517 {
6518     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSRLI_H, vd, vj, uk4));
6519 }
6520
6521 /* Emits the `vsrli.w vd, vj, uk5` instruction.  */
6522 static void __attribute__((unused))
6523 tcg_out_opc_vsrli_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6524 {
6525     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSRLI_W, vd, vj, uk5));
6526 }
6527
6528 /* Emits the `vsrli.d vd, vj, uk6` instruction.  */
6529 static void __attribute__((unused))
6530 tcg_out_opc_vsrli_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6531 {
6532     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSRLI_D, vd, vj, uk6));
6533 }
6534
6535 /* Emits the `vsrai.b vd, vj, uk3` instruction.  */
6536 static void __attribute__((unused))
6537 tcg_out_opc_vsrai_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
6538 {
6539     tcg_out32(s, encode_vdvjuk3_insn(OPC_VSRAI_B, vd, vj, uk3));
6540 }
6541
6542 /* Emits the `vsrai.h vd, vj, uk4` instruction.  */
6543 static void __attribute__((unused))
6544 tcg_out_opc_vsrai_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6545 {
6546     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSRAI_H, vd, vj, uk4));
6547 }
6548
6549 /* Emits the `vsrai.w vd, vj, uk5` instruction.  */
6550 static void __attribute__((unused))
6551 tcg_out_opc_vsrai_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6552 {
6553     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSRAI_W, vd, vj, uk5));
6554 }
6555
6556 /* Emits the `vsrai.d vd, vj, uk6` instruction.  */
6557 static void __attribute__((unused))
6558 tcg_out_opc_vsrai_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6559 {
6560     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSRAI_D, vd, vj, uk6));
6561 }
6562
6563 /* Emits the `vsrlni.b.h vd, vj, uk4` instruction.  */
6564 static void __attribute__((unused))
6565 tcg_out_opc_vsrlni_b_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6566 {
6567     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSRLNI_B_H, vd, vj, uk4));
6568 }
6569
6570 /* Emits the `vsrlni.h.w vd, vj, uk5` instruction.  */
6571 static void __attribute__((unused))
6572 tcg_out_opc_vsrlni_h_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6573 {
6574     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSRLNI_H_W, vd, vj, uk5));
6575 }
6576
6577 /* Emits the `vsrlni.w.d vd, vj, uk6` instruction.  */
6578 static void __attribute__((unused))
6579 tcg_out_opc_vsrlni_w_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6580 {
6581     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSRLNI_W_D, vd, vj, uk6));
6582 }
6583
6584 /* Emits the `vsrlni.d.q vd, vj, uk7` instruction.  */
6585 static void __attribute__((unused))
6586 tcg_out_opc_vsrlni_d_q(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk7)
6587 {
6588     tcg_out32(s, encode_vdvjuk7_insn(OPC_VSRLNI_D_Q, vd, vj, uk7));
6589 }
6590
6591 /* Emits the `vsrlrni.b.h vd, vj, uk4` instruction.  */
6592 static void __attribute__((unused))
6593 tcg_out_opc_vsrlrni_b_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6594 {
6595     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSRLRNI_B_H, vd, vj, uk4));
6596 }
6597
6598 /* Emits the `vsrlrni.h.w vd, vj, uk5` instruction.  */
6599 static void __attribute__((unused))
6600 tcg_out_opc_vsrlrni_h_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6601 {
6602     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSRLRNI_H_W, vd, vj, uk5));
6603 }
6604
6605 /* Emits the `vsrlrni.w.d vd, vj, uk6` instruction.  */
6606 static void __attribute__((unused))
6607 tcg_out_opc_vsrlrni_w_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6608 {
6609     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSRLRNI_W_D, vd, vj, uk6));
6610 }
6611
6612 /* Emits the `vsrlrni.d.q vd, vj, uk7` instruction.  */
6613 static void __attribute__((unused))
6614 tcg_out_opc_vsrlrni_d_q(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk7)
6615 {
6616     tcg_out32(s, encode_vdvjuk7_insn(OPC_VSRLRNI_D_Q, vd, vj, uk7));
6617 }
6618
6619 /* Emits the `vssrlni.b.h vd, vj, uk4` instruction.  */
6620 static void __attribute__((unused))
6621 tcg_out_opc_vssrlni_b_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6622 {
6623     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSSRLNI_B_H, vd, vj, uk4));
6624 }
6625
6626 /* Emits the `vssrlni.h.w vd, vj, uk5` instruction.  */
6627 static void __attribute__((unused))
6628 tcg_out_opc_vssrlni_h_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6629 {
6630     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSSRLNI_H_W, vd, vj, uk5));
6631 }
6632
6633 /* Emits the `vssrlni.w.d vd, vj, uk6` instruction.  */
6634 static void __attribute__((unused))
6635 tcg_out_opc_vssrlni_w_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6636 {
6637     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSSRLNI_W_D, vd, vj, uk6));
6638 }
6639
6640 /* Emits the `vssrlni.d.q vd, vj, uk7` instruction.  */
6641 static void __attribute__((unused))
6642 tcg_out_opc_vssrlni_d_q(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk7)
6643 {
6644     tcg_out32(s, encode_vdvjuk7_insn(OPC_VSSRLNI_D_Q, vd, vj, uk7));
6645 }
6646
6647 /* Emits the `vssrlni.bu.h vd, vj, uk4` instruction.  */
6648 static void __attribute__((unused))
6649 tcg_out_opc_vssrlni_bu_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6650 {
6651     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSSRLNI_BU_H, vd, vj, uk4));
6652 }
6653
6654 /* Emits the `vssrlni.hu.w vd, vj, uk5` instruction.  */
6655 static void __attribute__((unused))
6656 tcg_out_opc_vssrlni_hu_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6657 {
6658     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSSRLNI_HU_W, vd, vj, uk5));
6659 }
6660
6661 /* Emits the `vssrlni.wu.d vd, vj, uk6` instruction.  */
6662 static void __attribute__((unused))
6663 tcg_out_opc_vssrlni_wu_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6664 {
6665     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSSRLNI_WU_D, vd, vj, uk6));
6666 }
6667
6668 /* Emits the `vssrlni.du.q vd, vj, uk7` instruction.  */
6669 static void __attribute__((unused))
6670 tcg_out_opc_vssrlni_du_q(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk7)
6671 {
6672     tcg_out32(s, encode_vdvjuk7_insn(OPC_VSSRLNI_DU_Q, vd, vj, uk7));
6673 }
6674
6675 /* Emits the `vssrlrni.b.h vd, vj, uk4` instruction.  */
6676 static void __attribute__((unused))
6677 tcg_out_opc_vssrlrni_b_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6678 {
6679     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSSRLRNI_B_H, vd, vj, uk4));
6680 }
6681
6682 /* Emits the `vssrlrni.h.w vd, vj, uk5` instruction.  */
6683 static void __attribute__((unused))
6684 tcg_out_opc_vssrlrni_h_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6685 {
6686     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSSRLRNI_H_W, vd, vj, uk5));
6687 }
6688
6689 /* Emits the `vssrlrni.w.d vd, vj, uk6` instruction.  */
6690 static void __attribute__((unused))
6691 tcg_out_opc_vssrlrni_w_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6692 {
6693     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSSRLRNI_W_D, vd, vj, uk6));
6694 }
6695
6696 /* Emits the `vssrlrni.d.q vd, vj, uk7` instruction.  */
6697 static void __attribute__((unused))
6698 tcg_out_opc_vssrlrni_d_q(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk7)
6699 {
6700     tcg_out32(s, encode_vdvjuk7_insn(OPC_VSSRLRNI_D_Q, vd, vj, uk7));
6701 }
6702
6703 /* Emits the `vssrlrni.bu.h vd, vj, uk4` instruction.  */
6704 static void __attribute__((unused))
6705 tcg_out_opc_vssrlrni_bu_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6706 {
6707     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSSRLRNI_BU_H, vd, vj, uk4));
6708 }
6709
6710 /* Emits the `vssrlrni.hu.w vd, vj, uk5` instruction.  */
6711 static void __attribute__((unused))
6712 tcg_out_opc_vssrlrni_hu_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6713 {
6714     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSSRLRNI_HU_W, vd, vj, uk5));
6715 }
6716
6717 /* Emits the `vssrlrni.wu.d vd, vj, uk6` instruction.  */
6718 static void __attribute__((unused))
6719 tcg_out_opc_vssrlrni_wu_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6720 {
6721     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSSRLRNI_WU_D, vd, vj, uk6));
6722 }
6723
6724 /* Emits the `vssrlrni.du.q vd, vj, uk7` instruction.  */
6725 static void __attribute__((unused))
6726 tcg_out_opc_vssrlrni_du_q(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk7)
6727 {
6728     tcg_out32(s, encode_vdvjuk7_insn(OPC_VSSRLRNI_DU_Q, vd, vj, uk7));
6729 }
6730
6731 /* Emits the `vsrani.b.h vd, vj, uk4` instruction.  */
6732 static void __attribute__((unused))
6733 tcg_out_opc_vsrani_b_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6734 {
6735     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSRANI_B_H, vd, vj, uk4));
6736 }
6737
6738 /* Emits the `vsrani.h.w vd, vj, uk5` instruction.  */
6739 static void __attribute__((unused))
6740 tcg_out_opc_vsrani_h_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6741 {
6742     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSRANI_H_W, vd, vj, uk5));
6743 }
6744
6745 /* Emits the `vsrani.w.d vd, vj, uk6` instruction.  */
6746 static void __attribute__((unused))
6747 tcg_out_opc_vsrani_w_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6748 {
6749     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSRANI_W_D, vd, vj, uk6));
6750 }
6751
6752 /* Emits the `vsrani.d.q vd, vj, uk7` instruction.  */
6753 static void __attribute__((unused))
6754 tcg_out_opc_vsrani_d_q(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk7)
6755 {
6756     tcg_out32(s, encode_vdvjuk7_insn(OPC_VSRANI_D_Q, vd, vj, uk7));
6757 }
6758
6759 /* Emits the `vsrarni.b.h vd, vj, uk4` instruction.  */
6760 static void __attribute__((unused))
6761 tcg_out_opc_vsrarni_b_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6762 {
6763     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSRARNI_B_H, vd, vj, uk4));
6764 }
6765
6766 /* Emits the `vsrarni.h.w vd, vj, uk5` instruction.  */
6767 static void __attribute__((unused))
6768 tcg_out_opc_vsrarni_h_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6769 {
6770     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSRARNI_H_W, vd, vj, uk5));
6771 }
6772
6773 /* Emits the `vsrarni.w.d vd, vj, uk6` instruction.  */
6774 static void __attribute__((unused))
6775 tcg_out_opc_vsrarni_w_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6776 {
6777     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSRARNI_W_D, vd, vj, uk6));
6778 }
6779
6780 /* Emits the `vsrarni.d.q vd, vj, uk7` instruction.  */
6781 static void __attribute__((unused))
6782 tcg_out_opc_vsrarni_d_q(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk7)
6783 {
6784     tcg_out32(s, encode_vdvjuk7_insn(OPC_VSRARNI_D_Q, vd, vj, uk7));
6785 }
6786
6787 /* Emits the `vssrani.b.h vd, vj, uk4` instruction.  */
6788 static void __attribute__((unused))
6789 tcg_out_opc_vssrani_b_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6790 {
6791     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSSRANI_B_H, vd, vj, uk4));
6792 }
6793
6794 /* Emits the `vssrani.h.w vd, vj, uk5` instruction.  */
6795 static void __attribute__((unused))
6796 tcg_out_opc_vssrani_h_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6797 {
6798     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSSRANI_H_W, vd, vj, uk5));
6799 }
6800
6801 /* Emits the `vssrani.w.d vd, vj, uk6` instruction.  */
6802 static void __attribute__((unused))
6803 tcg_out_opc_vssrani_w_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6804 {
6805     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSSRANI_W_D, vd, vj, uk6));
6806 }
6807
6808 /* Emits the `vssrani.d.q vd, vj, uk7` instruction.  */
6809 static void __attribute__((unused))
6810 tcg_out_opc_vssrani_d_q(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk7)
6811 {
6812     tcg_out32(s, encode_vdvjuk7_insn(OPC_VSSRANI_D_Q, vd, vj, uk7));
6813 }
6814
6815 /* Emits the `vssrani.bu.h vd, vj, uk4` instruction.  */
6816 static void __attribute__((unused))
6817 tcg_out_opc_vssrani_bu_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6818 {
6819     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSSRANI_BU_H, vd, vj, uk4));
6820 }
6821
6822 /* Emits the `vssrani.hu.w vd, vj, uk5` instruction.  */
6823 static void __attribute__((unused))
6824 tcg_out_opc_vssrani_hu_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6825 {
6826     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSSRANI_HU_W, vd, vj, uk5));
6827 }
6828
6829 /* Emits the `vssrani.wu.d vd, vj, uk6` instruction.  */
6830 static void __attribute__((unused))
6831 tcg_out_opc_vssrani_wu_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6832 {
6833     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSSRANI_WU_D, vd, vj, uk6));
6834 }
6835
6836 /* Emits the `vssrani.du.q vd, vj, uk7` instruction.  */
6837 static void __attribute__((unused))
6838 tcg_out_opc_vssrani_du_q(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk7)
6839 {
6840     tcg_out32(s, encode_vdvjuk7_insn(OPC_VSSRANI_DU_Q, vd, vj, uk7));
6841 }
6842
6843 /* Emits the `vssrarni.b.h vd, vj, uk4` instruction.  */
6844 static void __attribute__((unused))
6845 tcg_out_opc_vssrarni_b_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6846 {
6847     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSSRARNI_B_H, vd, vj, uk4));
6848 }
6849
6850 /* Emits the `vssrarni.h.w vd, vj, uk5` instruction.  */
6851 static void __attribute__((unused))
6852 tcg_out_opc_vssrarni_h_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6853 {
6854     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSSRARNI_H_W, vd, vj, uk5));
6855 }
6856
6857 /* Emits the `vssrarni.w.d vd, vj, uk6` instruction.  */
6858 static void __attribute__((unused))
6859 tcg_out_opc_vssrarni_w_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6860 {
6861     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSSRARNI_W_D, vd, vj, uk6));
6862 }
6863
6864 /* Emits the `vssrarni.d.q vd, vj, uk7` instruction.  */
6865 static void __attribute__((unused))
6866 tcg_out_opc_vssrarni_d_q(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk7)
6867 {
6868     tcg_out32(s, encode_vdvjuk7_insn(OPC_VSSRARNI_D_Q, vd, vj, uk7));
6869 }
6870
6871 /* Emits the `vssrarni.bu.h vd, vj, uk4` instruction.  */
6872 static void __attribute__((unused))
6873 tcg_out_opc_vssrarni_bu_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
6874 {
6875     tcg_out32(s, encode_vdvjuk4_insn(OPC_VSSRARNI_BU_H, vd, vj, uk4));
6876 }
6877
6878 /* Emits the `vssrarni.hu.w vd, vj, uk5` instruction.  */
6879 static void __attribute__((unused))
6880 tcg_out_opc_vssrarni_hu_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
6881 {
6882     tcg_out32(s, encode_vdvjuk5_insn(OPC_VSSRARNI_HU_W, vd, vj, uk5));
6883 }
6884
6885 /* Emits the `vssrarni.wu.d vd, vj, uk6` instruction.  */
6886 static void __attribute__((unused))
6887 tcg_out_opc_vssrarni_wu_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
6888 {
6889     tcg_out32(s, encode_vdvjuk6_insn(OPC_VSSRARNI_WU_D, vd, vj, uk6));
6890 }
6891
6892 /* Emits the `vssrarni.du.q vd, vj, uk7` instruction.  */
6893 static void __attribute__((unused))
6894 tcg_out_opc_vssrarni_du_q(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk7)
6895 {
6896     tcg_out32(s, encode_vdvjuk7_insn(OPC_VSSRARNI_DU_Q, vd, vj, uk7));
6897 }
6898
6899 /* Emits the `vextrins.d vd, vj, uk8` instruction.  */
6900 static void __attribute__((unused))
6901 tcg_out_opc_vextrins_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6902 {
6903     tcg_out32(s, encode_vdvjuk8_insn(OPC_VEXTRINS_D, vd, vj, uk8));
6904 }
6905
6906 /* Emits the `vextrins.w vd, vj, uk8` instruction.  */
6907 static void __attribute__((unused))
6908 tcg_out_opc_vextrins_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6909 {
6910     tcg_out32(s, encode_vdvjuk8_insn(OPC_VEXTRINS_W, vd, vj, uk8));
6911 }
6912
6913 /* Emits the `vextrins.h vd, vj, uk8` instruction.  */
6914 static void __attribute__((unused))
6915 tcg_out_opc_vextrins_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6916 {
6917     tcg_out32(s, encode_vdvjuk8_insn(OPC_VEXTRINS_H, vd, vj, uk8));
6918 }
6919
6920 /* Emits the `vextrins.b vd, vj, uk8` instruction.  */
6921 static void __attribute__((unused))
6922 tcg_out_opc_vextrins_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6923 {
6924     tcg_out32(s, encode_vdvjuk8_insn(OPC_VEXTRINS_B, vd, vj, uk8));
6925 }
6926
6927 /* Emits the `vshuf4i.b vd, vj, uk8` instruction.  */
6928 static void __attribute__((unused))
6929 tcg_out_opc_vshuf4i_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6930 {
6931     tcg_out32(s, encode_vdvjuk8_insn(OPC_VSHUF4I_B, vd, vj, uk8));
6932 }
6933
6934 /* Emits the `vshuf4i.h vd, vj, uk8` instruction.  */
6935 static void __attribute__((unused))
6936 tcg_out_opc_vshuf4i_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6937 {
6938     tcg_out32(s, encode_vdvjuk8_insn(OPC_VSHUF4I_H, vd, vj, uk8));
6939 }
6940
6941 /* Emits the `vshuf4i.w vd, vj, uk8` instruction.  */
6942 static void __attribute__((unused))
6943 tcg_out_opc_vshuf4i_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6944 {
6945     tcg_out32(s, encode_vdvjuk8_insn(OPC_VSHUF4I_W, vd, vj, uk8));
6946 }
6947
6948 /* Emits the `vshuf4i.d vd, vj, uk8` instruction.  */
6949 static void __attribute__((unused))
6950 tcg_out_opc_vshuf4i_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6951 {
6952     tcg_out32(s, encode_vdvjuk8_insn(OPC_VSHUF4I_D, vd, vj, uk8));
6953 }
6954
6955 /* Emits the `vbitseli.b vd, vj, uk8` instruction.  */
6956 static void __attribute__((unused))
6957 tcg_out_opc_vbitseli_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6958 {
6959     tcg_out32(s, encode_vdvjuk8_insn(OPC_VBITSELI_B, vd, vj, uk8));
6960 }
6961
6962 /* Emits the `vandi.b vd, vj, uk8` instruction.  */
6963 static void __attribute__((unused))
6964 tcg_out_opc_vandi_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6965 {
6966     tcg_out32(s, encode_vdvjuk8_insn(OPC_VANDI_B, vd, vj, uk8));
6967 }
6968
6969 /* Emits the `vori.b vd, vj, uk8` instruction.  */
6970 static void __attribute__((unused))
6971 tcg_out_opc_vori_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6972 {
6973     tcg_out32(s, encode_vdvjuk8_insn(OPC_VORI_B, vd, vj, uk8));
6974 }
6975
6976 /* Emits the `vxori.b vd, vj, uk8` instruction.  */
6977 static void __attribute__((unused))
6978 tcg_out_opc_vxori_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6979 {
6980     tcg_out32(s, encode_vdvjuk8_insn(OPC_VXORI_B, vd, vj, uk8));
6981 }
6982
6983 /* Emits the `vnori.b vd, vj, uk8` instruction.  */
6984 static void __attribute__((unused))
6985 tcg_out_opc_vnori_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
6986 {
6987     tcg_out32(s, encode_vdvjuk8_insn(OPC_VNORI_B, vd, vj, uk8));
6988 }
6989
6990 /* Emits the `vldi vd, sj13` instruction.  */
6991 static void __attribute__((unused))
6992 tcg_out_opc_vldi(TCGContext *s, TCGReg vd, int32_t sj13)
6993 {
6994     tcg_out32(s, encode_vdsj13_insn(OPC_VLDI, vd, sj13));
6995 }
6996
6997 /* Emits the `vpermi.w vd, vj, uk8` instruction.  */
6998 static void __attribute__((unused))
6999 tcg_out_opc_vpermi_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
7000 {
7001     tcg_out32(s, encode_vdvjuk8_insn(OPC_VPERMI_W, vd, vj, uk8));
7002 }
7003
7004 /* End of generated code.  */