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target/mips: Extract FPU helpers to 'fpu_helper.h'
[qemu/kevin.git] / target / mips / msa_helper.c
blobb89b4c4490282b432afc1edb28f4d7554976b788
1 /*
2 * MIPS SIMD Architecture Module Instruction emulation helpers for QEMU.
3 *
4 * Copyright (c) 2014 Imagination Technologies
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "internal.h"
23 #include "exec/exec-all.h"
24 #include "exec/helper-proto.h"
25 #include "fpu/softfloat.h"
26 #include "fpu_helper.h"
27
28 /* Data format min and max values */
29 #define DF_BITS(df) (1 << ((df) + 3))
30
31 #define DF_MAX_INT(df) (int64_t)((1LL << (DF_BITS(df) - 1)) - 1)
32 #define M_MAX_INT(m) (int64_t)((1LL << ((m) - 1)) - 1)
33
34 #define DF_MIN_INT(df) (int64_t)(-(1LL << (DF_BITS(df) - 1)))
35 #define M_MIN_INT(m) (int64_t)(-(1LL << ((m) - 1)))
36
37 #define DF_MAX_UINT(df) (uint64_t)(-1ULL >> (64 - DF_BITS(df)))
38 #define M_MAX_UINT(m) (uint64_t)(-1ULL >> (64 - (m)))
39
40 #define UNSIGNED(x, df) ((x) & DF_MAX_UINT(df))
41 #define SIGNED(x, df) \
42 ((((int64_t)x) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df)))
43
44 /* Element-by-element access macros */
45 #define DF_ELEMENTS(df) (MSA_WRLEN / DF_BITS(df))
46
47
48
49 /*
50 * Bit Count
51 * ---------
52 *
53 * +---------------+----------------------------------------------------------+
54 * | NLOC.B | Vector Leading Ones Count (byte) |
55 * | NLOC.H | Vector Leading Ones Count (halfword) |
56 * | NLOC.W | Vector Leading Ones Count (word) |
57 * | NLOC.D | Vector Leading Ones Count (doubleword) |
58 * | NLZC.B | Vector Leading Zeros Count (byte) |
59 * | NLZC.H | Vector Leading Zeros Count (halfword) |
60 * | NLZC.W | Vector Leading Zeros Count (word) |
61 * | NLZC.D | Vector Leading Zeros Count (doubleword) |
62 * | PCNT.B | Vector Population Count (byte) |
63 * | PCNT.H | Vector Population Count (halfword) |
64 * | PCNT.W | Vector Population Count (word) |
65 * | PCNT.D | Vector Population Count (doubleword) |
66 * +---------------+----------------------------------------------------------+
67 */
68
69 static inline int64_t msa_nlzc_df(uint32_t df, int64_t arg)
70 {
71 uint64_t x, y;
72 int n, c;
73
74 x = UNSIGNED(arg, df);
75 n = DF_BITS(df);
76 c = DF_BITS(df) / 2;
77
78 do {
79 y = x >> c;
80 if (y != 0) {
81 n = n - c;
82 x = y;
83 }
84 c = c >> 1;
85 } while (c != 0);
86
87 return n - x;
88 }
89
90 static inline int64_t msa_nloc_df(uint32_t df, int64_t arg)
91 {
92 return msa_nlzc_df(df, UNSIGNED((~arg), df));
93 }
94
95 void helper_msa_nloc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
96 {
97 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
98 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
99
100 pwd->b[0] = msa_nloc_df(DF_BYTE, pws->b[0]);
101 pwd->b[1] = msa_nloc_df(DF_BYTE, pws->b[1]);
102 pwd->b[2] = msa_nloc_df(DF_BYTE, pws->b[2]);
103 pwd->b[3] = msa_nloc_df(DF_BYTE, pws->b[3]);
104 pwd->b[4] = msa_nloc_df(DF_BYTE, pws->b[4]);
105 pwd->b[5] = msa_nloc_df(DF_BYTE, pws->b[5]);
106 pwd->b[6] = msa_nloc_df(DF_BYTE, pws->b[6]);
107 pwd->b[7] = msa_nloc_df(DF_BYTE, pws->b[7]);
108 pwd->b[8] = msa_nloc_df(DF_BYTE, pws->b[8]);
109 pwd->b[9] = msa_nloc_df(DF_BYTE, pws->b[9]);
110 pwd->b[10] = msa_nloc_df(DF_BYTE, pws->b[10]);
111 pwd->b[11] = msa_nloc_df(DF_BYTE, pws->b[11]);
112 pwd->b[12] = msa_nloc_df(DF_BYTE, pws->b[12]);
113 pwd->b[13] = msa_nloc_df(DF_BYTE, pws->b[13]);
114 pwd->b[14] = msa_nloc_df(DF_BYTE, pws->b[14]);
115 pwd->b[15] = msa_nloc_df(DF_BYTE, pws->b[15]);
116 }
117
118 void helper_msa_nloc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
119 {
120 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
121 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
122
123 pwd->h[0] = msa_nloc_df(DF_HALF, pws->h[0]);
124 pwd->h[1] = msa_nloc_df(DF_HALF, pws->h[1]);
125 pwd->h[2] = msa_nloc_df(DF_HALF, pws->h[2]);
126 pwd->h[3] = msa_nloc_df(DF_HALF, pws->h[3]);
127 pwd->h[4] = msa_nloc_df(DF_HALF, pws->h[4]);
128 pwd->h[5] = msa_nloc_df(DF_HALF, pws->h[5]);
129 pwd->h[6] = msa_nloc_df(DF_HALF, pws->h[6]);
130 pwd->h[7] = msa_nloc_df(DF_HALF, pws->h[7]);
131 }
132
133 void helper_msa_nloc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
134 {
135 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
136 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
137
138 pwd->w[0] = msa_nloc_df(DF_WORD, pws->w[0]);
139 pwd->w[1] = msa_nloc_df(DF_WORD, pws->w[1]);
140 pwd->w[2] = msa_nloc_df(DF_WORD, pws->w[2]);
141 pwd->w[3] = msa_nloc_df(DF_WORD, pws->w[3]);
142 }
143
144 void helper_msa_nloc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
145 {
146 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
147 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
148
149 pwd->d[0] = msa_nloc_df(DF_DOUBLE, pws->d[0]);
150 pwd->d[1] = msa_nloc_df(DF_DOUBLE, pws->d[1]);
151 }
152
153 void helper_msa_nlzc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
154 {
155 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
156 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
157
158 pwd->b[0] = msa_nlzc_df(DF_BYTE, pws->b[0]);
159 pwd->b[1] = msa_nlzc_df(DF_BYTE, pws->b[1]);
160 pwd->b[2] = msa_nlzc_df(DF_BYTE, pws->b[2]);
161 pwd->b[3] = msa_nlzc_df(DF_BYTE, pws->b[3]);
162 pwd->b[4] = msa_nlzc_df(DF_BYTE, pws->b[4]);
163 pwd->b[5] = msa_nlzc_df(DF_BYTE, pws->b[5]);
164 pwd->b[6] = msa_nlzc_df(DF_BYTE, pws->b[6]);
165 pwd->b[7] = msa_nlzc_df(DF_BYTE, pws->b[7]);
166 pwd->b[8] = msa_nlzc_df(DF_BYTE, pws->b[8]);
167 pwd->b[9] = msa_nlzc_df(DF_BYTE, pws->b[9]);
168 pwd->b[10] = msa_nlzc_df(DF_BYTE, pws->b[10]);
169 pwd->b[11] = msa_nlzc_df(DF_BYTE, pws->b[11]);
170 pwd->b[12] = msa_nlzc_df(DF_BYTE, pws->b[12]);
171 pwd->b[13] = msa_nlzc_df(DF_BYTE, pws->b[13]);
172 pwd->b[14] = msa_nlzc_df(DF_BYTE, pws->b[14]);
173 pwd->b[15] = msa_nlzc_df(DF_BYTE, pws->b[15]);
174 }
175
176 void helper_msa_nlzc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
177 {
178 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
179 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
180
181 pwd->h[0] = msa_nlzc_df(DF_HALF, pws->h[0]);
182 pwd->h[1] = msa_nlzc_df(DF_HALF, pws->h[1]);
183 pwd->h[2] = msa_nlzc_df(DF_HALF, pws->h[2]);
184 pwd->h[3] = msa_nlzc_df(DF_HALF, pws->h[3]);
185 pwd->h[4] = msa_nlzc_df(DF_HALF, pws->h[4]);
186 pwd->h[5] = msa_nlzc_df(DF_HALF, pws->h[5]);
187 pwd->h[6] = msa_nlzc_df(DF_HALF, pws->h[6]);
188 pwd->h[7] = msa_nlzc_df(DF_HALF, pws->h[7]);
189 }
190
191 void helper_msa_nlzc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
192 {
193 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
194 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
195
196 pwd->w[0] = msa_nlzc_df(DF_WORD, pws->w[0]);
197 pwd->w[1] = msa_nlzc_df(DF_WORD, pws->w[1]);
198 pwd->w[2] = msa_nlzc_df(DF_WORD, pws->w[2]);
199 pwd->w[3] = msa_nlzc_df(DF_WORD, pws->w[3]);
200 }
201
202 void helper_msa_nlzc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
203 {
204 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
205 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
206
207 pwd->d[0] = msa_nlzc_df(DF_DOUBLE, pws->d[0]);
208 pwd->d[1] = msa_nlzc_df(DF_DOUBLE, pws->d[1]);
209 }
210
211 static inline int64_t msa_pcnt_df(uint32_t df, int64_t arg)
212 {
213 uint64_t x;
214
215 x = UNSIGNED(arg, df);
216
217 x = (x & 0x5555555555555555ULL) + ((x >> 1) & 0x5555555555555555ULL);
218 x = (x & 0x3333333333333333ULL) + ((x >> 2) & 0x3333333333333333ULL);
219 x = (x & 0x0F0F0F0F0F0F0F0FULL) + ((x >> 4) & 0x0F0F0F0F0F0F0F0FULL);
220 x = (x & 0x00FF00FF00FF00FFULL) + ((x >> 8) & 0x00FF00FF00FF00FFULL);
221 x = (x & 0x0000FFFF0000FFFFULL) + ((x >> 16) & 0x0000FFFF0000FFFFULL);
222 x = (x & 0x00000000FFFFFFFFULL) + ((x >> 32));
223
224 return x;
225 }
226
227 void helper_msa_pcnt_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
228 {
229 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
230 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
231
232 pwd->b[0] = msa_pcnt_df(DF_BYTE, pws->b[0]);
233 pwd->b[1] = msa_pcnt_df(DF_BYTE, pws->b[1]);
234 pwd->b[2] = msa_pcnt_df(DF_BYTE, pws->b[2]);
235 pwd->b[3] = msa_pcnt_df(DF_BYTE, pws->b[3]);
236 pwd->b[4] = msa_pcnt_df(DF_BYTE, pws->b[4]);
237 pwd->b[5] = msa_pcnt_df(DF_BYTE, pws->b[5]);
238 pwd->b[6] = msa_pcnt_df(DF_BYTE, pws->b[6]);
239 pwd->b[7] = msa_pcnt_df(DF_BYTE, pws->b[7]);
240 pwd->b[8] = msa_pcnt_df(DF_BYTE, pws->b[8]);
241 pwd->b[9] = msa_pcnt_df(DF_BYTE, pws->b[9]);
242 pwd->b[10] = msa_pcnt_df(DF_BYTE, pws->b[10]);
243 pwd->b[11] = msa_pcnt_df(DF_BYTE, pws->b[11]);
244 pwd->b[12] = msa_pcnt_df(DF_BYTE, pws->b[12]);
245 pwd->b[13] = msa_pcnt_df(DF_BYTE, pws->b[13]);
246 pwd->b[14] = msa_pcnt_df(DF_BYTE, pws->b[14]);
247 pwd->b[15] = msa_pcnt_df(DF_BYTE, pws->b[15]);
248 }
249
250 void helper_msa_pcnt_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
251 {
252 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
253 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
254
255 pwd->h[0] = msa_pcnt_df(DF_HALF, pws->h[0]);
256 pwd->h[1] = msa_pcnt_df(DF_HALF, pws->h[1]);
257 pwd->h[2] = msa_pcnt_df(DF_HALF, pws->h[2]);
258 pwd->h[3] = msa_pcnt_df(DF_HALF, pws->h[3]);
259 pwd->h[4] = msa_pcnt_df(DF_HALF, pws->h[4]);
260 pwd->h[5] = msa_pcnt_df(DF_HALF, pws->h[5]);
261 pwd->h[6] = msa_pcnt_df(DF_HALF, pws->h[6]);
262 pwd->h[7] = msa_pcnt_df(DF_HALF, pws->h[7]);
263 }
264
265 void helper_msa_pcnt_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
266 {
267 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
268 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
269
270 pwd->w[0] = msa_pcnt_df(DF_WORD, pws->w[0]);
271 pwd->w[1] = msa_pcnt_df(DF_WORD, pws->w[1]);
272 pwd->w[2] = msa_pcnt_df(DF_WORD, pws->w[2]);
273 pwd->w[3] = msa_pcnt_df(DF_WORD, pws->w[3]);
274 }
275
276 void helper_msa_pcnt_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
277 {
278 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
279 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
280
281 pwd->d[0] = msa_pcnt_df(DF_DOUBLE, pws->d[0]);
282 pwd->d[1] = msa_pcnt_df(DF_DOUBLE, pws->d[1]);
283 }
284
285
286 /*
287 * Bit Move
288 * --------
289 *
290 * +---------------+----------------------------------------------------------+
291 * | BINSL.B | Vector Bit Insert Left (byte) |
292 * | BINSL.H | Vector Bit Insert Left (halfword) |
293 * | BINSL.W | Vector Bit Insert Left (word) |
294 * | BINSL.D | Vector Bit Insert Left (doubleword) |
295 * | BINSR.B | Vector Bit Insert Right (byte) |
296 * | BINSR.H | Vector Bit Insert Right (halfword) |
297 * | BINSR.W | Vector Bit Insert Right (word) |
298 * | BINSR.D | Vector Bit Insert Right (doubleword) |
299 * | BMNZ.V | Vector Bit Move If Not Zero |
300 * | BMZ.V | Vector Bit Move If Zero |
301 * | BSEL.V | Vector Bit Select |
302 * +---------------+----------------------------------------------------------+
303 */
304
305 /* Data format bit position and unsigned values */
306 #define BIT_POSITION(x, df) ((uint64_t)(x) % DF_BITS(df))
307
308 static inline int64_t msa_binsl_df(uint32_t df,
309 int64_t dest, int64_t arg1, int64_t arg2)
310 {
311 uint64_t u_arg1 = UNSIGNED(arg1, df);
312 uint64_t u_dest = UNSIGNED(dest, df);
313 int32_t sh_d = BIT_POSITION(arg2, df) + 1;
314 int32_t sh_a = DF_BITS(df) - sh_d;
315 if (sh_d == DF_BITS(df)) {
316 return u_arg1;
317 } else {
318 return UNSIGNED(UNSIGNED(u_dest << sh_d, df) >> sh_d, df) |
319 UNSIGNED(UNSIGNED(u_arg1 >> sh_a, df) << sh_a, df);
320 }
321 }
322
323 void helper_msa_binsl_b(CPUMIPSState *env,
324 uint32_t wd, uint32_t ws, uint32_t wt)
325 {
326 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
327 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
328 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
329
330 pwd->b[0] = msa_binsl_df(DF_BYTE, pwd->b[0], pws->b[0], pwt->b[0]);
331 pwd->b[1] = msa_binsl_df(DF_BYTE, pwd->b[1], pws->b[1], pwt->b[1]);
332 pwd->b[2] = msa_binsl_df(DF_BYTE, pwd->b[2], pws->b[2], pwt->b[2]);
333 pwd->b[3] = msa_binsl_df(DF_BYTE, pwd->b[3], pws->b[3], pwt->b[3]);
334 pwd->b[4] = msa_binsl_df(DF_BYTE, pwd->b[4], pws->b[4], pwt->b[4]);
335 pwd->b[5] = msa_binsl_df(DF_BYTE, pwd->b[5], pws->b[5], pwt->b[5]);
336 pwd->b[6] = msa_binsl_df(DF_BYTE, pwd->b[6], pws->b[6], pwt->b[6]);
337 pwd->b[7] = msa_binsl_df(DF_BYTE, pwd->b[7], pws->b[7], pwt->b[7]);
338 pwd->b[8] = msa_binsl_df(DF_BYTE, pwd->b[8], pws->b[8], pwt->b[8]);
339 pwd->b[9] = msa_binsl_df(DF_BYTE, pwd->b[9], pws->b[9], pwt->b[9]);
340 pwd->b[10] = msa_binsl_df(DF_BYTE, pwd->b[10], pws->b[10], pwt->b[10]);
341 pwd->b[11] = msa_binsl_df(DF_BYTE, pwd->b[11], pws->b[11], pwt->b[11]);
342 pwd->b[12] = msa_binsl_df(DF_BYTE, pwd->b[12], pws->b[12], pwt->b[12]);
343 pwd->b[13] = msa_binsl_df(DF_BYTE, pwd->b[13], pws->b[13], pwt->b[13]);
344 pwd->b[14] = msa_binsl_df(DF_BYTE, pwd->b[14], pws->b[14], pwt->b[14]);
345 pwd->b[15] = msa_binsl_df(DF_BYTE, pwd->b[15], pws->b[15], pwt->b[15]);
346 }
347
348 void helper_msa_binsl_h(CPUMIPSState *env,
349 uint32_t wd, uint32_t ws, uint32_t wt)
350 {
351 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
352 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
353 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
354
355 pwd->h[0] = msa_binsl_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
356 pwd->h[1] = msa_binsl_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
357 pwd->h[2] = msa_binsl_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
358 pwd->h[3] = msa_binsl_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
359 pwd->h[4] = msa_binsl_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
360 pwd->h[5] = msa_binsl_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
361 pwd->h[6] = msa_binsl_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
362 pwd->h[7] = msa_binsl_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
363 }
364
365 void helper_msa_binsl_w(CPUMIPSState *env,
366 uint32_t wd, uint32_t ws, uint32_t wt)
367 {
368 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
369 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
370 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
371
372 pwd->w[0] = msa_binsl_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
373 pwd->w[1] = msa_binsl_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
374 pwd->w[2] = msa_binsl_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
375 pwd->w[3] = msa_binsl_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
376 }
377
378 void helper_msa_binsl_d(CPUMIPSState *env,
379 uint32_t wd, uint32_t ws, uint32_t wt)
380 {
381 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
382 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
383 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
384
385 pwd->d[0] = msa_binsl_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
386 pwd->d[1] = msa_binsl_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
387 }
388
389 static inline int64_t msa_binsr_df(uint32_t df,
390 int64_t dest, int64_t arg1, int64_t arg2)
391 {
392 uint64_t u_arg1 = UNSIGNED(arg1, df);
393 uint64_t u_dest = UNSIGNED(dest, df);
394 int32_t sh_d = BIT_POSITION(arg2, df) + 1;
395 int32_t sh_a = DF_BITS(df) - sh_d;
396 if (sh_d == DF_BITS(df)) {
397 return u_arg1;
398 } else {
399 return UNSIGNED(UNSIGNED(u_dest >> sh_d, df) << sh_d, df) |
400 UNSIGNED(UNSIGNED(u_arg1 << sh_a, df) >> sh_a, df);
401 }
402 }
403
404 void helper_msa_binsr_b(CPUMIPSState *env,
405 uint32_t wd, uint32_t ws, uint32_t wt)
406 {
407 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
408 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
409 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
410
411 pwd->b[0] = msa_binsr_df(DF_BYTE, pwd->b[0], pws->b[0], pwt->b[0]);
412 pwd->b[1] = msa_binsr_df(DF_BYTE, pwd->b[1], pws->b[1], pwt->b[1]);
413 pwd->b[2] = msa_binsr_df(DF_BYTE, pwd->b[2], pws->b[2], pwt->b[2]);
414 pwd->b[3] = msa_binsr_df(DF_BYTE, pwd->b[3], pws->b[3], pwt->b[3]);
415 pwd->b[4] = msa_binsr_df(DF_BYTE, pwd->b[4], pws->b[4], pwt->b[4]);
416 pwd->b[5] = msa_binsr_df(DF_BYTE, pwd->b[5], pws->b[5], pwt->b[5]);
417 pwd->b[6] = msa_binsr_df(DF_BYTE, pwd->b[6], pws->b[6], pwt->b[6]);
418 pwd->b[7] = msa_binsr_df(DF_BYTE, pwd->b[7], pws->b[7], pwt->b[7]);
419 pwd->b[8] = msa_binsr_df(DF_BYTE, pwd->b[8], pws->b[8], pwt->b[8]);
420 pwd->b[9] = msa_binsr_df(DF_BYTE, pwd->b[9], pws->b[9], pwt->b[9]);
421 pwd->b[10] = msa_binsr_df(DF_BYTE, pwd->b[10], pws->b[10], pwt->b[10]);
422 pwd->b[11] = msa_binsr_df(DF_BYTE, pwd->b[11], pws->b[11], pwt->b[11]);
423 pwd->b[12] = msa_binsr_df(DF_BYTE, pwd->b[12], pws->b[12], pwt->b[12]);
424 pwd->b[13] = msa_binsr_df(DF_BYTE, pwd->b[13], pws->b[13], pwt->b[13]);
425 pwd->b[14] = msa_binsr_df(DF_BYTE, pwd->b[14], pws->b[14], pwt->b[14]);
426 pwd->b[15] = msa_binsr_df(DF_BYTE, pwd->b[15], pws->b[15], pwt->b[15]);
427 }
428
429 void helper_msa_binsr_h(CPUMIPSState *env,
430 uint32_t wd, uint32_t ws, uint32_t wt)
431 {
432 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
433 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
434 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
435
436 pwd->h[0] = msa_binsr_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
437 pwd->h[1] = msa_binsr_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
438 pwd->h[2] = msa_binsr_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
439 pwd->h[3] = msa_binsr_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
440 pwd->h[4] = msa_binsr_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
441 pwd->h[5] = msa_binsr_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
442 pwd->h[6] = msa_binsr_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
443 pwd->h[7] = msa_binsr_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
444 }
445
446 void helper_msa_binsr_w(CPUMIPSState *env,
447 uint32_t wd, uint32_t ws, uint32_t wt)
448 {
449 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
450 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
451 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
452
453 pwd->w[0] = msa_binsr_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
454 pwd->w[1] = msa_binsr_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
455 pwd->w[2] = msa_binsr_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
456 pwd->w[3] = msa_binsr_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
457 }
458
459 void helper_msa_binsr_d(CPUMIPSState *env,
460 uint32_t wd, uint32_t ws, uint32_t wt)
461 {
462 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
463 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
464 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
465
466 pwd->d[0] = msa_binsr_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
467 pwd->d[1] = msa_binsr_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
468 }
469
470 void helper_msa_bmnz_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
471 {
472 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
473 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
474 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
475
476 pwd->d[0] = UNSIGNED( \
477 ((pwd->d[0] & (~pwt->d[0])) | (pws->d[0] & pwt->d[0])), DF_DOUBLE);
478 pwd->d[1] = UNSIGNED( \
479 ((pwd->d[1] & (~pwt->d[1])) | (pws->d[1] & pwt->d[1])), DF_DOUBLE);
480 }
481
482 void helper_msa_bmz_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
483 {
484 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
485 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
486 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
487
488 pwd->d[0] = UNSIGNED( \
489 ((pwd->d[0] & pwt->d[0]) | (pws->d[0] & (~pwt->d[0]))), DF_DOUBLE);
490 pwd->d[1] = UNSIGNED( \
491 ((pwd->d[1] & pwt->d[1]) | (pws->d[1] & (~pwt->d[1]))), DF_DOUBLE);
492 }
493
494 void helper_msa_bsel_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
495 {
496 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
497 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
498 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
499
500 pwd->d[0] = UNSIGNED( \
501 (pws->d[0] & (~pwd->d[0])) | (pwt->d[0] & pwd->d[0]), DF_DOUBLE);
502 pwd->d[1] = UNSIGNED( \
503 (pws->d[1] & (~pwd->d[1])) | (pwt->d[1] & pwd->d[1]), DF_DOUBLE);
504 }
505
506
507 /*
508 * Bit Set
509 * -------
510 *
511 * +---------------+----------------------------------------------------------+
512 * | BCLR.B | Vector Bit Clear (byte) |
513 * | BCLR.H | Vector Bit Clear (halfword) |
514 * | BCLR.W | Vector Bit Clear (word) |
515 * | BCLR.D | Vector Bit Clear (doubleword) |
516 * | BNEG.B | Vector Bit Negate (byte) |
517 * | BNEG.H | Vector Bit Negate (halfword) |
518 * | BNEG.W | Vector Bit Negate (word) |
519 * | BNEG.D | Vector Bit Negate (doubleword) |
520 * | BSET.B | Vector Bit Set (byte) |
521 * | BSET.H | Vector Bit Set (halfword) |
522 * | BSET.W | Vector Bit Set (word) |
523 * | BSET.D | Vector Bit Set (doubleword) |
524 * +---------------+----------------------------------------------------------+
525 */
526
527 static inline int64_t msa_bclr_df(uint32_t df, int64_t arg1, int64_t arg2)
528 {
529 int32_t b_arg2 = BIT_POSITION(arg2, df);
530 return UNSIGNED(arg1 & (~(1LL << b_arg2)), df);
531 }
532
533 void helper_msa_bclr_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
534 {
535 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
536 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
537 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
538
539 pwd->b[0] = msa_bclr_df(DF_BYTE, pws->b[0], pwt->b[0]);
540 pwd->b[1] = msa_bclr_df(DF_BYTE, pws->b[1], pwt->b[1]);
541 pwd->b[2] = msa_bclr_df(DF_BYTE, pws->b[2], pwt->b[2]);
542 pwd->b[3] = msa_bclr_df(DF_BYTE, pws->b[3], pwt->b[3]);
543 pwd->b[4] = msa_bclr_df(DF_BYTE, pws->b[4], pwt->b[4]);
544 pwd->b[5] = msa_bclr_df(DF_BYTE, pws->b[5], pwt->b[5]);
545 pwd->b[6] = msa_bclr_df(DF_BYTE, pws->b[6], pwt->b[6]);
546 pwd->b[7] = msa_bclr_df(DF_BYTE, pws->b[7], pwt->b[7]);
547 pwd->b[8] = msa_bclr_df(DF_BYTE, pws->b[8], pwt->b[8]);
548 pwd->b[9] = msa_bclr_df(DF_BYTE, pws->b[9], pwt->b[9]);
549 pwd->b[10] = msa_bclr_df(DF_BYTE, pws->b[10], pwt->b[10]);
550 pwd->b[11] = msa_bclr_df(DF_BYTE, pws->b[11], pwt->b[11]);
551 pwd->b[12] = msa_bclr_df(DF_BYTE, pws->b[12], pwt->b[12]);
552 pwd->b[13] = msa_bclr_df(DF_BYTE, pws->b[13], pwt->b[13]);
553 pwd->b[14] = msa_bclr_df(DF_BYTE, pws->b[14], pwt->b[14]);
554 pwd->b[15] = msa_bclr_df(DF_BYTE, pws->b[15], pwt->b[15]);
555 }
556
557 void helper_msa_bclr_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
558 {
559 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
560 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
561 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
562
563 pwd->h[0] = msa_bclr_df(DF_HALF, pws->h[0], pwt->h[0]);
564 pwd->h[1] = msa_bclr_df(DF_HALF, pws->h[1], pwt->h[1]);
565 pwd->h[2] = msa_bclr_df(DF_HALF, pws->h[2], pwt->h[2]);
566 pwd->h[3] = msa_bclr_df(DF_HALF, pws->h[3], pwt->h[3]);
567 pwd->h[4] = msa_bclr_df(DF_HALF, pws->h[4], pwt->h[4]);
568 pwd->h[5] = msa_bclr_df(DF_HALF, pws->h[5], pwt->h[5]);
569 pwd->h[6] = msa_bclr_df(DF_HALF, pws->h[6], pwt->h[6]);
570 pwd->h[7] = msa_bclr_df(DF_HALF, pws->h[7], pwt->h[7]);
571 }
572
573 void helper_msa_bclr_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
574 {
575 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
576 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
577 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
578
579 pwd->w[0] = msa_bclr_df(DF_WORD, pws->w[0], pwt->w[0]);
580 pwd->w[1] = msa_bclr_df(DF_WORD, pws->w[1], pwt->w[1]);
581 pwd->w[2] = msa_bclr_df(DF_WORD, pws->w[2], pwt->w[2]);
582 pwd->w[3] = msa_bclr_df(DF_WORD, pws->w[3], pwt->w[3]);
583 }
584
585 void helper_msa_bclr_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
586 {
587 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
588 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
589 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
590
591 pwd->d[0] = msa_bclr_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
592 pwd->d[1] = msa_bclr_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
593 }
594
595 static inline int64_t msa_bneg_df(uint32_t df, int64_t arg1, int64_t arg2)
596 {
597 int32_t b_arg2 = BIT_POSITION(arg2, df);
598 return UNSIGNED(arg1 ^ (1LL << b_arg2), df);
599 }
600
601 void helper_msa_bneg_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
602 {
603 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
604 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
605 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
606
607 pwd->b[0] = msa_bneg_df(DF_BYTE, pws->b[0], pwt->b[0]);
608 pwd->b[1] = msa_bneg_df(DF_BYTE, pws->b[1], pwt->b[1]);
609 pwd->b[2] = msa_bneg_df(DF_BYTE, pws->b[2], pwt->b[2]);
610 pwd->b[3] = msa_bneg_df(DF_BYTE, pws->b[3], pwt->b[3]);
611 pwd->b[4] = msa_bneg_df(DF_BYTE, pws->b[4], pwt->b[4]);
612 pwd->b[5] = msa_bneg_df(DF_BYTE, pws->b[5], pwt->b[5]);
613 pwd->b[6] = msa_bneg_df(DF_BYTE, pws->b[6], pwt->b[6]);
614 pwd->b[7] = msa_bneg_df(DF_BYTE, pws->b[7], pwt->b[7]);
615 pwd->b[8] = msa_bneg_df(DF_BYTE, pws->b[8], pwt->b[8]);
616 pwd->b[9] = msa_bneg_df(DF_BYTE, pws->b[9], pwt->b[9]);
617 pwd->b[10] = msa_bneg_df(DF_BYTE, pws->b[10], pwt->b[10]);
618 pwd->b[11] = msa_bneg_df(DF_BYTE, pws->b[11], pwt->b[11]);
619 pwd->b[12] = msa_bneg_df(DF_BYTE, pws->b[12], pwt->b[12]);
620 pwd->b[13] = msa_bneg_df(DF_BYTE, pws->b[13], pwt->b[13]);
621 pwd->b[14] = msa_bneg_df(DF_BYTE, pws->b[14], pwt->b[14]);
622 pwd->b[15] = msa_bneg_df(DF_BYTE, pws->b[15], pwt->b[15]);
623 }
624
625 void helper_msa_bneg_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
626 {
627 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
628 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
629 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
630
631 pwd->h[0] = msa_bneg_df(DF_HALF, pws->h[0], pwt->h[0]);
632 pwd->h[1] = msa_bneg_df(DF_HALF, pws->h[1], pwt->h[1]);
633 pwd->h[2] = msa_bneg_df(DF_HALF, pws->h[2], pwt->h[2]);
634 pwd->h[3] = msa_bneg_df(DF_HALF, pws->h[3], pwt->h[3]);
635 pwd->h[4] = msa_bneg_df(DF_HALF, pws->h[4], pwt->h[4]);
636 pwd->h[5] = msa_bneg_df(DF_HALF, pws->h[5], pwt->h[5]);
637 pwd->h[6] = msa_bneg_df(DF_HALF, pws->h[6], pwt->h[6]);
638 pwd->h[7] = msa_bneg_df(DF_HALF, pws->h[7], pwt->h[7]);
639 }
640
641 void helper_msa_bneg_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
642 {
643 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
644 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
645 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
646
647 pwd->w[0] = msa_bneg_df(DF_WORD, pws->w[0], pwt->w[0]);
648 pwd->w[1] = msa_bneg_df(DF_WORD, pws->w[1], pwt->w[1]);
649 pwd->w[2] = msa_bneg_df(DF_WORD, pws->w[2], pwt->w[2]);
650 pwd->w[3] = msa_bneg_df(DF_WORD, pws->w[3], pwt->w[3]);
651 }
652
653 void helper_msa_bneg_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
654 {
655 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
656 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
657 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
658
659 pwd->d[0] = msa_bneg_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
660 pwd->d[1] = msa_bneg_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
661 }
662
663 static inline int64_t msa_bset_df(uint32_t df, int64_t arg1,
664 int64_t arg2)
665 {
666 int32_t b_arg2 = BIT_POSITION(arg2, df);
667 return UNSIGNED(arg1 | (1LL << b_arg2), df);
668 }
669
670 void helper_msa_bset_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
671 {
672 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
673 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
674 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
675
676 pwd->b[0] = msa_bset_df(DF_BYTE, pws->b[0], pwt->b[0]);
677 pwd->b[1] = msa_bset_df(DF_BYTE, pws->b[1], pwt->b[1]);
678 pwd->b[2] = msa_bset_df(DF_BYTE, pws->b[2], pwt->b[2]);
679 pwd->b[3] = msa_bset_df(DF_BYTE, pws->b[3], pwt->b[3]);
680 pwd->b[4] = msa_bset_df(DF_BYTE, pws->b[4], pwt->b[4]);
681 pwd->b[5] = msa_bset_df(DF_BYTE, pws->b[5], pwt->b[5]);
682 pwd->b[6] = msa_bset_df(DF_BYTE, pws->b[6], pwt->b[6]);
683 pwd->b[7] = msa_bset_df(DF_BYTE, pws->b[7], pwt->b[7]);
684 pwd->b[8] = msa_bset_df(DF_BYTE, pws->b[8], pwt->b[8]);
685 pwd->b[9] = msa_bset_df(DF_BYTE, pws->b[9], pwt->b[9]);
686 pwd->b[10] = msa_bset_df(DF_BYTE, pws->b[10], pwt->b[10]);
687 pwd->b[11] = msa_bset_df(DF_BYTE, pws->b[11], pwt->b[11]);
688 pwd->b[12] = msa_bset_df(DF_BYTE, pws->b[12], pwt->b[12]);
689 pwd->b[13] = msa_bset_df(DF_BYTE, pws->b[13], pwt->b[13]);
690 pwd->b[14] = msa_bset_df(DF_BYTE, pws->b[14], pwt->b[14]);
691 pwd->b[15] = msa_bset_df(DF_BYTE, pws->b[15], pwt->b[15]);
692 }
693
694 void helper_msa_bset_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
695 {
696 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
697 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
698 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
699
700 pwd->h[0] = msa_bset_df(DF_HALF, pws->h[0], pwt->h[0]);
701 pwd->h[1] = msa_bset_df(DF_HALF, pws->h[1], pwt->h[1]);
702 pwd->h[2] = msa_bset_df(DF_HALF, pws->h[2], pwt->h[2]);
703 pwd->h[3] = msa_bset_df(DF_HALF, pws->h[3], pwt->h[3]);
704 pwd->h[4] = msa_bset_df(DF_HALF, pws->h[4], pwt->h[4]);
705 pwd->h[5] = msa_bset_df(DF_HALF, pws->h[5], pwt->h[5]);
706 pwd->h[6] = msa_bset_df(DF_HALF, pws->h[6], pwt->h[6]);
707 pwd->h[7] = msa_bset_df(DF_HALF, pws->h[7], pwt->h[7]);
708 }
709
710 void helper_msa_bset_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
711 {
712 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
713 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
714 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
715
716 pwd->w[0] = msa_bset_df(DF_WORD, pws->w[0], pwt->w[0]);
717 pwd->w[1] = msa_bset_df(DF_WORD, pws->w[1], pwt->w[1]);
718 pwd->w[2] = msa_bset_df(DF_WORD, pws->w[2], pwt->w[2]);
719 pwd->w[3] = msa_bset_df(DF_WORD, pws->w[3], pwt->w[3]);
720 }
721
722 void helper_msa_bset_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
723 {
724 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
725 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
726 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
727
728 pwd->d[0] = msa_bset_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
729 pwd->d[1] = msa_bset_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
730 }
731
732
733 /*
734 * Fixed Multiply
735 * --------------
736 *
737 * +---------------+----------------------------------------------------------+
738 * | MADD_Q.H | Vector Fixed-Point Multiply and Add (halfword) |
739 * | MADD_Q.W | Vector Fixed-Point Multiply and Add (word) |
740 * | MADDR_Q.H | Vector Fixed-Point Multiply and Add Rounded (halfword) |
741 * | MADDR_Q.W | Vector Fixed-Point Multiply and Add Rounded (word) |
742 * | MSUB_Q.H | Vector Fixed-Point Multiply and Subtr. (halfword) |
743 * | MSUB_Q.W | Vector Fixed-Point Multiply and Subtr. (word) |
744 * | MSUBR_Q.H | Vector Fixed-Point Multiply and Subtr. Rounded (halfword)|
745 * | MSUBR_Q.W | Vector Fixed-Point Multiply and Subtr. Rounded (word) |
746 * | MUL_Q.H | Vector Fixed-Point Multiply (halfword) |
747 * | MUL_Q.W | Vector Fixed-Point Multiply (word) |
748 * | MULR_Q.H | Vector Fixed-Point Multiply Rounded (halfword) |
749 * | MULR_Q.W | Vector Fixed-Point Multiply Rounded (word) |
750 * +---------------+----------------------------------------------------------+
751 */
752
753 /* TODO: insert Fixed Multiply group helpers here */
754
755
756 /*
757 * Float Max Min
758 * -------------
759 *
760 * +---------------+----------------------------------------------------------+
761 * | FMAX_A.W | Vector Floating-Point Maximum (Absolute) (word) |
762 * | FMAX_A.D | Vector Floating-Point Maximum (Absolute) (doubleword) |
763 * | FMAX.W | Vector Floating-Point Maximum (word) |
764 * | FMAX.D | Vector Floating-Point Maximum (doubleword) |
765 * | FMIN_A.W | Vector Floating-Point Minimum (Absolute) (word) |
766 * | FMIN_A.D | Vector Floating-Point Minimum (Absolute) (doubleword) |
767 * | FMIN.W | Vector Floating-Point Minimum (word) |
768 * | FMIN.D | Vector Floating-Point Minimum (doubleword) |
769 * +---------------+----------------------------------------------------------+
770 */
771
772 /* TODO: insert Float Max Min group helpers here */
773
774
775 /*
776 * Int Add
777 * -------
778 *
779 * +---------------+----------------------------------------------------------+
780 * | ADD_A.B | Vector Add Absolute Values (byte) |
781 * | ADD_A.H | Vector Add Absolute Values (halfword) |
782 * | ADD_A.W | Vector Add Absolute Values (word) |
783 * | ADD_A.D | Vector Add Absolute Values (doubleword) |
784 * | ADDS_A.B | Vector Signed Saturated Add (of Absolute) (byte) |
785 * | ADDS_A.H | Vector Signed Saturated Add (of Absolute) (halfword) |
786 * | ADDS_A.W | Vector Signed Saturated Add (of Absolute) (word) |
787 * | ADDS_A.D | Vector Signed Saturated Add (of Absolute) (doubleword) |
788 * | ADDS_S.B | Vector Signed Saturated Add (of Signed) (byte) |
789 * | ADDS_S.H | Vector Signed Saturated Add (of Signed) (halfword) |
790 * | ADDS_S.W | Vector Signed Saturated Add (of Signed) (word) |
791 * | ADDS_S.D | Vector Signed Saturated Add (of Signed) (doubleword) |
792 * | ADDS_U.B | Vector Unsigned Saturated Add (of Unsigned) (byte) |
793 * | ADDS_U.H | Vector Unsigned Saturated Add (of Unsigned) (halfword) |
794 * | ADDS_U.W | Vector Unsigned Saturated Add (of Unsigned) (word) |
795 * | ADDS_U.D | Vector Unsigned Saturated Add (of Unsigned) (doubleword) |
796 * | ADDV.B | Vector Add (byte) |
797 * | ADDV.H | Vector Add (halfword) |
798 * | ADDV.W | Vector Add (word) |
799 * | ADDV.D | Vector Add (doubleword) |
800 * | HADD_S.H | Vector Signed Horizontal Add (halfword) |
801 * | HADD_S.W | Vector Signed Horizontal Add (word) |
802 * | HADD_S.D | Vector Signed Horizontal Add (doubleword) |
803 * | HADD_U.H | Vector Unigned Horizontal Add (halfword) |
804 * | HADD_U.W | Vector Unigned Horizontal Add (word) |
805 * | HADD_U.D | Vector Unigned Horizontal Add (doubleword) |
806 * +---------------+----------------------------------------------------------+
807 */
808
809
810 static inline int64_t msa_add_a_df(uint32_t df, int64_t arg1, int64_t arg2)
811 {
812 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
813 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
814 return abs_arg1 + abs_arg2;
815 }
816
817 void helper_msa_add_a_b(CPUMIPSState *env,
818 uint32_t wd, uint32_t ws, uint32_t wt)
819 {
820 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
821 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
822 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
823
824 pwd->b[0] = msa_add_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
825 pwd->b[1] = msa_add_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
826 pwd->b[2] = msa_add_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
827 pwd->b[3] = msa_add_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
828 pwd->b[4] = msa_add_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
829 pwd->b[5] = msa_add_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
830 pwd->b[6] = msa_add_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
831 pwd->b[7] = msa_add_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
832 pwd->b[8] = msa_add_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
833 pwd->b[9] = msa_add_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
834 pwd->b[10] = msa_add_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
835 pwd->b[11] = msa_add_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
836 pwd->b[12] = msa_add_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
837 pwd->b[13] = msa_add_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
838 pwd->b[14] = msa_add_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
839 pwd->b[15] = msa_add_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
840 }
841
842 void helper_msa_add_a_h(CPUMIPSState *env,
843 uint32_t wd, uint32_t ws, uint32_t wt)
844 {
845 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
846 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
847 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
848
849 pwd->h[0] = msa_add_a_df(DF_HALF, pws->h[0], pwt->h[0]);
850 pwd->h[1] = msa_add_a_df(DF_HALF, pws->h[1], pwt->h[1]);
851 pwd->h[2] = msa_add_a_df(DF_HALF, pws->h[2], pwt->h[2]);
852 pwd->h[3] = msa_add_a_df(DF_HALF, pws->h[3], pwt->h[3]);
853 pwd->h[4] = msa_add_a_df(DF_HALF, pws->h[4], pwt->h[4]);
854 pwd->h[5] = msa_add_a_df(DF_HALF, pws->h[5], pwt->h[5]);
855 pwd->h[6] = msa_add_a_df(DF_HALF, pws->h[6], pwt->h[6]);
856 pwd->h[7] = msa_add_a_df(DF_HALF, pws->h[7], pwt->h[7]);
857 }
858
859 void helper_msa_add_a_w(CPUMIPSState *env,
860 uint32_t wd, uint32_t ws, uint32_t wt)
861 {
862 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
863 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
864 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
865
866 pwd->w[0] = msa_add_a_df(DF_WORD, pws->w[0], pwt->w[0]);
867 pwd->w[1] = msa_add_a_df(DF_WORD, pws->w[1], pwt->w[1]);
868 pwd->w[2] = msa_add_a_df(DF_WORD, pws->w[2], pwt->w[2]);
869 pwd->w[3] = msa_add_a_df(DF_WORD, pws->w[3], pwt->w[3]);
870 }
871
872 void helper_msa_add_a_d(CPUMIPSState *env,
873 uint32_t wd, uint32_t ws, uint32_t wt)
874 {
875 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
876 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
877 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
878
879 pwd->d[0] = msa_add_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
880 pwd->d[1] = msa_add_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
881 }
882
883
884 static inline int64_t msa_adds_a_df(uint32_t df, int64_t arg1, int64_t arg2)
885 {
886 uint64_t max_int = (uint64_t)DF_MAX_INT(df);
887 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
888 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
889 if (abs_arg1 > max_int || abs_arg2 > max_int) {
890 return (int64_t)max_int;
891 } else {
892 return (abs_arg1 < max_int - abs_arg2) ? abs_arg1 + abs_arg2 : max_int;
893 }
894 }
895
896 void helper_msa_adds_a_b(CPUMIPSState *env,
897 uint32_t wd, uint32_t ws, uint32_t wt)
898 {
899 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
900 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
901 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
902
903 pwd->b[0] = msa_adds_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
904 pwd->b[1] = msa_adds_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
905 pwd->b[2] = msa_adds_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
906 pwd->b[3] = msa_adds_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
907 pwd->b[4] = msa_adds_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
908 pwd->b[5] = msa_adds_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
909 pwd->b[6] = msa_adds_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
910 pwd->b[7] = msa_adds_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
911 pwd->b[8] = msa_adds_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
912 pwd->b[9] = msa_adds_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
913 pwd->b[10] = msa_adds_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
914 pwd->b[11] = msa_adds_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
915 pwd->b[12] = msa_adds_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
916 pwd->b[13] = msa_adds_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
917 pwd->b[14] = msa_adds_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
918 pwd->b[15] = msa_adds_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
919 }
920
921 void helper_msa_adds_a_h(CPUMIPSState *env,
922 uint32_t wd, uint32_t ws, uint32_t wt)
923 {
924 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
925 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
926 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
927
928 pwd->h[0] = msa_adds_a_df(DF_HALF, pws->h[0], pwt->h[0]);
929 pwd->h[1] = msa_adds_a_df(DF_HALF, pws->h[1], pwt->h[1]);
930 pwd->h[2] = msa_adds_a_df(DF_HALF, pws->h[2], pwt->h[2]);
931 pwd->h[3] = msa_adds_a_df(DF_HALF, pws->h[3], pwt->h[3]);
932 pwd->h[4] = msa_adds_a_df(DF_HALF, pws->h[4], pwt->h[4]);
933 pwd->h[5] = msa_adds_a_df(DF_HALF, pws->h[5], pwt->h[5]);
934 pwd->h[6] = msa_adds_a_df(DF_HALF, pws->h[6], pwt->h[6]);
935 pwd->h[7] = msa_adds_a_df(DF_HALF, pws->h[7], pwt->h[7]);
936 }
937
938 void helper_msa_adds_a_w(CPUMIPSState *env,
939 uint32_t wd, uint32_t ws, uint32_t wt)
940 {
941 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
942 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
943 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
944
945 pwd->w[0] = msa_adds_a_df(DF_WORD, pws->w[0], pwt->w[0]);
946 pwd->w[1] = msa_adds_a_df(DF_WORD, pws->w[1], pwt->w[1]);
947 pwd->w[2] = msa_adds_a_df(DF_WORD, pws->w[2], pwt->w[2]);
948 pwd->w[3] = msa_adds_a_df(DF_WORD, pws->w[3], pwt->w[3]);
949 }
950
951 void helper_msa_adds_a_d(CPUMIPSState *env,
952 uint32_t wd, uint32_t ws, uint32_t wt)
953 {
954 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
955 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
956 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
957
958 pwd->d[0] = msa_adds_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
959 pwd->d[1] = msa_adds_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
960 }
961
962
963 static inline int64_t msa_adds_s_df(uint32_t df, int64_t arg1, int64_t arg2)
964 {
965 int64_t max_int = DF_MAX_INT(df);
966 int64_t min_int = DF_MIN_INT(df);
967 if (arg1 < 0) {
968 return (min_int - arg1 < arg2) ? arg1 + arg2 : min_int;
969 } else {
970 return (arg2 < max_int - arg1) ? arg1 + arg2 : max_int;
971 }
972 }
973
974 void helper_msa_adds_s_b(CPUMIPSState *env,
975 uint32_t wd, uint32_t ws, uint32_t wt)
976 {
977 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
978 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
979 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
980
981 pwd->b[0] = msa_adds_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
982 pwd->b[1] = msa_adds_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
983 pwd->b[2] = msa_adds_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
984 pwd->b[3] = msa_adds_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
985 pwd->b[4] = msa_adds_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
986 pwd->b[5] = msa_adds_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
987 pwd->b[6] = msa_adds_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
988 pwd->b[7] = msa_adds_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
989 pwd->b[8] = msa_adds_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
990 pwd->b[9] = msa_adds_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
991 pwd->b[10] = msa_adds_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
992 pwd->b[11] = msa_adds_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
993 pwd->b[12] = msa_adds_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
994 pwd->b[13] = msa_adds_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
995 pwd->b[14] = msa_adds_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
996 pwd->b[15] = msa_adds_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
997 }
998
999 void helper_msa_adds_s_h(CPUMIPSState *env,
1000 uint32_t wd, uint32_t ws, uint32_t wt)
1001 {
1002 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1003 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1004 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1005
1006 pwd->h[0] = msa_adds_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1007 pwd->h[1] = msa_adds_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1008 pwd->h[2] = msa_adds_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1009 pwd->h[3] = msa_adds_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1010 pwd->h[4] = msa_adds_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1011 pwd->h[5] = msa_adds_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1012 pwd->h[6] = msa_adds_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1013 pwd->h[7] = msa_adds_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1014 }
1015
1016 void helper_msa_adds_s_w(CPUMIPSState *env,
1017 uint32_t wd, uint32_t ws, uint32_t wt)
1018 {
1019 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1020 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1021 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1022
1023 pwd->w[0] = msa_adds_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1024 pwd->w[1] = msa_adds_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1025 pwd->w[2] = msa_adds_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1026 pwd->w[3] = msa_adds_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1027 }
1028
1029 void helper_msa_adds_s_d(CPUMIPSState *env,
1030 uint32_t wd, uint32_t ws, uint32_t wt)
1031 {
1032 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1033 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1034 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1035
1036 pwd->d[0] = msa_adds_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1037 pwd->d[1] = msa_adds_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1038 }
1039
1040
1041 static inline uint64_t msa_adds_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1042 {
1043 uint64_t max_uint = DF_MAX_UINT(df);
1044 uint64_t u_arg1 = UNSIGNED(arg1, df);
1045 uint64_t u_arg2 = UNSIGNED(arg2, df);
1046 return (u_arg1 < max_uint - u_arg2) ? u_arg1 + u_arg2 : max_uint;
1047 }
1048
1049 void helper_msa_adds_u_b(CPUMIPSState *env,
1050 uint32_t wd, uint32_t ws, uint32_t wt)
1051 {
1052 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1053 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1054 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1055
1056 pwd->b[0] = msa_adds_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1057 pwd->b[1] = msa_adds_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1058 pwd->b[2] = msa_adds_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1059 pwd->b[3] = msa_adds_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1060 pwd->b[4] = msa_adds_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1061 pwd->b[5] = msa_adds_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1062 pwd->b[6] = msa_adds_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1063 pwd->b[7] = msa_adds_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1064 pwd->b[8] = msa_adds_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1065 pwd->b[9] = msa_adds_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1066 pwd->b[10] = msa_adds_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1067 pwd->b[11] = msa_adds_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1068 pwd->b[12] = msa_adds_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1069 pwd->b[13] = msa_adds_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1070 pwd->b[14] = msa_adds_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1071 pwd->b[15] = msa_adds_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1072 }
1073
1074 void helper_msa_adds_u_h(CPUMIPSState *env,
1075 uint32_t wd, uint32_t ws, uint32_t wt)
1076 {
1077 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1078 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1079 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1080
1081 pwd->h[0] = msa_adds_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1082 pwd->h[1] = msa_adds_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1083 pwd->h[2] = msa_adds_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1084 pwd->h[3] = msa_adds_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1085 pwd->h[4] = msa_adds_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1086 pwd->h[5] = msa_adds_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1087 pwd->h[6] = msa_adds_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1088 pwd->h[7] = msa_adds_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1089 }
1090
1091 void helper_msa_adds_u_w(CPUMIPSState *env,
1092 uint32_t wd, uint32_t ws, uint32_t wt)
1093 {
1094 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1095 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1096 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1097
1098 pwd->w[0] = msa_adds_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1099 pwd->w[1] = msa_adds_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1100 pwd->w[2] = msa_adds_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1101 pwd->w[3] = msa_adds_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1102 }
1103
1104 void helper_msa_adds_u_d(CPUMIPSState *env,
1105 uint32_t wd, uint32_t ws, uint32_t wt)
1106 {
1107 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1108 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1109 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1110
1111 pwd->d[0] = msa_adds_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1112 pwd->d[1] = msa_adds_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1113 }
1114
1115
1116 static inline int64_t msa_addv_df(uint32_t df, int64_t arg1, int64_t arg2)
1117 {
1118 return arg1 + arg2;
1119 }
1120
1121 void helper_msa_addv_b(CPUMIPSState *env,
1122 uint32_t wd, uint32_t ws, uint32_t wt)
1123 {
1124 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1125 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1126 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1127
1128 pwd->b[0] = msa_addv_df(DF_BYTE, pws->b[0], pwt->b[0]);
1129 pwd->b[1] = msa_addv_df(DF_BYTE, pws->b[1], pwt->b[1]);
1130 pwd->b[2] = msa_addv_df(DF_BYTE, pws->b[2], pwt->b[2]);
1131 pwd->b[3] = msa_addv_df(DF_BYTE, pws->b[3], pwt->b[3]);
1132 pwd->b[4] = msa_addv_df(DF_BYTE, pws->b[4], pwt->b[4]);
1133 pwd->b[5] = msa_addv_df(DF_BYTE, pws->b[5], pwt->b[5]);
1134 pwd->b[6] = msa_addv_df(DF_BYTE, pws->b[6], pwt->b[6]);
1135 pwd->b[7] = msa_addv_df(DF_BYTE, pws->b[7], pwt->b[7]);
1136 pwd->b[8] = msa_addv_df(DF_BYTE, pws->b[8], pwt->b[8]);
1137 pwd->b[9] = msa_addv_df(DF_BYTE, pws->b[9], pwt->b[9]);
1138 pwd->b[10] = msa_addv_df(DF_BYTE, pws->b[10], pwt->b[10]);
1139 pwd->b[11] = msa_addv_df(DF_BYTE, pws->b[11], pwt->b[11]);
1140 pwd->b[12] = msa_addv_df(DF_BYTE, pws->b[12], pwt->b[12]);
1141 pwd->b[13] = msa_addv_df(DF_BYTE, pws->b[13], pwt->b[13]);
1142 pwd->b[14] = msa_addv_df(DF_BYTE, pws->b[14], pwt->b[14]);
1143 pwd->b[15] = msa_addv_df(DF_BYTE, pws->b[15], pwt->b[15]);
1144 }
1145
1146 void helper_msa_addv_h(CPUMIPSState *env,
1147 uint32_t wd, uint32_t ws, uint32_t wt)
1148 {
1149 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1150 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1151 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1152
1153 pwd->h[0] = msa_addv_df(DF_HALF, pws->h[0], pwt->h[0]);
1154 pwd->h[1] = msa_addv_df(DF_HALF, pws->h[1], pwt->h[1]);
1155 pwd->h[2] = msa_addv_df(DF_HALF, pws->h[2], pwt->h[2]);
1156 pwd->h[3] = msa_addv_df(DF_HALF, pws->h[3], pwt->h[3]);
1157 pwd->h[4] = msa_addv_df(DF_HALF, pws->h[4], pwt->h[4]);
1158 pwd->h[5] = msa_addv_df(DF_HALF, pws->h[5], pwt->h[5]);
1159 pwd->h[6] = msa_addv_df(DF_HALF, pws->h[6], pwt->h[6]);
1160 pwd->h[7] = msa_addv_df(DF_HALF, pws->h[7], pwt->h[7]);
1161 }
1162
1163 void helper_msa_addv_w(CPUMIPSState *env,
1164 uint32_t wd, uint32_t ws, uint32_t wt)
1165 {
1166 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1167 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1168 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1169
1170 pwd->w[0] = msa_addv_df(DF_WORD, pws->w[0], pwt->w[0]);
1171 pwd->w[1] = msa_addv_df(DF_WORD, pws->w[1], pwt->w[1]);
1172 pwd->w[2] = msa_addv_df(DF_WORD, pws->w[2], pwt->w[2]);
1173 pwd->w[3] = msa_addv_df(DF_WORD, pws->w[3], pwt->w[3]);
1174 }
1175
1176 void helper_msa_addv_d(CPUMIPSState *env,
1177 uint32_t wd, uint32_t ws, uint32_t wt)
1178 {
1179 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1180 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1181 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1182
1183 pwd->d[0] = msa_addv_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1184 pwd->d[1] = msa_addv_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1185 }
1186
1187
1188 #define SIGNED_EVEN(a, df) \
1189 ((((int64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))
1190
1191 #define UNSIGNED_EVEN(a, df) \
1192 ((((uint64_t)(a)) << (64 - DF_BITS(df) / 2)) >> (64 - DF_BITS(df) / 2))
1193
1194 #define SIGNED_ODD(a, df) \
1195 ((((int64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))
1196
1197 #define UNSIGNED_ODD(a, df) \
1198 ((((uint64_t)(a)) << (64 - DF_BITS(df))) >> (64 - DF_BITS(df) / 2))
1199
1200
1201 static inline int64_t msa_hadd_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1202 {
1203 return SIGNED_ODD(arg1, df) + SIGNED_EVEN(arg2, df);
1204 }
1205
1206 void helper_msa_hadd_s_h(CPUMIPSState *env,
1207 uint32_t wd, uint32_t ws, uint32_t wt)
1208 {
1209 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1210 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1211 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1212
1213 pwd->h[0] = msa_hadd_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1214 pwd->h[1] = msa_hadd_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1215 pwd->h[2] = msa_hadd_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1216 pwd->h[3] = msa_hadd_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1217 pwd->h[4] = msa_hadd_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1218 pwd->h[5] = msa_hadd_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1219 pwd->h[6] = msa_hadd_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1220 pwd->h[7] = msa_hadd_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1221 }
1222
1223 void helper_msa_hadd_s_w(CPUMIPSState *env,
1224 uint32_t wd, uint32_t ws, uint32_t wt)
1225 {
1226 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1227 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1228 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1229
1230 pwd->w[0] = msa_hadd_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1231 pwd->w[1] = msa_hadd_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1232 pwd->w[2] = msa_hadd_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1233 pwd->w[3] = msa_hadd_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1234 }
1235
1236 void helper_msa_hadd_s_d(CPUMIPSState *env,
1237 uint32_t wd, uint32_t ws, uint32_t wt)
1238 {
1239 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1240 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1241 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1242
1243 pwd->d[0] = msa_hadd_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1244 pwd->d[1] = msa_hadd_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1245 }
1246
1247
1248 static inline int64_t msa_hadd_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1249 {
1250 return UNSIGNED_ODD(arg1, df) + UNSIGNED_EVEN(arg2, df);
1251 }
1252
1253 void helper_msa_hadd_u_h(CPUMIPSState *env,
1254 uint32_t wd, uint32_t ws, uint32_t wt)
1255 {
1256 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1257 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1258 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1259
1260 pwd->h[0] = msa_hadd_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1261 pwd->h[1] = msa_hadd_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1262 pwd->h[2] = msa_hadd_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1263 pwd->h[3] = msa_hadd_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1264 pwd->h[4] = msa_hadd_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1265 pwd->h[5] = msa_hadd_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1266 pwd->h[6] = msa_hadd_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1267 pwd->h[7] = msa_hadd_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1268 }
1269
1270 void helper_msa_hadd_u_w(CPUMIPSState *env,
1271 uint32_t wd, uint32_t ws, uint32_t wt)
1272 {
1273 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1274 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1275 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1276
1277 pwd->w[0] = msa_hadd_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1278 pwd->w[1] = msa_hadd_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1279 pwd->w[2] = msa_hadd_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1280 pwd->w[3] = msa_hadd_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1281 }
1282
1283 void helper_msa_hadd_u_d(CPUMIPSState *env,
1284 uint32_t wd, uint32_t ws, uint32_t wt)
1285 {
1286 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1287 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1288 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1289
1290 pwd->d[0] = msa_hadd_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1291 pwd->d[1] = msa_hadd_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1292 }
1293
1294
1295 /*
1296 * Int Average
1297 * -----------
1298 *
1299 * +---------------+----------------------------------------------------------+
1300 * | AVE_S.B | Vector Signed Average (byte) |
1301 * | AVE_S.H | Vector Signed Average (halfword) |
1302 * | AVE_S.W | Vector Signed Average (word) |
1303 * | AVE_S.D | Vector Signed Average (doubleword) |
1304 * | AVE_U.B | Vector Unsigned Average (byte) |
1305 * | AVE_U.H | Vector Unsigned Average (halfword) |
1306 * | AVE_U.W | Vector Unsigned Average (word) |
1307 * | AVE_U.D | Vector Unsigned Average (doubleword) |
1308 * | AVER_S.B | Vector Signed Average Rounded (byte) |
1309 * | AVER_S.H | Vector Signed Average Rounded (halfword) |
1310 * | AVER_S.W | Vector Signed Average Rounded (word) |
1311 * | AVER_S.D | Vector Signed Average Rounded (doubleword) |
1312 * | AVER_U.B | Vector Unsigned Average Rounded (byte) |
1313 * | AVER_U.H | Vector Unsigned Average Rounded (halfword) |
1314 * | AVER_U.W | Vector Unsigned Average Rounded (word) |
1315 * | AVER_U.D | Vector Unsigned Average Rounded (doubleword) |
1316 * +---------------+----------------------------------------------------------+
1317 */
1318
1319 static inline int64_t msa_ave_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1320 {
1321 /* signed shift */
1322 return (arg1 >> 1) + (arg2 >> 1) + (arg1 & arg2 & 1);
1323 }
1324
1325 void helper_msa_ave_s_b(CPUMIPSState *env,
1326 uint32_t wd, uint32_t ws, uint32_t wt)
1327 {
1328 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1329 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1330 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1331
1332 pwd->b[0] = msa_ave_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1333 pwd->b[1] = msa_ave_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1334 pwd->b[2] = msa_ave_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1335 pwd->b[3] = msa_ave_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1336 pwd->b[4] = msa_ave_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1337 pwd->b[5] = msa_ave_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1338 pwd->b[6] = msa_ave_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1339 pwd->b[7] = msa_ave_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1340 pwd->b[8] = msa_ave_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1341 pwd->b[9] = msa_ave_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1342 pwd->b[10] = msa_ave_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1343 pwd->b[11] = msa_ave_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1344 pwd->b[12] = msa_ave_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1345 pwd->b[13] = msa_ave_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1346 pwd->b[14] = msa_ave_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1347 pwd->b[15] = msa_ave_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1348 }
1349
1350 void helper_msa_ave_s_h(CPUMIPSState *env,
1351 uint32_t wd, uint32_t ws, uint32_t wt)
1352 {
1353 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1354 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1355 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1356
1357 pwd->h[0] = msa_ave_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1358 pwd->h[1] = msa_ave_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1359 pwd->h[2] = msa_ave_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1360 pwd->h[3] = msa_ave_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1361 pwd->h[4] = msa_ave_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1362 pwd->h[5] = msa_ave_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1363 pwd->h[6] = msa_ave_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1364 pwd->h[7] = msa_ave_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1365 }
1366
1367 void helper_msa_ave_s_w(CPUMIPSState *env,
1368 uint32_t wd, uint32_t ws, uint32_t wt)
1369 {
1370 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1371 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1372 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1373
1374 pwd->w[0] = msa_ave_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1375 pwd->w[1] = msa_ave_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1376 pwd->w[2] = msa_ave_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1377 pwd->w[3] = msa_ave_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1378 }
1379
1380 void helper_msa_ave_s_d(CPUMIPSState *env,
1381 uint32_t wd, uint32_t ws, uint32_t wt)
1382 {
1383 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1384 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1385 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1386
1387 pwd->d[0] = msa_ave_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1388 pwd->d[1] = msa_ave_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1389 }
1390
1391 static inline uint64_t msa_ave_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1392 {
1393 uint64_t u_arg1 = UNSIGNED(arg1, df);
1394 uint64_t u_arg2 = UNSIGNED(arg2, df);
1395 /* unsigned shift */
1396 return (u_arg1 >> 1) + (u_arg2 >> 1) + (u_arg1 & u_arg2 & 1);
1397 }
1398
1399 void helper_msa_ave_u_b(CPUMIPSState *env,
1400 uint32_t wd, uint32_t ws, uint32_t wt)
1401 {
1402 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1403 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1404 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1405
1406 pwd->b[0] = msa_ave_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1407 pwd->b[1] = msa_ave_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1408 pwd->b[2] = msa_ave_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1409 pwd->b[3] = msa_ave_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1410 pwd->b[4] = msa_ave_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1411 pwd->b[5] = msa_ave_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1412 pwd->b[6] = msa_ave_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1413 pwd->b[7] = msa_ave_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1414 pwd->b[8] = msa_ave_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1415 pwd->b[9] = msa_ave_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1416 pwd->b[10] = msa_ave_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1417 pwd->b[11] = msa_ave_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1418 pwd->b[12] = msa_ave_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1419 pwd->b[13] = msa_ave_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1420 pwd->b[14] = msa_ave_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1421 pwd->b[15] = msa_ave_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1422 }
1423
1424 void helper_msa_ave_u_h(CPUMIPSState *env,
1425 uint32_t wd, uint32_t ws, uint32_t wt)
1426 {
1427 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1428 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1429 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1430
1431 pwd->h[0] = msa_ave_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1432 pwd->h[1] = msa_ave_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1433 pwd->h[2] = msa_ave_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1434 pwd->h[3] = msa_ave_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1435 pwd->h[4] = msa_ave_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1436 pwd->h[5] = msa_ave_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1437 pwd->h[6] = msa_ave_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1438 pwd->h[7] = msa_ave_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1439 }
1440
1441 void helper_msa_ave_u_w(CPUMIPSState *env,
1442 uint32_t wd, uint32_t ws, uint32_t wt)
1443 {
1444 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1445 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1446 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1447
1448 pwd->w[0] = msa_ave_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1449 pwd->w[1] = msa_ave_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1450 pwd->w[2] = msa_ave_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1451 pwd->w[3] = msa_ave_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1452 }
1453
1454 void helper_msa_ave_u_d(CPUMIPSState *env,
1455 uint32_t wd, uint32_t ws, uint32_t wt)
1456 {
1457 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1458 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1459 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1460
1461 pwd->d[0] = msa_ave_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1462 pwd->d[1] = msa_ave_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1463 }
1464
1465 static inline int64_t msa_aver_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1466 {
1467 /* signed shift */
1468 return (arg1 >> 1) + (arg2 >> 1) + ((arg1 | arg2) & 1);
1469 }
1470
1471 void helper_msa_aver_s_b(CPUMIPSState *env,
1472 uint32_t wd, uint32_t ws, uint32_t wt)
1473 {
1474 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1475 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1476 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1477
1478 pwd->b[0] = msa_aver_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1479 pwd->b[1] = msa_aver_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1480 pwd->b[2] = msa_aver_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1481 pwd->b[3] = msa_aver_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1482 pwd->b[4] = msa_aver_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1483 pwd->b[5] = msa_aver_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1484 pwd->b[6] = msa_aver_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1485 pwd->b[7] = msa_aver_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1486 pwd->b[8] = msa_aver_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1487 pwd->b[9] = msa_aver_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1488 pwd->b[10] = msa_aver_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1489 pwd->b[11] = msa_aver_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1490 pwd->b[12] = msa_aver_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1491 pwd->b[13] = msa_aver_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1492 pwd->b[14] = msa_aver_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1493 pwd->b[15] = msa_aver_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1494 }
1495
1496 void helper_msa_aver_s_h(CPUMIPSState *env,
1497 uint32_t wd, uint32_t ws, uint32_t wt)
1498 {
1499 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1500 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1501 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1502
1503 pwd->h[0] = msa_aver_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1504 pwd->h[1] = msa_aver_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1505 pwd->h[2] = msa_aver_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1506 pwd->h[3] = msa_aver_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1507 pwd->h[4] = msa_aver_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1508 pwd->h[5] = msa_aver_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1509 pwd->h[6] = msa_aver_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1510 pwd->h[7] = msa_aver_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1511 }
1512
1513 void helper_msa_aver_s_w(CPUMIPSState *env,
1514 uint32_t wd, uint32_t ws, uint32_t wt)
1515 {
1516 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1517 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1518 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1519
1520 pwd->w[0] = msa_aver_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1521 pwd->w[1] = msa_aver_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1522 pwd->w[2] = msa_aver_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1523 pwd->w[3] = msa_aver_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1524 }
1525
1526 void helper_msa_aver_s_d(CPUMIPSState *env,
1527 uint32_t wd, uint32_t ws, uint32_t wt)
1528 {
1529 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1530 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1531 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1532
1533 pwd->d[0] = msa_aver_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1534 pwd->d[1] = msa_aver_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1535 }
1536
1537 static inline uint64_t msa_aver_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
1538 {
1539 uint64_t u_arg1 = UNSIGNED(arg1, df);
1540 uint64_t u_arg2 = UNSIGNED(arg2, df);
1541 /* unsigned shift */
1542 return (u_arg1 >> 1) + (u_arg2 >> 1) + ((u_arg1 | u_arg2) & 1);
1543 }
1544
1545 void helper_msa_aver_u_b(CPUMIPSState *env,
1546 uint32_t wd, uint32_t ws, uint32_t wt)
1547 {
1548 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1549 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1550 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1551
1552 pwd->b[0] = msa_aver_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1553 pwd->b[1] = msa_aver_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1554 pwd->b[2] = msa_aver_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1555 pwd->b[3] = msa_aver_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1556 pwd->b[4] = msa_aver_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1557 pwd->b[5] = msa_aver_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1558 pwd->b[6] = msa_aver_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1559 pwd->b[7] = msa_aver_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1560 pwd->b[8] = msa_aver_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1561 pwd->b[9] = msa_aver_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1562 pwd->b[10] = msa_aver_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1563 pwd->b[11] = msa_aver_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1564 pwd->b[12] = msa_aver_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1565 pwd->b[13] = msa_aver_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1566 pwd->b[14] = msa_aver_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1567 pwd->b[15] = msa_aver_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1568 }
1569
1570 void helper_msa_aver_u_h(CPUMIPSState *env,
1571 uint32_t wd, uint32_t ws, uint32_t wt)
1572 {
1573 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1574 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1575 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1576
1577 pwd->h[0] = msa_aver_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1578 pwd->h[1] = msa_aver_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1579 pwd->h[2] = msa_aver_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1580 pwd->h[3] = msa_aver_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1581 pwd->h[4] = msa_aver_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1582 pwd->h[5] = msa_aver_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1583 pwd->h[6] = msa_aver_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1584 pwd->h[7] = msa_aver_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1585 }
1586
1587 void helper_msa_aver_u_w(CPUMIPSState *env,
1588 uint32_t wd, uint32_t ws, uint32_t wt)
1589 {
1590 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1591 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1592 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1593
1594 pwd->w[0] = msa_aver_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1595 pwd->w[1] = msa_aver_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1596 pwd->w[2] = msa_aver_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1597 pwd->w[3] = msa_aver_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1598 }
1599
1600 void helper_msa_aver_u_d(CPUMIPSState *env,
1601 uint32_t wd, uint32_t ws, uint32_t wt)
1602 {
1603 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1604 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1605 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1606
1607 pwd->d[0] = msa_aver_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1608 pwd->d[1] = msa_aver_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1609 }
1610
1611
1612 /*
1613 * Int Compare
1614 * -----------
1615 *
1616 * +---------------+----------------------------------------------------------+
1617 * | CEQ.B | Vector Compare Equal (byte) |
1618 * | CEQ.H | Vector Compare Equal (halfword) |
1619 * | CEQ.W | Vector Compare Equal (word) |
1620 * | CEQ.D | Vector Compare Equal (doubleword) |
1621 * | CLE_S.B | Vector Compare Signed Less Than or Equal (byte) |
1622 * | CLE_S.H | Vector Compare Signed Less Than or Equal (halfword) |
1623 * | CLE_S.W | Vector Compare Signed Less Than or Equal (word) |
1624 * | CLE_S.D | Vector Compare Signed Less Than or Equal (doubleword) |
1625 * | CLE_U.B | Vector Compare Unsigned Less Than or Equal (byte) |
1626 * | CLE_U.H | Vector Compare Unsigned Less Than or Equal (halfword) |
1627 * | CLE_U.W | Vector Compare Unsigned Less Than or Equal (word) |
1628 * | CLE_U.D | Vector Compare Unsigned Less Than or Equal (doubleword) |
1629 * | CLT_S.B | Vector Compare Signed Less Than (byte) |
1630 * | CLT_S.H | Vector Compare Signed Less Than (halfword) |
1631 * | CLT_S.W | Vector Compare Signed Less Than (word) |
1632 * | CLT_S.D | Vector Compare Signed Less Than (doubleword) |
1633 * | CLT_U.B | Vector Compare Unsigned Less Than (byte) |
1634 * | CLT_U.H | Vector Compare Unsigned Less Than (halfword) |
1635 * | CLT_U.W | Vector Compare Unsigned Less Than (word) |
1636 * | CLT_U.D | Vector Compare Unsigned Less Than (doubleword) |
1637 * +---------------+----------------------------------------------------------+
1638 */
1639
1640 static inline int64_t msa_ceq_df(uint32_t df, int64_t arg1, int64_t arg2)
1641 {
1642 return arg1 == arg2 ? -1 : 0;
1643 }
1644
1645 static inline int8_t msa_ceq_b(int8_t arg1, int8_t arg2)
1646 {
1647 return arg1 == arg2 ? -1 : 0;
1648 }
1649
1650 void helper_msa_ceq_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1651 {
1652 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1653 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1654 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1655
1656 pwd->b[0] = msa_ceq_b(pws->b[0], pwt->b[0]);
1657 pwd->b[1] = msa_ceq_b(pws->b[1], pwt->b[1]);
1658 pwd->b[2] = msa_ceq_b(pws->b[2], pwt->b[2]);
1659 pwd->b[3] = msa_ceq_b(pws->b[3], pwt->b[3]);
1660 pwd->b[4] = msa_ceq_b(pws->b[4], pwt->b[4]);
1661 pwd->b[5] = msa_ceq_b(pws->b[5], pwt->b[5]);
1662 pwd->b[6] = msa_ceq_b(pws->b[6], pwt->b[6]);
1663 pwd->b[7] = msa_ceq_b(pws->b[7], pwt->b[7]);
1664 pwd->b[8] = msa_ceq_b(pws->b[8], pwt->b[8]);
1665 pwd->b[9] = msa_ceq_b(pws->b[9], pwt->b[9]);
1666 pwd->b[10] = msa_ceq_b(pws->b[10], pwt->b[10]);
1667 pwd->b[11] = msa_ceq_b(pws->b[11], pwt->b[11]);
1668 pwd->b[12] = msa_ceq_b(pws->b[12], pwt->b[12]);
1669 pwd->b[13] = msa_ceq_b(pws->b[13], pwt->b[13]);
1670 pwd->b[14] = msa_ceq_b(pws->b[14], pwt->b[14]);
1671 pwd->b[15] = msa_ceq_b(pws->b[15], pwt->b[15]);
1672 }
1673
1674 static inline int16_t msa_ceq_h(int16_t arg1, int16_t arg2)
1675 {
1676 return arg1 == arg2 ? -1 : 0;
1677 }
1678
1679 void helper_msa_ceq_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1680 {
1681 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1682 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1683 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1684
1685 pwd->h[0] = msa_ceq_h(pws->h[0], pwt->h[0]);
1686 pwd->h[1] = msa_ceq_h(pws->h[1], pwt->h[1]);
1687 pwd->h[2] = msa_ceq_h(pws->h[2], pwt->h[2]);
1688 pwd->h[3] = msa_ceq_h(pws->h[3], pwt->h[3]);
1689 pwd->h[4] = msa_ceq_h(pws->h[4], pwt->h[4]);
1690 pwd->h[5] = msa_ceq_h(pws->h[5], pwt->h[5]);
1691 pwd->h[6] = msa_ceq_h(pws->h[6], pwt->h[6]);
1692 pwd->h[7] = msa_ceq_h(pws->h[7], pwt->h[7]);
1693 }
1694
1695 static inline int32_t msa_ceq_w(int32_t arg1, int32_t arg2)
1696 {
1697 return arg1 == arg2 ? -1 : 0;
1698 }
1699
1700 void helper_msa_ceq_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1701 {
1702 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1703 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1704 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1705
1706 pwd->w[0] = msa_ceq_w(pws->w[0], pwt->w[0]);
1707 pwd->w[1] = msa_ceq_w(pws->w[1], pwt->w[1]);
1708 pwd->w[2] = msa_ceq_w(pws->w[2], pwt->w[2]);
1709 pwd->w[3] = msa_ceq_w(pws->w[3], pwt->w[3]);
1710 }
1711
1712 static inline int64_t msa_ceq_d(int64_t arg1, int64_t arg2)
1713 {
1714 return arg1 == arg2 ? -1 : 0;
1715 }
1716
1717 void helper_msa_ceq_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
1718 {
1719 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1720 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1721 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1722
1723 pwd->d[0] = msa_ceq_d(pws->d[0], pwt->d[0]);
1724 pwd->d[1] = msa_ceq_d(pws->d[1], pwt->d[1]);
1725 }
1726
1727 static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1728 {
1729 return arg1 <= arg2 ? -1 : 0;
1730 }
1731
1732 void helper_msa_cle_s_b(CPUMIPSState *env,
1733 uint32_t wd, uint32_t ws, uint32_t wt)
1734 {
1735 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1736 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1737 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1738
1739 pwd->b[0] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
1740 pwd->b[1] = msa_cle_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
1741 pwd->b[2] = msa_cle_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
1742 pwd->b[3] = msa_cle_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
1743 pwd->b[4] = msa_cle_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
1744 pwd->b[5] = msa_cle_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
1745 pwd->b[6] = msa_cle_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
1746 pwd->b[7] = msa_cle_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
1747 pwd->b[8] = msa_cle_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
1748 pwd->b[9] = msa_cle_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
1749 pwd->b[10] = msa_cle_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
1750 pwd->b[11] = msa_cle_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
1751 pwd->b[12] = msa_cle_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
1752 pwd->b[13] = msa_cle_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
1753 pwd->b[14] = msa_cle_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
1754 pwd->b[15] = msa_cle_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
1755 }
1756
1757 void helper_msa_cle_s_h(CPUMIPSState *env,
1758 uint32_t wd, uint32_t ws, uint32_t wt)
1759 {
1760 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1761 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1762 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1763
1764 pwd->h[0] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[0]);
1765 pwd->h[1] = msa_cle_s_df(DF_HALF, pws->h[1], pwt->h[1]);
1766 pwd->h[2] = msa_cle_s_df(DF_HALF, pws->h[2], pwt->h[2]);
1767 pwd->h[3] = msa_cle_s_df(DF_HALF, pws->h[3], pwt->h[3]);
1768 pwd->h[4] = msa_cle_s_df(DF_HALF, pws->h[4], pwt->h[4]);
1769 pwd->h[5] = msa_cle_s_df(DF_HALF, pws->h[5], pwt->h[5]);
1770 pwd->h[6] = msa_cle_s_df(DF_HALF, pws->h[6], pwt->h[6]);
1771 pwd->h[7] = msa_cle_s_df(DF_HALF, pws->h[7], pwt->h[7]);
1772 }
1773
1774 void helper_msa_cle_s_w(CPUMIPSState *env,
1775 uint32_t wd, uint32_t ws, uint32_t wt)
1776 {
1777 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1778 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1779 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1780
1781 pwd->w[0] = msa_cle_s_df(DF_WORD, pws->w[0], pwt->w[0]);
1782 pwd->w[1] = msa_cle_s_df(DF_WORD, pws->w[1], pwt->w[1]);
1783 pwd->w[2] = msa_cle_s_df(DF_WORD, pws->w[2], pwt->w[2]);
1784 pwd->w[3] = msa_cle_s_df(DF_WORD, pws->w[3], pwt->w[3]);
1785 }
1786
1787 void helper_msa_cle_s_d(CPUMIPSState *env,
1788 uint32_t wd, uint32_t ws, uint32_t wt)
1789 {
1790 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1791 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1792 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1793
1794 pwd->d[0] = msa_cle_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1795 pwd->d[1] = msa_cle_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1796 }
1797
1798 static inline int64_t msa_cle_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1799 {
1800 uint64_t u_arg1 = UNSIGNED(arg1, df);
1801 uint64_t u_arg2 = UNSIGNED(arg2, df);
1802 return u_arg1 <= u_arg2 ? -1 : 0;
1803 }
1804
1805 void helper_msa_cle_u_b(CPUMIPSState *env,
1806 uint32_t wd, uint32_t ws, uint32_t wt)
1807 {
1808 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1809 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1810 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1811
1812 pwd->b[0] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1813 pwd->b[1] = msa_cle_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1814 pwd->b[2] = msa_cle_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1815 pwd->b[3] = msa_cle_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1816 pwd->b[4] = msa_cle_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1817 pwd->b[5] = msa_cle_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1818 pwd->b[6] = msa_cle_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1819 pwd->b[7] = msa_cle_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1820 pwd->b[8] = msa_cle_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1821 pwd->b[9] = msa_cle_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1822 pwd->b[10] = msa_cle_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1823 pwd->b[11] = msa_cle_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1824 pwd->b[12] = msa_cle_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1825 pwd->b[13] = msa_cle_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1826 pwd->b[14] = msa_cle_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1827 pwd->b[15] = msa_cle_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1828 }
1829
1830 void helper_msa_cle_u_h(CPUMIPSState *env,
1831 uint32_t wd, uint32_t ws, uint32_t wt)
1832 {
1833 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1834 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1835 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1836
1837 pwd->h[0] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[0]);
1838 pwd->h[1] = msa_cle_u_df(DF_HALF, pws->h[1], pwt->h[1]);
1839 pwd->h[2] = msa_cle_u_df(DF_HALF, pws->h[2], pwt->h[2]);
1840 pwd->h[3] = msa_cle_u_df(DF_HALF, pws->h[3], pwt->h[3]);
1841 pwd->h[4] = msa_cle_u_df(DF_HALF, pws->h[4], pwt->h[4]);
1842 pwd->h[5] = msa_cle_u_df(DF_HALF, pws->h[5], pwt->h[5]);
1843 pwd->h[6] = msa_cle_u_df(DF_HALF, pws->h[6], pwt->h[6]);
1844 pwd->h[7] = msa_cle_u_df(DF_HALF, pws->h[7], pwt->h[7]);
1845 }
1846
1847 void helper_msa_cle_u_w(CPUMIPSState *env,
1848 uint32_t wd, uint32_t ws, uint32_t wt)
1849 {
1850 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1851 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1852 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1853
1854 pwd->w[0] = msa_cle_u_df(DF_WORD, pws->w[0], pwt->w[0]);
1855 pwd->w[1] = msa_cle_u_df(DF_WORD, pws->w[1], pwt->w[1]);
1856 pwd->w[2] = msa_cle_u_df(DF_WORD, pws->w[2], pwt->w[2]);
1857 pwd->w[3] = msa_cle_u_df(DF_WORD, pws->w[3], pwt->w[3]);
1858 }
1859
1860 void helper_msa_cle_u_d(CPUMIPSState *env,
1861 uint32_t wd, uint32_t ws, uint32_t wt)
1862 {
1863 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1864 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1865 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1866
1867 pwd->d[0] = msa_cle_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
1868 pwd->d[1] = msa_cle_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
1869 }
1870
1871 static inline int64_t msa_clt_s_df(uint32_t df, int64_t arg1, int64_t arg2)
1872 {
1873 return arg1 < arg2 ? -1 : 0;
1874 }
1875
1876 static inline int8_t msa_clt_s_b(int8_t arg1, int8_t arg2)
1877 {
1878 return arg1 < arg2 ? -1 : 0;
1879 }
1880
1881 void helper_msa_clt_s_b(CPUMIPSState *env,
1882 uint32_t wd, uint32_t ws, uint32_t wt)
1883 {
1884 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1885 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1886 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1887
1888 pwd->b[0] = msa_clt_s_b(pws->b[0], pwt->b[0]);
1889 pwd->b[1] = msa_clt_s_b(pws->b[1], pwt->b[1]);
1890 pwd->b[2] = msa_clt_s_b(pws->b[2], pwt->b[2]);
1891 pwd->b[3] = msa_clt_s_b(pws->b[3], pwt->b[3]);
1892 pwd->b[4] = msa_clt_s_b(pws->b[4], pwt->b[4]);
1893 pwd->b[5] = msa_clt_s_b(pws->b[5], pwt->b[5]);
1894 pwd->b[6] = msa_clt_s_b(pws->b[6], pwt->b[6]);
1895 pwd->b[7] = msa_clt_s_b(pws->b[7], pwt->b[7]);
1896 pwd->b[8] = msa_clt_s_b(pws->b[8], pwt->b[8]);
1897 pwd->b[9] = msa_clt_s_b(pws->b[9], pwt->b[9]);
1898 pwd->b[10] = msa_clt_s_b(pws->b[10], pwt->b[10]);
1899 pwd->b[11] = msa_clt_s_b(pws->b[11], pwt->b[11]);
1900 pwd->b[12] = msa_clt_s_b(pws->b[12], pwt->b[12]);
1901 pwd->b[13] = msa_clt_s_b(pws->b[13], pwt->b[13]);
1902 pwd->b[14] = msa_clt_s_b(pws->b[14], pwt->b[14]);
1903 pwd->b[15] = msa_clt_s_b(pws->b[15], pwt->b[15]);
1904 }
1905
1906 static inline int16_t msa_clt_s_h(int16_t arg1, int16_t arg2)
1907 {
1908 return arg1 < arg2 ? -1 : 0;
1909 }
1910
1911 void helper_msa_clt_s_h(CPUMIPSState *env,
1912 uint32_t wd, uint32_t ws, uint32_t wt)
1913 {
1914 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1915 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1916 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1917
1918 pwd->h[0] = msa_clt_s_h(pws->h[0], pwt->h[0]);
1919 pwd->h[1] = msa_clt_s_h(pws->h[1], pwt->h[1]);
1920 pwd->h[2] = msa_clt_s_h(pws->h[2], pwt->h[2]);
1921 pwd->h[3] = msa_clt_s_h(pws->h[3], pwt->h[3]);
1922 pwd->h[4] = msa_clt_s_h(pws->h[4], pwt->h[4]);
1923 pwd->h[5] = msa_clt_s_h(pws->h[5], pwt->h[5]);
1924 pwd->h[6] = msa_clt_s_h(pws->h[6], pwt->h[6]);
1925 pwd->h[7] = msa_clt_s_h(pws->h[7], pwt->h[7]);
1926 }
1927
1928 static inline int32_t msa_clt_s_w(int32_t arg1, int32_t arg2)
1929 {
1930 return arg1 < arg2 ? -1 : 0;
1931 }
1932
1933 void helper_msa_clt_s_w(CPUMIPSState *env,
1934 uint32_t wd, uint32_t ws, uint32_t wt)
1935 {
1936 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1937 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1938 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1939
1940 pwd->w[0] = msa_clt_s_w(pws->w[0], pwt->w[0]);
1941 pwd->w[1] = msa_clt_s_w(pws->w[1], pwt->w[1]);
1942 pwd->w[2] = msa_clt_s_w(pws->w[2], pwt->w[2]);
1943 pwd->w[3] = msa_clt_s_w(pws->w[3], pwt->w[3]);
1944 }
1945
1946 static inline int64_t msa_clt_s_d(int64_t arg1, int64_t arg2)
1947 {
1948 return arg1 < arg2 ? -1 : 0;
1949 }
1950
1951 void helper_msa_clt_s_d(CPUMIPSState *env,
1952 uint32_t wd, uint32_t ws, uint32_t wt)
1953 {
1954 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1955 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1956 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1957
1958 pwd->d[0] = msa_clt_s_d(pws->d[0], pwt->d[0]);
1959 pwd->d[1] = msa_clt_s_d(pws->d[1], pwt->d[1]);
1960 }
1961
1962 static inline int64_t msa_clt_u_df(uint32_t df, int64_t arg1, int64_t arg2)
1963 {
1964 uint64_t u_arg1 = UNSIGNED(arg1, df);
1965 uint64_t u_arg2 = UNSIGNED(arg2, df);
1966 return u_arg1 < u_arg2 ? -1 : 0;
1967 }
1968
1969 void helper_msa_clt_u_b(CPUMIPSState *env,
1970 uint32_t wd, uint32_t ws, uint32_t wt)
1971 {
1972 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1973 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1974 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
1975
1976 pwd->b[0] = msa_clt_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
1977 pwd->b[1] = msa_clt_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
1978 pwd->b[2] = msa_clt_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
1979 pwd->b[3] = msa_clt_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
1980 pwd->b[4] = msa_clt_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
1981 pwd->b[5] = msa_clt_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
1982 pwd->b[6] = msa_clt_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
1983 pwd->b[7] = msa_clt_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
1984 pwd->b[8] = msa_clt_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
1985 pwd->b[9] = msa_clt_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
1986 pwd->b[10] = msa_clt_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
1987 pwd->b[11] = msa_clt_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
1988 pwd->b[12] = msa_clt_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
1989 pwd->b[13] = msa_clt_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
1990 pwd->b[14] = msa_clt_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
1991 pwd->b[15] = msa_clt_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
1992 }
1993
1994 void helper_msa_clt_u_h(CPUMIPSState *env,
1995 uint32_t wd, uint32_t ws, uint32_t wt)
1996 {
1997 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
1998 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
1999 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2000
2001 pwd->h[0] = msa_clt_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2002 pwd->h[1] = msa_clt_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2003 pwd->h[2] = msa_clt_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2004 pwd->h[3] = msa_clt_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2005 pwd->h[4] = msa_clt_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2006 pwd->h[5] = msa_clt_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2007 pwd->h[6] = msa_clt_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2008 pwd->h[7] = msa_clt_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2009 }
2010
2011 void helper_msa_clt_u_w(CPUMIPSState *env,
2012 uint32_t wd, uint32_t ws, uint32_t wt)
2013 {
2014 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2015 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2016 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2017
2018 pwd->w[0] = msa_clt_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2019 pwd->w[1] = msa_clt_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2020 pwd->w[2] = msa_clt_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2021 pwd->w[3] = msa_clt_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2022 }
2023
2024 void helper_msa_clt_u_d(CPUMIPSState *env,
2025 uint32_t wd, uint32_t ws, uint32_t wt)
2026 {
2027 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2028 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2029 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2030
2031 pwd->d[0] = msa_clt_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2032 pwd->d[1] = msa_clt_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2033 }
2034
2035
2036 /*
2037 * Int Divide
2038 * ----------
2039 *
2040 * +---------------+----------------------------------------------------------+
2041 * | DIV_S.B | Vector Signed Divide (byte) |
2042 * | DIV_S.H | Vector Signed Divide (halfword) |
2043 * | DIV_S.W | Vector Signed Divide (word) |
2044 * | DIV_S.D | Vector Signed Divide (doubleword) |
2045 * | DIV_U.B | Vector Unsigned Divide (byte) |
2046 * | DIV_U.H | Vector Unsigned Divide (halfword) |
2047 * | DIV_U.W | Vector Unsigned Divide (word) |
2048 * | DIV_U.D | Vector Unsigned Divide (doubleword) |
2049 * +---------------+----------------------------------------------------------+
2050 */
2051
2052
2053 static inline int64_t msa_div_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2054 {
2055 if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
2056 return DF_MIN_INT(df);
2057 }
2058 return arg2 ? arg1 / arg2
2059 : arg1 >= 0 ? -1 : 1;
2060 }
2061
2062 void helper_msa_div_s_b(CPUMIPSState *env,
2063 uint32_t wd, uint32_t ws, uint32_t wt)
2064 {
2065 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2066 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2067 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2068
2069 pwd->b[0] = msa_div_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2070 pwd->b[1] = msa_div_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2071 pwd->b[2] = msa_div_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2072 pwd->b[3] = msa_div_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2073 pwd->b[4] = msa_div_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2074 pwd->b[5] = msa_div_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2075 pwd->b[6] = msa_div_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2076 pwd->b[7] = msa_div_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2077 pwd->b[8] = msa_div_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2078 pwd->b[9] = msa_div_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2079 pwd->b[10] = msa_div_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2080 pwd->b[11] = msa_div_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2081 pwd->b[12] = msa_div_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2082 pwd->b[13] = msa_div_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2083 pwd->b[14] = msa_div_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2084 pwd->b[15] = msa_div_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2085 }
2086
2087 void helper_msa_div_s_h(CPUMIPSState *env,
2088 uint32_t wd, uint32_t ws, uint32_t wt)
2089 {
2090 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2091 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2092 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2093
2094 pwd->h[0] = msa_div_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2095 pwd->h[1] = msa_div_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2096 pwd->h[2] = msa_div_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2097 pwd->h[3] = msa_div_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2098 pwd->h[4] = msa_div_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2099 pwd->h[5] = msa_div_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2100 pwd->h[6] = msa_div_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2101 pwd->h[7] = msa_div_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2102 }
2103
2104 void helper_msa_div_s_w(CPUMIPSState *env,
2105 uint32_t wd, uint32_t ws, uint32_t wt)
2106 {
2107 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2108 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2109 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2110
2111 pwd->w[0] = msa_div_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2112 pwd->w[1] = msa_div_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2113 pwd->w[2] = msa_div_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2114 pwd->w[3] = msa_div_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2115 }
2116
2117 void helper_msa_div_s_d(CPUMIPSState *env,
2118 uint32_t wd, uint32_t ws, uint32_t wt)
2119 {
2120 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2121 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2122 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2123
2124 pwd->d[0] = msa_div_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2125 pwd->d[1] = msa_div_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2126 }
2127
2128 static inline int64_t msa_div_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2129 {
2130 uint64_t u_arg1 = UNSIGNED(arg1, df);
2131 uint64_t u_arg2 = UNSIGNED(arg2, df);
2132 return arg2 ? u_arg1 / u_arg2 : -1;
2133 }
2134
2135 void helper_msa_div_u_b(CPUMIPSState *env,
2136 uint32_t wd, uint32_t ws, uint32_t wt)
2137 {
2138 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2139 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2140 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2141
2142 pwd->b[0] = msa_div_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2143 pwd->b[1] = msa_div_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2144 pwd->b[2] = msa_div_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2145 pwd->b[3] = msa_div_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2146 pwd->b[4] = msa_div_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2147 pwd->b[5] = msa_div_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2148 pwd->b[6] = msa_div_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2149 pwd->b[7] = msa_div_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2150 pwd->b[8] = msa_div_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2151 pwd->b[9] = msa_div_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2152 pwd->b[10] = msa_div_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2153 pwd->b[11] = msa_div_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2154 pwd->b[12] = msa_div_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2155 pwd->b[13] = msa_div_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2156 pwd->b[14] = msa_div_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2157 pwd->b[15] = msa_div_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2158 }
2159
2160 void helper_msa_div_u_h(CPUMIPSState *env,
2161 uint32_t wd, uint32_t ws, uint32_t wt)
2162 {
2163 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2164 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2165 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2166
2167 pwd->h[0] = msa_div_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2168 pwd->h[1] = msa_div_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2169 pwd->h[2] = msa_div_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2170 pwd->h[3] = msa_div_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2171 pwd->h[4] = msa_div_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2172 pwd->h[5] = msa_div_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2173 pwd->h[6] = msa_div_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2174 pwd->h[7] = msa_div_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2175 }
2176
2177 void helper_msa_div_u_w(CPUMIPSState *env,
2178 uint32_t wd, uint32_t ws, uint32_t wt)
2179 {
2180 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2181 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2182 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2183
2184 pwd->w[0] = msa_div_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2185 pwd->w[1] = msa_div_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2186 pwd->w[2] = msa_div_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2187 pwd->w[3] = msa_div_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2188 }
2189
2190 void helper_msa_div_u_d(CPUMIPSState *env,
2191 uint32_t wd, uint32_t ws, uint32_t wt)
2192 {
2193 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2194 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2195 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2196
2197 pwd->d[0] = msa_div_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2198 pwd->d[1] = msa_div_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2199 }
2200
2201
2202 /*
2203 * Int Dot Product
2204 * ---------------
2205 *
2206 * +---------------+----------------------------------------------------------+
2207 * | DOTP_S.H | Vector Signed Dot Product (halfword) |
2208 * | DOTP_S.W | Vector Signed Dot Product (word) |
2209 * | DOTP_S.D | Vector Signed Dot Product (doubleword) |
2210 * | DOTP_U.H | Vector Unsigned Dot Product (halfword) |
2211 * | DOTP_U.W | Vector Unsigned Dot Product (word) |
2212 * | DOTP_U.D | Vector Unsigned Dot Product (doubleword) |
2213 * | DPADD_S.H | Vector Signed Dot Product (halfword) |
2214 * | DPADD_S.W | Vector Signed Dot Product (word) |
2215 * | DPADD_S.D | Vector Signed Dot Product (doubleword) |
2216 * | DPADD_U.H | Vector Unsigned Dot Product (halfword) |
2217 * | DPADD_U.W | Vector Unsigned Dot Product (word) |
2218 * | DPADD_U.D | Vector Unsigned Dot Product (doubleword) |
2219 * | DPSUB_S.H | Vector Signed Dot Product (halfword) |
2220 * | DPSUB_S.W | Vector Signed Dot Product (word) |
2221 * | DPSUB_S.D | Vector Signed Dot Product (doubleword) |
2222 * | DPSUB_U.H | Vector Unsigned Dot Product (halfword) |
2223 * | DPSUB_U.W | Vector Unsigned Dot Product (word) |
2224 * | DPSUB_U.D | Vector Unsigned Dot Product (doubleword) |
2225 * +---------------+----------------------------------------------------------+
2226 */
2227
2228 #define SIGNED_EXTRACT(e, o, a, df) \
2229 do { \
2230 e = SIGNED_EVEN(a, df); \
2231 o = SIGNED_ODD(a, df); \
2232 } while (0)
2233
2234 #define UNSIGNED_EXTRACT(e, o, a, df) \
2235 do { \
2236 e = UNSIGNED_EVEN(a, df); \
2237 o = UNSIGNED_ODD(a, df); \
2238 } while (0)
2239
2240
2241 static inline int64_t msa_dotp_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2242 {
2243 int64_t even_arg1;
2244 int64_t even_arg2;
2245 int64_t odd_arg1;
2246 int64_t odd_arg2;
2247 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2248 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2249 return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2250 }
2251
2252 void helper_msa_dotp_s_h(CPUMIPSState *env,
2253 uint32_t wd, uint32_t ws, uint32_t wt)
2254 {
2255 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2256 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2257 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2258
2259 pwd->h[0] = msa_dotp_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2260 pwd->h[1] = msa_dotp_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2261 pwd->h[2] = msa_dotp_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2262 pwd->h[3] = msa_dotp_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2263 pwd->h[4] = msa_dotp_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2264 pwd->h[5] = msa_dotp_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2265 pwd->h[6] = msa_dotp_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2266 pwd->h[7] = msa_dotp_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2267 }
2268
2269 void helper_msa_dotp_s_w(CPUMIPSState *env,
2270 uint32_t wd, uint32_t ws, uint32_t wt)
2271 {
2272 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2273 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2274 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2275
2276 pwd->w[0] = msa_dotp_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2277 pwd->w[1] = msa_dotp_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2278 pwd->w[2] = msa_dotp_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2279 pwd->w[3] = msa_dotp_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2280 }
2281
2282 void helper_msa_dotp_s_d(CPUMIPSState *env,
2283 uint32_t wd, uint32_t ws, uint32_t wt)
2284 {
2285 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2286 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2287 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2288
2289 pwd->d[0] = msa_dotp_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2290 pwd->d[1] = msa_dotp_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2291 }
2292
2293
2294 static inline int64_t msa_dotp_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2295 {
2296 int64_t even_arg1;
2297 int64_t even_arg2;
2298 int64_t odd_arg1;
2299 int64_t odd_arg2;
2300 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2301 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2302 return (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2303 }
2304
2305 void helper_msa_dotp_u_h(CPUMIPSState *env,
2306 uint32_t wd, uint32_t ws, uint32_t wt)
2307 {
2308 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2309 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2310 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2311
2312 pwd->h[0] = msa_dotp_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2313 pwd->h[1] = msa_dotp_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2314 pwd->h[2] = msa_dotp_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2315 pwd->h[3] = msa_dotp_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2316 pwd->h[4] = msa_dotp_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2317 pwd->h[5] = msa_dotp_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2318 pwd->h[6] = msa_dotp_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2319 pwd->h[7] = msa_dotp_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2320 }
2321
2322 void helper_msa_dotp_u_w(CPUMIPSState *env,
2323 uint32_t wd, uint32_t ws, uint32_t wt)
2324 {
2325 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2326 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2327 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2328
2329 pwd->w[0] = msa_dotp_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2330 pwd->w[1] = msa_dotp_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2331 pwd->w[2] = msa_dotp_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2332 pwd->w[3] = msa_dotp_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2333 }
2334
2335 void helper_msa_dotp_u_d(CPUMIPSState *env,
2336 uint32_t wd, uint32_t ws, uint32_t wt)
2337 {
2338 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2339 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2340 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2341
2342 pwd->d[0] = msa_dotp_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2343 pwd->d[1] = msa_dotp_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2344 }
2345
2346
2347 static inline int64_t msa_dpadd_s_df(uint32_t df, int64_t dest, int64_t arg1,
2348 int64_t arg2)
2349 {
2350 int64_t even_arg1;
2351 int64_t even_arg2;
2352 int64_t odd_arg1;
2353 int64_t odd_arg2;
2354 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2355 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2356 return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2357 }
2358
2359 void helper_msa_dpadd_s_h(CPUMIPSState *env,
2360 uint32_t wd, uint32_t ws, uint32_t wt)
2361 {
2362 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2363 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2364 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2365
2366 pwd->h[0] = msa_dpadd_s_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2367 pwd->h[1] = msa_dpadd_s_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2368 pwd->h[2] = msa_dpadd_s_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2369 pwd->h[3] = msa_dpadd_s_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2370 pwd->h[4] = msa_dpadd_s_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2371 pwd->h[5] = msa_dpadd_s_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2372 pwd->h[6] = msa_dpadd_s_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2373 pwd->h[7] = msa_dpadd_s_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2374 }
2375
2376 void helper_msa_dpadd_s_w(CPUMIPSState *env,
2377 uint32_t wd, uint32_t ws, uint32_t wt)
2378 {
2379 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2380 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2381 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2382
2383 pwd->w[0] = msa_dpadd_s_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2384 pwd->w[1] = msa_dpadd_s_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2385 pwd->w[2] = msa_dpadd_s_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2386 pwd->w[3] = msa_dpadd_s_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2387 }
2388
2389 void helper_msa_dpadd_s_d(CPUMIPSState *env,
2390 uint32_t wd, uint32_t ws, uint32_t wt)
2391 {
2392 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2393 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2394 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2395
2396 pwd->d[0] = msa_dpadd_s_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2397 pwd->d[1] = msa_dpadd_s_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2398 }
2399
2400
2401 static inline int64_t msa_dpadd_u_df(uint32_t df, int64_t dest, int64_t arg1,
2402 int64_t arg2)
2403 {
2404 int64_t even_arg1;
2405 int64_t even_arg2;
2406 int64_t odd_arg1;
2407 int64_t odd_arg2;
2408 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2409 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2410 return dest + (even_arg1 * even_arg2) + (odd_arg1 * odd_arg2);
2411 }
2412
2413 void helper_msa_dpadd_u_h(CPUMIPSState *env,
2414 uint32_t wd, uint32_t ws, uint32_t wt)
2415 {
2416 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2417 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2418 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2419
2420 pwd->h[0] = msa_dpadd_u_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2421 pwd->h[1] = msa_dpadd_u_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2422 pwd->h[2] = msa_dpadd_u_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2423 pwd->h[3] = msa_dpadd_u_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2424 pwd->h[4] = msa_dpadd_u_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2425 pwd->h[5] = msa_dpadd_u_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2426 pwd->h[6] = msa_dpadd_u_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2427 pwd->h[7] = msa_dpadd_u_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2428 }
2429
2430 void helper_msa_dpadd_u_w(CPUMIPSState *env,
2431 uint32_t wd, uint32_t ws, uint32_t wt)
2432 {
2433 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2434 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2435 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2436
2437 pwd->w[0] = msa_dpadd_u_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2438 pwd->w[1] = msa_dpadd_u_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2439 pwd->w[2] = msa_dpadd_u_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2440 pwd->w[3] = msa_dpadd_u_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2441 }
2442
2443 void helper_msa_dpadd_u_d(CPUMIPSState *env,
2444 uint32_t wd, uint32_t ws, uint32_t wt)
2445 {
2446 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2447 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2448 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2449
2450 pwd->d[0] = msa_dpadd_u_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2451 pwd->d[1] = msa_dpadd_u_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2452 }
2453
2454
2455 static inline int64_t msa_dpsub_s_df(uint32_t df, int64_t dest, int64_t arg1,
2456 int64_t arg2)
2457 {
2458 int64_t even_arg1;
2459 int64_t even_arg2;
2460 int64_t odd_arg1;
2461 int64_t odd_arg2;
2462 SIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2463 SIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2464 return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
2465 }
2466
2467 void helper_msa_dpsub_s_h(CPUMIPSState *env,
2468 uint32_t wd, uint32_t ws, uint32_t wt)
2469 {
2470 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2471 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2472 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2473
2474 pwd->h[0] = msa_dpsub_s_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2475 pwd->h[1] = msa_dpsub_s_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2476 pwd->h[2] = msa_dpsub_s_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2477 pwd->h[3] = msa_dpsub_s_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2478 pwd->h[4] = msa_dpsub_s_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2479 pwd->h[5] = msa_dpsub_s_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2480 pwd->h[6] = msa_dpsub_s_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2481 pwd->h[7] = msa_dpsub_s_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2482 }
2483
2484 void helper_msa_dpsub_s_w(CPUMIPSState *env,
2485 uint32_t wd, uint32_t ws, uint32_t wt)
2486 {
2487 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2488 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2489 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2490
2491 pwd->w[0] = msa_dpsub_s_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2492 pwd->w[1] = msa_dpsub_s_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2493 pwd->w[2] = msa_dpsub_s_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2494 pwd->w[3] = msa_dpsub_s_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2495 }
2496
2497 void helper_msa_dpsub_s_d(CPUMIPSState *env,
2498 uint32_t wd, uint32_t ws, uint32_t wt)
2499 {
2500 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2501 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2502 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2503
2504 pwd->d[0] = msa_dpsub_s_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2505 pwd->d[1] = msa_dpsub_s_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2506 }
2507
2508
2509 static inline int64_t msa_dpsub_u_df(uint32_t df, int64_t dest, int64_t arg1,
2510 int64_t arg2)
2511 {
2512 int64_t even_arg1;
2513 int64_t even_arg2;
2514 int64_t odd_arg1;
2515 int64_t odd_arg2;
2516 UNSIGNED_EXTRACT(even_arg1, odd_arg1, arg1, df);
2517 UNSIGNED_EXTRACT(even_arg2, odd_arg2, arg2, df);
2518 return dest - ((even_arg1 * even_arg2) + (odd_arg1 * odd_arg2));
2519 }
2520
2521 void helper_msa_dpsub_u_h(CPUMIPSState *env,
2522 uint32_t wd, uint32_t ws, uint32_t wt)
2523 {
2524 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2525 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2526 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2527
2528 pwd->h[0] = msa_dpsub_u_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
2529 pwd->h[1] = msa_dpsub_u_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
2530 pwd->h[2] = msa_dpsub_u_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
2531 pwd->h[3] = msa_dpsub_u_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
2532 pwd->h[4] = msa_dpsub_u_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
2533 pwd->h[5] = msa_dpsub_u_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
2534 pwd->h[6] = msa_dpsub_u_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
2535 pwd->h[7] = msa_dpsub_u_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
2536 }
2537
2538 void helper_msa_dpsub_u_w(CPUMIPSState *env,
2539 uint32_t wd, uint32_t ws, uint32_t wt)
2540 {
2541 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2542 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2543 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2544
2545 pwd->w[0] = msa_dpsub_u_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
2546 pwd->w[1] = msa_dpsub_u_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
2547 pwd->w[2] = msa_dpsub_u_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
2548 pwd->w[3] = msa_dpsub_u_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
2549 }
2550
2551 void helper_msa_dpsub_u_d(CPUMIPSState *env,
2552 uint32_t wd, uint32_t ws, uint32_t wt)
2553 {
2554 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2555 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2556 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2557
2558 pwd->d[0] = msa_dpsub_u_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
2559 pwd->d[1] = msa_dpsub_u_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
2560 }
2561
2562
2563 /*
2564 * Int Max Min
2565 * -----------
2566 *
2567 * +---------------+----------------------------------------------------------+
2568 * | MAX_A.B | Vector Maximum Based on Absolute Value (byte) |
2569 * | MAX_A.H | Vector Maximum Based on Absolute Value (halfword) |
2570 * | MAX_A.W | Vector Maximum Based on Absolute Value (word) |
2571 * | MAX_A.D | Vector Maximum Based on Absolute Value (doubleword) |
2572 * | MAX_S.B | Vector Signed Maximum (byte) |
2573 * | MAX_S.H | Vector Signed Maximum (halfword) |
2574 * | MAX_S.W | Vector Signed Maximum (word) |
2575 * | MAX_S.D | Vector Signed Maximum (doubleword) |
2576 * | MAX_U.B | Vector Unsigned Maximum (byte) |
2577 * | MAX_U.H | Vector Unsigned Maximum (halfword) |
2578 * | MAX_U.W | Vector Unsigned Maximum (word) |
2579 * | MAX_U.D | Vector Unsigned Maximum (doubleword) |
2580 * | MIN_A.B | Vector Minimum Based on Absolute Value (byte) |
2581 * | MIN_A.H | Vector Minimum Based on Absolute Value (halfword) |
2582 * | MIN_A.W | Vector Minimum Based on Absolute Value (word) |
2583 * | MIN_A.D | Vector Minimum Based on Absolute Value (doubleword) |
2584 * | MIN_S.B | Vector Signed Minimum (byte) |
2585 * | MIN_S.H | Vector Signed Minimum (halfword) |
2586 * | MIN_S.W | Vector Signed Minimum (word) |
2587 * | MIN_S.D | Vector Signed Minimum (doubleword) |
2588 * | MIN_U.B | Vector Unsigned Minimum (byte) |
2589 * | MIN_U.H | Vector Unsigned Minimum (halfword) |
2590 * | MIN_U.W | Vector Unsigned Minimum (word) |
2591 * | MIN_U.D | Vector Unsigned Minimum (doubleword) |
2592 * +---------------+----------------------------------------------------------+
2593 */
2594
2595 static inline int64_t msa_max_a_df(uint32_t df, int64_t arg1, int64_t arg2)
2596 {
2597 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
2598 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
2599 return abs_arg1 > abs_arg2 ? arg1 : arg2;
2600 }
2601
2602 void helper_msa_max_a_b(CPUMIPSState *env,
2603 uint32_t wd, uint32_t ws, uint32_t wt)
2604 {
2605 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2606 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2607 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2608
2609 pwd->b[0] = msa_max_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
2610 pwd->b[1] = msa_max_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
2611 pwd->b[2] = msa_max_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
2612 pwd->b[3] = msa_max_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
2613 pwd->b[4] = msa_max_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
2614 pwd->b[5] = msa_max_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
2615 pwd->b[6] = msa_max_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
2616 pwd->b[7] = msa_max_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
2617 pwd->b[8] = msa_max_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
2618 pwd->b[9] = msa_max_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
2619 pwd->b[10] = msa_max_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
2620 pwd->b[11] = msa_max_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
2621 pwd->b[12] = msa_max_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
2622 pwd->b[13] = msa_max_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
2623 pwd->b[14] = msa_max_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
2624 pwd->b[15] = msa_max_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
2625 }
2626
2627 void helper_msa_max_a_h(CPUMIPSState *env,
2628 uint32_t wd, uint32_t ws, uint32_t wt)
2629 {
2630 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2631 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2632 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2633
2634 pwd->h[0] = msa_max_a_df(DF_HALF, pws->h[0], pwt->h[0]);
2635 pwd->h[1] = msa_max_a_df(DF_HALF, pws->h[1], pwt->h[1]);
2636 pwd->h[2] = msa_max_a_df(DF_HALF, pws->h[2], pwt->h[2]);
2637 pwd->h[3] = msa_max_a_df(DF_HALF, pws->h[3], pwt->h[3]);
2638 pwd->h[4] = msa_max_a_df(DF_HALF, pws->h[4], pwt->h[4]);
2639 pwd->h[5] = msa_max_a_df(DF_HALF, pws->h[5], pwt->h[5]);
2640 pwd->h[6] = msa_max_a_df(DF_HALF, pws->h[6], pwt->h[6]);
2641 pwd->h[7] = msa_max_a_df(DF_HALF, pws->h[7], pwt->h[7]);
2642 }
2643
2644 void helper_msa_max_a_w(CPUMIPSState *env,
2645 uint32_t wd, uint32_t ws, uint32_t wt)
2646 {
2647 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2648 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2649 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2650
2651 pwd->w[0] = msa_max_a_df(DF_WORD, pws->w[0], pwt->w[0]);
2652 pwd->w[1] = msa_max_a_df(DF_WORD, pws->w[1], pwt->w[1]);
2653 pwd->w[2] = msa_max_a_df(DF_WORD, pws->w[2], pwt->w[2]);
2654 pwd->w[3] = msa_max_a_df(DF_WORD, pws->w[3], pwt->w[3]);
2655 }
2656
2657 void helper_msa_max_a_d(CPUMIPSState *env,
2658 uint32_t wd, uint32_t ws, uint32_t wt)
2659 {
2660 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2661 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2662 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2663
2664 pwd->d[0] = msa_max_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2665 pwd->d[1] = msa_max_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2666 }
2667
2668
2669 static inline int64_t msa_max_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2670 {
2671 return arg1 > arg2 ? arg1 : arg2;
2672 }
2673
2674 void helper_msa_max_s_b(CPUMIPSState *env,
2675 uint32_t wd, uint32_t ws, uint32_t wt)
2676 {
2677 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2678 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2679 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2680
2681 pwd->b[0] = msa_max_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2682 pwd->b[1] = msa_max_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2683 pwd->b[2] = msa_max_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2684 pwd->b[3] = msa_max_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2685 pwd->b[4] = msa_max_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2686 pwd->b[5] = msa_max_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2687 pwd->b[6] = msa_max_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2688 pwd->b[7] = msa_max_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2689 pwd->b[8] = msa_max_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2690 pwd->b[9] = msa_max_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2691 pwd->b[10] = msa_max_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2692 pwd->b[11] = msa_max_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2693 pwd->b[12] = msa_max_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2694 pwd->b[13] = msa_max_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2695 pwd->b[14] = msa_max_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2696 pwd->b[15] = msa_max_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2697 }
2698
2699 void helper_msa_max_s_h(CPUMIPSState *env,
2700 uint32_t wd, uint32_t ws, uint32_t wt)
2701 {
2702 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2703 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2704 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2705
2706 pwd->h[0] = msa_max_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2707 pwd->h[1] = msa_max_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2708 pwd->h[2] = msa_max_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2709 pwd->h[3] = msa_max_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2710 pwd->h[4] = msa_max_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2711 pwd->h[5] = msa_max_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2712 pwd->h[6] = msa_max_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2713 pwd->h[7] = msa_max_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2714 }
2715
2716 void helper_msa_max_s_w(CPUMIPSState *env,
2717 uint32_t wd, uint32_t ws, uint32_t wt)
2718 {
2719 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2720 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2721 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2722
2723 pwd->w[0] = msa_max_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2724 pwd->w[1] = msa_max_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2725 pwd->w[2] = msa_max_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2726 pwd->w[3] = msa_max_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2727 }
2728
2729 void helper_msa_max_s_d(CPUMIPSState *env,
2730 uint32_t wd, uint32_t ws, uint32_t wt)
2731 {
2732 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2733 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2734 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2735
2736 pwd->d[0] = msa_max_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2737 pwd->d[1] = msa_max_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2738 }
2739
2740
2741 static inline int64_t msa_max_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2742 {
2743 uint64_t u_arg1 = UNSIGNED(arg1, df);
2744 uint64_t u_arg2 = UNSIGNED(arg2, df);
2745 return u_arg1 > u_arg2 ? arg1 : arg2;
2746 }
2747
2748 void helper_msa_max_u_b(CPUMIPSState *env,
2749 uint32_t wd, uint32_t ws, uint32_t wt)
2750 {
2751 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2752 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2753 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2754
2755 pwd->b[0] = msa_max_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2756 pwd->b[1] = msa_max_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2757 pwd->b[2] = msa_max_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2758 pwd->b[3] = msa_max_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2759 pwd->b[4] = msa_max_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2760 pwd->b[5] = msa_max_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2761 pwd->b[6] = msa_max_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2762 pwd->b[7] = msa_max_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2763 pwd->b[8] = msa_max_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2764 pwd->b[9] = msa_max_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2765 pwd->b[10] = msa_max_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2766 pwd->b[11] = msa_max_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2767 pwd->b[12] = msa_max_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2768 pwd->b[13] = msa_max_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2769 pwd->b[14] = msa_max_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2770 pwd->b[15] = msa_max_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2771 }
2772
2773 void helper_msa_max_u_h(CPUMIPSState *env,
2774 uint32_t wd, uint32_t ws, uint32_t wt)
2775 {
2776 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2777 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2778 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2779
2780 pwd->h[0] = msa_max_u_df(DF_HALF, pws->h[0], pwt->h[0]);
2781 pwd->h[1] = msa_max_u_df(DF_HALF, pws->h[1], pwt->h[1]);
2782 pwd->h[2] = msa_max_u_df(DF_HALF, pws->h[2], pwt->h[2]);
2783 pwd->h[3] = msa_max_u_df(DF_HALF, pws->h[3], pwt->h[3]);
2784 pwd->h[4] = msa_max_u_df(DF_HALF, pws->h[4], pwt->h[4]);
2785 pwd->h[5] = msa_max_u_df(DF_HALF, pws->h[5], pwt->h[5]);
2786 pwd->h[6] = msa_max_u_df(DF_HALF, pws->h[6], pwt->h[6]);
2787 pwd->h[7] = msa_max_u_df(DF_HALF, pws->h[7], pwt->h[7]);
2788 }
2789
2790 void helper_msa_max_u_w(CPUMIPSState *env,
2791 uint32_t wd, uint32_t ws, uint32_t wt)
2792 {
2793 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2794 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2795 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2796
2797 pwd->w[0] = msa_max_u_df(DF_WORD, pws->w[0], pwt->w[0]);
2798 pwd->w[1] = msa_max_u_df(DF_WORD, pws->w[1], pwt->w[1]);
2799 pwd->w[2] = msa_max_u_df(DF_WORD, pws->w[2], pwt->w[2]);
2800 pwd->w[3] = msa_max_u_df(DF_WORD, pws->w[3], pwt->w[3]);
2801 }
2802
2803 void helper_msa_max_u_d(CPUMIPSState *env,
2804 uint32_t wd, uint32_t ws, uint32_t wt)
2805 {
2806 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2807 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2808 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2809
2810 pwd->d[0] = msa_max_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2811 pwd->d[1] = msa_max_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2812 }
2813
2814
2815 static inline int64_t msa_min_a_df(uint32_t df, int64_t arg1, int64_t arg2)
2816 {
2817 uint64_t abs_arg1 = arg1 >= 0 ? arg1 : -arg1;
2818 uint64_t abs_arg2 = arg2 >= 0 ? arg2 : -arg2;
2819 return abs_arg1 < abs_arg2 ? arg1 : arg2;
2820 }
2821
2822 void helper_msa_min_a_b(CPUMIPSState *env,
2823 uint32_t wd, uint32_t ws, uint32_t wt)
2824 {
2825 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2826 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2827 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2828
2829 pwd->b[0] = msa_min_a_df(DF_BYTE, pws->b[0], pwt->b[0]);
2830 pwd->b[1] = msa_min_a_df(DF_BYTE, pws->b[1], pwt->b[1]);
2831 pwd->b[2] = msa_min_a_df(DF_BYTE, pws->b[2], pwt->b[2]);
2832 pwd->b[3] = msa_min_a_df(DF_BYTE, pws->b[3], pwt->b[3]);
2833 pwd->b[4] = msa_min_a_df(DF_BYTE, pws->b[4], pwt->b[4]);
2834 pwd->b[5] = msa_min_a_df(DF_BYTE, pws->b[5], pwt->b[5]);
2835 pwd->b[6] = msa_min_a_df(DF_BYTE, pws->b[6], pwt->b[6]);
2836 pwd->b[7] = msa_min_a_df(DF_BYTE, pws->b[7], pwt->b[7]);
2837 pwd->b[8] = msa_min_a_df(DF_BYTE, pws->b[8], pwt->b[8]);
2838 pwd->b[9] = msa_min_a_df(DF_BYTE, pws->b[9], pwt->b[9]);
2839 pwd->b[10] = msa_min_a_df(DF_BYTE, pws->b[10], pwt->b[10]);
2840 pwd->b[11] = msa_min_a_df(DF_BYTE, pws->b[11], pwt->b[11]);
2841 pwd->b[12] = msa_min_a_df(DF_BYTE, pws->b[12], pwt->b[12]);
2842 pwd->b[13] = msa_min_a_df(DF_BYTE, pws->b[13], pwt->b[13]);
2843 pwd->b[14] = msa_min_a_df(DF_BYTE, pws->b[14], pwt->b[14]);
2844 pwd->b[15] = msa_min_a_df(DF_BYTE, pws->b[15], pwt->b[15]);
2845 }
2846
2847 void helper_msa_min_a_h(CPUMIPSState *env,
2848 uint32_t wd, uint32_t ws, uint32_t wt)
2849 {
2850 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2851 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2852 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2853
2854 pwd->h[0] = msa_min_a_df(DF_HALF, pws->h[0], pwt->h[0]);
2855 pwd->h[1] = msa_min_a_df(DF_HALF, pws->h[1], pwt->h[1]);
2856 pwd->h[2] = msa_min_a_df(DF_HALF, pws->h[2], pwt->h[2]);
2857 pwd->h[3] = msa_min_a_df(DF_HALF, pws->h[3], pwt->h[3]);
2858 pwd->h[4] = msa_min_a_df(DF_HALF, pws->h[4], pwt->h[4]);
2859 pwd->h[5] = msa_min_a_df(DF_HALF, pws->h[5], pwt->h[5]);
2860 pwd->h[6] = msa_min_a_df(DF_HALF, pws->h[6], pwt->h[6]);
2861 pwd->h[7] = msa_min_a_df(DF_HALF, pws->h[7], pwt->h[7]);
2862 }
2863
2864 void helper_msa_min_a_w(CPUMIPSState *env,
2865 uint32_t wd, uint32_t ws, uint32_t wt)
2866 {
2867 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2868 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2869 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2870
2871 pwd->w[0] = msa_min_a_df(DF_WORD, pws->w[0], pwt->w[0]);
2872 pwd->w[1] = msa_min_a_df(DF_WORD, pws->w[1], pwt->w[1]);
2873 pwd->w[2] = msa_min_a_df(DF_WORD, pws->w[2], pwt->w[2]);
2874 pwd->w[3] = msa_min_a_df(DF_WORD, pws->w[3], pwt->w[3]);
2875 }
2876
2877 void helper_msa_min_a_d(CPUMIPSState *env,
2878 uint32_t wd, uint32_t ws, uint32_t wt)
2879 {
2880 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2881 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2882 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2883
2884 pwd->d[0] = msa_min_a_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2885 pwd->d[1] = msa_min_a_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2886 }
2887
2888
2889 static inline int64_t msa_min_s_df(uint32_t df, int64_t arg1, int64_t arg2)
2890 {
2891 return arg1 < arg2 ? arg1 : arg2;
2892 }
2893
2894 void helper_msa_min_s_b(CPUMIPSState *env,
2895 uint32_t wd, uint32_t ws, uint32_t wt)
2896 {
2897 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2898 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2899 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2900
2901 pwd->b[0] = msa_min_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
2902 pwd->b[1] = msa_min_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
2903 pwd->b[2] = msa_min_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
2904 pwd->b[3] = msa_min_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
2905 pwd->b[4] = msa_min_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
2906 pwd->b[5] = msa_min_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
2907 pwd->b[6] = msa_min_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
2908 pwd->b[7] = msa_min_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
2909 pwd->b[8] = msa_min_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
2910 pwd->b[9] = msa_min_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
2911 pwd->b[10] = msa_min_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
2912 pwd->b[11] = msa_min_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
2913 pwd->b[12] = msa_min_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
2914 pwd->b[13] = msa_min_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
2915 pwd->b[14] = msa_min_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
2916 pwd->b[15] = msa_min_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
2917 }
2918
2919 void helper_msa_min_s_h(CPUMIPSState *env,
2920 uint32_t wd, uint32_t ws, uint32_t wt)
2921 {
2922 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2923 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2924 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2925
2926 pwd->h[0] = msa_min_s_df(DF_HALF, pws->h[0], pwt->h[0]);
2927 pwd->h[1] = msa_min_s_df(DF_HALF, pws->h[1], pwt->h[1]);
2928 pwd->h[2] = msa_min_s_df(DF_HALF, pws->h[2], pwt->h[2]);
2929 pwd->h[3] = msa_min_s_df(DF_HALF, pws->h[3], pwt->h[3]);
2930 pwd->h[4] = msa_min_s_df(DF_HALF, pws->h[4], pwt->h[4]);
2931 pwd->h[5] = msa_min_s_df(DF_HALF, pws->h[5], pwt->h[5]);
2932 pwd->h[6] = msa_min_s_df(DF_HALF, pws->h[6], pwt->h[6]);
2933 pwd->h[7] = msa_min_s_df(DF_HALF, pws->h[7], pwt->h[7]);
2934 }
2935
2936 void helper_msa_min_s_w(CPUMIPSState *env,
2937 uint32_t wd, uint32_t ws, uint32_t wt)
2938 {
2939 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2940 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2941 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2942
2943 pwd->w[0] = msa_min_s_df(DF_WORD, pws->w[0], pwt->w[0]);
2944 pwd->w[1] = msa_min_s_df(DF_WORD, pws->w[1], pwt->w[1]);
2945 pwd->w[2] = msa_min_s_df(DF_WORD, pws->w[2], pwt->w[2]);
2946 pwd->w[3] = msa_min_s_df(DF_WORD, pws->w[3], pwt->w[3]);
2947 }
2948
2949 void helper_msa_min_s_d(CPUMIPSState *env,
2950 uint32_t wd, uint32_t ws, uint32_t wt)
2951 {
2952 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2953 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2954 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2955
2956 pwd->d[0] = msa_min_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
2957 pwd->d[1] = msa_min_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
2958 }
2959
2960
2961 static inline int64_t msa_min_u_df(uint32_t df, int64_t arg1, int64_t arg2)
2962 {
2963 uint64_t u_arg1 = UNSIGNED(arg1, df);
2964 uint64_t u_arg2 = UNSIGNED(arg2, df);
2965 return u_arg1 < u_arg2 ? arg1 : arg2;
2966 }
2967
2968 void helper_msa_min_u_b(CPUMIPSState *env,
2969 uint32_t wd, uint32_t ws, uint32_t wt)
2970 {
2971 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2972 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2973 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2974
2975 pwd->b[0] = msa_min_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
2976 pwd->b[1] = msa_min_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
2977 pwd->b[2] = msa_min_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
2978 pwd->b[3] = msa_min_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
2979 pwd->b[4] = msa_min_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
2980 pwd->b[5] = msa_min_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
2981 pwd->b[6] = msa_min_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
2982 pwd->b[7] = msa_min_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
2983 pwd->b[8] = msa_min_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
2984 pwd->b[9] = msa_min_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
2985 pwd->b[10] = msa_min_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
2986 pwd->b[11] = msa_min_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
2987 pwd->b[12] = msa_min_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
2988 pwd->b[13] = msa_min_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
2989 pwd->b[14] = msa_min_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
2990 pwd->b[15] = msa_min_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
2991 }
2992
2993 void helper_msa_min_u_h(CPUMIPSState *env,
2994 uint32_t wd, uint32_t ws, uint32_t wt)
2995 {
2996 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
2997 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
2998 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
2999
3000 pwd->h[0] = msa_min_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3001 pwd->h[1] = msa_min_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3002 pwd->h[2] = msa_min_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3003 pwd->h[3] = msa_min_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3004 pwd->h[4] = msa_min_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3005 pwd->h[5] = msa_min_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3006 pwd->h[6] = msa_min_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3007 pwd->h[7] = msa_min_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3008 }
3009
3010 void helper_msa_min_u_w(CPUMIPSState *env,
3011 uint32_t wd, uint32_t ws, uint32_t wt)
3012 {
3013 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3014 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3015 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3016
3017 pwd->w[0] = msa_min_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3018 pwd->w[1] = msa_min_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3019 pwd->w[2] = msa_min_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3020 pwd->w[3] = msa_min_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3021 }
3022
3023 void helper_msa_min_u_d(CPUMIPSState *env,
3024 uint32_t wd, uint32_t ws, uint32_t wt)
3025 {
3026 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3027 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3028 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3029
3030 pwd->d[0] = msa_min_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3031 pwd->d[1] = msa_min_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3032 }
3033
3034
3035 /*
3036 * Int Modulo
3037 * ----------
3038 *
3039 * +---------------+----------------------------------------------------------+
3040 * | MOD_S.B | Vector Signed Modulo (byte) |
3041 * | MOD_S.H | Vector Signed Modulo (halfword) |
3042 * | MOD_S.W | Vector Signed Modulo (word) |
3043 * | MOD_S.D | Vector Signed Modulo (doubleword) |
3044 * | MOD_U.B | Vector Unsigned Modulo (byte) |
3045 * | MOD_U.H | Vector Unsigned Modulo (halfword) |
3046 * | MOD_U.W | Vector Unsigned Modulo (word) |
3047 * | MOD_U.D | Vector Unsigned Modulo (doubleword) |
3048 * +---------------+----------------------------------------------------------+
3049 */
3050
3051 static inline int64_t msa_mod_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3052 {
3053 if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
3054 return 0;
3055 }
3056 return arg2 ? arg1 % arg2 : arg1;
3057 }
3058
3059 void helper_msa_mod_s_b(CPUMIPSState *env,
3060 uint32_t wd, uint32_t ws, uint32_t wt)
3061 {
3062 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3063 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3064 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3065
3066 pwd->b[0] = msa_mod_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3067 pwd->b[1] = msa_mod_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3068 pwd->b[2] = msa_mod_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3069 pwd->b[3] = msa_mod_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3070 pwd->b[4] = msa_mod_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3071 pwd->b[5] = msa_mod_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3072 pwd->b[6] = msa_mod_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3073 pwd->b[7] = msa_mod_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3074 pwd->b[8] = msa_mod_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3075 pwd->b[9] = msa_mod_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3076 pwd->b[10] = msa_mod_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3077 pwd->b[11] = msa_mod_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3078 pwd->b[12] = msa_mod_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3079 pwd->b[13] = msa_mod_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3080 pwd->b[14] = msa_mod_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3081 pwd->b[15] = msa_mod_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3082 }
3083
3084 void helper_msa_mod_s_h(CPUMIPSState *env,
3085 uint32_t wd, uint32_t ws, uint32_t wt)
3086 {
3087 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3088 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3089 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3090
3091 pwd->h[0] = msa_mod_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3092 pwd->h[1] = msa_mod_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3093 pwd->h[2] = msa_mod_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3094 pwd->h[3] = msa_mod_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3095 pwd->h[4] = msa_mod_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3096 pwd->h[5] = msa_mod_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3097 pwd->h[6] = msa_mod_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3098 pwd->h[7] = msa_mod_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3099 }
3100
3101 void helper_msa_mod_s_w(CPUMIPSState *env,
3102 uint32_t wd, uint32_t ws, uint32_t wt)
3103 {
3104 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3105 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3106 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3107
3108 pwd->w[0] = msa_mod_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3109 pwd->w[1] = msa_mod_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3110 pwd->w[2] = msa_mod_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3111 pwd->w[3] = msa_mod_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3112 }
3113
3114 void helper_msa_mod_s_d(CPUMIPSState *env,
3115 uint32_t wd, uint32_t ws, uint32_t wt)
3116 {
3117 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3118 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3119 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3120
3121 pwd->d[0] = msa_mod_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3122 pwd->d[1] = msa_mod_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3123 }
3124
3125 static inline int64_t msa_mod_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3126 {
3127 uint64_t u_arg1 = UNSIGNED(arg1, df);
3128 uint64_t u_arg2 = UNSIGNED(arg2, df);
3129 return u_arg2 ? u_arg1 % u_arg2 : u_arg1;
3130 }
3131
3132 void helper_msa_mod_u_b(CPUMIPSState *env,
3133 uint32_t wd, uint32_t ws, uint32_t wt)
3134 {
3135 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3136 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3137 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3138
3139 pwd->b[0] = msa_mod_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3140 pwd->b[1] = msa_mod_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3141 pwd->b[2] = msa_mod_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3142 pwd->b[3] = msa_mod_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3143 pwd->b[4] = msa_mod_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3144 pwd->b[5] = msa_mod_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3145 pwd->b[6] = msa_mod_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3146 pwd->b[7] = msa_mod_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3147 pwd->b[8] = msa_mod_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3148 pwd->b[9] = msa_mod_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3149 pwd->b[10] = msa_mod_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3150 pwd->b[11] = msa_mod_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3151 pwd->b[12] = msa_mod_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3152 pwd->b[13] = msa_mod_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3153 pwd->b[14] = msa_mod_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3154 pwd->b[15] = msa_mod_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3155 }
3156
3157 void helper_msa_mod_u_h(CPUMIPSState *env,
3158 uint32_t wd, uint32_t ws, uint32_t wt)
3159 {
3160 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3161 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3162 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3163
3164 pwd->h[0] = msa_mod_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3165 pwd->h[1] = msa_mod_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3166 pwd->h[2] = msa_mod_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3167 pwd->h[3] = msa_mod_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3168 pwd->h[4] = msa_mod_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3169 pwd->h[5] = msa_mod_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3170 pwd->h[6] = msa_mod_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3171 pwd->h[7] = msa_mod_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3172 }
3173
3174 void helper_msa_mod_u_w(CPUMIPSState *env,
3175 uint32_t wd, uint32_t ws, uint32_t wt)
3176 {
3177 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3178 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3179 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3180
3181 pwd->w[0] = msa_mod_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3182 pwd->w[1] = msa_mod_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3183 pwd->w[2] = msa_mod_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3184 pwd->w[3] = msa_mod_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3185 }
3186
3187 void helper_msa_mod_u_d(CPUMIPSState *env,
3188 uint32_t wd, uint32_t ws, uint32_t wt)
3189 {
3190 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3191 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3192 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3193
3194 pwd->d[0] = msa_mod_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3195 pwd->d[1] = msa_mod_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3196 }
3197
3198
3199 /*
3200 * Int Multiply
3201 * ------------
3202 *
3203 * +---------------+----------------------------------------------------------+
3204 * | MADDV.B | Vector Multiply and Add (byte) |
3205 * | MADDV.H | Vector Multiply and Add (halfword) |
3206 * | MADDV.W | Vector Multiply and Add (word) |
3207 * | MADDV.D | Vector Multiply and Add (doubleword) |
3208 * | MSUBV.B | Vector Multiply and Subtract (byte) |
3209 * | MSUBV.H | Vector Multiply and Subtract (halfword) |
3210 * | MSUBV.W | Vector Multiply and Subtract (word) |
3211 * | MSUBV.D | Vector Multiply and Subtract (doubleword) |
3212 * | MULV.B | Vector Multiply (byte) |
3213 * | MULV.H | Vector Multiply (halfword) |
3214 * | MULV.W | Vector Multiply (word) |
3215 * | MULV.D | Vector Multiply (doubleword) |
3216 * +---------------+----------------------------------------------------------+
3217 */
3218
3219 static inline int64_t msa_maddv_df(uint32_t df, int64_t dest, int64_t arg1,
3220 int64_t arg2)
3221 {
3222 return dest + arg1 * arg2;
3223 }
3224
3225 void helper_msa_maddv_b(CPUMIPSState *env,
3226 uint32_t wd, uint32_t ws, uint32_t wt)
3227 {
3228 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3229 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3230 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3231
3232 pwd->b[0] = msa_maddv_df(DF_BYTE, pwt->b[0], pws->b[0], pwt->b[0]);
3233 pwd->b[1] = msa_maddv_df(DF_BYTE, pwt->b[1], pws->b[1], pwt->b[1]);
3234 pwd->b[2] = msa_maddv_df(DF_BYTE, pwt->b[2], pws->b[2], pwt->b[2]);
3235 pwd->b[3] = msa_maddv_df(DF_BYTE, pwt->b[3], pws->b[3], pwt->b[3]);
3236 pwd->b[4] = msa_maddv_df(DF_BYTE, pwt->b[4], pws->b[4], pwt->b[4]);
3237 pwd->b[5] = msa_maddv_df(DF_BYTE, pwt->b[5], pws->b[5], pwt->b[5]);
3238 pwd->b[6] = msa_maddv_df(DF_BYTE, pwt->b[6], pws->b[6], pwt->b[6]);
3239 pwd->b[7] = msa_maddv_df(DF_BYTE, pwt->b[7], pws->b[7], pwt->b[7]);
3240 pwd->b[8] = msa_maddv_df(DF_BYTE, pwt->b[8], pws->b[8], pwt->b[8]);
3241 pwd->b[9] = msa_maddv_df(DF_BYTE, pwt->b[9], pws->b[9], pwt->b[9]);
3242 pwd->b[10] = msa_maddv_df(DF_BYTE, pwt->b[10], pws->b[10], pwt->b[10]);
3243 pwd->b[11] = msa_maddv_df(DF_BYTE, pwt->b[11], pws->b[11], pwt->b[11]);
3244 pwd->b[12] = msa_maddv_df(DF_BYTE, pwt->b[12], pws->b[12], pwt->b[12]);
3245 pwd->b[13] = msa_maddv_df(DF_BYTE, pwt->b[13], pws->b[13], pwt->b[13]);
3246 pwd->b[14] = msa_maddv_df(DF_BYTE, pwt->b[14], pws->b[14], pwt->b[14]);
3247 pwd->b[15] = msa_maddv_df(DF_BYTE, pwt->b[15], pws->b[15], pwt->b[15]);
3248 }
3249
3250 void helper_msa_maddv_h(CPUMIPSState *env,
3251 uint32_t wd, uint32_t ws, uint32_t wt)
3252 {
3253 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3254 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3255 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3256
3257 pwd->h[0] = msa_maddv_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
3258 pwd->h[1] = msa_maddv_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
3259 pwd->h[2] = msa_maddv_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
3260 pwd->h[3] = msa_maddv_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
3261 pwd->h[4] = msa_maddv_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
3262 pwd->h[5] = msa_maddv_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
3263 pwd->h[6] = msa_maddv_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
3264 pwd->h[7] = msa_maddv_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
3265 }
3266
3267 void helper_msa_maddv_w(CPUMIPSState *env,
3268 uint32_t wd, uint32_t ws, uint32_t wt)
3269 {
3270 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3271 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3272 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3273
3274 pwd->w[0] = msa_maddv_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
3275 pwd->w[1] = msa_maddv_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
3276 pwd->w[2] = msa_maddv_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
3277 pwd->w[3] = msa_maddv_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
3278 }
3279
3280 void helper_msa_maddv_d(CPUMIPSState *env,
3281 uint32_t wd, uint32_t ws, uint32_t wt)
3282 {
3283 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3284 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3285 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3286
3287 pwd->d[0] = msa_maddv_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
3288 pwd->d[1] = msa_maddv_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
3289 }
3290
3291 static inline int64_t msa_msubv_df(uint32_t df, int64_t dest, int64_t arg1,
3292 int64_t arg2)
3293 {
3294 return dest - arg1 * arg2;
3295 }
3296
3297 void helper_msa_msubv_b(CPUMIPSState *env,
3298 uint32_t wd, uint32_t ws, uint32_t wt)
3299 {
3300 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3301 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3302 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3303
3304 pwd->b[0] = msa_msubv_df(DF_BYTE, pwt->b[0], pws->b[0], pwt->b[0]);
3305 pwd->b[1] = msa_msubv_df(DF_BYTE, pwt->b[1], pws->b[1], pwt->b[1]);
3306 pwd->b[2] = msa_msubv_df(DF_BYTE, pwt->b[2], pws->b[2], pwt->b[2]);
3307 pwd->b[3] = msa_msubv_df(DF_BYTE, pwt->b[3], pws->b[3], pwt->b[3]);
3308 pwd->b[4] = msa_msubv_df(DF_BYTE, pwt->b[4], pws->b[4], pwt->b[4]);
3309 pwd->b[5] = msa_msubv_df(DF_BYTE, pwt->b[5], pws->b[5], pwt->b[5]);
3310 pwd->b[6] = msa_msubv_df(DF_BYTE, pwt->b[6], pws->b[6], pwt->b[6]);
3311 pwd->b[7] = msa_msubv_df(DF_BYTE, pwt->b[7], pws->b[7], pwt->b[7]);
3312 pwd->b[8] = msa_msubv_df(DF_BYTE, pwt->b[8], pws->b[8], pwt->b[8]);
3313 pwd->b[9] = msa_msubv_df(DF_BYTE, pwt->b[9], pws->b[9], pwt->b[9]);
3314 pwd->b[10] = msa_msubv_df(DF_BYTE, pwt->b[10], pws->b[10], pwt->b[10]);
3315 pwd->b[11] = msa_msubv_df(DF_BYTE, pwt->b[11], pws->b[11], pwt->b[11]);
3316 pwd->b[12] = msa_msubv_df(DF_BYTE, pwt->b[12], pws->b[12], pwt->b[12]);
3317 pwd->b[13] = msa_msubv_df(DF_BYTE, pwt->b[13], pws->b[13], pwt->b[13]);
3318 pwd->b[14] = msa_msubv_df(DF_BYTE, pwt->b[14], pws->b[14], pwt->b[14]);
3319 pwd->b[15] = msa_msubv_df(DF_BYTE, pwt->b[15], pws->b[15], pwt->b[15]);
3320 }
3321
3322 void helper_msa_msubv_h(CPUMIPSState *env,
3323 uint32_t wd, uint32_t ws, uint32_t wt)
3324 {
3325 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3326 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3327 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3328
3329 pwd->h[0] = msa_msubv_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
3330 pwd->h[1] = msa_msubv_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
3331 pwd->h[2] = msa_msubv_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
3332 pwd->h[3] = msa_msubv_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
3333 pwd->h[4] = msa_msubv_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
3334 pwd->h[5] = msa_msubv_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
3335 pwd->h[6] = msa_msubv_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
3336 pwd->h[7] = msa_msubv_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
3337 }
3338
3339 void helper_msa_msubv_w(CPUMIPSState *env,
3340 uint32_t wd, uint32_t ws, uint32_t wt)
3341 {
3342 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3343 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3344 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3345
3346 pwd->w[0] = msa_msubv_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
3347 pwd->w[1] = msa_msubv_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
3348 pwd->w[2] = msa_msubv_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
3349 pwd->w[3] = msa_msubv_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
3350 }
3351
3352 void helper_msa_msubv_d(CPUMIPSState *env,
3353 uint32_t wd, uint32_t ws, uint32_t wt)
3354 {
3355 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3356 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3357 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3358
3359 pwd->d[0] = msa_msubv_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
3360 pwd->d[1] = msa_msubv_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
3361 }
3362
3363
3364 static inline int64_t msa_mulv_df(uint32_t df, int64_t arg1, int64_t arg2)
3365 {
3366 return arg1 * arg2;
3367 }
3368
3369 void helper_msa_mulv_b(CPUMIPSState *env,
3370 uint32_t wd, uint32_t ws, uint32_t wt)
3371 {
3372 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3373 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3374 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3375
3376 pwd->b[0] = msa_mulv_df(DF_BYTE, pws->b[0], pwt->b[0]);
3377 pwd->b[1] = msa_mulv_df(DF_BYTE, pws->b[1], pwt->b[1]);
3378 pwd->b[2] = msa_mulv_df(DF_BYTE, pws->b[2], pwt->b[2]);
3379 pwd->b[3] = msa_mulv_df(DF_BYTE, pws->b[3], pwt->b[3]);
3380 pwd->b[4] = msa_mulv_df(DF_BYTE, pws->b[4], pwt->b[4]);
3381 pwd->b[5] = msa_mulv_df(DF_BYTE, pws->b[5], pwt->b[5]);
3382 pwd->b[6] = msa_mulv_df(DF_BYTE, pws->b[6], pwt->b[6]);
3383 pwd->b[7] = msa_mulv_df(DF_BYTE, pws->b[7], pwt->b[7]);
3384 pwd->b[8] = msa_mulv_df(DF_BYTE, pws->b[8], pwt->b[8]);
3385 pwd->b[9] = msa_mulv_df(DF_BYTE, pws->b[9], pwt->b[9]);
3386 pwd->b[10] = msa_mulv_df(DF_BYTE, pws->b[10], pwt->b[10]);
3387 pwd->b[11] = msa_mulv_df(DF_BYTE, pws->b[11], pwt->b[11]);
3388 pwd->b[12] = msa_mulv_df(DF_BYTE, pws->b[12], pwt->b[12]);
3389 pwd->b[13] = msa_mulv_df(DF_BYTE, pws->b[13], pwt->b[13]);
3390 pwd->b[14] = msa_mulv_df(DF_BYTE, pws->b[14], pwt->b[14]);
3391 pwd->b[15] = msa_mulv_df(DF_BYTE, pws->b[15], pwt->b[15]);
3392 }
3393
3394 void helper_msa_mulv_h(CPUMIPSState *env,
3395 uint32_t wd, uint32_t ws, uint32_t wt)
3396 {
3397 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3398 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3399 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3400
3401 pwd->h[0] = msa_mulv_df(DF_HALF, pws->h[0], pwt->h[0]);
3402 pwd->h[1] = msa_mulv_df(DF_HALF, pws->h[1], pwt->h[1]);
3403 pwd->h[2] = msa_mulv_df(DF_HALF, pws->h[2], pwt->h[2]);
3404 pwd->h[3] = msa_mulv_df(DF_HALF, pws->h[3], pwt->h[3]);
3405 pwd->h[4] = msa_mulv_df(DF_HALF, pws->h[4], pwt->h[4]);
3406 pwd->h[5] = msa_mulv_df(DF_HALF, pws->h[5], pwt->h[5]);
3407 pwd->h[6] = msa_mulv_df(DF_HALF, pws->h[6], pwt->h[6]);
3408 pwd->h[7] = msa_mulv_df(DF_HALF, pws->h[7], pwt->h[7]);
3409 }
3410
3411 void helper_msa_mulv_w(CPUMIPSState *env,
3412 uint32_t wd, uint32_t ws, uint32_t wt)
3413 {
3414 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3415 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3416 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3417
3418 pwd->w[0] = msa_mulv_df(DF_WORD, pws->w[0], pwt->w[0]);
3419 pwd->w[1] = msa_mulv_df(DF_WORD, pws->w[1], pwt->w[1]);
3420 pwd->w[2] = msa_mulv_df(DF_WORD, pws->w[2], pwt->w[2]);
3421 pwd->w[3] = msa_mulv_df(DF_WORD, pws->w[3], pwt->w[3]);
3422 }
3423
3424 void helper_msa_mulv_d(CPUMIPSState *env,
3425 uint32_t wd, uint32_t ws, uint32_t wt)
3426 {
3427 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3428 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3429 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3430
3431 pwd->d[0] = msa_mulv_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3432 pwd->d[1] = msa_mulv_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3433 }
3434
3435
3436 /*
3437 * Int Subtract
3438 * ------------
3439 *
3440 * +---------------+----------------------------------------------------------+
3441 * | ASUB_S.B | Vector Absolute Values of Signed Subtract (byte) |
3442 * | ASUB_S.H | Vector Absolute Values of Signed Subtract (halfword) |
3443 * | ASUB_S.W | Vector Absolute Values of Signed Subtract (word) |
3444 * | ASUB_S.D | Vector Absolute Values of Signed Subtract (doubleword) |
3445 * | ASUB_U.B | Vector Absolute Values of Unsigned Subtract (byte) |
3446 * | ASUB_U.H | Vector Absolute Values of Unsigned Subtract (halfword) |
3447 * | ASUB_U.W | Vector Absolute Values of Unsigned Subtract (word) |
3448 * | ASUB_U.D | Vector Absolute Values of Unsigned Subtract (doubleword) |
3449 * | HSUB_S.H | Vector Signed Horizontal Subtract (halfword) |
3450 * | HSUB_S.W | Vector Signed Horizontal Subtract (word) |
3451 * | HSUB_S.D | Vector Signed Horizontal Subtract (doubleword) |
3452 * | HSUB_U.H | Vector Unigned Horizontal Subtract (halfword) |
3453 * | HSUB_U.W | Vector Unigned Horizontal Subtract (word) |
3454 * | HSUB_U.D | Vector Unigned Horizontal Subtract (doubleword) |
3455 * | SUBS_S.B | Vector Signed Saturated Subtract (of Signed) (byte) |
3456 * | SUBS_S.H | Vector Signed Saturated Subtract (of Signed) (halfword) |
3457 * | SUBS_S.W | Vector Signed Saturated Subtract (of Signed) (word) |
3458 * | SUBS_S.D | Vector Signed Saturated Subtract (of Signed) (doubleword)|
3459 * | SUBS_U.B | Vector Unsigned Saturated Subtract (of Uns.) (byte) |
3460 * | SUBS_U.H | Vector Unsigned Saturated Subtract (of Uns.) (halfword) |
3461 * | SUBS_U.W | Vector Unsigned Saturated Subtract (of Uns.) (word) |
3462 * | SUBS_U.D | Vector Unsigned Saturated Subtract (of Uns.) (doubleword)|
3463 * | SUBSUS_U.B | Vector Uns. Sat. Subtract (of S. from Uns.) (byte) |
3464 * | SUBSUS_U.H | Vector Uns. Sat. Subtract (of S. from Uns.) (halfword) |
3465 * | SUBSUS_U.W | Vector Uns. Sat. Subtract (of S. from Uns.) (word) |
3466 * | SUBSUS_U.D | Vector Uns. Sat. Subtract (of S. from Uns.) (doubleword) |
3467 * | SUBSUU_S.B | Vector Signed Saturated Subtract (of Uns.) (byte) |
3468 * | SUBSUU_S.H | Vector Signed Saturated Subtract (of Uns.) (halfword) |
3469 * | SUBSUU_S.W | Vector Signed Saturated Subtract (of Uns.) (word) |
3470 * | SUBSUU_S.D | Vector Signed Saturated Subtract (of Uns.) (doubleword) |
3471 * | SUBV.B | Vector Subtract (byte) |
3472 * | SUBV.H | Vector Subtract (halfword) |
3473 * | SUBV.W | Vector Subtract (word) |
3474 * | SUBV.D | Vector Subtract (doubleword) |
3475 * +---------------+----------------------------------------------------------+
3476 */
3477
3478
3479 static inline int64_t msa_asub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3480 {
3481 /* signed compare */
3482 return (arg1 < arg2) ?
3483 (uint64_t)(arg2 - arg1) : (uint64_t)(arg1 - arg2);
3484 }
3485
3486 void helper_msa_asub_s_b(CPUMIPSState *env,
3487 uint32_t wd, uint32_t ws, uint32_t wt)
3488 {
3489 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3490 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3491 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3492
3493 pwd->b[0] = msa_asub_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3494 pwd->b[1] = msa_asub_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3495 pwd->b[2] = msa_asub_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3496 pwd->b[3] = msa_asub_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3497 pwd->b[4] = msa_asub_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3498 pwd->b[5] = msa_asub_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3499 pwd->b[6] = msa_asub_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3500 pwd->b[7] = msa_asub_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3501 pwd->b[8] = msa_asub_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3502 pwd->b[9] = msa_asub_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3503 pwd->b[10] = msa_asub_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3504 pwd->b[11] = msa_asub_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3505 pwd->b[12] = msa_asub_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3506 pwd->b[13] = msa_asub_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3507 pwd->b[14] = msa_asub_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3508 pwd->b[15] = msa_asub_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3509 }
3510
3511 void helper_msa_asub_s_h(CPUMIPSState *env,
3512 uint32_t wd, uint32_t ws, uint32_t wt)
3513 {
3514 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3515 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3516 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3517
3518 pwd->h[0] = msa_asub_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3519 pwd->h[1] = msa_asub_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3520 pwd->h[2] = msa_asub_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3521 pwd->h[3] = msa_asub_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3522 pwd->h[4] = msa_asub_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3523 pwd->h[5] = msa_asub_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3524 pwd->h[6] = msa_asub_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3525 pwd->h[7] = msa_asub_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3526 }
3527
3528 void helper_msa_asub_s_w(CPUMIPSState *env,
3529 uint32_t wd, uint32_t ws, uint32_t wt)
3530 {
3531 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3532 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3533 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3534
3535 pwd->w[0] = msa_asub_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3536 pwd->w[1] = msa_asub_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3537 pwd->w[2] = msa_asub_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3538 pwd->w[3] = msa_asub_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3539 }
3540
3541 void helper_msa_asub_s_d(CPUMIPSState *env,
3542 uint32_t wd, uint32_t ws, uint32_t wt)
3543 {
3544 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3545 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3546 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3547
3548 pwd->d[0] = msa_asub_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3549 pwd->d[1] = msa_asub_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3550 }
3551
3552
3553 static inline uint64_t msa_asub_u_df(uint32_t df, uint64_t arg1, uint64_t arg2)
3554 {
3555 uint64_t u_arg1 = UNSIGNED(arg1, df);
3556 uint64_t u_arg2 = UNSIGNED(arg2, df);
3557 /* unsigned compare */
3558 return (u_arg1 < u_arg2) ?
3559 (uint64_t)(u_arg2 - u_arg1) : (uint64_t)(u_arg1 - u_arg2);
3560 }
3561
3562 void helper_msa_asub_u_b(CPUMIPSState *env,
3563 uint32_t wd, uint32_t ws, uint32_t wt)
3564 {
3565 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3566 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3567 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3568
3569 pwd->b[0] = msa_asub_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3570 pwd->b[1] = msa_asub_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3571 pwd->b[2] = msa_asub_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3572 pwd->b[3] = msa_asub_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3573 pwd->b[4] = msa_asub_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3574 pwd->b[5] = msa_asub_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3575 pwd->b[6] = msa_asub_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3576 pwd->b[7] = msa_asub_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3577 pwd->b[8] = msa_asub_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3578 pwd->b[9] = msa_asub_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3579 pwd->b[10] = msa_asub_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3580 pwd->b[11] = msa_asub_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3581 pwd->b[12] = msa_asub_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3582 pwd->b[13] = msa_asub_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3583 pwd->b[14] = msa_asub_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3584 pwd->b[15] = msa_asub_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3585 }
3586
3587 void helper_msa_asub_u_h(CPUMIPSState *env,
3588 uint32_t wd, uint32_t ws, uint32_t wt)
3589 {
3590 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3591 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3592 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3593
3594 pwd->h[0] = msa_asub_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3595 pwd->h[1] = msa_asub_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3596 pwd->h[2] = msa_asub_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3597 pwd->h[3] = msa_asub_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3598 pwd->h[4] = msa_asub_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3599 pwd->h[5] = msa_asub_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3600 pwd->h[6] = msa_asub_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3601 pwd->h[7] = msa_asub_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3602 }
3603
3604 void helper_msa_asub_u_w(CPUMIPSState *env,
3605 uint32_t wd, uint32_t ws, uint32_t wt)
3606 {
3607 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3608 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3609 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3610
3611 pwd->w[0] = msa_asub_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3612 pwd->w[1] = msa_asub_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3613 pwd->w[2] = msa_asub_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3614 pwd->w[3] = msa_asub_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3615 }
3616
3617 void helper_msa_asub_u_d(CPUMIPSState *env,
3618 uint32_t wd, uint32_t ws, uint32_t wt)
3619 {
3620 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3621 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3622 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3623
3624 pwd->d[0] = msa_asub_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3625 pwd->d[1] = msa_asub_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3626 }
3627
3628
3629 static inline int64_t msa_hsub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3630 {
3631 return SIGNED_ODD(arg1, df) - SIGNED_EVEN(arg2, df);
3632 }
3633
3634 void helper_msa_hsub_s_h(CPUMIPSState *env,
3635 uint32_t wd, uint32_t ws, uint32_t wt)
3636 {
3637 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3638 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3639 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3640
3641 pwd->h[0] = msa_hsub_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3642 pwd->h[1] = msa_hsub_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3643 pwd->h[2] = msa_hsub_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3644 pwd->h[3] = msa_hsub_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3645 pwd->h[4] = msa_hsub_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3646 pwd->h[5] = msa_hsub_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3647 pwd->h[6] = msa_hsub_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3648 pwd->h[7] = msa_hsub_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3649 }
3650
3651 void helper_msa_hsub_s_w(CPUMIPSState *env,
3652 uint32_t wd, uint32_t ws, uint32_t wt)
3653 {
3654 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3655 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3656 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3657
3658 pwd->w[0] = msa_hsub_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3659 pwd->w[1] = msa_hsub_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3660 pwd->w[2] = msa_hsub_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3661 pwd->w[3] = msa_hsub_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3662 }
3663
3664 void helper_msa_hsub_s_d(CPUMIPSState *env,
3665 uint32_t wd, uint32_t ws, uint32_t wt)
3666 {
3667 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3668 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3669 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3670
3671 pwd->d[0] = msa_hsub_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3672 pwd->d[1] = msa_hsub_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3673 }
3674
3675
3676 static inline int64_t msa_hsub_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3677 {
3678 return UNSIGNED_ODD(arg1, df) - UNSIGNED_EVEN(arg2, df);
3679 }
3680
3681 void helper_msa_hsub_u_h(CPUMIPSState *env,
3682 uint32_t wd, uint32_t ws, uint32_t wt)
3683 {
3684 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3685 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3686 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3687
3688 pwd->h[0] = msa_hsub_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3689 pwd->h[1] = msa_hsub_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3690 pwd->h[2] = msa_hsub_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3691 pwd->h[3] = msa_hsub_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3692 pwd->h[4] = msa_hsub_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3693 pwd->h[5] = msa_hsub_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3694 pwd->h[6] = msa_hsub_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3695 pwd->h[7] = msa_hsub_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3696 }
3697
3698 void helper_msa_hsub_u_w(CPUMIPSState *env,
3699 uint32_t wd, uint32_t ws, uint32_t wt)
3700 {
3701 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3702 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3703 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3704
3705 pwd->w[0] = msa_hsub_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3706 pwd->w[1] = msa_hsub_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3707 pwd->w[2] = msa_hsub_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3708 pwd->w[3] = msa_hsub_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3709 }
3710
3711 void helper_msa_hsub_u_d(CPUMIPSState *env,
3712 uint32_t wd, uint32_t ws, uint32_t wt)
3713 {
3714 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3715 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3716 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3717
3718 pwd->d[0] = msa_hsub_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3719 pwd->d[1] = msa_hsub_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3720 }
3721
3722
3723 static inline int64_t msa_subs_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3724 {
3725 int64_t max_int = DF_MAX_INT(df);
3726 int64_t min_int = DF_MIN_INT(df);
3727 if (arg2 > 0) {
3728 return (min_int + arg2 < arg1) ? arg1 - arg2 : min_int;
3729 } else {
3730 return (arg1 < max_int + arg2) ? arg1 - arg2 : max_int;
3731 }
3732 }
3733
3734 void helper_msa_subs_s_b(CPUMIPSState *env,
3735 uint32_t wd, uint32_t ws, uint32_t wt)
3736 {
3737 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3738 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3739 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3740
3741 pwd->b[0] = msa_subs_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3742 pwd->b[1] = msa_subs_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3743 pwd->b[2] = msa_subs_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3744 pwd->b[3] = msa_subs_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3745 pwd->b[4] = msa_subs_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3746 pwd->b[5] = msa_subs_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3747 pwd->b[6] = msa_subs_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3748 pwd->b[7] = msa_subs_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3749 pwd->b[8] = msa_subs_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3750 pwd->b[9] = msa_subs_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3751 pwd->b[10] = msa_subs_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3752 pwd->b[11] = msa_subs_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3753 pwd->b[12] = msa_subs_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3754 pwd->b[13] = msa_subs_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3755 pwd->b[14] = msa_subs_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3756 pwd->b[15] = msa_subs_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3757 }
3758
3759 void helper_msa_subs_s_h(CPUMIPSState *env,
3760 uint32_t wd, uint32_t ws, uint32_t wt)
3761 {
3762 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3763 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3764 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3765
3766 pwd->h[0] = msa_subs_s_df(DF_HALF, pws->h[0], pwt->h[0]);
3767 pwd->h[1] = msa_subs_s_df(DF_HALF, pws->h[1], pwt->h[1]);
3768 pwd->h[2] = msa_subs_s_df(DF_HALF, pws->h[2], pwt->h[2]);
3769 pwd->h[3] = msa_subs_s_df(DF_HALF, pws->h[3], pwt->h[3]);
3770 pwd->h[4] = msa_subs_s_df(DF_HALF, pws->h[4], pwt->h[4]);
3771 pwd->h[5] = msa_subs_s_df(DF_HALF, pws->h[5], pwt->h[5]);
3772 pwd->h[6] = msa_subs_s_df(DF_HALF, pws->h[6], pwt->h[6]);
3773 pwd->h[7] = msa_subs_s_df(DF_HALF, pws->h[7], pwt->h[7]);
3774 }
3775
3776 void helper_msa_subs_s_w(CPUMIPSState *env,
3777 uint32_t wd, uint32_t ws, uint32_t wt)
3778 {
3779 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3780 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3781 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3782
3783 pwd->w[0] = msa_subs_s_df(DF_WORD, pws->w[0], pwt->w[0]);
3784 pwd->w[1] = msa_subs_s_df(DF_WORD, pws->w[1], pwt->w[1]);
3785 pwd->w[2] = msa_subs_s_df(DF_WORD, pws->w[2], pwt->w[2]);
3786 pwd->w[3] = msa_subs_s_df(DF_WORD, pws->w[3], pwt->w[3]);
3787 }
3788
3789 void helper_msa_subs_s_d(CPUMIPSState *env,
3790 uint32_t wd, uint32_t ws, uint32_t wt)
3791 {
3792 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3793 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3794 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3795
3796 pwd->d[0] = msa_subs_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3797 pwd->d[1] = msa_subs_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3798 }
3799
3800
3801 static inline int64_t msa_subs_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3802 {
3803 uint64_t u_arg1 = UNSIGNED(arg1, df);
3804 uint64_t u_arg2 = UNSIGNED(arg2, df);
3805 return (u_arg1 > u_arg2) ? u_arg1 - u_arg2 : 0;
3806 }
3807
3808 void helper_msa_subs_u_b(CPUMIPSState *env,
3809 uint32_t wd, uint32_t ws, uint32_t wt)
3810 {
3811 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3812 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3813 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3814
3815 pwd->b[0] = msa_subs_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3816 pwd->b[1] = msa_subs_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3817 pwd->b[2] = msa_subs_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3818 pwd->b[3] = msa_subs_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3819 pwd->b[4] = msa_subs_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3820 pwd->b[5] = msa_subs_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3821 pwd->b[6] = msa_subs_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3822 pwd->b[7] = msa_subs_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3823 pwd->b[8] = msa_subs_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3824 pwd->b[9] = msa_subs_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3825 pwd->b[10] = msa_subs_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3826 pwd->b[11] = msa_subs_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3827 pwd->b[12] = msa_subs_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3828 pwd->b[13] = msa_subs_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3829 pwd->b[14] = msa_subs_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3830 pwd->b[15] = msa_subs_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3831 }
3832
3833 void helper_msa_subs_u_h(CPUMIPSState *env,
3834 uint32_t wd, uint32_t ws, uint32_t wt)
3835 {
3836 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3837 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3838 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3839
3840 pwd->h[0] = msa_subs_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3841 pwd->h[1] = msa_subs_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3842 pwd->h[2] = msa_subs_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3843 pwd->h[3] = msa_subs_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3844 pwd->h[4] = msa_subs_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3845 pwd->h[5] = msa_subs_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3846 pwd->h[6] = msa_subs_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3847 pwd->h[7] = msa_subs_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3848 }
3849
3850 void helper_msa_subs_u_w(CPUMIPSState *env,
3851 uint32_t wd, uint32_t ws, uint32_t wt)
3852 {
3853 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3854 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3855 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3856
3857 pwd->w[0] = msa_subs_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3858 pwd->w[1] = msa_subs_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3859 pwd->w[2] = msa_subs_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3860 pwd->w[3] = msa_subs_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3861 }
3862
3863 void helper_msa_subs_u_d(CPUMIPSState *env,
3864 uint32_t wd, uint32_t ws, uint32_t wt)
3865 {
3866 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3867 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3868 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3869
3870 pwd->d[0] = msa_subs_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3871 pwd->d[1] = msa_subs_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3872 }
3873
3874
3875 static inline int64_t msa_subsus_u_df(uint32_t df, int64_t arg1, int64_t arg2)
3876 {
3877 uint64_t u_arg1 = UNSIGNED(arg1, df);
3878 uint64_t max_uint = DF_MAX_UINT(df);
3879 if (arg2 >= 0) {
3880 uint64_t u_arg2 = (uint64_t)arg2;
3881 return (u_arg1 > u_arg2) ?
3882 (int64_t)(u_arg1 - u_arg2) :
3883 0;
3884 } else {
3885 uint64_t u_arg2 = (uint64_t)(-arg2);
3886 return (u_arg1 < max_uint - u_arg2) ?
3887 (int64_t)(u_arg1 + u_arg2) :
3888 (int64_t)max_uint;
3889 }
3890 }
3891
3892 void helper_msa_subsus_u_b(CPUMIPSState *env,
3893 uint32_t wd, uint32_t ws, uint32_t wt)
3894 {
3895 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3896 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3897 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3898
3899 pwd->b[0] = msa_subsus_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
3900 pwd->b[1] = msa_subsus_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
3901 pwd->b[2] = msa_subsus_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
3902 pwd->b[3] = msa_subsus_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
3903 pwd->b[4] = msa_subsus_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
3904 pwd->b[5] = msa_subsus_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
3905 pwd->b[6] = msa_subsus_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
3906 pwd->b[7] = msa_subsus_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
3907 pwd->b[8] = msa_subsus_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
3908 pwd->b[9] = msa_subsus_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
3909 pwd->b[10] = msa_subsus_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
3910 pwd->b[11] = msa_subsus_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
3911 pwd->b[12] = msa_subsus_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
3912 pwd->b[13] = msa_subsus_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
3913 pwd->b[14] = msa_subsus_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
3914 pwd->b[15] = msa_subsus_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
3915 }
3916
3917 void helper_msa_subsus_u_h(CPUMIPSState *env,
3918 uint32_t wd, uint32_t ws, uint32_t wt)
3919 {
3920 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3921 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3922 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3923
3924 pwd->h[0] = msa_subsus_u_df(DF_HALF, pws->h[0], pwt->h[0]);
3925 pwd->h[1] = msa_subsus_u_df(DF_HALF, pws->h[1], pwt->h[1]);
3926 pwd->h[2] = msa_subsus_u_df(DF_HALF, pws->h[2], pwt->h[2]);
3927 pwd->h[3] = msa_subsus_u_df(DF_HALF, pws->h[3], pwt->h[3]);
3928 pwd->h[4] = msa_subsus_u_df(DF_HALF, pws->h[4], pwt->h[4]);
3929 pwd->h[5] = msa_subsus_u_df(DF_HALF, pws->h[5], pwt->h[5]);
3930 pwd->h[6] = msa_subsus_u_df(DF_HALF, pws->h[6], pwt->h[6]);
3931 pwd->h[7] = msa_subsus_u_df(DF_HALF, pws->h[7], pwt->h[7]);
3932 }
3933
3934 void helper_msa_subsus_u_w(CPUMIPSState *env,
3935 uint32_t wd, uint32_t ws, uint32_t wt)
3936 {
3937 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3938 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3939 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3940
3941 pwd->w[0] = msa_subsus_u_df(DF_WORD, pws->w[0], pwt->w[0]);
3942 pwd->w[1] = msa_subsus_u_df(DF_WORD, pws->w[1], pwt->w[1]);
3943 pwd->w[2] = msa_subsus_u_df(DF_WORD, pws->w[2], pwt->w[2]);
3944 pwd->w[3] = msa_subsus_u_df(DF_WORD, pws->w[3], pwt->w[3]);
3945 }
3946
3947 void helper_msa_subsus_u_d(CPUMIPSState *env,
3948 uint32_t wd, uint32_t ws, uint32_t wt)
3949 {
3950 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3951 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3952 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3953
3954 pwd->d[0] = msa_subsus_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
3955 pwd->d[1] = msa_subsus_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
3956 }
3957
3958
3959 static inline int64_t msa_subsuu_s_df(uint32_t df, int64_t arg1, int64_t arg2)
3960 {
3961 uint64_t u_arg1 = UNSIGNED(arg1, df);
3962 uint64_t u_arg2 = UNSIGNED(arg2, df);
3963 int64_t max_int = DF_MAX_INT(df);
3964 int64_t min_int = DF_MIN_INT(df);
3965 if (u_arg1 > u_arg2) {
3966 return u_arg1 - u_arg2 < (uint64_t)max_int ?
3967 (int64_t)(u_arg1 - u_arg2) :
3968 max_int;
3969 } else {
3970 return u_arg2 - u_arg1 < (uint64_t)(-min_int) ?
3971 (int64_t)(u_arg1 - u_arg2) :
3972 min_int;
3973 }
3974 }
3975
3976 void helper_msa_subsuu_s_b(CPUMIPSState *env,
3977 uint32_t wd, uint32_t ws, uint32_t wt)
3978 {
3979 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
3980 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
3981 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
3982
3983 pwd->b[0] = msa_subsuu_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
3984 pwd->b[1] = msa_subsuu_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
3985 pwd->b[2] = msa_subsuu_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
3986 pwd->b[3] = msa_subsuu_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
3987 pwd->b[4] = msa_subsuu_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
3988 pwd->b[5] = msa_subsuu_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
3989 pwd->b[6] = msa_subsuu_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
3990 pwd->b[7] = msa_subsuu_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
3991 pwd->b[8] = msa_subsuu_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
3992 pwd->b[9] = msa_subsuu_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
3993 pwd->b[10] = msa_subsuu_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
3994 pwd->b[11] = msa_subsuu_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
3995 pwd->b[12] = msa_subsuu_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
3996 pwd->b[13] = msa_subsuu_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
3997 pwd->b[14] = msa_subsuu_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
3998 pwd->b[15] = msa_subsuu_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
3999 }
4000
4001 void helper_msa_subsuu_s_h(CPUMIPSState *env,
4002 uint32_t wd, uint32_t ws, uint32_t wt)
4003 {
4004 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4005 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4006 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4007
4008 pwd->h[0] = msa_subsuu_s_df(DF_HALF, pws->h[0], pwt->h[0]);
4009 pwd->h[1] = msa_subsuu_s_df(DF_HALF, pws->h[1], pwt->h[1]);
4010 pwd->h[2] = msa_subsuu_s_df(DF_HALF, pws->h[2], pwt->h[2]);
4011 pwd->h[3] = msa_subsuu_s_df(DF_HALF, pws->h[3], pwt->h[3]);
4012 pwd->h[4] = msa_subsuu_s_df(DF_HALF, pws->h[4], pwt->h[4]);
4013 pwd->h[5] = msa_subsuu_s_df(DF_HALF, pws->h[5], pwt->h[5]);
4014 pwd->h[6] = msa_subsuu_s_df(DF_HALF, pws->h[6], pwt->h[6]);
4015 pwd->h[7] = msa_subsuu_s_df(DF_HALF, pws->h[7], pwt->h[7]);
4016 }
4017
4018 void helper_msa_subsuu_s_w(CPUMIPSState *env,
4019 uint32_t wd, uint32_t ws, uint32_t wt)
4020 {
4021 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4022 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4023 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4024
4025 pwd->w[0] = msa_subsuu_s_df(DF_WORD, pws->w[0], pwt->w[0]);
4026 pwd->w[1] = msa_subsuu_s_df(DF_WORD, pws->w[1], pwt->w[1]);
4027 pwd->w[2] = msa_subsuu_s_df(DF_WORD, pws->w[2], pwt->w[2]);
4028 pwd->w[3] = msa_subsuu_s_df(DF_WORD, pws->w[3], pwt->w[3]);
4029 }
4030
4031 void helper_msa_subsuu_s_d(CPUMIPSState *env,
4032 uint32_t wd, uint32_t ws, uint32_t wt)
4033 {
4034 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4035 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4036 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4037
4038 pwd->d[0] = msa_subsuu_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4039 pwd->d[1] = msa_subsuu_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4040 }
4041
4042
4043 static inline int64_t msa_subv_df(uint32_t df, int64_t arg1, int64_t arg2)
4044 {
4045 return arg1 - arg2;
4046 }
4047
4048 void helper_msa_subv_b(CPUMIPSState *env,
4049 uint32_t wd, uint32_t ws, uint32_t wt)
4050 {
4051 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4052 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4053 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4054
4055 pwd->b[0] = msa_subv_df(DF_BYTE, pws->b[0], pwt->b[0]);
4056 pwd->b[1] = msa_subv_df(DF_BYTE, pws->b[1], pwt->b[1]);
4057 pwd->b[2] = msa_subv_df(DF_BYTE, pws->b[2], pwt->b[2]);
4058 pwd->b[3] = msa_subv_df(DF_BYTE, pws->b[3], pwt->b[3]);
4059 pwd->b[4] = msa_subv_df(DF_BYTE, pws->b[4], pwt->b[4]);
4060 pwd->b[5] = msa_subv_df(DF_BYTE, pws->b[5], pwt->b[5]);
4061 pwd->b[6] = msa_subv_df(DF_BYTE, pws->b[6], pwt->b[6]);
4062 pwd->b[7] = msa_subv_df(DF_BYTE, pws->b[7], pwt->b[7]);
4063 pwd->b[8] = msa_subv_df(DF_BYTE, pws->b[8], pwt->b[8]);
4064 pwd->b[9] = msa_subv_df(DF_BYTE, pws->b[9], pwt->b[9]);
4065 pwd->b[10] = msa_subv_df(DF_BYTE, pws->b[10], pwt->b[10]);
4066 pwd->b[11] = msa_subv_df(DF_BYTE, pws->b[11], pwt->b[11]);
4067 pwd->b[12] = msa_subv_df(DF_BYTE, pws->b[12], pwt->b[12]);
4068 pwd->b[13] = msa_subv_df(DF_BYTE, pws->b[13], pwt->b[13]);
4069 pwd->b[14] = msa_subv_df(DF_BYTE, pws->b[14], pwt->b[14]);
4070 pwd->b[15] = msa_subv_df(DF_BYTE, pws->b[15], pwt->b[15]);
4071 }
4072
4073 void helper_msa_subv_h(CPUMIPSState *env,
4074 uint32_t wd, uint32_t ws, uint32_t wt)
4075 {
4076 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4077 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4078 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4079
4080 pwd->h[0] = msa_subv_df(DF_HALF, pws->h[0], pwt->h[0]);
4081 pwd->h[1] = msa_subv_df(DF_HALF, pws->h[1], pwt->h[1]);
4082 pwd->h[2] = msa_subv_df(DF_HALF, pws->h[2], pwt->h[2]);
4083 pwd->h[3] = msa_subv_df(DF_HALF, pws->h[3], pwt->h[3]);
4084 pwd->h[4] = msa_subv_df(DF_HALF, pws->h[4], pwt->h[4]);
4085 pwd->h[5] = msa_subv_df(DF_HALF, pws->h[5], pwt->h[5]);
4086 pwd->h[6] = msa_subv_df(DF_HALF, pws->h[6], pwt->h[6]);
4087 pwd->h[7] = msa_subv_df(DF_HALF, pws->h[7], pwt->h[7]);
4088 }
4089
4090 void helper_msa_subv_w(CPUMIPSState *env,
4091 uint32_t wd, uint32_t ws, uint32_t wt)
4092 {
4093 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4094 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4095 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4096
4097 pwd->w[0] = msa_subv_df(DF_WORD, pws->w[0], pwt->w[0]);
4098 pwd->w[1] = msa_subv_df(DF_WORD, pws->w[1], pwt->w[1]);
4099 pwd->w[2] = msa_subv_df(DF_WORD, pws->w[2], pwt->w[2]);
4100 pwd->w[3] = msa_subv_df(DF_WORD, pws->w[3], pwt->w[3]);
4101 }
4102
4103 void helper_msa_subv_d(CPUMIPSState *env,
4104 uint32_t wd, uint32_t ws, uint32_t wt)
4105 {
4106 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4107 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4108 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4109
4110 pwd->d[0] = msa_subv_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4111 pwd->d[1] = msa_subv_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4112 }
4113
4114
4115 /*
4116 * Interleave
4117 * ----------
4118 *
4119 * +---------------+----------------------------------------------------------+
4120 * | ILVEV.B | Vector Interleave Even (byte) |
4121 * | ILVEV.H | Vector Interleave Even (halfword) |
4122 * | ILVEV.W | Vector Interleave Even (word) |
4123 * | ILVEV.D | Vector Interleave Even (doubleword) |
4124 * | ILVOD.B | Vector Interleave Odd (byte) |
4125 * | ILVOD.H | Vector Interleave Odd (halfword) |
4126 * | ILVOD.W | Vector Interleave Odd (word) |
4127 * | ILVOD.D | Vector Interleave Odd (doubleword) |
4128 * | ILVL.B | Vector Interleave Left (byte) |
4129 * | ILVL.H | Vector Interleave Left (halfword) |
4130 * | ILVL.W | Vector Interleave Left (word) |
4131 * | ILVL.D | Vector Interleave Left (doubleword) |
4132 * | ILVR.B | Vector Interleave Right (byte) |
4133 * | ILVR.H | Vector Interleave Right (halfword) |
4134 * | ILVR.W | Vector Interleave Right (word) |
4135 * | ILVR.D | Vector Interleave Right (doubleword) |
4136 * +---------------+----------------------------------------------------------+
4137 */
4138
4139
4140 void helper_msa_ilvev_b(CPUMIPSState *env,
4141 uint32_t wd, uint32_t ws, uint32_t wt)
4142 {
4143 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4144 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4145 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4146
4147 #if defined(HOST_WORDS_BIGENDIAN)
4148 pwd->b[8] = pws->b[9];
4149 pwd->b[9] = pwt->b[9];
4150 pwd->b[10] = pws->b[11];
4151 pwd->b[11] = pwt->b[11];
4152 pwd->b[12] = pws->b[13];
4153 pwd->b[13] = pwt->b[13];
4154 pwd->b[14] = pws->b[15];
4155 pwd->b[15] = pwt->b[15];
4156 pwd->b[0] = pws->b[1];
4157 pwd->b[1] = pwt->b[1];
4158 pwd->b[2] = pws->b[3];
4159 pwd->b[3] = pwt->b[3];
4160 pwd->b[4] = pws->b[5];
4161 pwd->b[5] = pwt->b[5];
4162 pwd->b[6] = pws->b[7];
4163 pwd->b[7] = pwt->b[7];
4164 #else
4165 pwd->b[15] = pws->b[14];
4166 pwd->b[14] = pwt->b[14];
4167 pwd->b[13] = pws->b[12];
4168 pwd->b[12] = pwt->b[12];
4169 pwd->b[11] = pws->b[10];
4170 pwd->b[10] = pwt->b[10];
4171 pwd->b[9] = pws->b[8];
4172 pwd->b[8] = pwt->b[8];
4173 pwd->b[7] = pws->b[6];
4174 pwd->b[6] = pwt->b[6];
4175 pwd->b[5] = pws->b[4];
4176 pwd->b[4] = pwt->b[4];
4177 pwd->b[3] = pws->b[2];
4178 pwd->b[2] = pwt->b[2];
4179 pwd->b[1] = pws->b[0];
4180 pwd->b[0] = pwt->b[0];
4181 #endif
4182 }
4183
4184 void helper_msa_ilvev_h(CPUMIPSState *env,
4185 uint32_t wd, uint32_t ws, uint32_t wt)
4186 {
4187 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4188 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4189 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4190
4191 #if defined(HOST_WORDS_BIGENDIAN)
4192 pwd->h[4] = pws->h[5];
4193 pwd->h[5] = pwt->h[5];
4194 pwd->h[6] = pws->h[7];
4195 pwd->h[7] = pwt->h[7];
4196 pwd->h[0] = pws->h[1];
4197 pwd->h[1] = pwt->h[1];
4198 pwd->h[2] = pws->h[3];
4199 pwd->h[3] = pwt->h[3];
4200 #else
4201 pwd->h[7] = pws->h[6];
4202 pwd->h[6] = pwt->h[6];
4203 pwd->h[5] = pws->h[4];
4204 pwd->h[4] = pwt->h[4];
4205 pwd->h[3] = pws->h[2];
4206 pwd->h[2] = pwt->h[2];
4207 pwd->h[1] = pws->h[0];
4208 pwd->h[0] = pwt->h[0];
4209 #endif
4210 }
4211
4212 void helper_msa_ilvev_w(CPUMIPSState *env,
4213 uint32_t wd, uint32_t ws, uint32_t wt)
4214 {
4215 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4216 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4217 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4218
4219 #if defined(HOST_WORDS_BIGENDIAN)
4220 pwd->w[2] = pws->w[3];
4221 pwd->w[3] = pwt->w[3];
4222 pwd->w[0] = pws->w[1];
4223 pwd->w[1] = pwt->w[1];
4224 #else
4225 pwd->w[3] = pws->w[2];
4226 pwd->w[2] = pwt->w[2];
4227 pwd->w[1] = pws->w[0];
4228 pwd->w[0] = pwt->w[0];
4229 #endif
4230 }
4231
4232 void helper_msa_ilvev_d(CPUMIPSState *env,
4233 uint32_t wd, uint32_t ws, uint32_t wt)
4234 {
4235 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4236 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4237 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4238
4239 pwd->d[1] = pws->d[0];
4240 pwd->d[0] = pwt->d[0];
4241 }
4242
4243
4244 void helper_msa_ilvod_b(CPUMIPSState *env,
4245 uint32_t wd, uint32_t ws, uint32_t wt)
4246 {
4247 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4248 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4249 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4250
4251 #if defined(HOST_WORDS_BIGENDIAN)
4252 pwd->b[7] = pwt->b[6];
4253 pwd->b[6] = pws->b[6];
4254 pwd->b[5] = pwt->b[4];
4255 pwd->b[4] = pws->b[4];
4256 pwd->b[3] = pwt->b[2];
4257 pwd->b[2] = pws->b[2];
4258 pwd->b[1] = pwt->b[0];
4259 pwd->b[0] = pws->b[0];
4260 pwd->b[15] = pwt->b[14];
4261 pwd->b[14] = pws->b[14];
4262 pwd->b[13] = pwt->b[12];
4263 pwd->b[12] = pws->b[12];
4264 pwd->b[11] = pwt->b[10];
4265 pwd->b[10] = pws->b[10];
4266 pwd->b[9] = pwt->b[8];
4267 pwd->b[8] = pws->b[8];
4268 #else
4269 pwd->b[0] = pwt->b[1];
4270 pwd->b[1] = pws->b[1];
4271 pwd->b[2] = pwt->b[3];
4272 pwd->b[3] = pws->b[3];
4273 pwd->b[4] = pwt->b[5];
4274 pwd->b[5] = pws->b[5];
4275 pwd->b[6] = pwt->b[7];
4276 pwd->b[7] = pws->b[7];
4277 pwd->b[8] = pwt->b[9];
4278 pwd->b[9] = pws->b[9];
4279 pwd->b[10] = pwt->b[11];
4280 pwd->b[11] = pws->b[11];
4281 pwd->b[12] = pwt->b[13];
4282 pwd->b[13] = pws->b[13];
4283 pwd->b[14] = pwt->b[15];
4284 pwd->b[15] = pws->b[15];
4285 #endif
4286 }
4287
4288 void helper_msa_ilvod_h(CPUMIPSState *env,
4289 uint32_t wd, uint32_t ws, uint32_t wt)
4290 {
4291 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4292 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4293 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4294
4295 #if defined(HOST_WORDS_BIGENDIAN)
4296 pwd->h[3] = pwt->h[2];
4297 pwd->h[2] = pws->h[2];
4298 pwd->h[1] = pwt->h[0];
4299 pwd->h[0] = pws->h[0];
4300 pwd->h[7] = pwt->h[6];
4301 pwd->h[6] = pws->h[6];
4302 pwd->h[5] = pwt->h[4];
4303 pwd->h[4] = pws->h[4];
4304 #else
4305 pwd->h[0] = pwt->h[1];
4306 pwd->h[1] = pws->h[1];
4307 pwd->h[2] = pwt->h[3];
4308 pwd->h[3] = pws->h[3];
4309 pwd->h[4] = pwt->h[5];
4310 pwd->h[5] = pws->h[5];
4311 pwd->h[6] = pwt->h[7];
4312 pwd->h[7] = pws->h[7];
4313 #endif
4314 }
4315
4316 void helper_msa_ilvod_w(CPUMIPSState *env,
4317 uint32_t wd, uint32_t ws, uint32_t wt)
4318 {
4319 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4320 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4321 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4322
4323 #if defined(HOST_WORDS_BIGENDIAN)
4324 pwd->w[1] = pwt->w[0];
4325 pwd->w[0] = pws->w[0];
4326 pwd->w[3] = pwt->w[2];
4327 pwd->w[2] = pws->w[2];
4328 #else
4329 pwd->w[0] = pwt->w[1];
4330 pwd->w[1] = pws->w[1];
4331 pwd->w[2] = pwt->w[3];
4332 pwd->w[3] = pws->w[3];
4333 #endif
4334 }
4335
4336 void helper_msa_ilvod_d(CPUMIPSState *env,
4337 uint32_t wd, uint32_t ws, uint32_t wt)
4338 {
4339 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4340 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4341 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4342
4343 pwd->d[0] = pwt->d[1];
4344 pwd->d[1] = pws->d[1];
4345 }
4346
4347
4348 void helper_msa_ilvl_b(CPUMIPSState *env,
4349 uint32_t wd, uint32_t ws, uint32_t wt)
4350 {
4351 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4352 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4353 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4354
4355 #if defined(HOST_WORDS_BIGENDIAN)
4356 pwd->b[7] = pwt->b[15];
4357 pwd->b[6] = pws->b[15];
4358 pwd->b[5] = pwt->b[14];
4359 pwd->b[4] = pws->b[14];
4360 pwd->b[3] = pwt->b[13];
4361 pwd->b[2] = pws->b[13];
4362 pwd->b[1] = pwt->b[12];
4363 pwd->b[0] = pws->b[12];
4364 pwd->b[15] = pwt->b[11];
4365 pwd->b[14] = pws->b[11];
4366 pwd->b[13] = pwt->b[10];
4367 pwd->b[12] = pws->b[10];
4368 pwd->b[11] = pwt->b[9];
4369 pwd->b[10] = pws->b[9];
4370 pwd->b[9] = pwt->b[8];
4371 pwd->b[8] = pws->b[8];
4372 #else
4373 pwd->b[0] = pwt->b[8];
4374 pwd->b[1] = pws->b[8];
4375 pwd->b[2] = pwt->b[9];
4376 pwd->b[3] = pws->b[9];
4377 pwd->b[4] = pwt->b[10];
4378 pwd->b[5] = pws->b[10];
4379 pwd->b[6] = pwt->b[11];
4380 pwd->b[7] = pws->b[11];
4381 pwd->b[8] = pwt->b[12];
4382 pwd->b[9] = pws->b[12];
4383 pwd->b[10] = pwt->b[13];
4384 pwd->b[11] = pws->b[13];
4385 pwd->b[12] = pwt->b[14];
4386 pwd->b[13] = pws->b[14];
4387 pwd->b[14] = pwt->b[15];
4388 pwd->b[15] = pws->b[15];
4389 #endif
4390 }
4391
4392 void helper_msa_ilvl_h(CPUMIPSState *env,
4393 uint32_t wd, uint32_t ws, uint32_t wt)
4394 {
4395 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4396 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4397 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4398
4399 #if defined(HOST_WORDS_BIGENDIAN)
4400 pwd->h[3] = pwt->h[7];
4401 pwd->h[2] = pws->h[7];
4402 pwd->h[1] = pwt->h[6];
4403 pwd->h[0] = pws->h[6];
4404 pwd->h[7] = pwt->h[5];
4405 pwd->h[6] = pws->h[5];
4406 pwd->h[5] = pwt->h[4];
4407 pwd->h[4] = pws->h[4];
4408 #else
4409 pwd->h[0] = pwt->h[4];
4410 pwd->h[1] = pws->h[4];
4411 pwd->h[2] = pwt->h[5];
4412 pwd->h[3] = pws->h[5];
4413 pwd->h[4] = pwt->h[6];
4414 pwd->h[5] = pws->h[6];
4415 pwd->h[6] = pwt->h[7];
4416 pwd->h[7] = pws->h[7];
4417 #endif
4418 }
4419
4420 void helper_msa_ilvl_w(CPUMIPSState *env,
4421 uint32_t wd, uint32_t ws, uint32_t wt)
4422 {
4423 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4424 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4425 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4426
4427 #if defined(HOST_WORDS_BIGENDIAN)
4428 pwd->w[1] = pwt->w[3];
4429 pwd->w[0] = pws->w[3];
4430 pwd->w[3] = pwt->w[2];
4431 pwd->w[2] = pws->w[2];
4432 #else
4433 pwd->w[0] = pwt->w[2];
4434 pwd->w[1] = pws->w[2];
4435 pwd->w[2] = pwt->w[3];
4436 pwd->w[3] = pws->w[3];
4437 #endif
4438 }
4439
4440 void helper_msa_ilvl_d(CPUMIPSState *env,
4441 uint32_t wd, uint32_t ws, uint32_t wt)
4442 {
4443 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4444 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4445 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4446
4447 pwd->d[0] = pwt->d[1];
4448 pwd->d[1] = pws->d[1];
4449 }
4450
4451
4452 void helper_msa_ilvr_b(CPUMIPSState *env,
4453 uint32_t wd, uint32_t ws, uint32_t wt)
4454 {
4455 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4456 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4457 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4458
4459 #if defined(HOST_WORDS_BIGENDIAN)
4460 pwd->b[8] = pws->b[0];
4461 pwd->b[9] = pwt->b[0];
4462 pwd->b[10] = pws->b[1];
4463 pwd->b[11] = pwt->b[1];
4464 pwd->b[12] = pws->b[2];
4465 pwd->b[13] = pwt->b[2];
4466 pwd->b[14] = pws->b[3];
4467 pwd->b[15] = pwt->b[3];
4468 pwd->b[0] = pws->b[4];
4469 pwd->b[1] = pwt->b[4];
4470 pwd->b[2] = pws->b[5];
4471 pwd->b[3] = pwt->b[5];
4472 pwd->b[4] = pws->b[6];
4473 pwd->b[5] = pwt->b[6];
4474 pwd->b[6] = pws->b[7];
4475 pwd->b[7] = pwt->b[7];
4476 #else
4477 pwd->b[15] = pws->b[7];
4478 pwd->b[14] = pwt->b[7];
4479 pwd->b[13] = pws->b[6];
4480 pwd->b[12] = pwt->b[6];
4481 pwd->b[11] = pws->b[5];
4482 pwd->b[10] = pwt->b[5];
4483 pwd->b[9] = pws->b[4];
4484 pwd->b[8] = pwt->b[4];
4485 pwd->b[7] = pws->b[3];
4486 pwd->b[6] = pwt->b[3];
4487 pwd->b[5] = pws->b[2];
4488 pwd->b[4] = pwt->b[2];
4489 pwd->b[3] = pws->b[1];
4490 pwd->b[2] = pwt->b[1];
4491 pwd->b[1] = pws->b[0];
4492 pwd->b[0] = pwt->b[0];
4493 #endif
4494 }
4495
4496 void helper_msa_ilvr_h(CPUMIPSState *env,
4497 uint32_t wd, uint32_t ws, uint32_t wt)
4498 {
4499 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4500 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4501 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4502
4503 #if defined(HOST_WORDS_BIGENDIAN)
4504 pwd->h[4] = pws->h[0];
4505 pwd->h[5] = pwt->h[0];
4506 pwd->h[6] = pws->h[1];
4507 pwd->h[7] = pwt->h[1];
4508 pwd->h[0] = pws->h[2];
4509 pwd->h[1] = pwt->h[2];
4510 pwd->h[2] = pws->h[3];
4511 pwd->h[3] = pwt->h[3];
4512 #else
4513 pwd->h[7] = pws->h[3];
4514 pwd->h[6] = pwt->h[3];
4515 pwd->h[5] = pws->h[2];
4516 pwd->h[4] = pwt->h[2];
4517 pwd->h[3] = pws->h[1];
4518 pwd->h[2] = pwt->h[1];
4519 pwd->h[1] = pws->h[0];
4520 pwd->h[0] = pwt->h[0];
4521 #endif
4522 }
4523
4524 void helper_msa_ilvr_w(CPUMIPSState *env,
4525 uint32_t wd, uint32_t ws, uint32_t wt)
4526 {
4527 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4528 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4529 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4530
4531 #if defined(HOST_WORDS_BIGENDIAN)
4532 pwd->w[2] = pws->w[0];
4533 pwd->w[3] = pwt->w[0];
4534 pwd->w[0] = pws->w[1];
4535 pwd->w[1] = pwt->w[1];
4536 #else
4537 pwd->w[3] = pws->w[1];
4538 pwd->w[2] = pwt->w[1];
4539 pwd->w[1] = pws->w[0];
4540 pwd->w[0] = pwt->w[0];
4541 #endif
4542 }
4543
4544 void helper_msa_ilvr_d(CPUMIPSState *env,
4545 uint32_t wd, uint32_t ws, uint32_t wt)
4546 {
4547 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4548 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4549 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4550
4551 pwd->d[1] = pws->d[0];
4552 pwd->d[0] = pwt->d[0];
4553 }
4554
4555
4556 /*
4557 * Logic
4558 * -----
4559 *
4560 * +---------------+----------------------------------------------------------+
4561 * | AND.V | Vector Logical And |
4562 * | NOR.V | Vector Logical Negated Or |
4563 * | OR.V | Vector Logical Or |
4564 * | XOR.V | Vector Logical Exclusive Or |
4565 * +---------------+----------------------------------------------------------+
4566 */
4567
4568
4569 void helper_msa_and_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4570 {
4571 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4572 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4573 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4574
4575 pwd->d[0] = pws->d[0] & pwt->d[0];
4576 pwd->d[1] = pws->d[1] & pwt->d[1];
4577 }
4578
4579 void helper_msa_nor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4580 {
4581 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4582 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4583 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4584
4585 pwd->d[0] = ~(pws->d[0] | pwt->d[0]);
4586 pwd->d[1] = ~(pws->d[1] | pwt->d[1]);
4587 }
4588
4589 void helper_msa_or_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4590 {
4591 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4592 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4593 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4594
4595 pwd->d[0] = pws->d[0] | pwt->d[0];
4596 pwd->d[1] = pws->d[1] | pwt->d[1];
4597 }
4598
4599 void helper_msa_xor_v(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
4600 {
4601 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4602 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4603 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4604
4605 pwd->d[0] = pws->d[0] ^ pwt->d[0];
4606 pwd->d[1] = pws->d[1] ^ pwt->d[1];
4607 }
4608
4609
4610 /*
4611 * Move
4612 * ----
4613 *
4614 * +---------------+----------------------------------------------------------+
4615 * | MOVE.V | Vector Move |
4616 * +---------------+----------------------------------------------------------+
4617 */
4618
4619 static inline void msa_move_v(wr_t *pwd, wr_t *pws)
4620 {
4621 pwd->d[0] = pws->d[0];
4622 pwd->d[1] = pws->d[1];
4623 }
4624
4625 void helper_msa_move_v(CPUMIPSState *env, uint32_t wd, uint32_t ws)
4626 {
4627 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4628 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4629
4630 msa_move_v(pwd, pws);
4631 }
4632
4633
4634 /*
4635 * Pack
4636 * ----
4637 *
4638 * +---------------+----------------------------------------------------------+
4639 * | PCKEV.B | Vector Pack Even (byte) |
4640 * | PCKEV.H | Vector Pack Even (halfword) |
4641 * | PCKEV.W | Vector Pack Even (word) |
4642 * | PCKEV.D | Vector Pack Even (doubleword) |
4643 * | PCKOD.B | Vector Pack Odd (byte) |
4644 * | PCKOD.H | Vector Pack Odd (halfword) |
4645 * | PCKOD.W | Vector Pack Odd (word) |
4646 * | PCKOD.D | Vector Pack Odd (doubleword) |
4647 * | VSHF.B | Vector Data Preserving Shuffle (byte) |
4648 * | VSHF.H | Vector Data Preserving Shuffle (halfword) |
4649 * | VSHF.W | Vector Data Preserving Shuffle (word) |
4650 * | VSHF.D | Vector Data Preserving Shuffle (doubleword) |
4651 * +---------------+----------------------------------------------------------+
4652 */
4653
4654
4655 void helper_msa_pckev_b(CPUMIPSState *env,
4656 uint32_t wd, uint32_t ws, uint32_t wt)
4657 {
4658 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4659 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4660 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4661
4662 #if defined(HOST_WORDS_BIGENDIAN)
4663 pwd->b[8] = pws->b[9];
4664 pwd->b[10] = pws->b[13];
4665 pwd->b[12] = pws->b[1];
4666 pwd->b[14] = pws->b[5];
4667 pwd->b[0] = pwt->b[9];
4668 pwd->b[2] = pwt->b[13];
4669 pwd->b[4] = pwt->b[1];
4670 pwd->b[6] = pwt->b[5];
4671 pwd->b[9] = pws->b[11];
4672 pwd->b[13] = pws->b[3];
4673 pwd->b[1] = pwt->b[11];
4674 pwd->b[5] = pwt->b[3];
4675 pwd->b[11] = pws->b[15];
4676 pwd->b[3] = pwt->b[15];
4677 pwd->b[15] = pws->b[7];
4678 pwd->b[7] = pwt->b[7];
4679 #else
4680 pwd->b[15] = pws->b[14];
4681 pwd->b[13] = pws->b[10];
4682 pwd->b[11] = pws->b[6];
4683 pwd->b[9] = pws->b[2];
4684 pwd->b[7] = pwt->b[14];
4685 pwd->b[5] = pwt->b[10];
4686 pwd->b[3] = pwt->b[6];
4687 pwd->b[1] = pwt->b[2];
4688 pwd->b[14] = pws->b[12];
4689 pwd->b[10] = pws->b[4];
4690 pwd->b[6] = pwt->b[12];
4691 pwd->b[2] = pwt->b[4];
4692 pwd->b[12] = pws->b[8];
4693 pwd->b[4] = pwt->b[8];
4694 pwd->b[8] = pws->b[0];
4695 pwd->b[0] = pwt->b[0];
4696 #endif
4697 }
4698
4699 void helper_msa_pckev_h(CPUMIPSState *env,
4700 uint32_t wd, uint32_t ws, uint32_t wt)
4701 {
4702 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4703 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4704 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4705
4706 #if defined(HOST_WORDS_BIGENDIAN)
4707 pwd->h[4] = pws->h[5];
4708 pwd->h[6] = pws->h[1];
4709 pwd->h[0] = pwt->h[5];
4710 pwd->h[2] = pwt->h[1];
4711 pwd->h[5] = pws->h[7];
4712 pwd->h[1] = pwt->h[7];
4713 pwd->h[7] = pws->h[3];
4714 pwd->h[3] = pwt->h[3];
4715 #else
4716 pwd->h[7] = pws->h[6];
4717 pwd->h[5] = pws->h[2];
4718 pwd->h[3] = pwt->h[6];
4719 pwd->h[1] = pwt->h[2];
4720 pwd->h[6] = pws->h[4];
4721 pwd->h[2] = pwt->h[4];
4722 pwd->h[4] = pws->h[0];
4723 pwd->h[0] = pwt->h[0];
4724 #endif
4725 }
4726
4727 void helper_msa_pckev_w(CPUMIPSState *env,
4728 uint32_t wd, uint32_t ws, uint32_t wt)
4729 {
4730 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4731 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4732 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4733
4734 #if defined(HOST_WORDS_BIGENDIAN)
4735 pwd->w[2] = pws->w[3];
4736 pwd->w[0] = pwt->w[3];
4737 pwd->w[3] = pws->w[1];
4738 pwd->w[1] = pwt->w[1];
4739 #else
4740 pwd->w[3] = pws->w[2];
4741 pwd->w[1] = pwt->w[2];
4742 pwd->w[2] = pws->w[0];
4743 pwd->w[0] = pwt->w[0];
4744 #endif
4745 }
4746
4747 void helper_msa_pckev_d(CPUMIPSState *env,
4748 uint32_t wd, uint32_t ws, uint32_t wt)
4749 {
4750 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4751 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4752 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4753
4754 pwd->d[1] = pws->d[0];
4755 pwd->d[0] = pwt->d[0];
4756 }
4757
4758
4759 void helper_msa_pckod_b(CPUMIPSState *env,
4760 uint32_t wd, uint32_t ws, uint32_t wt)
4761 {
4762 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4763 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4764 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4765
4766 #if defined(HOST_WORDS_BIGENDIAN)
4767 pwd->b[7] = pwt->b[6];
4768 pwd->b[5] = pwt->b[2];
4769 pwd->b[3] = pwt->b[14];
4770 pwd->b[1] = pwt->b[10];
4771 pwd->b[15] = pws->b[6];
4772 pwd->b[13] = pws->b[2];
4773 pwd->b[11] = pws->b[14];
4774 pwd->b[9] = pws->b[10];
4775 pwd->b[6] = pwt->b[4];
4776 pwd->b[2] = pwt->b[12];
4777 pwd->b[14] = pws->b[4];
4778 pwd->b[10] = pws->b[12];
4779 pwd->b[4] = pwt->b[0];
4780 pwd->b[12] = pws->b[0];
4781 pwd->b[0] = pwt->b[8];
4782 pwd->b[8] = pws->b[8];
4783 #else
4784 pwd->b[0] = pwt->b[1];
4785 pwd->b[2] = pwt->b[5];
4786 pwd->b[4] = pwt->b[9];
4787 pwd->b[6] = pwt->b[13];
4788 pwd->b[8] = pws->b[1];
4789 pwd->b[10] = pws->b[5];
4790 pwd->b[12] = pws->b[9];
4791 pwd->b[14] = pws->b[13];
4792 pwd->b[1] = pwt->b[3];
4793 pwd->b[5] = pwt->b[11];
4794 pwd->b[9] = pws->b[3];
4795 pwd->b[13] = pws->b[11];
4796 pwd->b[3] = pwt->b[7];
4797 pwd->b[11] = pws->b[7];
4798 pwd->b[7] = pwt->b[15];
4799 pwd->b[15] = pws->b[15];
4800 #endif
4801
4802 }
4803
4804 void helper_msa_pckod_h(CPUMIPSState *env,
4805 uint32_t wd, uint32_t ws, uint32_t wt)
4806 {
4807 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4808 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4809 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4810
4811 #if defined(HOST_WORDS_BIGENDIAN)
4812 pwd->h[3] = pwt->h[2];
4813 pwd->h[1] = pwt->h[6];
4814 pwd->h[7] = pws->h[2];
4815 pwd->h[5] = pws->h[6];
4816 pwd->h[2] = pwt->h[0];
4817 pwd->h[6] = pws->h[0];
4818 pwd->h[0] = pwt->h[4];
4819 pwd->h[4] = pws->h[4];
4820 #else
4821 pwd->h[0] = pwt->h[1];
4822 pwd->h[2] = pwt->h[5];
4823 pwd->h[4] = pws->h[1];
4824 pwd->h[6] = pws->h[5];
4825 pwd->h[1] = pwt->h[3];
4826 pwd->h[5] = pws->h[3];
4827 pwd->h[3] = pwt->h[7];
4828 pwd->h[7] = pws->h[7];
4829 #endif
4830 }
4831
4832 void helper_msa_pckod_w(CPUMIPSState *env,
4833 uint32_t wd, uint32_t ws, uint32_t wt)
4834 {
4835 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4836 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4837 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4838
4839 #if defined(HOST_WORDS_BIGENDIAN)
4840 pwd->w[1] = pwt->w[0];
4841 pwd->w[3] = pws->w[0];
4842 pwd->w[0] = pwt->w[2];
4843 pwd->w[2] = pws->w[2];
4844 #else
4845 pwd->w[0] = pwt->w[1];
4846 pwd->w[2] = pws->w[1];
4847 pwd->w[1] = pwt->w[3];
4848 pwd->w[3] = pws->w[3];
4849 #endif
4850 }
4851
4852 void helper_msa_pckod_d(CPUMIPSState *env,
4853 uint32_t wd, uint32_t ws, uint32_t wt)
4854 {
4855 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4856 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4857 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4858
4859 pwd->d[0] = pwt->d[1];
4860 pwd->d[1] = pws->d[1];
4861 }
4862
4863
4864 /*
4865 * Shift
4866 * -----
4867 *
4868 * +---------------+----------------------------------------------------------+
4869 * | SLL.B | Vector Shift Left (byte) |
4870 * | SLL.H | Vector Shift Left (halfword) |
4871 * | SLL.W | Vector Shift Left (word) |
4872 * | SLL.D | Vector Shift Left (doubleword) |
4873 * | SRA.B | Vector Shift Right Arithmetic (byte) |
4874 * | SRA.H | Vector Shift Right Arithmetic (halfword) |
4875 * | SRA.W | Vector Shift Right Arithmetic (word) |
4876 * | SRA.D | Vector Shift Right Arithmetic (doubleword) |
4877 * | SRAR.B | Vector Shift Right Arithmetic Rounded (byte) |
4878 * | SRAR.H | Vector Shift Right Arithmetic Rounded (halfword) |
4879 * | SRAR.W | Vector Shift Right Arithmetic Rounded (word) |
4880 * | SRAR.D | Vector Shift Right Arithmetic Rounded (doubleword) |
4881 * | SRL.B | Vector Shift Right Logical (byte) |
4882 * | SRL.H | Vector Shift Right Logical (halfword) |
4883 * | SRL.W | Vector Shift Right Logical (word) |
4884 * | SRL.D | Vector Shift Right Logical (doubleword) |
4885 * | SRLR.B | Vector Shift Right Logical Rounded (byte) |
4886 * | SRLR.H | Vector Shift Right Logical Rounded (halfword) |
4887 * | SRLR.W | Vector Shift Right Logical Rounded (word) |
4888 * | SRLR.D | Vector Shift Right Logical Rounded (doubleword) |
4889 * +---------------+----------------------------------------------------------+
4890 */
4891
4892
4893 static inline int64_t msa_sll_df(uint32_t df, int64_t arg1, int64_t arg2)
4894 {
4895 int32_t b_arg2 = BIT_POSITION(arg2, df);
4896 return arg1 << b_arg2;
4897 }
4898
4899 void helper_msa_sll_b(CPUMIPSState *env,
4900 uint32_t wd, uint32_t ws, uint32_t wt)
4901 {
4902 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4903 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4904 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4905
4906 pwd->b[0] = msa_sll_df(DF_BYTE, pws->b[0], pwt->b[0]);
4907 pwd->b[1] = msa_sll_df(DF_BYTE, pws->b[1], pwt->b[1]);
4908 pwd->b[2] = msa_sll_df(DF_BYTE, pws->b[2], pwt->b[2]);
4909 pwd->b[3] = msa_sll_df(DF_BYTE, pws->b[3], pwt->b[3]);
4910 pwd->b[4] = msa_sll_df(DF_BYTE, pws->b[4], pwt->b[4]);
4911 pwd->b[5] = msa_sll_df(DF_BYTE, pws->b[5], pwt->b[5]);
4912 pwd->b[6] = msa_sll_df(DF_BYTE, pws->b[6], pwt->b[6]);
4913 pwd->b[7] = msa_sll_df(DF_BYTE, pws->b[7], pwt->b[7]);
4914 pwd->b[8] = msa_sll_df(DF_BYTE, pws->b[8], pwt->b[8]);
4915 pwd->b[9] = msa_sll_df(DF_BYTE, pws->b[9], pwt->b[9]);
4916 pwd->b[10] = msa_sll_df(DF_BYTE, pws->b[10], pwt->b[10]);
4917 pwd->b[11] = msa_sll_df(DF_BYTE, pws->b[11], pwt->b[11]);
4918 pwd->b[12] = msa_sll_df(DF_BYTE, pws->b[12], pwt->b[12]);
4919 pwd->b[13] = msa_sll_df(DF_BYTE, pws->b[13], pwt->b[13]);
4920 pwd->b[14] = msa_sll_df(DF_BYTE, pws->b[14], pwt->b[14]);
4921 pwd->b[15] = msa_sll_df(DF_BYTE, pws->b[15], pwt->b[15]);
4922 }
4923
4924 void helper_msa_sll_h(CPUMIPSState *env,
4925 uint32_t wd, uint32_t ws, uint32_t wt)
4926 {
4927 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4928 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4929 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4930
4931 pwd->h[0] = msa_sll_df(DF_HALF, pws->h[0], pwt->h[0]);
4932 pwd->h[1] = msa_sll_df(DF_HALF, pws->h[1], pwt->h[1]);
4933 pwd->h[2] = msa_sll_df(DF_HALF, pws->h[2], pwt->h[2]);
4934 pwd->h[3] = msa_sll_df(DF_HALF, pws->h[3], pwt->h[3]);
4935 pwd->h[4] = msa_sll_df(DF_HALF, pws->h[4], pwt->h[4]);
4936 pwd->h[5] = msa_sll_df(DF_HALF, pws->h[5], pwt->h[5]);
4937 pwd->h[6] = msa_sll_df(DF_HALF, pws->h[6], pwt->h[6]);
4938 pwd->h[7] = msa_sll_df(DF_HALF, pws->h[7], pwt->h[7]);
4939 }
4940
4941 void helper_msa_sll_w(CPUMIPSState *env,
4942 uint32_t wd, uint32_t ws, uint32_t wt)
4943 {
4944 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4945 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4946 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4947
4948 pwd->w[0] = msa_sll_df(DF_WORD, pws->w[0], pwt->w[0]);
4949 pwd->w[1] = msa_sll_df(DF_WORD, pws->w[1], pwt->w[1]);
4950 pwd->w[2] = msa_sll_df(DF_WORD, pws->w[2], pwt->w[2]);
4951 pwd->w[3] = msa_sll_df(DF_WORD, pws->w[3], pwt->w[3]);
4952 }
4953
4954 void helper_msa_sll_d(CPUMIPSState *env,
4955 uint32_t wd, uint32_t ws, uint32_t wt)
4956 {
4957 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4958 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4959 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4960
4961 pwd->d[0] = msa_sll_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
4962 pwd->d[1] = msa_sll_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
4963 }
4964
4965
4966 static inline int64_t msa_sra_df(uint32_t df, int64_t arg1, int64_t arg2)
4967 {
4968 int32_t b_arg2 = BIT_POSITION(arg2, df);
4969 return arg1 >> b_arg2;
4970 }
4971
4972 void helper_msa_sra_b(CPUMIPSState *env,
4973 uint32_t wd, uint32_t ws, uint32_t wt)
4974 {
4975 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
4976 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
4977 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
4978
4979 pwd->b[0] = msa_sra_df(DF_BYTE, pws->b[0], pwt->b[0]);
4980 pwd->b[1] = msa_sra_df(DF_BYTE, pws->b[1], pwt->b[1]);
4981 pwd->b[2] = msa_sra_df(DF_BYTE, pws->b[2], pwt->b[2]);
4982 pwd->b[3] = msa_sra_df(DF_BYTE, pws->b[3], pwt->b[3]);
4983 pwd->b[4] = msa_sra_df(DF_BYTE, pws->b[4], pwt->b[4]);
4984 pwd->b[5] = msa_sra_df(DF_BYTE, pws->b[5], pwt->b[5]);
4985 pwd->b[6] = msa_sra_df(DF_BYTE, pws->b[6], pwt->b[6]);
4986 pwd->b[7] = msa_sra_df(DF_BYTE, pws->b[7], pwt->b[7]);
4987 pwd->b[8] = msa_sra_df(DF_BYTE, pws->b[8], pwt->b[8]);
4988 pwd->b[9] = msa_sra_df(DF_BYTE, pws->b[9], pwt->b[9]);
4989 pwd->b[10] = msa_sra_df(DF_BYTE, pws->b[10], pwt->b[10]);
4990 pwd->b[11] = msa_sra_df(DF_BYTE, pws->b[11], pwt->b[11]);
4991 pwd->b[12] = msa_sra_df(DF_BYTE, pws->b[12], pwt->b[12]);
4992 pwd->b[13] = msa_sra_df(DF_BYTE, pws->b[13], pwt->b[13]);
4993 pwd->b[14] = msa_sra_df(DF_BYTE, pws->b[14], pwt->b[14]);
4994 pwd->b[15] = msa_sra_df(DF_BYTE, pws->b[15], pwt->b[15]);
4995 }
4996
4997 void helper_msa_sra_h(CPUMIPSState *env,
4998 uint32_t wd, uint32_t ws, uint32_t wt)
4999 {
5000 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5001 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5002 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5003
5004 pwd->h[0] = msa_sra_df(DF_HALF, pws->h[0], pwt->h[0]);
5005 pwd->h[1] = msa_sra_df(DF_HALF, pws->h[1], pwt->h[1]);
5006 pwd->h[2] = msa_sra_df(DF_HALF, pws->h[2], pwt->h[2]);
5007 pwd->h[3] = msa_sra_df(DF_HALF, pws->h[3], pwt->h[3]);
5008 pwd->h[4] = msa_sra_df(DF_HALF, pws->h[4], pwt->h[4]);
5009 pwd->h[5] = msa_sra_df(DF_HALF, pws->h[5], pwt->h[5]);
5010 pwd->h[6] = msa_sra_df(DF_HALF, pws->h[6], pwt->h[6]);
5011 pwd->h[7] = msa_sra_df(DF_HALF, pws->h[7], pwt->h[7]);
5012 }
5013
5014 void helper_msa_sra_w(CPUMIPSState *env,
5015 uint32_t wd, uint32_t ws, uint32_t wt)
5016 {
5017 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5018 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5019 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5020
5021 pwd->w[0] = msa_sra_df(DF_WORD, pws->w[0], pwt->w[0]);
5022 pwd->w[1] = msa_sra_df(DF_WORD, pws->w[1], pwt->w[1]);
5023 pwd->w[2] = msa_sra_df(DF_WORD, pws->w[2], pwt->w[2]);
5024 pwd->w[3] = msa_sra_df(DF_WORD, pws->w[3], pwt->w[3]);
5025 }
5026
5027 void helper_msa_sra_d(CPUMIPSState *env,
5028 uint32_t wd, uint32_t ws, uint32_t wt)
5029 {
5030 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5031 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5032 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5033
5034 pwd->d[0] = msa_sra_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5035 pwd->d[1] = msa_sra_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5036 }
5037
5038
5039 static inline int64_t msa_srar_df(uint32_t df, int64_t arg1, int64_t arg2)
5040 {
5041 int32_t b_arg2 = BIT_POSITION(arg2, df);
5042 if (b_arg2 == 0) {
5043 return arg1;
5044 } else {
5045 int64_t r_bit = (arg1 >> (b_arg2 - 1)) & 1;
5046 return (arg1 >> b_arg2) + r_bit;
5047 }
5048 }
5049
5050 void helper_msa_srar_b(CPUMIPSState *env,
5051 uint32_t wd, uint32_t ws, uint32_t wt)
5052 {
5053 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5054 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5055 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5056
5057 pwd->b[0] = msa_srar_df(DF_BYTE, pws->b[0], pwt->b[0]);
5058 pwd->b[1] = msa_srar_df(DF_BYTE, pws->b[1], pwt->b[1]);
5059 pwd->b[2] = msa_srar_df(DF_BYTE, pws->b[2], pwt->b[2]);
5060 pwd->b[3] = msa_srar_df(DF_BYTE, pws->b[3], pwt->b[3]);
5061 pwd->b[4] = msa_srar_df(DF_BYTE, pws->b[4], pwt->b[4]);
5062 pwd->b[5] = msa_srar_df(DF_BYTE, pws->b[5], pwt->b[5]);
5063 pwd->b[6] = msa_srar_df(DF_BYTE, pws->b[6], pwt->b[6]);
5064 pwd->b[7] = msa_srar_df(DF_BYTE, pws->b[7], pwt->b[7]);
5065 pwd->b[8] = msa_srar_df(DF_BYTE, pws->b[8], pwt->b[8]);
5066 pwd->b[9] = msa_srar_df(DF_BYTE, pws->b[9], pwt->b[9]);
5067 pwd->b[10] = msa_srar_df(DF_BYTE, pws->b[10], pwt->b[10]);
5068 pwd->b[11] = msa_srar_df(DF_BYTE, pws->b[11], pwt->b[11]);
5069 pwd->b[12] = msa_srar_df(DF_BYTE, pws->b[12], pwt->b[12]);
5070 pwd->b[13] = msa_srar_df(DF_BYTE, pws->b[13], pwt->b[13]);
5071 pwd->b[14] = msa_srar_df(DF_BYTE, pws->b[14], pwt->b[14]);
5072 pwd->b[15] = msa_srar_df(DF_BYTE, pws->b[15], pwt->b[15]);
5073 }
5074
5075 void helper_msa_srar_h(CPUMIPSState *env,
5076 uint32_t wd, uint32_t ws, uint32_t wt)
5077 {
5078 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5079 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5080 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5081
5082 pwd->h[0] = msa_srar_df(DF_HALF, pws->h[0], pwt->h[0]);
5083 pwd->h[1] = msa_srar_df(DF_HALF, pws->h[1], pwt->h[1]);
5084 pwd->h[2] = msa_srar_df(DF_HALF, pws->h[2], pwt->h[2]);
5085 pwd->h[3] = msa_srar_df(DF_HALF, pws->h[3], pwt->h[3]);
5086 pwd->h[4] = msa_srar_df(DF_HALF, pws->h[4], pwt->h[4]);
5087 pwd->h[5] = msa_srar_df(DF_HALF, pws->h[5], pwt->h[5]);
5088 pwd->h[6] = msa_srar_df(DF_HALF, pws->h[6], pwt->h[6]);
5089 pwd->h[7] = msa_srar_df(DF_HALF, pws->h[7], pwt->h[7]);
5090 }
5091
5092 void helper_msa_srar_w(CPUMIPSState *env,
5093 uint32_t wd, uint32_t ws, uint32_t wt)
5094 {
5095 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5096 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5097 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5098
5099 pwd->w[0] = msa_srar_df(DF_WORD, pws->w[0], pwt->w[0]);
5100 pwd->w[1] = msa_srar_df(DF_WORD, pws->w[1], pwt->w[1]);
5101 pwd->w[2] = msa_srar_df(DF_WORD, pws->w[2], pwt->w[2]);
5102 pwd->w[3] = msa_srar_df(DF_WORD, pws->w[3], pwt->w[3]);
5103 }
5104
5105 void helper_msa_srar_d(CPUMIPSState *env,
5106 uint32_t wd, uint32_t ws, uint32_t wt)
5107 {
5108 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5109 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5110 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5111
5112 pwd->d[0] = msa_srar_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5113 pwd->d[1] = msa_srar_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5114 }
5115
5116
5117 static inline int64_t msa_srl_df(uint32_t df, int64_t arg1, int64_t arg2)
5118 {
5119 uint64_t u_arg1 = UNSIGNED(arg1, df);
5120 int32_t b_arg2 = BIT_POSITION(arg2, df);
5121 return u_arg1 >> b_arg2;
5122 }
5123
5124 void helper_msa_srl_b(CPUMIPSState *env,
5125 uint32_t wd, uint32_t ws, uint32_t wt)
5126 {
5127 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5128 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5129 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5130
5131 pwd->b[0] = msa_srl_df(DF_BYTE, pws->b[0], pwt->b[0]);
5132 pwd->b[1] = msa_srl_df(DF_BYTE, pws->b[1], pwt->b[1]);
5133 pwd->b[2] = msa_srl_df(DF_BYTE, pws->b[2], pwt->b[2]);
5134 pwd->b[3] = msa_srl_df(DF_BYTE, pws->b[3], pwt->b[3]);
5135 pwd->b[4] = msa_srl_df(DF_BYTE, pws->b[4], pwt->b[4]);
5136 pwd->b[5] = msa_srl_df(DF_BYTE, pws->b[5], pwt->b[5]);
5137 pwd->b[6] = msa_srl_df(DF_BYTE, pws->b[6], pwt->b[6]);
5138 pwd->b[7] = msa_srl_df(DF_BYTE, pws->b[7], pwt->b[7]);
5139 pwd->b[8] = msa_srl_df(DF_BYTE, pws->b[8], pwt->b[8]);
5140 pwd->b[9] = msa_srl_df(DF_BYTE, pws->b[9], pwt->b[9]);
5141 pwd->b[10] = msa_srl_df(DF_BYTE, pws->b[10], pwt->b[10]);
5142 pwd->b[11] = msa_srl_df(DF_BYTE, pws->b[11], pwt->b[11]);
5143 pwd->b[12] = msa_srl_df(DF_BYTE, pws->b[12], pwt->b[12]);
5144 pwd->b[13] = msa_srl_df(DF_BYTE, pws->b[13], pwt->b[13]);
5145 pwd->b[14] = msa_srl_df(DF_BYTE, pws->b[14], pwt->b[14]);
5146 pwd->b[15] = msa_srl_df(DF_BYTE, pws->b[15], pwt->b[15]);
5147 }
5148
5149 void helper_msa_srl_h(CPUMIPSState *env,
5150 uint32_t wd, uint32_t ws, uint32_t wt)
5151 {
5152 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5153 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5154 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5155
5156 pwd->h[0] = msa_srl_df(DF_HALF, pws->h[0], pwt->h[0]);
5157 pwd->h[1] = msa_srl_df(DF_HALF, pws->h[1], pwt->h[1]);
5158 pwd->h[2] = msa_srl_df(DF_HALF, pws->h[2], pwt->h[2]);
5159 pwd->h[3] = msa_srl_df(DF_HALF, pws->h[3], pwt->h[3]);
5160 pwd->h[4] = msa_srl_df(DF_HALF, pws->h[4], pwt->h[4]);
5161 pwd->h[5] = msa_srl_df(DF_HALF, pws->h[5], pwt->h[5]);
5162 pwd->h[6] = msa_srl_df(DF_HALF, pws->h[6], pwt->h[6]);
5163 pwd->h[7] = msa_srl_df(DF_HALF, pws->h[7], pwt->h[7]);
5164 }
5165
5166 void helper_msa_srl_w(CPUMIPSState *env,
5167 uint32_t wd, uint32_t ws, uint32_t wt)
5168 {
5169 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5170 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5171 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5172
5173 pwd->w[0] = msa_srl_df(DF_WORD, pws->w[0], pwt->w[0]);
5174 pwd->w[1] = msa_srl_df(DF_WORD, pws->w[1], pwt->w[1]);
5175 pwd->w[2] = msa_srl_df(DF_WORD, pws->w[2], pwt->w[2]);
5176 pwd->w[3] = msa_srl_df(DF_WORD, pws->w[3], pwt->w[3]);
5177 }
5178
5179 void helper_msa_srl_d(CPUMIPSState *env,
5180 uint32_t wd, uint32_t ws, uint32_t wt)
5181 {
5182 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5183 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5184 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5185
5186 pwd->d[0] = msa_srl_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5187 pwd->d[1] = msa_srl_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5188 }
5189
5190
5191 static inline int64_t msa_srlr_df(uint32_t df, int64_t arg1, int64_t arg2)
5192 {
5193 uint64_t u_arg1 = UNSIGNED(arg1, df);
5194 int32_t b_arg2 = BIT_POSITION(arg2, df);
5195 if (b_arg2 == 0) {
5196 return u_arg1;
5197 } else {
5198 uint64_t r_bit = (u_arg1 >> (b_arg2 - 1)) & 1;
5199 return (u_arg1 >> b_arg2) + r_bit;
5200 }
5201 }
5202
5203 void helper_msa_srlr_b(CPUMIPSState *env,
5204 uint32_t wd, uint32_t ws, uint32_t wt)
5205 {
5206 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5207 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5208 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5209
5210 pwd->b[0] = msa_srlr_df(DF_BYTE, pws->b[0], pwt->b[0]);
5211 pwd->b[1] = msa_srlr_df(DF_BYTE, pws->b[1], pwt->b[1]);
5212 pwd->b[2] = msa_srlr_df(DF_BYTE, pws->b[2], pwt->b[2]);
5213 pwd->b[3] = msa_srlr_df(DF_BYTE, pws->b[3], pwt->b[3]);
5214 pwd->b[4] = msa_srlr_df(DF_BYTE, pws->b[4], pwt->b[4]);
5215 pwd->b[5] = msa_srlr_df(DF_BYTE, pws->b[5], pwt->b[5]);
5216 pwd->b[6] = msa_srlr_df(DF_BYTE, pws->b[6], pwt->b[6]);
5217 pwd->b[7] = msa_srlr_df(DF_BYTE, pws->b[7], pwt->b[7]);
5218 pwd->b[8] = msa_srlr_df(DF_BYTE, pws->b[8], pwt->b[8]);
5219 pwd->b[9] = msa_srlr_df(DF_BYTE, pws->b[9], pwt->b[9]);
5220 pwd->b[10] = msa_srlr_df(DF_BYTE, pws->b[10], pwt->b[10]);
5221 pwd->b[11] = msa_srlr_df(DF_BYTE, pws->b[11], pwt->b[11]);
5222 pwd->b[12] = msa_srlr_df(DF_BYTE, pws->b[12], pwt->b[12]);
5223 pwd->b[13] = msa_srlr_df(DF_BYTE, pws->b[13], pwt->b[13]);
5224 pwd->b[14] = msa_srlr_df(DF_BYTE, pws->b[14], pwt->b[14]);
5225 pwd->b[15] = msa_srlr_df(DF_BYTE, pws->b[15], pwt->b[15]);
5226 }
5227
5228 void helper_msa_srlr_h(CPUMIPSState *env,
5229 uint32_t wd, uint32_t ws, uint32_t wt)
5230 {
5231 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5232 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5233 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5234
5235 pwd->h[0] = msa_srlr_df(DF_HALF, pws->h[0], pwt->h[0]);
5236 pwd->h[1] = msa_srlr_df(DF_HALF, pws->h[1], pwt->h[1]);
5237 pwd->h[2] = msa_srlr_df(DF_HALF, pws->h[2], pwt->h[2]);
5238 pwd->h[3] = msa_srlr_df(DF_HALF, pws->h[3], pwt->h[3]);
5239 pwd->h[4] = msa_srlr_df(DF_HALF, pws->h[4], pwt->h[4]);
5240 pwd->h[5] = msa_srlr_df(DF_HALF, pws->h[5], pwt->h[5]);
5241 pwd->h[6] = msa_srlr_df(DF_HALF, pws->h[6], pwt->h[6]);
5242 pwd->h[7] = msa_srlr_df(DF_HALF, pws->h[7], pwt->h[7]);
5243 }
5244
5245 void helper_msa_srlr_w(CPUMIPSState *env,
5246 uint32_t wd, uint32_t ws, uint32_t wt)
5247 {
5248 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5249 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5250 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5251
5252 pwd->w[0] = msa_srlr_df(DF_WORD, pws->w[0], pwt->w[0]);
5253 pwd->w[1] = msa_srlr_df(DF_WORD, pws->w[1], pwt->w[1]);
5254 pwd->w[2] = msa_srlr_df(DF_WORD, pws->w[2], pwt->w[2]);
5255 pwd->w[3] = msa_srlr_df(DF_WORD, pws->w[3], pwt->w[3]);
5256 }
5257
5258 void helper_msa_srlr_d(CPUMIPSState *env,
5259 uint32_t wd, uint32_t ws, uint32_t wt)
5260 {
5261 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5262 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5263 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
5264
5265 pwd->d[0] = msa_srlr_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
5266 pwd->d[1] = msa_srlr_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
5267 }
5268
5269
5270 #define MSA_FN_IMM8(FUNC, DEST, OPERATION) \
5271 void helper_msa_ ## FUNC(CPUMIPSState *env, uint32_t wd, uint32_t ws, \
5272 uint32_t i8) \
5273 { \
5274 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5275 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5276 uint32_t i; \
5277 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5278 DEST = OPERATION; \
5279 } \
5280 }
5281
5282 MSA_FN_IMM8(andi_b, pwd->b[i], pws->b[i] & i8)
5283 MSA_FN_IMM8(ori_b, pwd->b[i], pws->b[i] | i8)
5284 MSA_FN_IMM8(nori_b, pwd->b[i], ~(pws->b[i] | i8))
5285 MSA_FN_IMM8(xori_b, pwd->b[i], pws->b[i] ^ i8)
5286
5287 #define BIT_MOVE_IF_NOT_ZERO(dest, arg1, arg2, df) \
5288 UNSIGNED(((dest & (~arg2)) | (arg1 & arg2)), df)
5289 MSA_FN_IMM8(bmnzi_b, pwd->b[i],
5290 BIT_MOVE_IF_NOT_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
5291
5292 #define BIT_MOVE_IF_ZERO(dest, arg1, arg2, df) \
5293 UNSIGNED((dest & arg2) | (arg1 & (~arg2)), df)
5294 MSA_FN_IMM8(bmzi_b, pwd->b[i],
5295 BIT_MOVE_IF_ZERO(pwd->b[i], pws->b[i], i8, DF_BYTE))
5296
5297 #define BIT_SELECT(dest, arg1, arg2, df) \
5298 UNSIGNED((arg1 & (~dest)) | (arg2 & dest), df)
5299 MSA_FN_IMM8(bseli_b, pwd->b[i],
5300 BIT_SELECT(pwd->b[i], pws->b[i], i8, DF_BYTE))
5301
5302 #undef BIT_SELECT
5303 #undef BIT_MOVE_IF_ZERO
5304 #undef BIT_MOVE_IF_NOT_ZERO
5305 #undef MSA_FN_IMM8
5306
5307 #define SHF_POS(i, imm) (((i) & 0xfc) + (((imm) >> (2 * ((i) & 0x03))) & 0x03))
5308
5309 void helper_msa_shf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5310 uint32_t ws, uint32_t imm)
5311 {
5312 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5313 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5314 wr_t wx, *pwx = &wx;
5315 uint32_t i;
5316
5317 switch (df) {
5318 case DF_BYTE:
5319 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5320 pwx->b[i] = pws->b[SHF_POS(i, imm)];
5321 }
5322 break;
5323 case DF_HALF:
5324 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5325 pwx->h[i] = pws->h[SHF_POS(i, imm)];
5326 }
5327 break;
5328 case DF_WORD:
5329 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5330 pwx->w[i] = pws->w[SHF_POS(i, imm)];
5331 }
5332 break;
5333 default:
5334 assert(0);
5335 }
5336 msa_move_v(pwd, pwx);
5337 }
5338
5339 #define MSA_BINOP_IMM_DF(helper, func) \
5340 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, \
5341 uint32_t wd, uint32_t ws, int32_t u5) \
5342 { \
5343 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5344 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5345 uint32_t i; \
5346 \
5347 switch (df) { \
5348 case DF_BYTE: \
5349 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5350 pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5); \
5351 } \
5352 break; \
5353 case DF_HALF: \
5354 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
5355 pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5); \
5356 } \
5357 break; \
5358 case DF_WORD: \
5359 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
5360 pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5); \
5361 } \
5362 break; \
5363 case DF_DOUBLE: \
5364 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
5365 pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5); \
5366 } \
5367 break; \
5368 default: \
5369 assert(0); \
5370 } \
5371 }
5372
5373 MSA_BINOP_IMM_DF(addvi, addv)
5374 MSA_BINOP_IMM_DF(subvi, subv)
5375 MSA_BINOP_IMM_DF(ceqi, ceq)
5376 MSA_BINOP_IMM_DF(clei_s, cle_s)
5377 MSA_BINOP_IMM_DF(clei_u, cle_u)
5378 MSA_BINOP_IMM_DF(clti_s, clt_s)
5379 MSA_BINOP_IMM_DF(clti_u, clt_u)
5380 MSA_BINOP_IMM_DF(maxi_s, max_s)
5381 MSA_BINOP_IMM_DF(maxi_u, max_u)
5382 MSA_BINOP_IMM_DF(mini_s, min_s)
5383 MSA_BINOP_IMM_DF(mini_u, min_u)
5384 #undef MSA_BINOP_IMM_DF
5385
5386 void helper_msa_ldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5387 int32_t s10)
5388 {
5389 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5390 uint32_t i;
5391
5392 switch (df) {
5393 case DF_BYTE:
5394 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5395 pwd->b[i] = (int8_t)s10;
5396 }
5397 break;
5398 case DF_HALF:
5399 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5400 pwd->h[i] = (int16_t)s10;
5401 }
5402 break;
5403 case DF_WORD:
5404 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5405 pwd->w[i] = (int32_t)s10;
5406 }
5407 break;
5408 case DF_DOUBLE:
5409 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5410 pwd->d[i] = (int64_t)s10;
5411 }
5412 break;
5413 default:
5414 assert(0);
5415 }
5416 }
5417
5418 static inline int64_t msa_sat_s_df(uint32_t df, int64_t arg, uint32_t m)
5419 {
5420 return arg < M_MIN_INT(m + 1) ? M_MIN_INT(m + 1) :
5421 arg > M_MAX_INT(m + 1) ? M_MAX_INT(m + 1) :
5422 arg;
5423 }
5424
5425 static inline int64_t msa_sat_u_df(uint32_t df, int64_t arg, uint32_t m)
5426 {
5427 uint64_t u_arg = UNSIGNED(arg, df);
5428 return u_arg < M_MAX_UINT(m + 1) ? u_arg :
5429 M_MAX_UINT(m + 1);
5430 }
5431
5432 #define MSA_BINOP_IMMU_DF(helper, func) \
5433 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5434 uint32_t ws, uint32_t u5) \
5435 { \
5436 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5437 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5438 uint32_t i; \
5439 \
5440 switch (df) { \
5441 case DF_BYTE: \
5442 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5443 pwd->b[i] = msa_ ## func ## _df(df, pws->b[i], u5); \
5444 } \
5445 break; \
5446 case DF_HALF: \
5447 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
5448 pwd->h[i] = msa_ ## func ## _df(df, pws->h[i], u5); \
5449 } \
5450 break; \
5451 case DF_WORD: \
5452 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
5453 pwd->w[i] = msa_ ## func ## _df(df, pws->w[i], u5); \
5454 } \
5455 break; \
5456 case DF_DOUBLE: \
5457 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
5458 pwd->d[i] = msa_ ## func ## _df(df, pws->d[i], u5); \
5459 } \
5460 break; \
5461 default: \
5462 assert(0); \
5463 } \
5464 }
5465
5466 MSA_BINOP_IMMU_DF(slli, sll)
5467 MSA_BINOP_IMMU_DF(srai, sra)
5468 MSA_BINOP_IMMU_DF(srli, srl)
5469 MSA_BINOP_IMMU_DF(bclri, bclr)
5470 MSA_BINOP_IMMU_DF(bseti, bset)
5471 MSA_BINOP_IMMU_DF(bnegi, bneg)
5472 MSA_BINOP_IMMU_DF(sat_s, sat_s)
5473 MSA_BINOP_IMMU_DF(sat_u, sat_u)
5474 MSA_BINOP_IMMU_DF(srari, srar)
5475 MSA_BINOP_IMMU_DF(srlri, srlr)
5476 #undef MSA_BINOP_IMMU_DF
5477
5478 #define MSA_TEROP_IMMU_DF(helper, func) \
5479 void helper_msa_ ## helper ## _df(CPUMIPSState *env, uint32_t df, \
5480 uint32_t wd, uint32_t ws, uint32_t u5) \
5481 { \
5482 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5483 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5484 uint32_t i; \
5485 \
5486 switch (df) { \
5487 case DF_BYTE: \
5488 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) { \
5489 pwd->b[i] = msa_ ## func ## _df(df, pwd->b[i], pws->b[i], \
5490 u5); \
5491 } \
5492 break; \
5493 case DF_HALF: \
5494 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) { \
5495 pwd->h[i] = msa_ ## func ## _df(df, pwd->h[i], pws->h[i], \
5496 u5); \
5497 } \
5498 break; \
5499 case DF_WORD: \
5500 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { \
5501 pwd->w[i] = msa_ ## func ## _df(df, pwd->w[i], pws->w[i], \
5502 u5); \
5503 } \
5504 break; \
5505 case DF_DOUBLE: \
5506 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { \
5507 pwd->d[i] = msa_ ## func ## _df(df, pwd->d[i], pws->d[i], \
5508 u5); \
5509 } \
5510 break; \
5511 default: \
5512 assert(0); \
5513 } \
5514 }
5515
5516 MSA_TEROP_IMMU_DF(binsli, binsl)
5517 MSA_TEROP_IMMU_DF(binsri, binsr)
5518 #undef MSA_TEROP_IMMU_DF
5519
5520 #define CONCATENATE_AND_SLIDE(s, k) \
5521 do { \
5522 for (i = 0; i < s; i++) { \
5523 v[i] = pws->b[s * k + i]; \
5524 v[i + s] = pwd->b[s * k + i]; \
5525 } \
5526 for (i = 0; i < s; i++) { \
5527 pwd->b[s * k + i] = v[i + n]; \
5528 } \
5529 } while (0)
5530
5531 static inline void msa_sld_df(uint32_t df, wr_t *pwd,
5532 wr_t *pws, target_ulong rt)
5533 {
5534 uint32_t n = rt % DF_ELEMENTS(df);
5535 uint8_t v[64];
5536 uint32_t i, k;
5537
5538 switch (df) {
5539 case DF_BYTE:
5540 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_BYTE), 0);
5541 break;
5542 case DF_HALF:
5543 for (k = 0; k < 2; k++) {
5544 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_HALF), k);
5545 }
5546 break;
5547 case DF_WORD:
5548 for (k = 0; k < 4; k++) {
5549 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_WORD), k);
5550 }
5551 break;
5552 case DF_DOUBLE:
5553 for (k = 0; k < 8; k++) {
5554 CONCATENATE_AND_SLIDE(DF_ELEMENTS(DF_DOUBLE), k);
5555 }
5556 break;
5557 default:
5558 assert(0);
5559 }
5560 }
5561
5562 static inline int64_t msa_mul_q_df(uint32_t df, int64_t arg1, int64_t arg2)
5563 {
5564 int64_t q_min = DF_MIN_INT(df);
5565 int64_t q_max = DF_MAX_INT(df);
5566
5567 if (arg1 == q_min && arg2 == q_min) {
5568 return q_max;
5569 }
5570 return (arg1 * arg2) >> (DF_BITS(df) - 1);
5571 }
5572
5573 static inline int64_t msa_mulr_q_df(uint32_t df, int64_t arg1, int64_t arg2)
5574 {
5575 int64_t q_min = DF_MIN_INT(df);
5576 int64_t q_max = DF_MAX_INT(df);
5577 int64_t r_bit = 1 << (DF_BITS(df) - 2);
5578
5579 if (arg1 == q_min && arg2 == q_min) {
5580 return q_max;
5581 }
5582 return (arg1 * arg2 + r_bit) >> (DF_BITS(df) - 1);
5583 }
5584
5585 #define MSA_BINOP_DF(func) \
5586 void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, \
5587 uint32_t wd, uint32_t ws, uint32_t wt) \
5588 { \
5589 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5590 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5591 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5592 \
5593 switch (df) { \
5594 case DF_BYTE: \
5595 pwd->b[0] = msa_ ## func ## _df(df, pws->b[0], pwt->b[0]); \
5596 pwd->b[1] = msa_ ## func ## _df(df, pws->b[1], pwt->b[1]); \
5597 pwd->b[2] = msa_ ## func ## _df(df, pws->b[2], pwt->b[2]); \
5598 pwd->b[3] = msa_ ## func ## _df(df, pws->b[3], pwt->b[3]); \
5599 pwd->b[4] = msa_ ## func ## _df(df, pws->b[4], pwt->b[4]); \
5600 pwd->b[5] = msa_ ## func ## _df(df, pws->b[5], pwt->b[5]); \
5601 pwd->b[6] = msa_ ## func ## _df(df, pws->b[6], pwt->b[6]); \
5602 pwd->b[7] = msa_ ## func ## _df(df, pws->b[7], pwt->b[7]); \
5603 pwd->b[8] = msa_ ## func ## _df(df, pws->b[8], pwt->b[8]); \
5604 pwd->b[9] = msa_ ## func ## _df(df, pws->b[9], pwt->b[9]); \
5605 pwd->b[10] = msa_ ## func ## _df(df, pws->b[10], pwt->b[10]); \
5606 pwd->b[11] = msa_ ## func ## _df(df, pws->b[11], pwt->b[11]); \
5607 pwd->b[12] = msa_ ## func ## _df(df, pws->b[12], pwt->b[12]); \
5608 pwd->b[13] = msa_ ## func ## _df(df, pws->b[13], pwt->b[13]); \
5609 pwd->b[14] = msa_ ## func ## _df(df, pws->b[14], pwt->b[14]); \
5610 pwd->b[15] = msa_ ## func ## _df(df, pws->b[15], pwt->b[15]); \
5611 break; \
5612 case DF_HALF: \
5613 pwd->h[0] = msa_ ## func ## _df(df, pws->h[0], pwt->h[0]); \
5614 pwd->h[1] = msa_ ## func ## _df(df, pws->h[1], pwt->h[1]); \
5615 pwd->h[2] = msa_ ## func ## _df(df, pws->h[2], pwt->h[2]); \
5616 pwd->h[3] = msa_ ## func ## _df(df, pws->h[3], pwt->h[3]); \
5617 pwd->h[4] = msa_ ## func ## _df(df, pws->h[4], pwt->h[4]); \
5618 pwd->h[5] = msa_ ## func ## _df(df, pws->h[5], pwt->h[5]); \
5619 pwd->h[6] = msa_ ## func ## _df(df, pws->h[6], pwt->h[6]); \
5620 pwd->h[7] = msa_ ## func ## _df(df, pws->h[7], pwt->h[7]); \
5621 break; \
5622 case DF_WORD: \
5623 pwd->w[0] = msa_ ## func ## _df(df, pws->w[0], pwt->w[0]); \
5624 pwd->w[1] = msa_ ## func ## _df(df, pws->w[1], pwt->w[1]); \
5625 pwd->w[2] = msa_ ## func ## _df(df, pws->w[2], pwt->w[2]); \
5626 pwd->w[3] = msa_ ## func ## _df(df, pws->w[3], pwt->w[3]); \
5627 break; \
5628 case DF_DOUBLE: \
5629 pwd->d[0] = msa_ ## func ## _df(df, pws->d[0], pwt->d[0]); \
5630 pwd->d[1] = msa_ ## func ## _df(df, pws->d[1], pwt->d[1]); \
5631 break; \
5632 default: \
5633 assert(0); \
5634 } \
5635 }
5636
5637 MSA_BINOP_DF(mul_q)
5638 MSA_BINOP_DF(mulr_q)
5639 #undef MSA_BINOP_DF
5640
5641 void helper_msa_sld_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5642 uint32_t ws, uint32_t rt)
5643 {
5644 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5645 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5646
5647 msa_sld_df(df, pwd, pws, env->active_tc.gpr[rt]);
5648 }
5649
5650 static inline int64_t msa_madd_q_df(uint32_t df, int64_t dest, int64_t arg1,
5651 int64_t arg2)
5652 {
5653 int64_t q_prod, q_ret;
5654
5655 int64_t q_max = DF_MAX_INT(df);
5656 int64_t q_min = DF_MIN_INT(df);
5657
5658 q_prod = arg1 * arg2;
5659 q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod) >> (DF_BITS(df) - 1);
5660
5661 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5662 }
5663
5664 static inline int64_t msa_msub_q_df(uint32_t df, int64_t dest, int64_t arg1,
5665 int64_t arg2)
5666 {
5667 int64_t q_prod, q_ret;
5668
5669 int64_t q_max = DF_MAX_INT(df);
5670 int64_t q_min = DF_MIN_INT(df);
5671
5672 q_prod = arg1 * arg2;
5673 q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod) >> (DF_BITS(df) - 1);
5674
5675 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5676 }
5677
5678 static inline int64_t msa_maddr_q_df(uint32_t df, int64_t dest, int64_t arg1,
5679 int64_t arg2)
5680 {
5681 int64_t q_prod, q_ret;
5682
5683 int64_t q_max = DF_MAX_INT(df);
5684 int64_t q_min = DF_MIN_INT(df);
5685 int64_t r_bit = 1 << (DF_BITS(df) - 2);
5686
5687 q_prod = arg1 * arg2;
5688 q_ret = ((dest << (DF_BITS(df) - 1)) + q_prod + r_bit) >> (DF_BITS(df) - 1);
5689
5690 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5691 }
5692
5693 static inline int64_t msa_msubr_q_df(uint32_t df, int64_t dest, int64_t arg1,
5694 int64_t arg2)
5695 {
5696 int64_t q_prod, q_ret;
5697
5698 int64_t q_max = DF_MAX_INT(df);
5699 int64_t q_min = DF_MIN_INT(df);
5700 int64_t r_bit = 1 << (DF_BITS(df) - 2);
5701
5702 q_prod = arg1 * arg2;
5703 q_ret = ((dest << (DF_BITS(df) - 1)) - q_prod + r_bit) >> (DF_BITS(df) - 1);
5704
5705 return (q_ret < q_min) ? q_min : (q_max < q_ret) ? q_max : q_ret;
5706 }
5707
5708 #define MSA_TEROP_DF(func) \
5709 void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5710 uint32_t ws, uint32_t wt) \
5711 { \
5712 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5713 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5714 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5715 \
5716 switch (df) { \
5717 case DF_BYTE: \
5718 pwd->b[0] = msa_ ## func ## _df(df, pwd->b[0], pws->b[0], \
5719 pwt->b[0]); \
5720 pwd->b[1] = msa_ ## func ## _df(df, pwd->b[1], pws->b[1], \
5721 pwt->b[1]); \
5722 pwd->b[2] = msa_ ## func ## _df(df, pwd->b[2], pws->b[2], \
5723 pwt->b[2]); \
5724 pwd->b[3] = msa_ ## func ## _df(df, pwd->b[3], pws->b[3], \
5725 pwt->b[3]); \
5726 pwd->b[4] = msa_ ## func ## _df(df, pwd->b[4], pws->b[4], \
5727 pwt->b[4]); \
5728 pwd->b[5] = msa_ ## func ## _df(df, pwd->b[5], pws->b[5], \
5729 pwt->b[5]); \
5730 pwd->b[6] = msa_ ## func ## _df(df, pwd->b[6], pws->b[6], \
5731 pwt->b[6]); \
5732 pwd->b[7] = msa_ ## func ## _df(df, pwd->b[7], pws->b[7], \
5733 pwt->b[7]); \
5734 pwd->b[8] = msa_ ## func ## _df(df, pwd->b[8], pws->b[8], \
5735 pwt->b[8]); \
5736 pwd->b[9] = msa_ ## func ## _df(df, pwd->b[9], pws->b[9], \
5737 pwt->b[9]); \
5738 pwd->b[10] = msa_ ## func ## _df(df, pwd->b[10], pws->b[10], \
5739 pwt->b[10]); \
5740 pwd->b[11] = msa_ ## func ## _df(df, pwd->b[11], pws->b[11], \
5741 pwt->b[11]); \
5742 pwd->b[12] = msa_ ## func ## _df(df, pwd->b[12], pws->b[12], \
5743 pwt->b[12]); \
5744 pwd->b[13] = msa_ ## func ## _df(df, pwd->b[13], pws->b[13], \
5745 pwt->b[13]); \
5746 pwd->b[14] = msa_ ## func ## _df(df, pwd->b[14], pws->b[14], \
5747 pwt->b[14]); \
5748 pwd->b[15] = msa_ ## func ## _df(df, pwd->b[15], pws->b[15], \
5749 pwt->b[15]); \
5750 break; \
5751 case DF_HALF: \
5752 pwd->h[0] = msa_ ## func ## _df(df, pwd->h[0], pws->h[0], pwt->h[0]); \
5753 pwd->h[1] = msa_ ## func ## _df(df, pwd->h[1], pws->h[1], pwt->h[1]); \
5754 pwd->h[2] = msa_ ## func ## _df(df, pwd->h[2], pws->h[2], pwt->h[2]); \
5755 pwd->h[3] = msa_ ## func ## _df(df, pwd->h[3], pws->h[3], pwt->h[3]); \
5756 pwd->h[4] = msa_ ## func ## _df(df, pwd->h[4], pws->h[4], pwt->h[4]); \
5757 pwd->h[5] = msa_ ## func ## _df(df, pwd->h[5], pws->h[5], pwt->h[5]); \
5758 pwd->h[6] = msa_ ## func ## _df(df, pwd->h[6], pws->h[6], pwt->h[6]); \
5759 pwd->h[7] = msa_ ## func ## _df(df, pwd->h[7], pws->h[7], pwt->h[7]); \
5760 break; \
5761 case DF_WORD: \
5762 pwd->w[0] = msa_ ## func ## _df(df, pwd->w[0], pws->w[0], pwt->w[0]); \
5763 pwd->w[1] = msa_ ## func ## _df(df, pwd->w[1], pws->w[1], pwt->w[1]); \
5764 pwd->w[2] = msa_ ## func ## _df(df, pwd->w[2], pws->w[2], pwt->w[2]); \
5765 pwd->w[3] = msa_ ## func ## _df(df, pwd->w[3], pws->w[3], pwt->w[3]); \
5766 break; \
5767 case DF_DOUBLE: \
5768 pwd->d[0] = msa_ ## func ## _df(df, pwd->d[0], pws->d[0], pwt->d[0]); \
5769 pwd->d[1] = msa_ ## func ## _df(df, pwd->d[1], pws->d[1], pwt->d[1]); \
5770 break; \
5771 default: \
5772 assert(0); \
5773 } \
5774 }
5775
5776 MSA_TEROP_DF(binsl)
5777 MSA_TEROP_DF(binsr)
5778 MSA_TEROP_DF(madd_q)
5779 MSA_TEROP_DF(msub_q)
5780 MSA_TEROP_DF(maddr_q)
5781 MSA_TEROP_DF(msubr_q)
5782 #undef MSA_TEROP_DF
5783
5784 static inline void msa_splat_df(uint32_t df, wr_t *pwd,
5785 wr_t *pws, target_ulong rt)
5786 {
5787 uint32_t n = rt % DF_ELEMENTS(df);
5788 uint32_t i;
5789
5790 switch (df) {
5791 case DF_BYTE:
5792 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
5793 pwd->b[i] = pws->b[n];
5794 }
5795 break;
5796 case DF_HALF:
5797 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
5798 pwd->h[i] = pws->h[n];
5799 }
5800 break;
5801 case DF_WORD:
5802 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
5803 pwd->w[i] = pws->w[n];
5804 }
5805 break;
5806 case DF_DOUBLE:
5807 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
5808 pwd->d[i] = pws->d[n];
5809 }
5810 break;
5811 default:
5812 assert(0);
5813 }
5814 }
5815
5816 void helper_msa_splat_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5817 uint32_t ws, uint32_t rt)
5818 {
5819 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5820 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5821
5822 msa_splat_df(df, pwd, pws, env->active_tc.gpr[rt]);
5823 }
5824
5825 #define MSA_DO_B MSA_DO(b)
5826 #define MSA_DO_H MSA_DO(h)
5827 #define MSA_DO_W MSA_DO(w)
5828 #define MSA_DO_D MSA_DO(d)
5829
5830 #define MSA_LOOP_B MSA_LOOP(B)
5831 #define MSA_LOOP_H MSA_LOOP(H)
5832 #define MSA_LOOP_W MSA_LOOP(W)
5833 #define MSA_LOOP_D MSA_LOOP(D)
5834
5835 #define MSA_LOOP_COND_B MSA_LOOP_COND(DF_BYTE)
5836 #define MSA_LOOP_COND_H MSA_LOOP_COND(DF_HALF)
5837 #define MSA_LOOP_COND_W MSA_LOOP_COND(DF_WORD)
5838 #define MSA_LOOP_COND_D MSA_LOOP_COND(DF_DOUBLE)
5839
5840 #define MSA_LOOP(DF) \
5841 do { \
5842 for (i = 0; i < (MSA_LOOP_COND_ ## DF) ; i++) { \
5843 MSA_DO_ ## DF; \
5844 } \
5845 } while (0)
5846
5847 #define MSA_FN_DF(FUNC) \
5848 void helper_msa_##FUNC(CPUMIPSState *env, uint32_t df, uint32_t wd, \
5849 uint32_t ws, uint32_t wt) \
5850 { \
5851 wr_t *pwd = &(env->active_fpu.fpr[wd].wr); \
5852 wr_t *pws = &(env->active_fpu.fpr[ws].wr); \
5853 wr_t *pwt = &(env->active_fpu.fpr[wt].wr); \
5854 wr_t wx, *pwx = &wx; \
5855 uint32_t i; \
5856 switch (df) { \
5857 case DF_BYTE: \
5858 MSA_LOOP_B; \
5859 break; \
5860 case DF_HALF: \
5861 MSA_LOOP_H; \
5862 break; \
5863 case DF_WORD: \
5864 MSA_LOOP_W; \
5865 break; \
5866 case DF_DOUBLE: \
5867 MSA_LOOP_D; \
5868 break; \
5869 default: \
5870 assert(0); \
5871 } \
5872 msa_move_v(pwd, pwx); \
5873 }
5874
5875 #define MSA_LOOP_COND(DF) \
5876 (DF_ELEMENTS(DF) / 2)
5877
5878 #define Rb(pwr, i) (pwr->b[i])
5879 #define Lb(pwr, i) (pwr->b[i + DF_ELEMENTS(DF_BYTE) / 2])
5880 #define Rh(pwr, i) (pwr->h[i])
5881 #define Lh(pwr, i) (pwr->h[i + DF_ELEMENTS(DF_HALF) / 2])
5882 #define Rw(pwr, i) (pwr->w[i])
5883 #define Lw(pwr, i) (pwr->w[i + DF_ELEMENTS(DF_WORD) / 2])
5884 #define Rd(pwr, i) (pwr->d[i])
5885 #define Ld(pwr, i) (pwr->d[i + DF_ELEMENTS(DF_DOUBLE) / 2])
5886
5887 #undef MSA_LOOP_COND
5888
5889 #define MSA_LOOP_COND(DF) \
5890 (DF_ELEMENTS(DF))
5891
5892 #define MSA_DO(DF) \
5893 do { \
5894 uint32_t n = DF_ELEMENTS(df); \
5895 uint32_t k = (pwd->DF[i] & 0x3f) % (2 * n); \
5896 pwx->DF[i] = \
5897 (pwd->DF[i] & 0xc0) ? 0 : k < n ? pwt->DF[k] : pws->DF[k - n]; \
5898 } while (0)
5899 MSA_FN_DF(vshf_df)
5900 #undef MSA_DO
5901 #undef MSA_LOOP_COND
5902 #undef MSA_FN_DF
5903
5904
5905 void helper_msa_sldi_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5906 uint32_t ws, uint32_t n)
5907 {
5908 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5909 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5910
5911 msa_sld_df(df, pwd, pws, n);
5912 }
5913
5914 void helper_msa_splati_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
5915 uint32_t ws, uint32_t n)
5916 {
5917 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
5918 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
5919
5920 msa_splat_df(df, pwd, pws, n);
5921 }
5922
5923 void helper_msa_copy_s_b(CPUMIPSState *env, uint32_t rd,
5924 uint32_t ws, uint32_t n)
5925 {
5926 n %= 16;
5927 #if defined(HOST_WORDS_BIGENDIAN)
5928 if (n < 8) {
5929 n = 8 - n - 1;
5930 } else {
5931 n = 24 - n - 1;
5932 }
5933 #endif
5934 env->active_tc.gpr[rd] = (int8_t)env->active_fpu.fpr[ws].wr.b[n];
5935 }
5936
5937 void helper_msa_copy_s_h(CPUMIPSState *env, uint32_t rd,
5938 uint32_t ws, uint32_t n)
5939 {
5940 n %= 8;
5941 #if defined(HOST_WORDS_BIGENDIAN)
5942 if (n < 4) {
5943 n = 4 - n - 1;
5944 } else {
5945 n = 12 - n - 1;
5946 }
5947 #endif
5948 env->active_tc.gpr[rd] = (int16_t)env->active_fpu.fpr[ws].wr.h[n];
5949 }
5950
5951 void helper_msa_copy_s_w(CPUMIPSState *env, uint32_t rd,
5952 uint32_t ws, uint32_t n)
5953 {
5954 n %= 4;
5955 #if defined(HOST_WORDS_BIGENDIAN)
5956 if (n < 2) {
5957 n = 2 - n - 1;
5958 } else {
5959 n = 6 - n - 1;
5960 }
5961 #endif
5962 env->active_tc.gpr[rd] = (int32_t)env->active_fpu.fpr[ws].wr.w[n];
5963 }
5964
5965 void helper_msa_copy_s_d(CPUMIPSState *env, uint32_t rd,
5966 uint32_t ws, uint32_t n)
5967 {
5968 n %= 2;
5969 env->active_tc.gpr[rd] = (int64_t)env->active_fpu.fpr[ws].wr.d[n];
5970 }
5971
5972 void helper_msa_copy_u_b(CPUMIPSState *env, uint32_t rd,
5973 uint32_t ws, uint32_t n)
5974 {
5975 n %= 16;
5976 #if defined(HOST_WORDS_BIGENDIAN)
5977 if (n < 8) {
5978 n = 8 - n - 1;
5979 } else {
5980 n = 24 - n - 1;
5981 }
5982 #endif
5983 env->active_tc.gpr[rd] = (uint8_t)env->active_fpu.fpr[ws].wr.b[n];
5984 }
5985
5986 void helper_msa_copy_u_h(CPUMIPSState *env, uint32_t rd,
5987 uint32_t ws, uint32_t n)
5988 {
5989 n %= 8;
5990 #if defined(HOST_WORDS_BIGENDIAN)
5991 if (n < 4) {
5992 n = 4 - n - 1;
5993 } else {
5994 n = 12 - n - 1;
5995 }
5996 #endif
5997 env->active_tc.gpr[rd] = (uint16_t)env->active_fpu.fpr[ws].wr.h[n];
5998 }
5999
6000 void helper_msa_copy_u_w(CPUMIPSState *env, uint32_t rd,
6001 uint32_t ws, uint32_t n)
6002 {
6003 n %= 4;
6004 #if defined(HOST_WORDS_BIGENDIAN)
6005 if (n < 2) {
6006 n = 2 - n - 1;
6007 } else {
6008 n = 6 - n - 1;
6009 }
6010 #endif
6011 env->active_tc.gpr[rd] = (uint32_t)env->active_fpu.fpr[ws].wr.w[n];
6012 }
6013
6014 void helper_msa_insert_b(CPUMIPSState *env, uint32_t wd,
6015 uint32_t rs_num, uint32_t n)
6016 {
6017 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6018 target_ulong rs = env->active_tc.gpr[rs_num];
6019 n %= 16;
6020 #if defined(HOST_WORDS_BIGENDIAN)
6021 if (n < 8) {
6022 n = 8 - n - 1;
6023 } else {
6024 n = 24 - n - 1;
6025 }
6026 #endif
6027 pwd->b[n] = (int8_t)rs;
6028 }
6029
6030 void helper_msa_insert_h(CPUMIPSState *env, uint32_t wd,
6031 uint32_t rs_num, uint32_t n)
6032 {
6033 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6034 target_ulong rs = env->active_tc.gpr[rs_num];
6035 n %= 8;
6036 #if defined(HOST_WORDS_BIGENDIAN)
6037 if (n < 4) {
6038 n = 4 - n - 1;
6039 } else {
6040 n = 12 - n - 1;
6041 }
6042 #endif
6043 pwd->h[n] = (int16_t)rs;
6044 }
6045
6046 void helper_msa_insert_w(CPUMIPSState *env, uint32_t wd,
6047 uint32_t rs_num, uint32_t n)
6048 {
6049 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6050 target_ulong rs = env->active_tc.gpr[rs_num];
6051 n %= 4;
6052 #if defined(HOST_WORDS_BIGENDIAN)
6053 if (n < 2) {
6054 n = 2 - n - 1;
6055 } else {
6056 n = 6 - n - 1;
6057 }
6058 #endif
6059 pwd->w[n] = (int32_t)rs;
6060 }
6061
6062 void helper_msa_insert_d(CPUMIPSState *env, uint32_t wd,
6063 uint32_t rs_num, uint32_t n)
6064 {
6065 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6066 target_ulong rs = env->active_tc.gpr[rs_num];
6067 n %= 2;
6068 pwd->d[n] = (int64_t)rs;
6069 }
6070
6071 void helper_msa_insve_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6072 uint32_t ws, uint32_t n)
6073 {
6074 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6075 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6076
6077 switch (df) {
6078 case DF_BYTE:
6079 pwd->b[n] = (int8_t)pws->b[0];
6080 break;
6081 case DF_HALF:
6082 pwd->h[n] = (int16_t)pws->h[0];
6083 break;
6084 case DF_WORD:
6085 pwd->w[n] = (int32_t)pws->w[0];
6086 break;
6087 case DF_DOUBLE:
6088 pwd->d[n] = (int64_t)pws->d[0];
6089 break;
6090 default:
6091 assert(0);
6092 }
6093 }
6094
6095 void helper_msa_ctcmsa(CPUMIPSState *env, target_ulong elm, uint32_t cd)
6096 {
6097 switch (cd) {
6098 case 0:
6099 break;
6100 case 1:
6101 env->active_tc.msacsr = (int32_t)elm & MSACSR_MASK;
6102 restore_msa_fp_status(env);
6103 /* check exception */
6104 if ((GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)
6105 & GET_FP_CAUSE(env->active_tc.msacsr)) {
6106 do_raise_exception(env, EXCP_MSAFPE, GETPC());
6107 }
6108 break;
6109 }
6110 }
6111
6112 target_ulong helper_msa_cfcmsa(CPUMIPSState *env, uint32_t cs)
6113 {
6114 switch (cs) {
6115 case 0:
6116 return env->msair;
6117 case 1:
6118 return env->active_tc.msacsr & MSACSR_MASK;
6119 }
6120 return 0;
6121 }
6122
6123 void helper_msa_fill_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6124 uint32_t rs)
6125 {
6126 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6127 uint32_t i;
6128
6129 switch (df) {
6130 case DF_BYTE:
6131 for (i = 0; i < DF_ELEMENTS(DF_BYTE); i++) {
6132 pwd->b[i] = (int8_t)env->active_tc.gpr[rs];
6133 }
6134 break;
6135 case DF_HALF:
6136 for (i = 0; i < DF_ELEMENTS(DF_HALF); i++) {
6137 pwd->h[i] = (int16_t)env->active_tc.gpr[rs];
6138 }
6139 break;
6140 case DF_WORD:
6141 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6142 pwd->w[i] = (int32_t)env->active_tc.gpr[rs];
6143 }
6144 break;
6145 case DF_DOUBLE:
6146 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6147 pwd->d[i] = (int64_t)env->active_tc.gpr[rs];
6148 }
6149 break;
6150 default:
6151 assert(0);
6152 }
6153 }
6154
6155
6156 #define FLOAT_ONE32 make_float32(0x3f8 << 20)
6157 #define FLOAT_ONE64 make_float64(0x3ffULL << 52)
6158
6159 #define FLOAT_SNAN16(s) (float16_default_nan(s) ^ 0x0220)
6160 /* 0x7c20 */
6161 #define FLOAT_SNAN32(s) (float32_default_nan(s) ^ 0x00400020)
6162 /* 0x7f800020 */
6163 #define FLOAT_SNAN64(s) (float64_default_nan(s) ^ 0x0008000000000020ULL)
6164 /* 0x7ff0000000000020 */
6165
6166 static inline void clear_msacsr_cause(CPUMIPSState *env)
6167 {
6168 SET_FP_CAUSE(env->active_tc.msacsr, 0);
6169 }
6170
6171 static inline void check_msacsr_cause(CPUMIPSState *env, uintptr_t retaddr)
6172 {
6173 if ((GET_FP_CAUSE(env->active_tc.msacsr) &
6174 (GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED)) == 0) {
6175 UPDATE_FP_FLAGS(env->active_tc.msacsr,
6176 GET_FP_CAUSE(env->active_tc.msacsr));
6177 } else {
6178 do_raise_exception(env, EXCP_MSAFPE, retaddr);
6179 }
6180 }
6181
6182 /* Flush-to-zero use cases for update_msacsr() */
6183 #define CLEAR_FS_UNDERFLOW 1
6184 #define CLEAR_IS_INEXACT 2
6185 #define RECIPROCAL_INEXACT 4
6186
6187
6188 static inline int ieee_to_mips_xcpt_msa(int ieee_xcpt)
6189 {
6190 int mips_xcpt = 0;
6191
6192 if (ieee_xcpt & float_flag_invalid) {
6193 mips_xcpt |= FP_INVALID;
6194 }
6195 if (ieee_xcpt & float_flag_overflow) {
6196 mips_xcpt |= FP_OVERFLOW;
6197 }
6198 if (ieee_xcpt & float_flag_underflow) {
6199 mips_xcpt |= FP_UNDERFLOW;
6200 }
6201 if (ieee_xcpt & float_flag_divbyzero) {
6202 mips_xcpt |= FP_DIV0;
6203 }
6204 if (ieee_xcpt & float_flag_inexact) {
6205 mips_xcpt |= FP_INEXACT;
6206 }
6207
6208 return mips_xcpt;
6209 }
6210
6211 static inline int update_msacsr(CPUMIPSState *env, int action, int denormal)
6212 {
6213 int ieee_exception_flags;
6214 int mips_exception_flags = 0;
6215 int cause;
6216 int enable;
6217
6218 ieee_exception_flags = get_float_exception_flags(
6219 &env->active_tc.msa_fp_status);
6220
6221 /* QEMU softfloat does not signal all underflow cases */
6222 if (denormal) {
6223 ieee_exception_flags |= float_flag_underflow;
6224 }
6225 if (ieee_exception_flags) {
6226 mips_exception_flags = ieee_to_mips_xcpt_msa(ieee_exception_flags);
6227 }
6228 enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
6229
6230 /* Set Inexact (I) when flushing inputs to zero */
6231 if ((ieee_exception_flags & float_flag_input_denormal) &&
6232 (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
6233 if (action & CLEAR_IS_INEXACT) {
6234 mips_exception_flags &= ~FP_INEXACT;
6235 } else {
6236 mips_exception_flags |= FP_INEXACT;
6237 }
6238 }
6239
6240 /* Set Inexact (I) and Underflow (U) when flushing outputs to zero */
6241 if ((ieee_exception_flags & float_flag_output_denormal) &&
6242 (env->active_tc.msacsr & MSACSR_FS_MASK) != 0) {
6243 mips_exception_flags |= FP_INEXACT;
6244 if (action & CLEAR_FS_UNDERFLOW) {
6245 mips_exception_flags &= ~FP_UNDERFLOW;
6246 } else {
6247 mips_exception_flags |= FP_UNDERFLOW;
6248 }
6249 }
6250
6251 /* Set Inexact (I) when Overflow (O) is not enabled */
6252 if ((mips_exception_flags & FP_OVERFLOW) != 0 &&
6253 (enable & FP_OVERFLOW) == 0) {
6254 mips_exception_flags |= FP_INEXACT;
6255 }
6256
6257 /* Clear Exact Underflow when Underflow (U) is not enabled */
6258 if ((mips_exception_flags & FP_UNDERFLOW) != 0 &&
6259 (enable & FP_UNDERFLOW) == 0 &&
6260 (mips_exception_flags & FP_INEXACT) == 0) {
6261 mips_exception_flags &= ~FP_UNDERFLOW;
6262 }
6263
6264 /*
6265 * Reciprocal operations set only Inexact when valid and not
6266 * divide by zero
6267 */
6268 if ((action & RECIPROCAL_INEXACT) &&
6269 (mips_exception_flags & (FP_INVALID | FP_DIV0)) == 0) {
6270 mips_exception_flags = FP_INEXACT;
6271 }
6272
6273 cause = mips_exception_flags & enable; /* all current enabled exceptions */
6274
6275 if (cause == 0) {
6276 /*
6277 * No enabled exception, update the MSACSR Cause
6278 * with all current exceptions
6279 */
6280 SET_FP_CAUSE(env->active_tc.msacsr,
6281 (GET_FP_CAUSE(env->active_tc.msacsr) | mips_exception_flags));
6282 } else {
6283 /* Current exceptions are enabled */
6284 if ((env->active_tc.msacsr & MSACSR_NX_MASK) == 0) {
6285 /*
6286 * Exception(s) will trap, update MSACSR Cause
6287 * with all enabled exceptions
6288 */
6289 SET_FP_CAUSE(env->active_tc.msacsr,
6290 (GET_FP_CAUSE(env->active_tc.msacsr) | mips_exception_flags));
6291 }
6292 }
6293
6294 return mips_exception_flags;
6295 }
6296
6297 static inline int get_enabled_exceptions(const CPUMIPSState *env, int c)
6298 {
6299 int enable = GET_FP_ENABLE(env->active_tc.msacsr) | FP_UNIMPLEMENTED;
6300 return c & enable;
6301 }
6302
6303 static inline float16 float16_from_float32(int32_t a, bool ieee,
6304 float_status *status)
6305 {
6306 float16 f_val;
6307
6308 f_val = float32_to_float16((float32)a, ieee, status);
6309
6310 return a < 0 ? (f_val | (1 << 15)) : f_val;
6311 }
6312
6313 static inline float32 float32_from_float64(int64_t a, float_status *status)
6314 {
6315 float32 f_val;
6316
6317 f_val = float64_to_float32((float64)a, status);
6318
6319 return a < 0 ? (f_val | (1 << 31)) : f_val;
6320 }
6321
6322 static inline float32 float32_from_float16(int16_t a, bool ieee,
6323 float_status *status)
6324 {
6325 float32 f_val;
6326
6327 f_val = float16_to_float32((float16)a, ieee, status);
6328
6329 return a < 0 ? (f_val | (1 << 31)) : f_val;
6330 }
6331
6332 static inline float64 float64_from_float32(int32_t a, float_status *status)
6333 {
6334 float64 f_val;
6335
6336 f_val = float32_to_float64((float64)a, status);
6337
6338 return a < 0 ? (f_val | (1ULL << 63)) : f_val;
6339 }
6340
6341 static inline float32 float32_from_q16(int16_t a, float_status *status)
6342 {
6343 float32 f_val;
6344
6345 /* conversion as integer and scaling */
6346 f_val = int32_to_float32(a, status);
6347 f_val = float32_scalbn(f_val, -15, status);
6348
6349 return f_val;
6350 }
6351
6352 static inline float64 float64_from_q32(int32_t a, float_status *status)
6353 {
6354 float64 f_val;
6355
6356 /* conversion as integer and scaling */
6357 f_val = int32_to_float64(a, status);
6358 f_val = float64_scalbn(f_val, -31, status);
6359
6360 return f_val;
6361 }
6362
6363 static inline int16_t float32_to_q16(float32 a, float_status *status)
6364 {
6365 int32_t q_val;
6366 int32_t q_min = 0xffff8000;
6367 int32_t q_max = 0x00007fff;
6368
6369 int ieee_ex;
6370
6371 if (float32_is_any_nan(a)) {
6372 float_raise(float_flag_invalid, status);
6373 return 0;
6374 }
6375
6376 /* scaling */
6377 a = float32_scalbn(a, 15, status);
6378
6379 ieee_ex = get_float_exception_flags(status);
6380 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6381 , status);
6382
6383 if (ieee_ex & float_flag_overflow) {
6384 float_raise(float_flag_inexact, status);
6385 return (int32_t)a < 0 ? q_min : q_max;
6386 }
6387
6388 /* conversion to int */
6389 q_val = float32_to_int32(a, status);
6390
6391 ieee_ex = get_float_exception_flags(status);
6392 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6393 , status);
6394
6395 if (ieee_ex & float_flag_invalid) {
6396 set_float_exception_flags(ieee_ex & (~float_flag_invalid)
6397 , status);
6398 float_raise(float_flag_overflow | float_flag_inexact, status);
6399 return (int32_t)a < 0 ? q_min : q_max;
6400 }
6401
6402 if (q_val < q_min) {
6403 float_raise(float_flag_overflow | float_flag_inexact, status);
6404 return (int16_t)q_min;
6405 }
6406
6407 if (q_max < q_val) {
6408 float_raise(float_flag_overflow | float_flag_inexact, status);
6409 return (int16_t)q_max;
6410 }
6411
6412 return (int16_t)q_val;
6413 }
6414
6415 static inline int32_t float64_to_q32(float64 a, float_status *status)
6416 {
6417 int64_t q_val;
6418 int64_t q_min = 0xffffffff80000000LL;
6419 int64_t q_max = 0x000000007fffffffLL;
6420
6421 int ieee_ex;
6422
6423 if (float64_is_any_nan(a)) {
6424 float_raise(float_flag_invalid, status);
6425 return 0;
6426 }
6427
6428 /* scaling */
6429 a = float64_scalbn(a, 31, status);
6430
6431 ieee_ex = get_float_exception_flags(status);
6432 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6433 , status);
6434
6435 if (ieee_ex & float_flag_overflow) {
6436 float_raise(float_flag_inexact, status);
6437 return (int64_t)a < 0 ? q_min : q_max;
6438 }
6439
6440 /* conversion to integer */
6441 q_val = float64_to_int64(a, status);
6442
6443 ieee_ex = get_float_exception_flags(status);
6444 set_float_exception_flags(ieee_ex & (~float_flag_underflow)
6445 , status);
6446
6447 if (ieee_ex & float_flag_invalid) {
6448 set_float_exception_flags(ieee_ex & (~float_flag_invalid)
6449 , status);
6450 float_raise(float_flag_overflow | float_flag_inexact, status);
6451 return (int64_t)a < 0 ? q_min : q_max;
6452 }
6453
6454 if (q_val < q_min) {
6455 float_raise(float_flag_overflow | float_flag_inexact, status);
6456 return (int32_t)q_min;
6457 }
6458
6459 if (q_max < q_val) {
6460 float_raise(float_flag_overflow | float_flag_inexact, status);
6461 return (int32_t)q_max;
6462 }
6463
6464 return (int32_t)q_val;
6465 }
6466
6467 #define MSA_FLOAT_COND(DEST, OP, ARG1, ARG2, BITS, QUIET) \
6468 do { \
6469 float_status *status = &env->active_tc.msa_fp_status; \
6470 int c; \
6471 int64_t cond; \
6472 set_float_exception_flags(0, status); \
6473 if (!QUIET) { \
6474 cond = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
6475 } else { \
6476 cond = float ## BITS ## _ ## OP ## _quiet(ARG1, ARG2, status); \
6477 } \
6478 DEST = cond ? M_MAX_UINT(BITS) : 0; \
6479 c = update_msacsr(env, CLEAR_IS_INEXACT, 0); \
6480 \
6481 if (get_enabled_exceptions(env, c)) { \
6482 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
6483 } \
6484 } while (0)
6485
6486 #define MSA_FLOAT_AF(DEST, ARG1, ARG2, BITS, QUIET) \
6487 do { \
6488 MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET); \
6489 if ((DEST & M_MAX_UINT(BITS)) == M_MAX_UINT(BITS)) { \
6490 DEST = 0; \
6491 } \
6492 } while (0)
6493
6494 #define MSA_FLOAT_UEQ(DEST, ARG1, ARG2, BITS, QUIET) \
6495 do { \
6496 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6497 if (DEST == 0) { \
6498 MSA_FLOAT_COND(DEST, eq, ARG1, ARG2, BITS, QUIET); \
6499 } \
6500 } while (0)
6501
6502 #define MSA_FLOAT_NE(DEST, ARG1, ARG2, BITS, QUIET) \
6503 do { \
6504 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
6505 if (DEST == 0) { \
6506 MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET); \
6507 } \
6508 } while (0)
6509
6510 #define MSA_FLOAT_UNE(DEST, ARG1, ARG2, BITS, QUIET) \
6511 do { \
6512 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6513 if (DEST == 0) { \
6514 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
6515 if (DEST == 0) { \
6516 MSA_FLOAT_COND(DEST, lt, ARG2, ARG1, BITS, QUIET); \
6517 } \
6518 } \
6519 } while (0)
6520
6521 #define MSA_FLOAT_ULE(DEST, ARG1, ARG2, BITS, QUIET) \
6522 do { \
6523 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6524 if (DEST == 0) { \
6525 MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET); \
6526 } \
6527 } while (0)
6528
6529 #define MSA_FLOAT_ULT(DEST, ARG1, ARG2, BITS, QUIET) \
6530 do { \
6531 MSA_FLOAT_COND(DEST, unordered, ARG1, ARG2, BITS, QUIET); \
6532 if (DEST == 0) { \
6533 MSA_FLOAT_COND(DEST, lt, ARG1, ARG2, BITS, QUIET); \
6534 } \
6535 } while (0)
6536
6537 #define MSA_FLOAT_OR(DEST, ARG1, ARG2, BITS, QUIET) \
6538 do { \
6539 MSA_FLOAT_COND(DEST, le, ARG1, ARG2, BITS, QUIET); \
6540 if (DEST == 0) { \
6541 MSA_FLOAT_COND(DEST, le, ARG2, ARG1, BITS, QUIET); \
6542 } \
6543 } while (0)
6544
6545 static inline void compare_af(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6546 wr_t *pwt, uint32_t df, int quiet,
6547 uintptr_t retaddr)
6548 {
6549 wr_t wx, *pwx = &wx;
6550 uint32_t i;
6551
6552 clear_msacsr_cause(env);
6553
6554 switch (df) {
6555 case DF_WORD:
6556 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6557 MSA_FLOAT_AF(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6558 }
6559 break;
6560 case DF_DOUBLE:
6561 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6562 MSA_FLOAT_AF(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6563 }
6564 break;
6565 default:
6566 assert(0);
6567 }
6568
6569 check_msacsr_cause(env, retaddr);
6570
6571 msa_move_v(pwd, pwx);
6572 }
6573
6574 static inline void compare_un(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6575 wr_t *pwt, uint32_t df, int quiet,
6576 uintptr_t retaddr)
6577 {
6578 wr_t wx, *pwx = &wx;
6579 uint32_t i;
6580
6581 clear_msacsr_cause(env);
6582
6583 switch (df) {
6584 case DF_WORD:
6585 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6586 MSA_FLOAT_COND(pwx->w[i], unordered, pws->w[i], pwt->w[i], 32,
6587 quiet);
6588 }
6589 break;
6590 case DF_DOUBLE:
6591 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6592 MSA_FLOAT_COND(pwx->d[i], unordered, pws->d[i], pwt->d[i], 64,
6593 quiet);
6594 }
6595 break;
6596 default:
6597 assert(0);
6598 }
6599
6600 check_msacsr_cause(env, retaddr);
6601
6602 msa_move_v(pwd, pwx);
6603 }
6604
6605 static inline void compare_eq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6606 wr_t *pwt, uint32_t df, int quiet,
6607 uintptr_t retaddr)
6608 {
6609 wr_t wx, *pwx = &wx;
6610 uint32_t i;
6611
6612 clear_msacsr_cause(env);
6613
6614 switch (df) {
6615 case DF_WORD:
6616 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6617 MSA_FLOAT_COND(pwx->w[i], eq, pws->w[i], pwt->w[i], 32, quiet);
6618 }
6619 break;
6620 case DF_DOUBLE:
6621 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6622 MSA_FLOAT_COND(pwx->d[i], eq, pws->d[i], pwt->d[i], 64, quiet);
6623 }
6624 break;
6625 default:
6626 assert(0);
6627 }
6628
6629 check_msacsr_cause(env, retaddr);
6630
6631 msa_move_v(pwd, pwx);
6632 }
6633
6634 static inline void compare_ueq(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6635 wr_t *pwt, uint32_t df, int quiet,
6636 uintptr_t retaddr)
6637 {
6638 wr_t wx, *pwx = &wx;
6639 uint32_t i;
6640
6641 clear_msacsr_cause(env);
6642
6643 switch (df) {
6644 case DF_WORD:
6645 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6646 MSA_FLOAT_UEQ(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6647 }
6648 break;
6649 case DF_DOUBLE:
6650 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6651 MSA_FLOAT_UEQ(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6652 }
6653 break;
6654 default:
6655 assert(0);
6656 }
6657
6658 check_msacsr_cause(env, retaddr);
6659
6660 msa_move_v(pwd, pwx);
6661 }
6662
6663 static inline void compare_lt(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6664 wr_t *pwt, uint32_t df, int quiet,
6665 uintptr_t retaddr)
6666 {
6667 wr_t wx, *pwx = &wx;
6668 uint32_t i;
6669
6670 clear_msacsr_cause(env);
6671
6672 switch (df) {
6673 case DF_WORD:
6674 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6675 MSA_FLOAT_COND(pwx->w[i], lt, pws->w[i], pwt->w[i], 32, quiet);
6676 }
6677 break;
6678 case DF_DOUBLE:
6679 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6680 MSA_FLOAT_COND(pwx->d[i], lt, pws->d[i], pwt->d[i], 64, quiet);
6681 }
6682 break;
6683 default:
6684 assert(0);
6685 }
6686
6687 check_msacsr_cause(env, retaddr);
6688
6689 msa_move_v(pwd, pwx);
6690 }
6691
6692 static inline void compare_ult(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6693 wr_t *pwt, uint32_t df, int quiet,
6694 uintptr_t retaddr)
6695 {
6696 wr_t wx, *pwx = &wx;
6697 uint32_t i;
6698
6699 clear_msacsr_cause(env);
6700
6701 switch (df) {
6702 case DF_WORD:
6703 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6704 MSA_FLOAT_ULT(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6705 }
6706 break;
6707 case DF_DOUBLE:
6708 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6709 MSA_FLOAT_ULT(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6710 }
6711 break;
6712 default:
6713 assert(0);
6714 }
6715
6716 check_msacsr_cause(env, retaddr);
6717
6718 msa_move_v(pwd, pwx);
6719 }
6720
6721 static inline void compare_le(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6722 wr_t *pwt, uint32_t df, int quiet,
6723 uintptr_t retaddr)
6724 {
6725 wr_t wx, *pwx = &wx;
6726 uint32_t i;
6727
6728 clear_msacsr_cause(env);
6729
6730 switch (df) {
6731 case DF_WORD:
6732 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6733 MSA_FLOAT_COND(pwx->w[i], le, pws->w[i], pwt->w[i], 32, quiet);
6734 }
6735 break;
6736 case DF_DOUBLE:
6737 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6738 MSA_FLOAT_COND(pwx->d[i], le, pws->d[i], pwt->d[i], 64, quiet);
6739 }
6740 break;
6741 default:
6742 assert(0);
6743 }
6744
6745 check_msacsr_cause(env, retaddr);
6746
6747 msa_move_v(pwd, pwx);
6748 }
6749
6750 static inline void compare_ule(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6751 wr_t *pwt, uint32_t df, int quiet,
6752 uintptr_t retaddr)
6753 {
6754 wr_t wx, *pwx = &wx;
6755 uint32_t i;
6756
6757 clear_msacsr_cause(env);
6758
6759 switch (df) {
6760 case DF_WORD:
6761 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6762 MSA_FLOAT_ULE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6763 }
6764 break;
6765 case DF_DOUBLE:
6766 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6767 MSA_FLOAT_ULE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6768 }
6769 break;
6770 default:
6771 assert(0);
6772 }
6773
6774 check_msacsr_cause(env, retaddr);
6775
6776 msa_move_v(pwd, pwx);
6777 }
6778
6779 static inline void compare_or(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6780 wr_t *pwt, uint32_t df, int quiet,
6781 uintptr_t retaddr)
6782 {
6783 wr_t wx, *pwx = &wx;
6784 uint32_t i;
6785
6786 clear_msacsr_cause(env);
6787
6788 switch (df) {
6789 case DF_WORD:
6790 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6791 MSA_FLOAT_OR(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6792 }
6793 break;
6794 case DF_DOUBLE:
6795 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6796 MSA_FLOAT_OR(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6797 }
6798 break;
6799 default:
6800 assert(0);
6801 }
6802
6803 check_msacsr_cause(env, retaddr);
6804
6805 msa_move_v(pwd, pwx);
6806 }
6807
6808 static inline void compare_une(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6809 wr_t *pwt, uint32_t df, int quiet,
6810 uintptr_t retaddr)
6811 {
6812 wr_t wx, *pwx = &wx;
6813 uint32_t i;
6814
6815 clear_msacsr_cause(env);
6816
6817 switch (df) {
6818 case DF_WORD:
6819 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6820 MSA_FLOAT_UNE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6821 }
6822 break;
6823 case DF_DOUBLE:
6824 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6825 MSA_FLOAT_UNE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6826 }
6827 break;
6828 default:
6829 assert(0);
6830 }
6831
6832 check_msacsr_cause(env, retaddr);
6833
6834 msa_move_v(pwd, pwx);
6835 }
6836
6837 static inline void compare_ne(CPUMIPSState *env, wr_t *pwd, wr_t *pws,
6838 wr_t *pwt, uint32_t df, int quiet,
6839 uintptr_t retaddr)
6840 {
6841 wr_t wx, *pwx = &wx;
6842 uint32_t i;
6843
6844 clear_msacsr_cause(env);
6845
6846 switch (df) {
6847 case DF_WORD:
6848 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
6849 MSA_FLOAT_NE(pwx->w[i], pws->w[i], pwt->w[i], 32, quiet);
6850 }
6851 break;
6852 case DF_DOUBLE:
6853 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
6854 MSA_FLOAT_NE(pwx->d[i], pws->d[i], pwt->d[i], 64, quiet);
6855 }
6856 break;
6857 default:
6858 assert(0);
6859 }
6860
6861 check_msacsr_cause(env, retaddr);
6862
6863 msa_move_v(pwd, pwx);
6864 }
6865
6866 void helper_msa_fcaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6867 uint32_t ws, uint32_t wt)
6868 {
6869 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6870 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6871 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6872 compare_af(env, pwd, pws, pwt, df, 1, GETPC());
6873 }
6874
6875 void helper_msa_fcun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6876 uint32_t ws, uint32_t wt)
6877 {
6878 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6879 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6880 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6881 compare_un(env, pwd, pws, pwt, df, 1, GETPC());
6882 }
6883
6884 void helper_msa_fceq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6885 uint32_t ws, uint32_t wt)
6886 {
6887 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6888 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6889 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6890 compare_eq(env, pwd, pws, pwt, df, 1, GETPC());
6891 }
6892
6893 void helper_msa_fcueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6894 uint32_t ws, uint32_t wt)
6895 {
6896 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6897 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6898 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6899 compare_ueq(env, pwd, pws, pwt, df, 1, GETPC());
6900 }
6901
6902 void helper_msa_fclt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6903 uint32_t ws, uint32_t wt)
6904 {
6905 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6906 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6907 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6908 compare_lt(env, pwd, pws, pwt, df, 1, GETPC());
6909 }
6910
6911 void helper_msa_fcult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6912 uint32_t ws, uint32_t wt)
6913 {
6914 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6915 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6916 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6917 compare_ult(env, pwd, pws, pwt, df, 1, GETPC());
6918 }
6919
6920 void helper_msa_fcle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6921 uint32_t ws, uint32_t wt)
6922 {
6923 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6924 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6925 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6926 compare_le(env, pwd, pws, pwt, df, 1, GETPC());
6927 }
6928
6929 void helper_msa_fcule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6930 uint32_t ws, uint32_t wt)
6931 {
6932 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6933 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6934 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6935 compare_ule(env, pwd, pws, pwt, df, 1, GETPC());
6936 }
6937
6938 void helper_msa_fsaf_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6939 uint32_t ws, uint32_t wt)
6940 {
6941 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6942 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6943 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6944 compare_af(env, pwd, pws, pwt, df, 0, GETPC());
6945 }
6946
6947 void helper_msa_fsun_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6948 uint32_t ws, uint32_t wt)
6949 {
6950 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6951 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6952 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6953 compare_un(env, pwd, pws, pwt, df, 0, GETPC());
6954 }
6955
6956 void helper_msa_fseq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6957 uint32_t ws, uint32_t wt)
6958 {
6959 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6960 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6961 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6962 compare_eq(env, pwd, pws, pwt, df, 0, GETPC());
6963 }
6964
6965 void helper_msa_fsueq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6966 uint32_t ws, uint32_t wt)
6967 {
6968 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6969 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6970 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6971 compare_ueq(env, pwd, pws, pwt, df, 0, GETPC());
6972 }
6973
6974 void helper_msa_fslt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6975 uint32_t ws, uint32_t wt)
6976 {
6977 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6978 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6979 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6980 compare_lt(env, pwd, pws, pwt, df, 0, GETPC());
6981 }
6982
6983 void helper_msa_fsult_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6984 uint32_t ws, uint32_t wt)
6985 {
6986 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6987 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6988 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6989 compare_ult(env, pwd, pws, pwt, df, 0, GETPC());
6990 }
6991
6992 void helper_msa_fsle_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
6993 uint32_t ws, uint32_t wt)
6994 {
6995 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
6996 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
6997 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
6998 compare_le(env, pwd, pws, pwt, df, 0, GETPC());
6999 }
7000
7001 void helper_msa_fsule_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7002 uint32_t ws, uint32_t wt)
7003 {
7004 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7005 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7006 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7007 compare_ule(env, pwd, pws, pwt, df, 0, GETPC());
7008 }
7009
7010 void helper_msa_fcor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7011 uint32_t ws, uint32_t wt)
7012 {
7013 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7014 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7015 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7016 compare_or(env, pwd, pws, pwt, df, 1, GETPC());
7017 }
7018
7019 void helper_msa_fcune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7020 uint32_t ws, uint32_t wt)
7021 {
7022 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7023 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7024 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7025 compare_une(env, pwd, pws, pwt, df, 1, GETPC());
7026 }
7027
7028 void helper_msa_fcne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7029 uint32_t ws, uint32_t wt)
7030 {
7031 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7032 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7033 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7034 compare_ne(env, pwd, pws, pwt, df, 1, GETPC());
7035 }
7036
7037 void helper_msa_fsor_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7038 uint32_t ws, uint32_t wt)
7039 {
7040 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7041 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7042 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7043 compare_or(env, pwd, pws, pwt, df, 0, GETPC());
7044 }
7045
7046 void helper_msa_fsune_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7047 uint32_t ws, uint32_t wt)
7048 {
7049 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7050 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7051 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7052 compare_une(env, pwd, pws, pwt, df, 0, GETPC());
7053 }
7054
7055 void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7056 uint32_t ws, uint32_t wt)
7057 {
7058 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7059 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7060 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7061 compare_ne(env, pwd, pws, pwt, df, 0, GETPC());
7062 }
7063
7064 #define float16_is_zero(ARG) 0
7065 #define float16_is_zero_or_denormal(ARG) 0
7066
7067 #define IS_DENORMAL(ARG, BITS) \
7068 (!float ## BITS ## _is_zero(ARG) \
7069 && float ## BITS ## _is_zero_or_denormal(ARG))
7070
7071 #define MSA_FLOAT_BINOP(DEST, OP, ARG1, ARG2, BITS) \
7072 do { \
7073 float_status *status = &env->active_tc.msa_fp_status; \
7074 int c; \
7075 \
7076 set_float_exception_flags(0, status); \
7077 DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
7078 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7079 \
7080 if (get_enabled_exceptions(env, c)) { \
7081 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7082 } \
7083 } while (0)
7084
7085 void helper_msa_fadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7086 uint32_t ws, uint32_t wt)
7087 {
7088 wr_t wx, *pwx = &wx;
7089 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7090 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7091 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7092 uint32_t i;
7093
7094 clear_msacsr_cause(env);
7095
7096 switch (df) {
7097 case DF_WORD:
7098 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7099 MSA_FLOAT_BINOP(pwx->w[i], add, pws->w[i], pwt->w[i], 32);
7100 }
7101 break;
7102 case DF_DOUBLE:
7103 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7104 MSA_FLOAT_BINOP(pwx->d[i], add, pws->d[i], pwt->d[i], 64);
7105 }
7106 break;
7107 default:
7108 assert(0);
7109 }
7110
7111 check_msacsr_cause(env, GETPC());
7112 msa_move_v(pwd, pwx);
7113 }
7114
7115 void helper_msa_fsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7116 uint32_t ws, uint32_t wt)
7117 {
7118 wr_t wx, *pwx = &wx;
7119 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7120 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7121 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7122 uint32_t i;
7123
7124 clear_msacsr_cause(env);
7125
7126 switch (df) {
7127 case DF_WORD:
7128 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7129 MSA_FLOAT_BINOP(pwx->w[i], sub, pws->w[i], pwt->w[i], 32);
7130 }
7131 break;
7132 case DF_DOUBLE:
7133 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7134 MSA_FLOAT_BINOP(pwx->d[i], sub, pws->d[i], pwt->d[i], 64);
7135 }
7136 break;
7137 default:
7138 assert(0);
7139 }
7140
7141 check_msacsr_cause(env, GETPC());
7142 msa_move_v(pwd, pwx);
7143 }
7144
7145 void helper_msa_fmul_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7146 uint32_t ws, uint32_t wt)
7147 {
7148 wr_t wx, *pwx = &wx;
7149 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7150 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7151 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7152 uint32_t i;
7153
7154 clear_msacsr_cause(env);
7155
7156 switch (df) {
7157 case DF_WORD:
7158 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7159 MSA_FLOAT_BINOP(pwx->w[i], mul, pws->w[i], pwt->w[i], 32);
7160 }
7161 break;
7162 case DF_DOUBLE:
7163 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7164 MSA_FLOAT_BINOP(pwx->d[i], mul, pws->d[i], pwt->d[i], 64);
7165 }
7166 break;
7167 default:
7168 assert(0);
7169 }
7170
7171 check_msacsr_cause(env, GETPC());
7172
7173 msa_move_v(pwd, pwx);
7174 }
7175
7176 void helper_msa_fdiv_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7177 uint32_t ws, uint32_t wt)
7178 {
7179 wr_t wx, *pwx = &wx;
7180 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7181 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7182 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7183 uint32_t i;
7184
7185 clear_msacsr_cause(env);
7186
7187 switch (df) {
7188 case DF_WORD:
7189 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7190 MSA_FLOAT_BINOP(pwx->w[i], div, pws->w[i], pwt->w[i], 32);
7191 }
7192 break;
7193 case DF_DOUBLE:
7194 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7195 MSA_FLOAT_BINOP(pwx->d[i], div, pws->d[i], pwt->d[i], 64);
7196 }
7197 break;
7198 default:
7199 assert(0);
7200 }
7201
7202 check_msacsr_cause(env, GETPC());
7203
7204 msa_move_v(pwd, pwx);
7205 }
7206
7207 #define MSA_FLOAT_MULADD(DEST, ARG1, ARG2, ARG3, NEGATE, BITS) \
7208 do { \
7209 float_status *status = &env->active_tc.msa_fp_status; \
7210 int c; \
7211 \
7212 set_float_exception_flags(0, status); \
7213 DEST = float ## BITS ## _muladd(ARG2, ARG3, ARG1, NEGATE, status); \
7214 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7215 \
7216 if (get_enabled_exceptions(env, c)) { \
7217 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7218 } \
7219 } while (0)
7220
7221 void helper_msa_fmadd_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7222 uint32_t ws, uint32_t wt)
7223 {
7224 wr_t wx, *pwx = &wx;
7225 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7226 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7227 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7228 uint32_t i;
7229
7230 clear_msacsr_cause(env);
7231
7232 switch (df) {
7233 case DF_WORD:
7234 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7235 MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
7236 pws->w[i], pwt->w[i], 0, 32);
7237 }
7238 break;
7239 case DF_DOUBLE:
7240 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7241 MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
7242 pws->d[i], pwt->d[i], 0, 64);
7243 }
7244 break;
7245 default:
7246 assert(0);
7247 }
7248
7249 check_msacsr_cause(env, GETPC());
7250
7251 msa_move_v(pwd, pwx);
7252 }
7253
7254 void helper_msa_fmsub_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7255 uint32_t ws, uint32_t wt)
7256 {
7257 wr_t wx, *pwx = &wx;
7258 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7259 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7260 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7261 uint32_t i;
7262
7263 clear_msacsr_cause(env);
7264
7265 switch (df) {
7266 case DF_WORD:
7267 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7268 MSA_FLOAT_MULADD(pwx->w[i], pwd->w[i],
7269 pws->w[i], pwt->w[i],
7270 float_muladd_negate_product, 32);
7271 }
7272 break;
7273 case DF_DOUBLE:
7274 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7275 MSA_FLOAT_MULADD(pwx->d[i], pwd->d[i],
7276 pws->d[i], pwt->d[i],
7277 float_muladd_negate_product, 64);
7278 }
7279 break;
7280 default:
7281 assert(0);
7282 }
7283
7284 check_msacsr_cause(env, GETPC());
7285
7286 msa_move_v(pwd, pwx);
7287 }
7288
7289 void helper_msa_fexp2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7290 uint32_t ws, uint32_t wt)
7291 {
7292 wr_t wx, *pwx = &wx;
7293 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7294 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7295 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7296 uint32_t i;
7297
7298 clear_msacsr_cause(env);
7299
7300 switch (df) {
7301 case DF_WORD:
7302 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7303 MSA_FLOAT_BINOP(pwx->w[i], scalbn, pws->w[i],
7304 pwt->w[i] > 0x200 ? 0x200 :
7305 pwt->w[i] < -0x200 ? -0x200 : pwt->w[i],
7306 32);
7307 }
7308 break;
7309 case DF_DOUBLE:
7310 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7311 MSA_FLOAT_BINOP(pwx->d[i], scalbn, pws->d[i],
7312 pwt->d[i] > 0x1000 ? 0x1000 :
7313 pwt->d[i] < -0x1000 ? -0x1000 : pwt->d[i],
7314 64);
7315 }
7316 break;
7317 default:
7318 assert(0);
7319 }
7320
7321 check_msacsr_cause(env, GETPC());
7322
7323 msa_move_v(pwd, pwx);
7324 }
7325
7326 #define MSA_FLOAT_UNOP(DEST, OP, ARG, BITS) \
7327 do { \
7328 float_status *status = &env->active_tc.msa_fp_status; \
7329 int c; \
7330 \
7331 set_float_exception_flags(0, status); \
7332 DEST = float ## BITS ## _ ## OP(ARG, status); \
7333 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7334 \
7335 if (get_enabled_exceptions(env, c)) { \
7336 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7337 } \
7338 } while (0)
7339
7340 void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7341 uint32_t ws, uint32_t wt)
7342 {
7343 wr_t wx, *pwx = &wx;
7344 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7345 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7346 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7347 uint32_t i;
7348
7349 clear_msacsr_cause(env);
7350
7351 switch (df) {
7352 case DF_WORD:
7353 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7354 /*
7355 * Half precision floats come in two formats: standard
7356 * IEEE and "ARM" format. The latter gains extra exponent
7357 * range by omitting the NaN/Inf encodings.
7358 */
7359 bool ieee = true;
7360
7361 MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16);
7362 MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16);
7363 }
7364 break;
7365 case DF_DOUBLE:
7366 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7367 MSA_FLOAT_UNOP(Lw(pwx, i), from_float64, pws->d[i], 32);
7368 MSA_FLOAT_UNOP(Rw(pwx, i), from_float64, pwt->d[i], 32);
7369 }
7370 break;
7371 default:
7372 assert(0);
7373 }
7374
7375 check_msacsr_cause(env, GETPC());
7376 msa_move_v(pwd, pwx);
7377 }
7378
7379 #define MSA_FLOAT_UNOP_XD(DEST, OP, ARG, BITS, XBITS) \
7380 do { \
7381 float_status *status = &env->active_tc.msa_fp_status; \
7382 int c; \
7383 \
7384 set_float_exception_flags(0, status); \
7385 DEST = float ## BITS ## _ ## OP(ARG, status); \
7386 c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
7387 \
7388 if (get_enabled_exceptions(env, c)) { \
7389 DEST = ((FLOAT_SNAN ## XBITS(status) >> 6) << 6) | c; \
7390 } \
7391 } while (0)
7392
7393 void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7394 uint32_t ws, uint32_t wt)
7395 {
7396 wr_t wx, *pwx = &wx;
7397 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7398 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7399 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7400 uint32_t i;
7401
7402 clear_msacsr_cause(env);
7403
7404 switch (df) {
7405 case DF_WORD:
7406 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7407 MSA_FLOAT_UNOP_XD(Lh(pwx, i), to_q16, pws->w[i], 32, 16);
7408 MSA_FLOAT_UNOP_XD(Rh(pwx, i), to_q16, pwt->w[i], 32, 16);
7409 }
7410 break;
7411 case DF_DOUBLE:
7412 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7413 MSA_FLOAT_UNOP_XD(Lw(pwx, i), to_q32, pws->d[i], 64, 32);
7414 MSA_FLOAT_UNOP_XD(Rw(pwx, i), to_q32, pwt->d[i], 64, 32);
7415 }
7416 break;
7417 default:
7418 assert(0);
7419 }
7420
7421 check_msacsr_cause(env, GETPC());
7422
7423 msa_move_v(pwd, pwx);
7424 }
7425
7426 #define NUMBER_QNAN_PAIR(ARG1, ARG2, BITS, STATUS) \
7427 !float ## BITS ## _is_any_nan(ARG1) \
7428 && float ## BITS ## _is_quiet_nan(ARG2, STATUS)
7429
7430 #define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS) \
7431 do { \
7432 float_status *status = &env->active_tc.msa_fp_status; \
7433 int c; \
7434 \
7435 set_float_exception_flags(0, status); \
7436 DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
7437 c = update_msacsr(env, 0, 0); \
7438 \
7439 if (get_enabled_exceptions(env, c)) { \
7440 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7441 } \
7442 } while (0)
7443
7444 #define FMAXMIN_A(F, G, X, _S, _T, BITS, STATUS) \
7445 do { \
7446 uint## BITS ##_t S = _S, T = _T; \
7447 uint## BITS ##_t as, at, xs, xt, xd; \
7448 if (NUMBER_QNAN_PAIR(S, T, BITS, STATUS)) { \
7449 T = S; \
7450 } \
7451 else if (NUMBER_QNAN_PAIR(T, S, BITS, STATUS)) { \
7452 S = T; \
7453 } \
7454 as = float## BITS ##_abs(S); \
7455 at = float## BITS ##_abs(T); \
7456 MSA_FLOAT_MAXOP(xs, F, S, T, BITS); \
7457 MSA_FLOAT_MAXOP(xt, G, S, T, BITS); \
7458 MSA_FLOAT_MAXOP(xd, F, as, at, BITS); \
7459 X = (as == at || xd == float## BITS ##_abs(xs)) ? xs : xt; \
7460 } while (0)
7461
7462 void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7463 uint32_t ws, uint32_t wt)
7464 {
7465 float_status *status = &env->active_tc.msa_fp_status;
7466 wr_t wx, *pwx = &wx;
7467 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7468 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7469 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7470
7471 clear_msacsr_cause(env);
7472
7473 if (df == DF_WORD) {
7474
7475 if (NUMBER_QNAN_PAIR(pws->w[0], pwt->w[0], 32, status)) {
7476 MSA_FLOAT_MAXOP(pwx->w[0], min, pws->w[0], pws->w[0], 32);
7477 } else if (NUMBER_QNAN_PAIR(pwt->w[0], pws->w[0], 32, status)) {
7478 MSA_FLOAT_MAXOP(pwx->w[0], min, pwt->w[0], pwt->w[0], 32);
7479 } else {
7480 MSA_FLOAT_MAXOP(pwx->w[0], min, pws->w[0], pwt->w[0], 32);
7481 }
7482
7483 if (NUMBER_QNAN_PAIR(pws->w[1], pwt->w[1], 32, status)) {
7484 MSA_FLOAT_MAXOP(pwx->w[1], min, pws->w[1], pws->w[1], 32);
7485 } else if (NUMBER_QNAN_PAIR(pwt->w[1], pws->w[1], 32, status)) {
7486 MSA_FLOAT_MAXOP(pwx->w[1], min, pwt->w[1], pwt->w[1], 32);
7487 } else {
7488 MSA_FLOAT_MAXOP(pwx->w[1], min, pws->w[1], pwt->w[1], 32);
7489 }
7490
7491 if (NUMBER_QNAN_PAIR(pws->w[2], pwt->w[2], 32, status)) {
7492 MSA_FLOAT_MAXOP(pwx->w[2], min, pws->w[2], pws->w[2], 32);
7493 } else if (NUMBER_QNAN_PAIR(pwt->w[2], pws->w[2], 32, status)) {
7494 MSA_FLOAT_MAXOP(pwx->w[2], min, pwt->w[2], pwt->w[2], 32);
7495 } else {
7496 MSA_FLOAT_MAXOP(pwx->w[2], min, pws->w[2], pwt->w[2], 32);
7497 }
7498
7499 if (NUMBER_QNAN_PAIR(pws->w[3], pwt->w[3], 32, status)) {
7500 MSA_FLOAT_MAXOP(pwx->w[3], min, pws->w[3], pws->w[3], 32);
7501 } else if (NUMBER_QNAN_PAIR(pwt->w[3], pws->w[3], 32, status)) {
7502 MSA_FLOAT_MAXOP(pwx->w[3], min, pwt->w[3], pwt->w[3], 32);
7503 } else {
7504 MSA_FLOAT_MAXOP(pwx->w[3], min, pws->w[3], pwt->w[3], 32);
7505 }
7506
7507 } else if (df == DF_DOUBLE) {
7508
7509 if (NUMBER_QNAN_PAIR(pws->d[0], pwt->d[0], 64, status)) {
7510 MSA_FLOAT_MAXOP(pwx->d[0], min, pws->d[0], pws->d[0], 64);
7511 } else if (NUMBER_QNAN_PAIR(pwt->d[0], pws->d[0], 64, status)) {
7512 MSA_FLOAT_MAXOP(pwx->d[0], min, pwt->d[0], pwt->d[0], 64);
7513 } else {
7514 MSA_FLOAT_MAXOP(pwx->d[0], min, pws->d[0], pwt->d[0], 64);
7515 }
7516
7517 if (NUMBER_QNAN_PAIR(pws->d[1], pwt->d[1], 64, status)) {
7518 MSA_FLOAT_MAXOP(pwx->d[1], min, pws->d[1], pws->d[1], 64);
7519 } else if (NUMBER_QNAN_PAIR(pwt->d[1], pws->d[1], 64, status)) {
7520 MSA_FLOAT_MAXOP(pwx->d[1], min, pwt->d[1], pwt->d[1], 64);
7521 } else {
7522 MSA_FLOAT_MAXOP(pwx->d[1], min, pws->d[1], pwt->d[1], 64);
7523 }
7524
7525 } else {
7526
7527 assert(0);
7528
7529 }
7530
7531 check_msacsr_cause(env, GETPC());
7532
7533 msa_move_v(pwd, pwx);
7534 }
7535
7536 void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7537 uint32_t ws, uint32_t wt)
7538 {
7539 float_status *status = &env->active_tc.msa_fp_status;
7540 wr_t wx, *pwx = &wx;
7541 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7542 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7543 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7544
7545 clear_msacsr_cause(env);
7546
7547 if (df == DF_WORD) {
7548 FMAXMIN_A(min, max, pwx->w[0], pws->w[0], pwt->w[0], 32, status);
7549 FMAXMIN_A(min, max, pwx->w[1], pws->w[1], pwt->w[1], 32, status);
7550 FMAXMIN_A(min, max, pwx->w[2], pws->w[2], pwt->w[2], 32, status);
7551 FMAXMIN_A(min, max, pwx->w[3], pws->w[3], pwt->w[3], 32, status);
7552 } else if (df == DF_DOUBLE) {
7553 FMAXMIN_A(min, max, pwx->d[0], pws->d[0], pwt->d[0], 64, status);
7554 FMAXMIN_A(min, max, pwx->d[1], pws->d[1], pwt->d[1], 64, status);
7555 } else {
7556 assert(0);
7557 }
7558
7559 check_msacsr_cause(env, GETPC());
7560
7561 msa_move_v(pwd, pwx);
7562 }
7563
7564 void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7565 uint32_t ws, uint32_t wt)
7566 {
7567 float_status *status = &env->active_tc.msa_fp_status;
7568 wr_t wx, *pwx = &wx;
7569 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7570 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7571 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7572
7573 clear_msacsr_cause(env);
7574
7575 if (df == DF_WORD) {
7576
7577 if (NUMBER_QNAN_PAIR(pws->w[0], pwt->w[0], 32, status)) {
7578 MSA_FLOAT_MAXOP(pwx->w[0], max, pws->w[0], pws->w[0], 32);
7579 } else if (NUMBER_QNAN_PAIR(pwt->w[0], pws->w[0], 32, status)) {
7580 MSA_FLOAT_MAXOP(pwx->w[0], max, pwt->w[0], pwt->w[0], 32);
7581 } else {
7582 MSA_FLOAT_MAXOP(pwx->w[0], max, pws->w[0], pwt->w[0], 32);
7583 }
7584
7585 if (NUMBER_QNAN_PAIR(pws->w[1], pwt->w[1], 32, status)) {
7586 MSA_FLOAT_MAXOP(pwx->w[1], max, pws->w[1], pws->w[1], 32);
7587 } else if (NUMBER_QNAN_PAIR(pwt->w[1], pws->w[1], 32, status)) {
7588 MSA_FLOAT_MAXOP(pwx->w[1], max, pwt->w[1], pwt->w[1], 32);
7589 } else {
7590 MSA_FLOAT_MAXOP(pwx->w[1], max, pws->w[1], pwt->w[1], 32);
7591 }
7592
7593 if (NUMBER_QNAN_PAIR(pws->w[2], pwt->w[2], 32, status)) {
7594 MSA_FLOAT_MAXOP(pwx->w[2], max, pws->w[2], pws->w[2], 32);
7595 } else if (NUMBER_QNAN_PAIR(pwt->w[2], pws->w[2], 32, status)) {
7596 MSA_FLOAT_MAXOP(pwx->w[2], max, pwt->w[2], pwt->w[2], 32);
7597 } else {
7598 MSA_FLOAT_MAXOP(pwx->w[2], max, pws->w[2], pwt->w[2], 32);
7599 }
7600
7601 if (NUMBER_QNAN_PAIR(pws->w[3], pwt->w[3], 32, status)) {
7602 MSA_FLOAT_MAXOP(pwx->w[3], max, pws->w[3], pws->w[3], 32);
7603 } else if (NUMBER_QNAN_PAIR(pwt->w[3], pws->w[3], 32, status)) {
7604 MSA_FLOAT_MAXOP(pwx->w[3], max, pwt->w[3], pwt->w[3], 32);
7605 } else {
7606 MSA_FLOAT_MAXOP(pwx->w[3], max, pws->w[3], pwt->w[3], 32);
7607 }
7608
7609 } else if (df == DF_DOUBLE) {
7610
7611 if (NUMBER_QNAN_PAIR(pws->d[0], pwt->d[0], 64, status)) {
7612 MSA_FLOAT_MAXOP(pwx->d[0], max, pws->d[0], pws->d[0], 64);
7613 } else if (NUMBER_QNAN_PAIR(pwt->d[0], pws->d[0], 64, status)) {
7614 MSA_FLOAT_MAXOP(pwx->d[0], max, pwt->d[0], pwt->d[0], 64);
7615 } else {
7616 MSA_FLOAT_MAXOP(pwx->d[0], max, pws->d[0], pwt->d[0], 64);
7617 }
7618
7619 if (NUMBER_QNAN_PAIR(pws->d[1], pwt->d[1], 64, status)) {
7620 MSA_FLOAT_MAXOP(pwx->d[1], max, pws->d[1], pws->d[1], 64);
7621 } else if (NUMBER_QNAN_PAIR(pwt->d[1], pws->d[1], 64, status)) {
7622 MSA_FLOAT_MAXOP(pwx->d[1], max, pwt->d[1], pwt->d[1], 64);
7623 } else {
7624 MSA_FLOAT_MAXOP(pwx->d[1], max, pws->d[1], pwt->d[1], 64);
7625 }
7626
7627 } else {
7628
7629 assert(0);
7630
7631 }
7632
7633 check_msacsr_cause(env, GETPC());
7634
7635 msa_move_v(pwd, pwx);
7636 }
7637
7638 void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7639 uint32_t ws, uint32_t wt)
7640 {
7641 float_status *status = &env->active_tc.msa_fp_status;
7642 wr_t wx, *pwx = &wx;
7643 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7644 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7645 wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
7646
7647 clear_msacsr_cause(env);
7648
7649 if (df == DF_WORD) {
7650 FMAXMIN_A(max, min, pwx->w[0], pws->w[0], pwt->w[0], 32, status);
7651 FMAXMIN_A(max, min, pwx->w[1], pws->w[1], pwt->w[1], 32, status);
7652 FMAXMIN_A(max, min, pwx->w[2], pws->w[2], pwt->w[2], 32, status);
7653 FMAXMIN_A(max, min, pwx->w[3], pws->w[3], pwt->w[3], 32, status);
7654 } else if (df == DF_DOUBLE) {
7655 FMAXMIN_A(max, min, pwx->d[0], pws->d[0], pwt->d[0], 64, status);
7656 FMAXMIN_A(max, min, pwx->d[1], pws->d[1], pwt->d[1], 64, status);
7657 } else {
7658 assert(0);
7659 }
7660
7661 check_msacsr_cause(env, GETPC());
7662
7663 msa_move_v(pwd, pwx);
7664 }
7665
7666 void helper_msa_fclass_df(CPUMIPSState *env, uint32_t df,
7667 uint32_t wd, uint32_t ws)
7668 {
7669 float_status *status = &env->active_tc.msa_fp_status;
7670
7671 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7672 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7673 if (df == DF_WORD) {
7674 pwd->w[0] = float_class_s(pws->w[0], status);
7675 pwd->w[1] = float_class_s(pws->w[1], status);
7676 pwd->w[2] = float_class_s(pws->w[2], status);
7677 pwd->w[3] = float_class_s(pws->w[3], status);
7678 } else if (df == DF_DOUBLE) {
7679 pwd->d[0] = float_class_d(pws->d[0], status);
7680 pwd->d[1] = float_class_d(pws->d[1], status);
7681 } else {
7682 assert(0);
7683 }
7684 }
7685
7686 #define MSA_FLOAT_UNOP0(DEST, OP, ARG, BITS) \
7687 do { \
7688 float_status *status = &env->active_tc.msa_fp_status; \
7689 int c; \
7690 \
7691 set_float_exception_flags(0, status); \
7692 DEST = float ## BITS ## _ ## OP(ARG, status); \
7693 c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
7694 \
7695 if (get_enabled_exceptions(env, c)) { \
7696 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7697 } else if (float ## BITS ## _is_any_nan(ARG)) { \
7698 DEST = 0; \
7699 } \
7700 } while (0)
7701
7702 void helper_msa_ftrunc_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7703 uint32_t ws)
7704 {
7705 wr_t wx, *pwx = &wx;
7706 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7707 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7708 uint32_t i;
7709
7710 clear_msacsr_cause(env);
7711
7712 switch (df) {
7713 case DF_WORD:
7714 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7715 MSA_FLOAT_UNOP0(pwx->w[i], to_int32_round_to_zero, pws->w[i], 32);
7716 }
7717 break;
7718 case DF_DOUBLE:
7719 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7720 MSA_FLOAT_UNOP0(pwx->d[i], to_int64_round_to_zero, pws->d[i], 64);
7721 }
7722 break;
7723 default:
7724 assert(0);
7725 }
7726
7727 check_msacsr_cause(env, GETPC());
7728
7729 msa_move_v(pwd, pwx);
7730 }
7731
7732 void helper_msa_ftrunc_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7733 uint32_t ws)
7734 {
7735 wr_t wx, *pwx = &wx;
7736 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7737 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7738 uint32_t i;
7739
7740 clear_msacsr_cause(env);
7741
7742 switch (df) {
7743 case DF_WORD:
7744 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7745 MSA_FLOAT_UNOP0(pwx->w[i], to_uint32_round_to_zero, pws->w[i], 32);
7746 }
7747 break;
7748 case DF_DOUBLE:
7749 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7750 MSA_FLOAT_UNOP0(pwx->d[i], to_uint64_round_to_zero, pws->d[i], 64);
7751 }
7752 break;
7753 default:
7754 assert(0);
7755 }
7756
7757 check_msacsr_cause(env, GETPC());
7758
7759 msa_move_v(pwd, pwx);
7760 }
7761
7762 void helper_msa_fsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7763 uint32_t ws)
7764 {
7765 wr_t wx, *pwx = &wx;
7766 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7767 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7768 uint32_t i;
7769
7770 clear_msacsr_cause(env);
7771
7772 switch (df) {
7773 case DF_WORD:
7774 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7775 MSA_FLOAT_UNOP(pwx->w[i], sqrt, pws->w[i], 32);
7776 }
7777 break;
7778 case DF_DOUBLE:
7779 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7780 MSA_FLOAT_UNOP(pwx->d[i], sqrt, pws->d[i], 64);
7781 }
7782 break;
7783 default:
7784 assert(0);
7785 }
7786
7787 check_msacsr_cause(env, GETPC());
7788
7789 msa_move_v(pwd, pwx);
7790 }
7791
7792 #define MSA_FLOAT_RECIPROCAL(DEST, ARG, BITS) \
7793 do { \
7794 float_status *status = &env->active_tc.msa_fp_status; \
7795 int c; \
7796 \
7797 set_float_exception_flags(0, status); \
7798 DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status); \
7799 c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) || \
7800 float ## BITS ## _is_quiet_nan(DEST, status) ? \
7801 0 : RECIPROCAL_INEXACT, \
7802 IS_DENORMAL(DEST, BITS)); \
7803 \
7804 if (get_enabled_exceptions(env, c)) { \
7805 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7806 } \
7807 } while (0)
7808
7809 void helper_msa_frsqrt_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7810 uint32_t ws)
7811 {
7812 wr_t wx, *pwx = &wx;
7813 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7814 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7815 uint32_t i;
7816
7817 clear_msacsr_cause(env);
7818
7819 switch (df) {
7820 case DF_WORD:
7821 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7822 MSA_FLOAT_RECIPROCAL(pwx->w[i], float32_sqrt(pws->w[i],
7823 &env->active_tc.msa_fp_status), 32);
7824 }
7825 break;
7826 case DF_DOUBLE:
7827 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7828 MSA_FLOAT_RECIPROCAL(pwx->d[i], float64_sqrt(pws->d[i],
7829 &env->active_tc.msa_fp_status), 64);
7830 }
7831 break;
7832 default:
7833 assert(0);
7834 }
7835
7836 check_msacsr_cause(env, GETPC());
7837
7838 msa_move_v(pwd, pwx);
7839 }
7840
7841 void helper_msa_frcp_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7842 uint32_t ws)
7843 {
7844 wr_t wx, *pwx = &wx;
7845 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7846 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7847 uint32_t i;
7848
7849 clear_msacsr_cause(env);
7850
7851 switch (df) {
7852 case DF_WORD:
7853 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7854 MSA_FLOAT_RECIPROCAL(pwx->w[i], pws->w[i], 32);
7855 }
7856 break;
7857 case DF_DOUBLE:
7858 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7859 MSA_FLOAT_RECIPROCAL(pwx->d[i], pws->d[i], 64);
7860 }
7861 break;
7862 default:
7863 assert(0);
7864 }
7865
7866 check_msacsr_cause(env, GETPC());
7867
7868 msa_move_v(pwd, pwx);
7869 }
7870
7871 void helper_msa_frint_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7872 uint32_t ws)
7873 {
7874 wr_t wx, *pwx = &wx;
7875 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7876 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7877 uint32_t i;
7878
7879 clear_msacsr_cause(env);
7880
7881 switch (df) {
7882 case DF_WORD:
7883 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7884 MSA_FLOAT_UNOP(pwx->w[i], round_to_int, pws->w[i], 32);
7885 }
7886 break;
7887 case DF_DOUBLE:
7888 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7889 MSA_FLOAT_UNOP(pwx->d[i], round_to_int, pws->d[i], 64);
7890 }
7891 break;
7892 default:
7893 assert(0);
7894 }
7895
7896 check_msacsr_cause(env, GETPC());
7897
7898 msa_move_v(pwd, pwx);
7899 }
7900
7901 #define MSA_FLOAT_LOGB(DEST, ARG, BITS) \
7902 do { \
7903 float_status *status = &env->active_tc.msa_fp_status; \
7904 int c; \
7905 \
7906 set_float_exception_flags(0, status); \
7907 set_float_rounding_mode(float_round_down, status); \
7908 DEST = float ## BITS ## _ ## log2(ARG, status); \
7909 DEST = float ## BITS ## _ ## round_to_int(DEST, status); \
7910 set_float_rounding_mode(ieee_rm[(env->active_tc.msacsr & \
7911 MSACSR_RM_MASK) >> MSACSR_RM], \
7912 status); \
7913 \
7914 set_float_exception_flags(get_float_exception_flags(status) & \
7915 (~float_flag_inexact), \
7916 status); \
7917 \
7918 c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
7919 \
7920 if (get_enabled_exceptions(env, c)) { \
7921 DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \
7922 } \
7923 } while (0)
7924
7925 void helper_msa_flog2_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7926 uint32_t ws)
7927 {
7928 wr_t wx, *pwx = &wx;
7929 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7930 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7931 uint32_t i;
7932
7933 clear_msacsr_cause(env);
7934
7935 switch (df) {
7936 case DF_WORD:
7937 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7938 MSA_FLOAT_LOGB(pwx->w[i], pws->w[i], 32);
7939 }
7940 break;
7941 case DF_DOUBLE:
7942 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7943 MSA_FLOAT_LOGB(pwx->d[i], pws->d[i], 64);
7944 }
7945 break;
7946 default:
7947 assert(0);
7948 }
7949
7950 check_msacsr_cause(env, GETPC());
7951
7952 msa_move_v(pwd, pwx);
7953 }
7954
7955 void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7956 uint32_t ws)
7957 {
7958 wr_t wx, *pwx = &wx;
7959 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7960 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7961 uint32_t i;
7962
7963 clear_msacsr_cause(env);
7964
7965 switch (df) {
7966 case DF_WORD:
7967 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
7968 /*
7969 * Half precision floats come in two formats: standard
7970 * IEEE and "ARM" format. The latter gains extra exponent
7971 * range by omitting the NaN/Inf encodings.
7972 */
7973 bool ieee = true;
7974
7975 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32);
7976 }
7977 break;
7978 case DF_DOUBLE:
7979 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
7980 MSA_FLOAT_UNOP(pwx->d[i], from_float32, Lw(pws, i), 64);
7981 }
7982 break;
7983 default:
7984 assert(0);
7985 }
7986
7987 check_msacsr_cause(env, GETPC());
7988 msa_move_v(pwd, pwx);
7989 }
7990
7991 void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
7992 uint32_t ws)
7993 {
7994 wr_t wx, *pwx = &wx;
7995 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
7996 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
7997 uint32_t i;
7998
7999 clear_msacsr_cause(env);
8000
8001 switch (df) {
8002 case DF_WORD:
8003 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8004 /*
8005 * Half precision floats come in two formats: standard
8006 * IEEE and "ARM" format. The latter gains extra exponent
8007 * range by omitting the NaN/Inf encodings.
8008 */
8009 bool ieee = true;
8010
8011 MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32);
8012 }
8013 break;
8014 case DF_DOUBLE:
8015 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8016 MSA_FLOAT_UNOP(pwx->d[i], from_float32, Rw(pws, i), 64);
8017 }
8018 break;
8019 default:
8020 assert(0);
8021 }
8022
8023 check_msacsr_cause(env, GETPC());
8024 msa_move_v(pwd, pwx);
8025 }
8026
8027 void helper_msa_ffql_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8028 uint32_t ws)
8029 {
8030 wr_t wx, *pwx = &wx;
8031 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8032 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8033 uint32_t i;
8034
8035 switch (df) {
8036 case DF_WORD:
8037 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8038 MSA_FLOAT_UNOP(pwx->w[i], from_q16, Lh(pws, i), 32);
8039 }
8040 break;
8041 case DF_DOUBLE:
8042 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8043 MSA_FLOAT_UNOP(pwx->d[i], from_q32, Lw(pws, i), 64);
8044 }
8045 break;
8046 default:
8047 assert(0);
8048 }
8049
8050 msa_move_v(pwd, pwx);
8051 }
8052
8053 void helper_msa_ffqr_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8054 uint32_t ws)
8055 {
8056 wr_t wx, *pwx = &wx;
8057 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8058 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8059 uint32_t i;
8060
8061 switch (df) {
8062 case DF_WORD:
8063 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8064 MSA_FLOAT_UNOP(pwx->w[i], from_q16, Rh(pws, i), 32);
8065 }
8066 break;
8067 case DF_DOUBLE:
8068 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8069 MSA_FLOAT_UNOP(pwx->d[i], from_q32, Rw(pws, i), 64);
8070 }
8071 break;
8072 default:
8073 assert(0);
8074 }
8075
8076 msa_move_v(pwd, pwx);
8077 }
8078
8079 void helper_msa_ftint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8080 uint32_t ws)
8081 {
8082 wr_t wx, *pwx = &wx;
8083 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8084 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8085 uint32_t i;
8086
8087 clear_msacsr_cause(env);
8088
8089 switch (df) {
8090 case DF_WORD:
8091 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8092 MSA_FLOAT_UNOP0(pwx->w[i], to_int32, pws->w[i], 32);
8093 }
8094 break;
8095 case DF_DOUBLE:
8096 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8097 MSA_FLOAT_UNOP0(pwx->d[i], to_int64, pws->d[i], 64);
8098 }
8099 break;
8100 default:
8101 assert(0);
8102 }
8103
8104 check_msacsr_cause(env, GETPC());
8105
8106 msa_move_v(pwd, pwx);
8107 }
8108
8109 void helper_msa_ftint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8110 uint32_t ws)
8111 {
8112 wr_t wx, *pwx = &wx;
8113 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8114 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8115 uint32_t i;
8116
8117 clear_msacsr_cause(env);
8118
8119 switch (df) {
8120 case DF_WORD:
8121 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8122 MSA_FLOAT_UNOP0(pwx->w[i], to_uint32, pws->w[i], 32);
8123 }
8124 break;
8125 case DF_DOUBLE:
8126 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8127 MSA_FLOAT_UNOP0(pwx->d[i], to_uint64, pws->d[i], 64);
8128 }
8129 break;
8130 default:
8131 assert(0);
8132 }
8133
8134 check_msacsr_cause(env, GETPC());
8135
8136 msa_move_v(pwd, pwx);
8137 }
8138
8139 #define float32_from_int32 int32_to_float32
8140 #define float32_from_uint32 uint32_to_float32
8141
8142 #define float64_from_int64 int64_to_float64
8143 #define float64_from_uint64 uint64_to_float64
8144
8145 void helper_msa_ffint_s_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8146 uint32_t ws)
8147 {
8148 wr_t wx, *pwx = &wx;
8149 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8150 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8151 uint32_t i;
8152
8153 clear_msacsr_cause(env);
8154
8155 switch (df) {
8156 case DF_WORD:
8157 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8158 MSA_FLOAT_UNOP(pwx->w[i], from_int32, pws->w[i], 32);
8159 }
8160 break;
8161 case DF_DOUBLE:
8162 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8163 MSA_FLOAT_UNOP(pwx->d[i], from_int64, pws->d[i], 64);
8164 }
8165 break;
8166 default:
8167 assert(0);
8168 }
8169
8170 check_msacsr_cause(env, GETPC());
8171
8172 msa_move_v(pwd, pwx);
8173 }
8174
8175 void helper_msa_ffint_u_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
8176 uint32_t ws)
8177 {
8178 wr_t wx, *pwx = &wx;
8179 wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
8180 wr_t *pws = &(env->active_fpu.fpr[ws].wr);
8181 uint32_t i;
8182
8183 clear_msacsr_cause(env);
8184
8185 switch (df) {
8186 case DF_WORD:
8187 for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) {
8188 MSA_FLOAT_UNOP(pwx->w[i], from_uint32, pws->w[i], 32);
8189 }
8190 break;
8191 case DF_DOUBLE:
8192 for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) {
8193 MSA_FLOAT_UNOP(pwx->d[i], from_uint64, pws->d[i], 64);
8194 }
8195 break;
8196 default:
8197 assert(0);
8198 }
8199
8200 check_msacsr_cause(env, GETPC());
8201
8202 msa_move_v(pwd, pwx);
8203 }
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