hw/intc/etraxfs_pic.c

   1 /*
   2  * QEMU ETRAX Interrupt Controller.
   3  *
   4  * Copyright (c) 2008 Edgar E. Iglesias, Axis Communications AB.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "qemu/osdep.h"
  26 #include "hw/sysbus.h"
  27 #include "qemu/module.h"
  28 #include "hw/irq.h"
  29 #include "hw/qdev-properties.h"
  30 //#include "pc.h"
  31 //#include "etraxfs.h"
  32
  33 #define D(x)
  34
  35 #define R_RW_MASK   0
  36 #define R_R_VECT    1
  37 #define R_R_MASKED_VECT 2
  38 #define R_R_NMI     3
  39 #define R_R_GURU    4
  40 #define R_MAX       5
  41
  42 #define TYPE_ETRAX_FS_PIC "etraxfs,pic"
  43 #define ETRAX_FS_PIC(obj) \
  44     OBJECT_CHECK(struct etrax_pic, (obj), TYPE_ETRAX_FS_PIC)
  45
  46 struct etrax_pic
  47 {
  48     SysBusDevice parent_obj;
  49
  50     MemoryRegion mmio;
  51     void *interrupt_vector;
  52     qemu_irq parent_irq;
  53     qemu_irq parent_nmi;
  54     uint32_t regs[R_MAX];
  55 };
  56
  57 static void pic_update(struct etrax_pic *fs)
  58 {
  59     uint32_t vector = 0;
  60     int i;
  61
  62     fs->regs[R_R_MASKED_VECT] = fs->regs[R_R_VECT] & fs->regs[R_RW_MASK];
  63
  64     /* The ETRAX interrupt controller signals interrupts to the core
  65        through an interrupt request wire and an irq vector bus. If
  66        multiple interrupts are simultaneously active it chooses vector
  67        0x30 and lets the sw choose the priorities.  */
  68     if (fs->regs[R_R_MASKED_VECT]) {
  69         uint32_t mv = fs->regs[R_R_MASKED_VECT];
  70         for (i = 0; i < 31; i++) {
  71             if (mv & 1) {
  72                 vector = 0x31 + i;
  73                 /* Check for multiple interrupts.  */
  74                 if (mv > 1)
  75                     vector = 0x30;
  76                 break;
  77             }
  78             mv >>= 1;
  79         }
  80     }
  81
  82     if (fs->interrupt_vector) {
  83         /* hack alert: ptr property */
  84         *(uint32_t*)(fs->interrupt_vector) = vector;
  85     }
  86     qemu_set_irq(fs->parent_irq, !!vector);
  87 }
  88
  89 static uint64_t
  90 pic_read(void *opaque, hwaddr addr, unsigned int size)
  91 {
  92     struct etrax_pic *fs = opaque;
  93     uint32_t rval;
  94
  95     rval = fs->regs[addr >> 2];
  96     D(printf("%s %x=%x\n", __func__, addr, rval));
  97     return rval;
  98 }
  99
 100 static void pic_write(void *opaque, hwaddr addr,
 101                       uint64_t value, unsigned int size)
 102 {
 103     struct etrax_pic *fs = opaque;
 104     D(printf("%s addr=%x val=%x\n", __func__, addr, value));
 105
 106     if (addr == R_RW_MASK) {
 107         fs->regs[R_RW_MASK] = value;
 108         pic_update(fs);
 109     }
 110 }
 111
 112 static const MemoryRegionOps pic_ops = {
 113     .read = pic_read,
 114     .write = pic_write,
 115     .endianness = DEVICE_NATIVE_ENDIAN,
 116     .valid = {
 117         .min_access_size = 4,
 118         .max_access_size = 4
 119     }
 120 };
 121
 122 static void nmi_handler(void *opaque, int irq, int level)
 123 {
 124     struct etrax_pic *fs = (void *)opaque;
 125     uint32_t mask;
 126
 127     mask = 1 << irq;
 128     if (level)
 129         fs->regs[R_R_NMI] |= mask;
 130     else
 131         fs->regs[R_R_NMI] &= ~mask;
 132
 133     qemu_set_irq(fs->parent_nmi, !!fs->regs[R_R_NMI]);
 134 }
 135
 136 static void irq_handler(void *opaque, int irq, int level)
 137 {
 138     struct etrax_pic *fs = (void *)opaque;
 139
 140     if (irq >= 30) {
 141         nmi_handler(opaque, irq, level);
 142         return;
 143     }
 144
 145     irq -= 1;
 146     fs->regs[R_R_VECT] &= ~(1 << irq);
 147     fs->regs[R_R_VECT] |= (!!level << irq);
 148     pic_update(fs);
 149 }
 150
 151 static void etraxfs_pic_init(Object *obj)
 152 {
 153     DeviceState *dev = DEVICE(obj);
 154     struct etrax_pic *s = ETRAX_FS_PIC(obj);
 155     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
 156
 157     qdev_init_gpio_in(dev, irq_handler, 32);
 158     sysbus_init_irq(sbd, &s->parent_irq);
 159     sysbus_init_irq(sbd, &s->parent_nmi);
 160
 161     memory_region_init_io(&s->mmio, obj, &pic_ops, s,
 162                           "etraxfs-pic", R_MAX * 4);
 163     sysbus_init_mmio(sbd, &s->mmio);
 164 }
 165
 166 static Property etraxfs_pic_properties[] = {
 167     DEFINE_PROP_PTR("interrupt_vector", struct etrax_pic, interrupt_vector),
 168     DEFINE_PROP_END_OF_LIST(),
 169 };
 170
 171 static void etraxfs_pic_class_init(ObjectClass *klass, void *data)
 172 {
 173     DeviceClass *dc = DEVICE_CLASS(klass);
 174
 175     dc->props = etraxfs_pic_properties;
 176     /*
 177      * Note: pointer property "interrupt_vector" may remain null, thus
 178      * no need for dc->user_creatable = false;
 179      */
 180 }
 181
 182 static const TypeInfo etraxfs_pic_info = {
 183     .name          = TYPE_ETRAX_FS_PIC,
 184     .parent        = TYPE_SYS_BUS_DEVICE,
 185     .instance_size = sizeof(struct etrax_pic),
 186     .instance_init = etraxfs_pic_init,
 187     .class_init    = etraxfs_pic_class_init,
 188 };
 189
 190 static void etraxfs_pic_register_types(void)
 191 {
 192     type_register_static(&etraxfs_pic_info);
 193 }
 194
 195 type_init(etraxfs_pic_register_types)