hw/i386: fix nvdimm check error path
[qemu/kevin.git] / tests / test-x86-cpuid-compat.c
blob4166ce54b7234c6692eb70826d9ee54e846d7207
1 #include "qemu/osdep.h"
2 #include "qemu-common.h"
3 #include "qapi/qmp/qlist.h"
4 #include "qapi/qmp/qstring.h"
5 #include "qapi/qmp/qdict.h"
6 #include "qapi/qmp/qint.h"
7 #include "qapi/qmp/qbool.h"
8 #include "libqtest.h"
10 static char *get_cpu0_qom_path(void)
12 QDict *resp;
13 QList *ret;
14 QDict *cpu0;
15 char *path;
17 resp = qmp("{'execute': 'query-cpus', 'arguments': {}}");
18 g_assert(qdict_haskey(resp, "return"));
19 ret = qdict_get_qlist(resp, "return");
21 cpu0 = qobject_to_qdict(qlist_peek(ret));
22 path = g_strdup(qdict_get_str(cpu0, "qom_path"));
23 QDECREF(resp);
24 return path;
27 static QObject *qom_get(const char *path, const char *prop)
29 QDict *resp = qmp("{ 'execute': 'qom-get',"
30 " 'arguments': { 'path': %s,"
31 " 'property': %s } }",
32 path, prop);
33 QObject *ret = qdict_get(resp, "return");
34 qobject_incref(ret);
35 QDECREF(resp);
36 return ret;
39 #ifdef CONFIG_HAS_GLIB_SUBPROCESS_TESTS
40 static bool qom_get_bool(const char *path, const char *prop)
42 QBool *value = qobject_to_qbool(qom_get(path, prop));
43 bool b = qbool_get_bool(value);
45 QDECREF(value);
46 return b;
48 #endif
50 typedef struct CpuidTestArgs {
51 const char *cmdline;
52 const char *property;
53 int64_t expected_value;
54 } CpuidTestArgs;
56 static void test_cpuid_prop(const void *data)
58 const CpuidTestArgs *args = data;
59 char *path;
60 QInt *value;
62 qtest_start(args->cmdline);
63 path = get_cpu0_qom_path();
64 value = qobject_to_qint(qom_get(path, args->property));
65 g_assert_cmpint(qint_get_int(value), ==, args->expected_value);
66 qtest_end();
68 QDECREF(value);
69 g_free(path);
72 static void add_cpuid_test(const char *name, const char *cmdline,
73 const char *property, int64_t expected_value)
75 CpuidTestArgs *args = g_new0(CpuidTestArgs, 1);
76 args->cmdline = cmdline;
77 args->property = property;
78 args->expected_value = expected_value;
79 qtest_add_data_func(name, args, test_cpuid_prop);
83 /* Parameters to a add_feature_test() test case */
84 typedef struct FeatureTestArgs {
85 /* cmdline to start QEMU */
86 const char *cmdline;
88 * cpuid-input-eax and cpuid-input-ecx values to look for,
89 * in "feature-words" and "filtered-features" properties.
91 uint32_t in_eax, in_ecx;
92 /* The register name to look for, in the X86CPUFeatureWordInfo array */
93 const char *reg;
94 /* The bit to check in X86CPUFeatureWordInfo.features */
95 int bitnr;
96 /* The expected value for the bit in (X86CPUFeatureWordInfo.features) */
97 bool expected_value;
98 } FeatureTestArgs;
100 /* Get the value for a feature word in a X86CPUFeatureWordInfo list */
101 static uint32_t get_feature_word(QList *features, uint32_t eax, uint32_t ecx,
102 const char *reg)
104 const QListEntry *e;
106 for (e = qlist_first(features); e; e = qlist_next(e)) {
107 QDict *w = qobject_to_qdict(qlist_entry_obj(e));
108 const char *rreg = qdict_get_str(w, "cpuid-register");
109 uint32_t reax = qdict_get_int(w, "cpuid-input-eax");
110 bool has_ecx = qdict_haskey(w, "cpuid-input-ecx");
111 uint32_t recx = 0;
113 if (has_ecx) {
114 recx = qdict_get_int(w, "cpuid-input-ecx");
116 if (eax == reax && (!has_ecx || ecx == recx) && !strcmp(rreg, reg)) {
117 return qint_get_int(qobject_to_qint(qdict_get(w, "features")));
120 return 0;
123 static void test_feature_flag(const void *data)
125 const FeatureTestArgs *args = data;
126 char *path;
127 QList *present, *filtered;
128 uint32_t value;
130 qtest_start(args->cmdline);
131 path = get_cpu0_qom_path();
132 present = qobject_to_qlist(qom_get(path, "feature-words"));
133 filtered = qobject_to_qlist(qom_get(path, "filtered-features"));
134 value = get_feature_word(present, args->in_eax, args->in_ecx, args->reg);
135 value |= get_feature_word(filtered, args->in_eax, args->in_ecx, args->reg);
136 qtest_end();
138 g_assert(!!(value & (1U << args->bitnr)) == args->expected_value);
140 QDECREF(present);
141 QDECREF(filtered);
142 g_free(path);
146 * Add test case to ensure that a given feature flag is set in
147 * either "feature-words" or "filtered-features", when running QEMU
148 * using cmdline
150 static FeatureTestArgs *add_feature_test(const char *name, const char *cmdline,
151 uint32_t eax, uint32_t ecx,
152 const char *reg, int bitnr,
153 bool expected_value)
155 FeatureTestArgs *args = g_new0(FeatureTestArgs, 1);
156 args->cmdline = cmdline;
157 args->in_eax = eax;
158 args->in_ecx = ecx;
159 args->reg = reg;
160 args->bitnr = bitnr;
161 args->expected_value = expected_value;
162 qtest_add_data_func(name, args, test_feature_flag);
163 return args;
166 #ifdef CONFIG_HAS_GLIB_SUBPROCESS_TESTS
167 static void test_plus_minus_subprocess(void)
169 char *path;
171 /* Rules:
172 * 1)"-foo" overrides "+foo"
173 * 2) "[+-]foo" overrides "foo=..."
174 * 3) Old feature names with underscores (e.g. "sse4_2")
175 * should keep working
177 * Note: rules 1 and 2 are planned to be removed soon, and
178 * should generate a warning.
180 qtest_start("-cpu pentium,-fpu,+fpu,-mce,mce=on,+cx8,cx8=off,+sse4_1,sse4_2=on");
181 path = get_cpu0_qom_path();
183 g_assert_false(qom_get_bool(path, "fpu"));
184 g_assert_false(qom_get_bool(path, "mce"));
185 g_assert_true(qom_get_bool(path, "cx8"));
187 /* Test both the original and the alias feature names: */
188 g_assert_true(qom_get_bool(path, "sse4-1"));
189 g_assert_true(qom_get_bool(path, "sse4.1"));
191 g_assert_true(qom_get_bool(path, "sse4-2"));
192 g_assert_true(qom_get_bool(path, "sse4.2"));
194 qtest_end();
195 g_free(path);
198 static void test_plus_minus(void)
200 g_test_trap_subprocess("/x86/cpuid/parsing-plus-minus/subprocess", 0, 0);
201 g_test_trap_assert_passed();
202 g_test_trap_assert_stderr("*Ambiguous CPU model string. "
203 "Don't mix both \"-mce\" and \"mce=on\"*");
204 g_test_trap_assert_stderr("*Ambiguous CPU model string. "
205 "Don't mix both \"+cx8\" and \"cx8=off\"*");
206 g_test_trap_assert_stdout("");
208 #endif
210 int main(int argc, char **argv)
212 g_test_init(&argc, &argv, NULL);
214 #ifdef CONFIG_HAS_GLIB_SUBPROCESS_TESTS
215 g_test_add_func("/x86/cpuid/parsing-plus-minus/subprocess",
216 test_plus_minus_subprocess);
217 g_test_add_func("/x86/cpuid/parsing-plus-minus", test_plus_minus);
218 #endif
220 /* Original level values for CPU models: */
221 add_cpuid_test("x86/cpuid/phenom/level",
222 "-cpu phenom", "level", 5);
223 add_cpuid_test("x86/cpuid/Conroe/level",
224 "-cpu Conroe", "level", 10);
225 add_cpuid_test("x86/cpuid/SandyBridge/level",
226 "-cpu SandyBridge", "level", 0xd);
227 add_cpuid_test("x86/cpuid/486/xlevel",
228 "-cpu 486", "xlevel", 0);
229 add_cpuid_test("x86/cpuid/core2duo/xlevel",
230 "-cpu core2duo", "xlevel", 0x80000008);
231 add_cpuid_test("x86/cpuid/phenom/xlevel",
232 "-cpu phenom", "xlevel", 0x8000001A);
233 add_cpuid_test("x86/cpuid/athlon/xlevel",
234 "-cpu athlon", "xlevel", 0x80000008);
236 /* If level is not large enough, it should increase automatically: */
237 /* CPUID[6].EAX: */
238 add_cpuid_test("x86/cpuid/auto-level/phenom/arat",
239 "-cpu 486,+arat", "level", 6);
240 /* CPUID[EAX=7,ECX=0].EBX: */
241 add_cpuid_test("x86/cpuid/auto-level/phenom/fsgsbase",
242 "-cpu phenom,+fsgsbase", "level", 7);
243 /* CPUID[EAX=7,ECX=0].ECX: */
244 add_cpuid_test("x86/cpuid/auto-level/phenom/avx512vbmi",
245 "-cpu phenom,+avx512vbmi", "level", 7);
246 /* CPUID[EAX=0xd,ECX=1].EAX: */
247 add_cpuid_test("x86/cpuid/auto-level/phenom/xsaveopt",
248 "-cpu phenom,+xsaveopt", "level", 0xd);
249 /* CPUID[8000_0001].EDX: */
250 add_cpuid_test("x86/cpuid/auto-xlevel/486/3dnow",
251 "-cpu 486,+3dnow", "xlevel", 0x80000001);
252 /* CPUID[8000_0001].ECX: */
253 add_cpuid_test("x86/cpuid/auto-xlevel/486/sse4a",
254 "-cpu 486,+sse4a", "xlevel", 0x80000001);
255 /* CPUID[8000_0007].EDX: */
256 add_cpuid_test("x86/cpuid/auto-xlevel/486/invtsc",
257 "-cpu 486,+invtsc", "xlevel", 0x80000007);
258 /* CPUID[8000_000A].EDX: */
259 add_cpuid_test("x86/cpuid/auto-xlevel/486/npt",
260 "-cpu 486,+npt", "xlevel", 0x8000000A);
261 /* CPUID[C000_0001].EDX: */
262 add_cpuid_test("x86/cpuid/auto-xlevel2/phenom/xstore",
263 "-cpu phenom,+xstore", "xlevel2", 0xC0000001);
264 /* SVM needs CPUID[0x8000000A] */
265 add_cpuid_test("x86/cpuid/auto-xlevel/athlon/svm",
266 "-cpu athlon,+svm", "xlevel", 0x8000000A);
269 /* If level is already large enough, it shouldn't change: */
270 add_cpuid_test("x86/cpuid/auto-level/SandyBridge/multiple",
271 "-cpu SandyBridge,+arat,+fsgsbase,+avx512vbmi",
272 "level", 0xd);
273 /* If level is explicitly set, it shouldn't change: */
274 add_cpuid_test("x86/cpuid/auto-level/486/fixed/0xF",
275 "-cpu 486,level=0xF,+arat,+fsgsbase,+avx512vbmi,+xsaveopt",
276 "level", 0xF);
277 add_cpuid_test("x86/cpuid/auto-level/486/fixed/2",
278 "-cpu 486,level=2,+arat,+fsgsbase,+avx512vbmi,+xsaveopt",
279 "level", 2);
280 add_cpuid_test("x86/cpuid/auto-level/486/fixed/0",
281 "-cpu 486,level=0,+arat,+fsgsbase,+avx512vbmi,+xsaveopt",
282 "level", 0);
284 /* if xlevel is already large enough, it shouldn't change: */
285 add_cpuid_test("x86/cpuid/auto-xlevel/phenom/3dnow",
286 "-cpu phenom,+3dnow,+sse4a,+invtsc,+npt,+svm",
287 "xlevel", 0x8000001A);
288 /* If xlevel is explicitly set, it shouldn't change: */
289 add_cpuid_test("x86/cpuid/auto-xlevel/486/fixed/80000002",
290 "-cpu 486,xlevel=0x80000002,+3dnow,+sse4a,+invtsc,+npt,+svm",
291 "xlevel", 0x80000002);
292 add_cpuid_test("x86/cpuid/auto-xlevel/486/fixed/8000001A",
293 "-cpu 486,xlevel=0x8000001A,+3dnow,+sse4a,+invtsc,+npt,+svm",
294 "xlevel", 0x8000001A);
295 add_cpuid_test("x86/cpuid/auto-xlevel/phenom/fixed/0",
296 "-cpu 486,xlevel=0,+3dnow,+sse4a,+invtsc,+npt,+svm",
297 "xlevel", 0);
299 /* if xlevel2 is already large enough, it shouldn't change: */
300 add_cpuid_test("x86/cpuid/auto-xlevel2/486/fixed",
301 "-cpu 486,xlevel2=0xC0000002,+xstore",
302 "xlevel2", 0xC0000002);
304 /* Check compatibility of old machine-types that didn't
305 * auto-increase level/xlevel/xlevel2: */
307 add_cpuid_test("x86/cpuid/auto-level/pc-2.7",
308 "-machine pc-i440fx-2.7 -cpu 486,+arat,+avx512vbmi,+xsaveopt",
309 "level", 1);
310 add_cpuid_test("x86/cpuid/auto-xlevel/pc-2.7",
311 "-machine pc-i440fx-2.7 -cpu 486,+3dnow,+sse4a,+invtsc,+npt,+svm",
312 "xlevel", 0);
313 add_cpuid_test("x86/cpuid/auto-xlevel2/pc-2.7",
314 "-machine pc-i440fx-2.7 -cpu 486,+xstore",
315 "xlevel2", 0);
317 * QEMU 1.4.0 had auto-level enabled for CPUID[7], already,
318 * and the compat code that sets default level shouldn't
319 * disable the auto-level=7 code:
321 add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-1.4/off",
322 "-machine pc-i440fx-1.4 -cpu Nehalem",
323 "level", 2);
324 add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-1.5/on",
325 "-machine pc-i440fx-1.4 -cpu Nehalem,+smap",
326 "level", 7);
327 add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.3/off",
328 "-machine pc-i440fx-2.3 -cpu Penryn",
329 "level", 4);
330 add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.3/on",
331 "-machine pc-i440fx-2.3 -cpu Penryn,+erms",
332 "level", 7);
333 add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.9/off",
334 "-machine pc-i440fx-2.9 -cpu Conroe",
335 "level", 10);
336 add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.9/on",
337 "-machine pc-i440fx-2.9 -cpu Conroe,+erms",
338 "level", 10);
341 * xlevel doesn't have any feature that triggers auto-level
342 * code on old machine-types. Just check that the compat code
343 * is working correctly:
345 add_cpuid_test("x86/cpuid/xlevel-compat/pc-i440fx-2.3",
346 "-machine pc-i440fx-2.3 -cpu SandyBridge",
347 "xlevel", 0x8000000a);
348 add_cpuid_test("x86/cpuid/xlevel-compat/pc-i440fx-2.4/npt-off",
349 "-machine pc-i440fx-2.4 -cpu SandyBridge,",
350 "xlevel", 0x80000008);
351 add_cpuid_test("x86/cpuid/xlevel-compat/pc-i440fx-2.4/npt-on",
352 "-machine pc-i440fx-2.4 -cpu SandyBridge,+npt",
353 "xlevel", 0x80000008);
355 /* Test feature parsing */
356 add_feature_test("x86/cpuid/features/plus",
357 "-cpu 486,+arat",
358 6, 0, "EAX", 2, true);
359 add_feature_test("x86/cpuid/features/minus",
360 "-cpu pentium,-mmx",
361 1, 0, "EDX", 23, false);
362 add_feature_test("x86/cpuid/features/on",
363 "-cpu 486,arat=on",
364 6, 0, "EAX", 2, true);
365 add_feature_test("x86/cpuid/features/off",
366 "-cpu pentium,mmx=off",
367 1, 0, "EDX", 23, false);
368 add_feature_test("x86/cpuid/features/max-plus-invtsc",
369 "-cpu max,+invtsc",
370 0x80000007, 0, "EDX", 8, true);
371 add_feature_test("x86/cpuid/features/max-invtsc-on",
372 "-cpu max,invtsc=on",
373 0x80000007, 0, "EDX", 8, true);
374 add_feature_test("x86/cpuid/features/max-minus-mmx",
375 "-cpu max,-mmx",
376 1, 0, "EDX", 23, false);
377 add_feature_test("x86/cpuid/features/max-invtsc-on,mmx=off",
378 "-cpu max,mmx=off",
379 1, 0, "EDX", 23, false);
381 return g_test_run();