target-arm: Implement ccmp branchless
[qemu/kevin.git] / include / hw / smbios / smbios.h
blob76ccf7098533c7c9e698106dbc8db22e04660b1c
1 #ifndef QEMU_SMBIOS_H
2 #define QEMU_SMBIOS_H
3 /*
4 * SMBIOS Support
6 * Copyright (C) 2009 Hewlett-Packard Development Company, L.P.
8 * Authors:
9 * Alex Williamson <alex.williamson@hp.com>
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
16 #include "qemu/option.h"
18 #define SMBIOS_MAX_TYPE 127
20 /* memory area description, used by type 19 table */
21 struct smbios_phys_mem_area {
22 uint64_t address;
23 uint64_t length;
27 * SMBIOS spec defined tables
29 typedef enum SmbiosEntryPointType {
30 SMBIOS_ENTRY_POINT_21,
31 SMBIOS_ENTRY_POINT_30,
32 } SmbiosEntryPointType;
34 /* SMBIOS Entry Point
35 * There are two types of entry points defined in the SMBIOS specification
36 * (see below). BIOS must place the entry point(s) at a 16-bit-aligned
37 * address between 0xf0000 and 0xfffff. Note that either entry point type
38 * can be used in a 64-bit target system, except that SMBIOS 2.1 entry point
39 * only allows the SMBIOS struct table to reside below 4GB address space.
42 /* SMBIOS 2.1 (32-bit) Entry Point
43 * - introduced since SMBIOS 2.1
44 * - supports structure table below 4GB only
46 struct smbios_21_entry_point {
47 uint8_t anchor_string[4];
48 uint8_t checksum;
49 uint8_t length;
50 uint8_t smbios_major_version;
51 uint8_t smbios_minor_version;
52 uint16_t max_structure_size;
53 uint8_t entry_point_revision;
54 uint8_t formatted_area[5];
55 uint8_t intermediate_anchor_string[5];
56 uint8_t intermediate_checksum;
57 uint16_t structure_table_length;
58 uint32_t structure_table_address;
59 uint16_t number_of_structures;
60 uint8_t smbios_bcd_revision;
61 } QEMU_PACKED;
63 /* SMBIOS 3.0 (64-bit) Entry Point
64 * - introduced since SMBIOS 3.0
65 * - supports structure table at 64-bit address space
67 struct smbios_30_entry_point {
68 uint8_t anchor_string[5];
69 uint8_t checksum;
70 uint8_t length;
71 uint8_t smbios_major_version;
72 uint8_t smbios_minor_version;
73 uint8_t smbios_doc_rev;
74 uint8_t entry_point_revision;
75 uint8_t reserved;
76 uint32_t structure_table_max_size;
77 uint64_t structure_table_address;
78 } QEMU_PACKED;
80 typedef union {
81 struct smbios_21_entry_point ep21;
82 struct smbios_30_entry_point ep30;
83 } QEMU_PACKED SmbiosEntryPoint;
85 /* This goes at the beginning of every SMBIOS structure. */
86 struct smbios_structure_header {
87 uint8_t type;
88 uint8_t length;
89 uint16_t handle;
90 } QEMU_PACKED;
92 /* SMBIOS type 0 - BIOS Information */
93 struct smbios_type_0 {
94 struct smbios_structure_header header;
95 uint8_t vendor_str;
96 uint8_t bios_version_str;
97 uint16_t bios_starting_address_segment;
98 uint8_t bios_release_date_str;
99 uint8_t bios_rom_size;
100 uint64_t bios_characteristics;
101 uint8_t bios_characteristics_extension_bytes[2];
102 uint8_t system_bios_major_release;
103 uint8_t system_bios_minor_release;
104 uint8_t embedded_controller_major_release;
105 uint8_t embedded_controller_minor_release;
106 } QEMU_PACKED;
108 /* UUID encoding. The time_* fields are little-endian, as specified by SMBIOS
109 * version 2.6.
111 struct smbios_uuid {
112 uint32_t time_low;
113 uint16_t time_mid;
114 uint16_t time_hi_and_version;
115 uint8_t clock_seq_hi_and_reserved;
116 uint8_t clock_seq_low;
117 uint8_t node[6];
118 } QEMU_PACKED;
120 /* SMBIOS type 1 - System Information */
121 struct smbios_type_1 {
122 struct smbios_structure_header header;
123 uint8_t manufacturer_str;
124 uint8_t product_name_str;
125 uint8_t version_str;
126 uint8_t serial_number_str;
127 struct smbios_uuid uuid;
128 uint8_t wake_up_type;
129 uint8_t sku_number_str;
130 uint8_t family_str;
131 } QEMU_PACKED;
133 /* SMBIOS type 2 - Base Board */
134 struct smbios_type_2 {
135 struct smbios_structure_header header;
136 uint8_t manufacturer_str;
137 uint8_t product_str;
138 uint8_t version_str;
139 uint8_t serial_number_str;
140 uint8_t asset_tag_number_str;
141 uint8_t feature_flags;
142 uint8_t location_str;
143 uint16_t chassis_handle;
144 uint8_t board_type;
145 uint8_t contained_element_count;
146 /* contained elements follow */
147 } QEMU_PACKED;
149 /* SMBIOS type 3 - System Enclosure (v2.7) */
150 struct smbios_type_3 {
151 struct smbios_structure_header header;
152 uint8_t manufacturer_str;
153 uint8_t type;
154 uint8_t version_str;
155 uint8_t serial_number_str;
156 uint8_t asset_tag_number_str;
157 uint8_t boot_up_state;
158 uint8_t power_supply_state;
159 uint8_t thermal_state;
160 uint8_t security_status;
161 uint32_t oem_defined;
162 uint8_t height;
163 uint8_t number_of_power_cords;
164 uint8_t contained_element_count;
165 uint8_t sku_number_str;
166 /* contained elements follow */
167 } QEMU_PACKED;
169 /* SMBIOS type 4 - Processor Information (v2.6) */
170 struct smbios_type_4 {
171 struct smbios_structure_header header;
172 uint8_t socket_designation_str;
173 uint8_t processor_type;
174 uint8_t processor_family;
175 uint8_t processor_manufacturer_str;
176 uint32_t processor_id[2];
177 uint8_t processor_version_str;
178 uint8_t voltage;
179 uint16_t external_clock;
180 uint16_t max_speed;
181 uint16_t current_speed;
182 uint8_t status;
183 uint8_t processor_upgrade;
184 uint16_t l1_cache_handle;
185 uint16_t l2_cache_handle;
186 uint16_t l3_cache_handle;
187 uint8_t serial_number_str;
188 uint8_t asset_tag_number_str;
189 uint8_t part_number_str;
190 uint8_t core_count;
191 uint8_t core_enabled;
192 uint8_t thread_count;
193 uint16_t processor_characteristics;
194 uint16_t processor_family2;
195 } QEMU_PACKED;
197 /* SMBIOS type 16 - Physical Memory Array (v2.7) */
198 struct smbios_type_16 {
199 struct smbios_structure_header header;
200 uint8_t location;
201 uint8_t use;
202 uint8_t error_correction;
203 uint32_t maximum_capacity;
204 uint16_t memory_error_information_handle;
205 uint16_t number_of_memory_devices;
206 uint64_t extended_maximum_capacity;
207 } QEMU_PACKED;
209 /* SMBIOS type 17 - Memory Device (v2.8) */
210 struct smbios_type_17 {
211 struct smbios_structure_header header;
212 uint16_t physical_memory_array_handle;
213 uint16_t memory_error_information_handle;
214 uint16_t total_width;
215 uint16_t data_width;
216 uint16_t size;
217 uint8_t form_factor;
218 uint8_t device_set;
219 uint8_t device_locator_str;
220 uint8_t bank_locator_str;
221 uint8_t memory_type;
222 uint16_t type_detail;
223 uint16_t speed;
224 uint8_t manufacturer_str;
225 uint8_t serial_number_str;
226 uint8_t asset_tag_number_str;
227 uint8_t part_number_str;
228 uint8_t attributes;
229 uint32_t extended_size;
230 uint16_t configured_clock_speed;
231 uint16_t minimum_voltage;
232 uint16_t maximum_voltage;
233 uint16_t configured_voltage;
234 } QEMU_PACKED;
236 /* SMBIOS type 19 - Memory Array Mapped Address (v2.7) */
237 struct smbios_type_19 {
238 struct smbios_structure_header header;
239 uint32_t starting_address;
240 uint32_t ending_address;
241 uint16_t memory_array_handle;
242 uint8_t partition_width;
243 uint64_t extended_starting_address;
244 uint64_t extended_ending_address;
245 } QEMU_PACKED;
247 /* SMBIOS type 32 - System Boot Information */
248 struct smbios_type_32 {
249 struct smbios_structure_header header;
250 uint8_t reserved[6];
251 uint8_t boot_status;
252 } QEMU_PACKED;
254 /* SMBIOS type 127 -- End-of-table */
255 struct smbios_type_127 {
256 struct smbios_structure_header header;
257 } QEMU_PACKED;
259 void smbios_entry_add(QemuOpts *opts);
260 void smbios_set_cpuid(uint32_t version, uint32_t features);
261 void smbios_set_defaults(const char *manufacturer, const char *product,
262 const char *version, bool legacy_mode,
263 bool uuid_encoded, SmbiosEntryPointType ep_type);
264 uint8_t *smbios_get_table_legacy(size_t *length);
265 void smbios_get_tables(const struct smbios_phys_mem_area *mem_array,
266 const unsigned int mem_array_size,
267 uint8_t **tables, size_t *tables_len,
268 uint8_t **anchor, size_t *anchor_len);
269 #endif /*QEMU_SMBIOS_H */