hw/acpi/cpu_hotplug.c

   1 /*
   2  * QEMU ACPI hotplug utilities
   3  *
   4  * Copyright (C) 2013 Red Hat Inc
   5  *
   6  * Authors:
   7  *   Igor Mammedov <imammedo@redhat.com>
   8  *
   9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
  10  * See the COPYING file in the top-level directory.
  11  */
  12 #include "qemu/osdep.h"
  13 #include "hw/acpi/cpu_hotplug.h"
  14 #include "qapi/error.h"
  15 #include "hw/core/cpu.h"
  16 #include "hw/i386/pc.h"
  17 #include "hw/pci/pci.h"
  18 #include "qemu/error-report.h"
  19
  20 #define CPU_EJECT_METHOD "CPEJ"
  21 #define CPU_MAT_METHOD "CPMA"
  22 #define CPU_ON_BITMAP "CPON"
  23 #define CPU_STATUS_METHOD "CPST"
  24 #define CPU_STATUS_MAP "PRS"
  25 #define CPU_SCAN_METHOD "PRSC"
  26
  27 static uint64_t cpu_status_read(void *opaque, hwaddr addr, unsigned int size)
  28 {
  29     AcpiCpuHotplug *cpus = opaque;
  30     uint64_t val = cpus->sts[addr];
  31
  32     return val;
  33 }
  34
  35 static void cpu_status_write(void *opaque, hwaddr addr, uint64_t data,
  36                              unsigned int size)
  37 {
  38     /* firmware never used to write in CPU present bitmap so use
  39        this fact as means to switch QEMU into modern CPU hotplug
  40        mode by writing 0 at the beginning of legacy CPU bitmap
  41      */
  42     if (addr == 0 && data == 0) {
  43         AcpiCpuHotplug *cpus = opaque;
  44         object_property_set_bool(cpus->device, "cpu-hotplug-legacy", false,
  45                                  &error_abort);
  46     }
  47 }
  48
  49 static const MemoryRegionOps AcpiCpuHotplug_ops = {
  50     .read = cpu_status_read,
  51     .write = cpu_status_write,
  52     .endianness = DEVICE_LITTLE_ENDIAN,
  53     .valid = {
  54         .min_access_size = 1,
  55         .max_access_size = 4,
  56     },
  57     .impl = {
  58         .max_access_size = 1,
  59     },
  60 };
  61
  62 static void acpi_set_cpu_present_bit(AcpiCpuHotplug *g, CPUState *cpu)
  63 {
  64     CPUClass *k = CPU_GET_CLASS(cpu);
  65     int64_t cpu_id;
  66
  67     cpu_id = k->get_arch_id(cpu);
  68     if ((cpu_id / 8) >= ACPI_GPE_PROC_LEN) {
  69         object_property_set_bool(g->device, "cpu-hotplug-legacy", false,
  70                                  &error_abort);
  71         return;
  72     }
  73
  74     g->sts[cpu_id / 8] |= (1 << (cpu_id % 8));
  75 }
  76
  77 void legacy_acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
  78                              AcpiCpuHotplug *g, DeviceState *dev, Error **errp)
  79 {
  80     acpi_set_cpu_present_bit(g, CPU(dev));
  81     acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
  82 }
  83
  84 void legacy_acpi_cpu_hotplug_init(MemoryRegion *parent, Object *owner,
  85                                   AcpiCpuHotplug *gpe_cpu, uint16_t base)
  86 {
  87     CPUState *cpu;
  88
  89     memory_region_init_io(&gpe_cpu->io, owner, &AcpiCpuHotplug_ops,
  90                           gpe_cpu, "acpi-cpu-hotplug", ACPI_GPE_PROC_LEN);
  91     memory_region_add_subregion(parent, base, &gpe_cpu->io);
  92     gpe_cpu->device = owner;
  93
  94     CPU_FOREACH(cpu) {
  95         acpi_set_cpu_present_bit(gpe_cpu, cpu);
  96     }
  97 }
  98
  99 void acpi_switch_to_modern_cphp(AcpiCpuHotplug *gpe_cpu,
 100                                 CPUHotplugState *cpuhp_state,
 101                                 uint16_t io_port)
 102 {
 103     MemoryRegion *parent = pci_address_space_io(PCI_DEVICE(gpe_cpu->device));
 104
 105     memory_region_del_subregion(parent, &gpe_cpu->io);
 106     cpu_hotplug_hw_init(parent, gpe_cpu->device, cpuhp_state, io_port);
 107 }
 108
 109 void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
 110                                   uint16_t io_base)
 111 {
 112     Aml *dev;
 113     Aml *crs;
 114     Aml *pkg;
 115     Aml *field;
 116     Aml *method;
 117     Aml *if_ctx;
 118     Aml *else_ctx;
 119     int i, apic_idx;
 120     Aml *sb_scope = aml_scope("_SB");
 121     uint8_t madt_tmpl[8] = {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0};
 122     Aml *cpu_id = aml_arg(1);
 123     Aml *apic_id = aml_arg(0);
 124     Aml *cpu_on = aml_local(0);
 125     Aml *madt = aml_local(1);
 126     Aml *cpus_map = aml_name(CPU_ON_BITMAP);
 127     Aml *zero = aml_int(0);
 128     Aml *one = aml_int(1);
 129     MachineClass *mc = MACHINE_GET_CLASS(machine);
 130     const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
 131     X86MachineState *x86ms = X86_MACHINE(machine);
 132
 133     /*
 134      * _MAT method - creates an madt apic buffer
 135      * apic_id = Arg0 = Local APIC ID
 136      * cpu_id  = Arg1 = Processor ID
 137      * cpu_on = Local0 = CPON flag for this cpu
 138      * madt = Local1 = Buffer (in madt apic form) to return
 139      */
 140     method = aml_method(CPU_MAT_METHOD, 2, AML_NOTSERIALIZED);
 141     aml_append(method,
 142         aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
 143     aml_append(method,
 144         aml_store(aml_buffer(sizeof(madt_tmpl), madt_tmpl), madt));
 145     /* Update the processor id, lapic id, and enable/disable status */
 146     aml_append(method, aml_store(cpu_id, aml_index(madt, aml_int(2))));
 147     aml_append(method, aml_store(apic_id, aml_index(madt, aml_int(3))));
 148     aml_append(method, aml_store(cpu_on, aml_index(madt, aml_int(4))));
 149     aml_append(method, aml_return(madt));
 150     aml_append(sb_scope, method);
 151
 152     /*
 153      * _STA method - return ON status of cpu
 154      * apic_id = Arg0 = Local APIC ID
 155      * cpu_on = Local0 = CPON flag for this cpu
 156      */
 157     method = aml_method(CPU_STATUS_METHOD, 1, AML_NOTSERIALIZED);
 158     aml_append(method,
 159         aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
 160     if_ctx = aml_if(cpu_on);
 161     {
 162         aml_append(if_ctx, aml_return(aml_int(0xF)));
 163     }
 164     aml_append(method, if_ctx);
 165     else_ctx = aml_else();
 166     {
 167         aml_append(else_ctx, aml_return(zero));
 168     }
 169     aml_append(method, else_ctx);
 170     aml_append(sb_scope, method);
 171
 172     method = aml_method(CPU_EJECT_METHOD, 2, AML_NOTSERIALIZED);
 173     aml_append(method, aml_sleep(200));
 174     aml_append(sb_scope, method);
 175
 176     method = aml_method(CPU_SCAN_METHOD, 0, AML_NOTSERIALIZED);
 177     {
 178         Aml *while_ctx, *if_ctx2, *else_ctx2;
 179         Aml *bus_check_evt = aml_int(1);
 180         Aml *remove_evt = aml_int(3);
 181         Aml *status_map = aml_local(5); /* Local5 = active cpu bitmap */
 182         Aml *byte = aml_local(2); /* Local2 = last read byte from bitmap */
 183         Aml *idx = aml_local(0); /* Processor ID / APIC ID iterator */
 184         Aml *is_cpu_on = aml_local(1); /* Local1 = CPON flag for cpu */
 185         Aml *status = aml_local(3); /* Local3 = active state for cpu */
 186
 187         aml_append(method, aml_store(aml_name(CPU_STATUS_MAP), status_map));
 188         aml_append(method, aml_store(zero, byte));
 189         aml_append(method, aml_store(zero, idx));
 190
 191         /* While (idx < SizeOf(CPON)) */
 192         while_ctx = aml_while(aml_lless(idx, aml_sizeof(cpus_map)));
 193         aml_append(while_ctx,
 194             aml_store(aml_derefof(aml_index(cpus_map, idx)), is_cpu_on));
 195
 196         if_ctx = aml_if(aml_and(idx, aml_int(0x07), NULL));
 197         {
 198             /* Shift down previously read bitmap byte */
 199             aml_append(if_ctx, aml_shiftright(byte, one, byte));
 200         }
 201         aml_append(while_ctx, if_ctx);
 202
 203         else_ctx = aml_else();
 204         {
 205             /* Read next byte from cpu bitmap */
 206             aml_append(else_ctx, aml_store(aml_derefof(aml_index(status_map,
 207                        aml_shiftright(idx, aml_int(3), NULL))), byte));
 208         }
 209         aml_append(while_ctx, else_ctx);
 210
 211         aml_append(while_ctx, aml_store(aml_and(byte, one, NULL), status));
 212         if_ctx = aml_if(aml_lnot(aml_equal(is_cpu_on, status)));
 213         {
 214             /* State change - update CPON with new state */
 215             aml_append(if_ctx, aml_store(status, aml_index(cpus_map, idx)));
 216             if_ctx2 = aml_if(aml_equal(status, one));
 217             {
 218                 aml_append(if_ctx2,
 219                     aml_call2(AML_NOTIFY_METHOD, idx, bus_check_evt));
 220             }
 221             aml_append(if_ctx, if_ctx2);
 222             else_ctx2 = aml_else();
 223             {
 224                 aml_append(else_ctx2,
 225                     aml_call2(AML_NOTIFY_METHOD, idx, remove_evt));
 226             }
 227         }
 228         aml_append(if_ctx, else_ctx2);
 229         aml_append(while_ctx, if_ctx);
 230
 231         aml_append(while_ctx, aml_increment(idx)); /* go to next cpu */
 232         aml_append(method, while_ctx);
 233     }
 234     aml_append(sb_scope, method);
 235
 236     /* The current AML generator can cover the APIC ID range [0..255],
 237      * inclusive, for VCPU hotplug. */
 238     QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
 239     if (x86ms->apic_id_limit > ACPI_CPU_HOTPLUG_ID_LIMIT) {
 240         error_report("max_cpus is too large. APIC ID of last CPU is %u",
 241                      x86ms->apic_id_limit - 1);
 242         exit(1);
 243     }
 244
 245     /* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */
 246     dev = aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE));
 247     aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06")));
 248     aml_append(dev,
 249         aml_name_decl("_UID", aml_string("CPU Hotplug resources"))
 250     );
 251     /* device present, functioning, decoding, not shown in UI */
 252     aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
 253     crs = aml_resource_template();
 254     aml_append(crs,
 255         aml_io(AML_DECODE16, io_base, io_base, 1, ACPI_GPE_PROC_LEN)
 256     );
 257     aml_append(dev, aml_name_decl("_CRS", crs));
 258     aml_append(sb_scope, dev);
 259     /* declare CPU hotplug MMIO region and PRS field to access it */
 260     aml_append(sb_scope, aml_operation_region(
 261         "PRST", AML_SYSTEM_IO, aml_int(io_base), ACPI_GPE_PROC_LEN));
 262     field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
 263     aml_append(field, aml_named_field("PRS", 256));
 264     aml_append(sb_scope, field);
 265
 266     /* build Processor object for each processor */
 267     for (i = 0; i < apic_ids->len; i++) {
 268         int cpu_apic_id = apic_ids->cpus[i].arch_id;
 269
 270         assert(cpu_apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
 271
 272         dev = aml_processor(i, 0, 0, "CP%.02X", cpu_apic_id);
 273
 274         method = aml_method("_MAT", 0, AML_NOTSERIALIZED);
 275         aml_append(method,
 276             aml_return(aml_call2(CPU_MAT_METHOD,
 277                                  aml_int(cpu_apic_id), aml_int(i))
 278         ));
 279         aml_append(dev, method);
 280
 281         method = aml_method("_STA", 0, AML_NOTSERIALIZED);
 282         aml_append(method,
 283             aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(cpu_apic_id))));
 284         aml_append(dev, method);
 285
 286         method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
 287         aml_append(method,
 288             aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(cpu_apic_id),
 289                 aml_arg(0)))
 290         );
 291         aml_append(dev, method);
 292
 293         aml_append(sb_scope, dev);
 294     }
 295
 296     /* build this code:
 297      *   Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
 298      */
 299     /* Arg0 = APIC ID */
 300     method = aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
 301     for (i = 0; i < apic_ids->len; i++) {
 302         int cpu_apic_id = apic_ids->cpus[i].arch_id;
 303
 304         if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(cpu_apic_id)));
 305         aml_append(if_ctx,
 306             aml_notify(aml_name("CP%.02X", cpu_apic_id), aml_arg(1))
 307         );
 308         aml_append(method, if_ctx);
 309     }
 310     aml_append(sb_scope, method);
 311
 312     /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })"
 313      *
 314      * Note: The ability to create variable-sized packages was first
 315      * introduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages
 316      * ith up to 255 elements. Windows guests up to win2k8 fail when
 317      * VarPackageOp is used.
 318      */
 319     pkg = x86ms->apic_id_limit <= 255 ? aml_package(x86ms->apic_id_limit) :
 320                                         aml_varpackage(x86ms->apic_id_limit);
 321
 322     for (i = 0, apic_idx = 0; i < apic_ids->len; i++) {
 323         int cpu_apic_id = apic_ids->cpus[i].arch_id;
 324
 325         for (; apic_idx < cpu_apic_id; apic_idx++) {
 326             aml_append(pkg, aml_int(0));
 327         }
 328         aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0));
 329         apic_idx = cpu_apic_id + 1;
 330     }
 331     aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg));
 332     aml_append(ctx, sb_scope);
 333
 334     method = aml_method("\\_GPE._E02", 0, AML_NOTSERIALIZED);
 335     aml_append(method, aml_call0("\\_SB." CPU_SCAN_METHOD));
 336     aml_append(ctx, method);
 337 }