linux-headers/linux/psci.h

   1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
   2 /*
   3  * ARM Power State and Coordination Interface (PSCI) header
   4  *
   5  * This header holds common PSCI defines and macros shared
   6  * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space.
   7  *
   8  * Copyright (C) 2014 Linaro Ltd.
   9  * Author: Anup Patel <anup.patel@linaro.org>
  10  */
  11
  12 #ifndef _LINUX_PSCI_H
  13 #define _LINUX_PSCI_H
  14
  15 /*
  16  * PSCI v0.1 interface
  17  *
  18  * The PSCI v0.1 function numbers are implementation defined.
  19  *
  20  * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED,
  21  * INVALID_PARAMS, and DENIED defined below are applicable
  22  * to PSCI v0.1.
  23  */
  24
  25 /* PSCI v0.2 interface */
  26 #define PSCI_0_2_FN_BASE                        0x84000000
  27 #define PSCI_0_2_FN(n)                          (PSCI_0_2_FN_BASE + (n))
  28 #define PSCI_0_2_64BIT                          0x40000000
  29 #define PSCI_0_2_FN64_BASE                      \
  30                                         (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT)
  31 #define PSCI_0_2_FN64(n)                        (PSCI_0_2_FN64_BASE + (n))
  32
  33 #define PSCI_0_2_FN_PSCI_VERSION                PSCI_0_2_FN(0)
  34 #define PSCI_0_2_FN_CPU_SUSPEND                 PSCI_0_2_FN(1)
  35 #define PSCI_0_2_FN_CPU_OFF                     PSCI_0_2_FN(2)
  36 #define PSCI_0_2_FN_CPU_ON                      PSCI_0_2_FN(3)
  37 #define PSCI_0_2_FN_AFFINITY_INFO               PSCI_0_2_FN(4)
  38 #define PSCI_0_2_FN_MIGRATE                     PSCI_0_2_FN(5)
  39 #define PSCI_0_2_FN_MIGRATE_INFO_TYPE           PSCI_0_2_FN(6)
  40 #define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU         PSCI_0_2_FN(7)
  41 #define PSCI_0_2_FN_SYSTEM_OFF                  PSCI_0_2_FN(8)
  42 #define PSCI_0_2_FN_SYSTEM_RESET                PSCI_0_2_FN(9)
  43
  44 #define PSCI_0_2_FN64_CPU_SUSPEND               PSCI_0_2_FN64(1)
  45 #define PSCI_0_2_FN64_CPU_ON                    PSCI_0_2_FN64(3)
  46 #define PSCI_0_2_FN64_AFFINITY_INFO             PSCI_0_2_FN64(4)
  47 #define PSCI_0_2_FN64_MIGRATE                   PSCI_0_2_FN64(5)
  48 #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU       PSCI_0_2_FN64(7)
  49
  50 #define PSCI_1_0_FN_PSCI_FEATURES               PSCI_0_2_FN(10)
  51 #define PSCI_1_0_FN_CPU_FREEZE                  PSCI_0_2_FN(11)
  52 #define PSCI_1_0_FN_CPU_DEFAULT_SUSPEND         PSCI_0_2_FN(12)
  53 #define PSCI_1_0_FN_NODE_HW_STATE               PSCI_0_2_FN(13)
  54 #define PSCI_1_0_FN_SYSTEM_SUSPEND              PSCI_0_2_FN(14)
  55 #define PSCI_1_0_FN_SET_SUSPEND_MODE            PSCI_0_2_FN(15)
  56 #define PSCI_1_0_FN_STAT_RESIDENCY              PSCI_0_2_FN(16)
  57 #define PSCI_1_0_FN_STAT_COUNT                  PSCI_0_2_FN(17)
  58
  59 #define PSCI_1_1_FN_SYSTEM_RESET2               PSCI_0_2_FN(18)
  60 #define PSCI_1_1_FN_MEM_PROTECT                 PSCI_0_2_FN(19)
  61 #define PSCI_1_1_FN_MEM_PROTECT_CHECK_RANGE     PSCI_0_2_FN(20)
  62
  63 #define PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND       PSCI_0_2_FN64(12)
  64 #define PSCI_1_0_FN64_NODE_HW_STATE             PSCI_0_2_FN64(13)
  65 #define PSCI_1_0_FN64_SYSTEM_SUSPEND            PSCI_0_2_FN64(14)
  66 #define PSCI_1_0_FN64_STAT_RESIDENCY            PSCI_0_2_FN64(16)
  67 #define PSCI_1_0_FN64_STAT_COUNT                PSCI_0_2_FN64(17)
  68
  69 #define PSCI_1_1_FN64_SYSTEM_RESET2             PSCI_0_2_FN64(18)
  70 #define PSCI_1_1_FN64_MEM_PROTECT_CHECK_RANGE   PSCI_0_2_FN64(20)
  71
  72 /* PSCI v0.2 power state encoding for CPU_SUSPEND function */
  73 #define PSCI_0_2_POWER_STATE_ID_MASK            0xffff
  74 #define PSCI_0_2_POWER_STATE_ID_SHIFT           0
  75 #define PSCI_0_2_POWER_STATE_TYPE_SHIFT         16
  76 #define PSCI_0_2_POWER_STATE_TYPE_MASK          \
  77                                 (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT)
  78 #define PSCI_0_2_POWER_STATE_AFFL_SHIFT         24
  79 #define PSCI_0_2_POWER_STATE_AFFL_MASK          \
  80                                 (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT)
  81
  82 /* PSCI extended power state encoding for CPU_SUSPEND function */
  83 #define PSCI_1_0_EXT_POWER_STATE_ID_MASK        0xfffffff
  84 #define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT       0
  85 #define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT     30
  86 #define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK      \
  87                                 (0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT)
  88
  89 /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
  90 #define PSCI_0_2_AFFINITY_LEVEL_ON              0
  91 #define PSCI_0_2_AFFINITY_LEVEL_OFF             1
  92 #define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING      2
  93
  94 /* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */
  95 #define PSCI_0_2_TOS_UP_MIGRATE                 0
  96 #define PSCI_0_2_TOS_UP_NO_MIGRATE              1
  97 #define PSCI_0_2_TOS_MP                         2
  98
  99 /* PSCI v1.1 reset type encoding for SYSTEM_RESET2 */
 100 #define PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET   0
 101 #define PSCI_1_1_RESET_TYPE_VENDOR_START        0x80000000U
 102
 103 /* PSCI version decoding (independent of PSCI version) */
 104 #define PSCI_VERSION_MAJOR_SHIFT                16
 105 #define PSCI_VERSION_MINOR_MASK                 \
 106                 ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1)
 107 #define PSCI_VERSION_MAJOR_MASK                 ~PSCI_VERSION_MINOR_MASK
 108 #define PSCI_VERSION_MAJOR(ver)                 \
 109                 (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT)
 110 #define PSCI_VERSION_MINOR(ver)                 \
 111                 ((ver) & PSCI_VERSION_MINOR_MASK)
 112 #define PSCI_VERSION(maj, min)                                          \
 113         ((((maj) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | \
 114          ((min) & PSCI_VERSION_MINOR_MASK))
 115
 116 /* PSCI features decoding (>=1.0) */
 117 #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT  1
 118 #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK   \
 119                         (0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT)
 120
 121 #define PSCI_1_0_OS_INITIATED                   BIT(0)
 122 #define PSCI_1_0_SUSPEND_MODE_PC                0
 123 #define PSCI_1_0_SUSPEND_MODE_OSI               1
 124
 125 /* PSCI return values (inclusive of all PSCI versions) */
 126 #define PSCI_RET_SUCCESS                        0
 127 #define PSCI_RET_NOT_SUPPORTED                  -1
 128 #define PSCI_RET_INVALID_PARAMS                 -2
 129 #define PSCI_RET_DENIED                         -3
 130 #define PSCI_RET_ALREADY_ON                     -4
 131 #define PSCI_RET_ON_PENDING                     -5
 132 #define PSCI_RET_INTERNAL_FAILURE               -6
 133 #define PSCI_RET_NOT_PRESENT                    -7
 134 #define PSCI_RET_DISABLED                       -8
 135 #define PSCI_RET_INVALID_ADDRESS                -9
 136
 137 #endif /* _LINUX_PSCI_H */