target/arm/kvm.c

   1 /*
   2  * ARM implementation of KVM hooks
   3  *
   4  * Copyright Christoffer Dall 2009-2010
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  *
   9  */
  10
  11 #include "qemu/osdep.h"
  12 #include <sys/ioctl.h>
  13
  14 #include <linux/kvm.h>
  15
  16 #include "qemu/timer.h"
  17 #include "qemu/error-report.h"
  18 #include "qemu/main-loop.h"
  19 #include "qom/object.h"
  20 #include "qapi/error.h"
  21 #include "sysemu/sysemu.h"
  22 #include "sysemu/kvm.h"
  23 #include "sysemu/kvm_int.h"
  24 #include "kvm_arm.h"
  25 #include "cpu.h"
  26 #include "trace.h"
  27 #include "internals.h"
  28 #include "hw/pci/pci.h"
  29 #include "exec/memattrs.h"
  30 #include "exec/address-spaces.h"
  31 #include "hw/boards.h"
  32 #include "hw/irq.h"
  33 #include "qemu/log.h"
  34
  35 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
  36     KVM_CAP_LAST_INFO
  37 };
  38
  39 static bool cap_has_mp_state;
  40 static bool cap_has_inject_serror_esr;
  41 static bool cap_has_inject_ext_dabt;
  42
  43 static ARMHostCPUFeatures arm_host_cpu_features;
  44
  45 int kvm_arm_vcpu_init(CPUState *cs)
  46 {
  47     ARMCPU *cpu = ARM_CPU(cs);
  48     struct kvm_vcpu_init init;
  49
  50     init.target = cpu->kvm_target;
  51     memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
  52
  53     return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
  54 }
  55
  56 int kvm_arm_vcpu_finalize(CPUState *cs, int feature)
  57 {
  58     return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_FINALIZE, &feature);
  59 }
  60
  61 void kvm_arm_init_serror_injection(CPUState *cs)
  62 {
  63     cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state,
  64                                     KVM_CAP_ARM_INJECT_SERROR_ESR);
  65 }
  66
  67 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
  68                                       int *fdarray,
  69                                       struct kvm_vcpu_init *init)
  70 {
  71     int ret = 0, kvmfd = -1, vmfd = -1, cpufd = -1;
  72     int max_vm_pa_size;
  73
  74     kvmfd = qemu_open_old("/dev/kvm", O_RDWR);
  75     if (kvmfd < 0) {
  76         goto err;
  77     }
  78     max_vm_pa_size = ioctl(kvmfd, KVM_CHECK_EXTENSION, KVM_CAP_ARM_VM_IPA_SIZE);
  79     if (max_vm_pa_size < 0) {
  80         max_vm_pa_size = 0;
  81     }
  82     do {
  83         vmfd = ioctl(kvmfd, KVM_CREATE_VM, max_vm_pa_size);
  84     } while (vmfd == -1 && errno == EINTR);
  85     if (vmfd < 0) {
  86         goto err;
  87     }
  88     cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
  89     if (cpufd < 0) {
  90         goto err;
  91     }
  92
  93     if (!init) {
  94         /* Caller doesn't want the VCPU to be initialized, so skip it */
  95         goto finish;
  96     }
  97
  98     if (init->target == -1) {
  99         struct kvm_vcpu_init preferred;
 100
 101         ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, &preferred);
 102         if (!ret) {
 103             init->target = preferred.target;
 104         }
 105     }
 106     if (ret >= 0) {
 107         ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
 108         if (ret < 0) {
 109             goto err;
 110         }
 111     } else if (cpus_to_try) {
 112         /* Old kernel which doesn't know about the
 113          * PREFERRED_TARGET ioctl: we know it will only support
 114          * creating one kind of guest CPU which is its preferred
 115          * CPU type.
 116          */
 117         struct kvm_vcpu_init try;
 118
 119         while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
 120             try.target = *cpus_to_try++;
 121             memcpy(try.features, init->features, sizeof(init->features));
 122             ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, &try);
 123             if (ret >= 0) {
 124                 break;
 125             }
 126         }
 127         if (ret < 0) {
 128             goto err;
 129         }
 130         init->target = try.target;
 131     } else {
 132         /* Treat a NULL cpus_to_try argument the same as an empty
 133          * list, which means we will fail the call since this must
 134          * be an old kernel which doesn't support PREFERRED_TARGET.
 135          */
 136         goto err;
 137     }
 138
 139 finish:
 140     fdarray[0] = kvmfd;
 141     fdarray[1] = vmfd;
 142     fdarray[2] = cpufd;
 143
 144     return true;
 145
 146 err:
 147     if (cpufd >= 0) {
 148         close(cpufd);
 149     }
 150     if (vmfd >= 0) {
 151         close(vmfd);
 152     }
 153     if (kvmfd >= 0) {
 154         close(kvmfd);
 155     }
 156
 157     return false;
 158 }
 159
 160 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
 161 {
 162     int i;
 163
 164     for (i = 2; i >= 0; i--) {
 165         close(fdarray[i]);
 166     }
 167 }
 168
 169 void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)
 170 {
 171     CPUARMState *env = &cpu->env;
 172
 173     if (!arm_host_cpu_features.dtb_compatible) {
 174         if (!kvm_enabled() ||
 175             !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) {
 176             /* We can't report this error yet, so flag that we need to
 177              * in arm_cpu_realizefn().
 178              */
 179             cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;
 180             cpu->host_cpu_probe_failed = true;
 181             return;
 182         }
 183     }
 184
 185     cpu->kvm_target = arm_host_cpu_features.target;
 186     cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;
 187     cpu->isar = arm_host_cpu_features.isar;
 188     env->features = arm_host_cpu_features.features;
 189 }
 190
 191 static bool kvm_no_adjvtime_get(Object *obj, Error **errp)
 192 {
 193     return !ARM_CPU(obj)->kvm_adjvtime;
 194 }
 195
 196 static void kvm_no_adjvtime_set(Object *obj, bool value, Error **errp)
 197 {
 198     ARM_CPU(obj)->kvm_adjvtime = !value;
 199 }
 200
 201 static bool kvm_steal_time_get(Object *obj, Error **errp)
 202 {
 203     return ARM_CPU(obj)->kvm_steal_time != ON_OFF_AUTO_OFF;
 204 }
 205
 206 static void kvm_steal_time_set(Object *obj, bool value, Error **errp)
 207 {
 208     ARM_CPU(obj)->kvm_steal_time = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 209 }
 210
 211 /* KVM VCPU properties should be prefixed with "kvm-". */
 212 void kvm_arm_add_vcpu_properties(Object *obj)
 213 {
 214     ARMCPU *cpu = ARM_CPU(obj);
 215     CPUARMState *env = &cpu->env;
 216
 217     if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {
 218         cpu->kvm_adjvtime = true;
 219         object_property_add_bool(obj, "kvm-no-adjvtime", kvm_no_adjvtime_get,
 220                                  kvm_no_adjvtime_set);
 221         object_property_set_description(obj, "kvm-no-adjvtime",
 222                                         "Set on to disable the adjustment of "
 223                                         "the virtual counter. VM stopped time "
 224                                         "will be counted.");
 225     }
 226
 227     cpu->kvm_steal_time = ON_OFF_AUTO_AUTO;
 228     object_property_add_bool(obj, "kvm-steal-time", kvm_steal_time_get,
 229                              kvm_steal_time_set);
 230     object_property_set_description(obj, "kvm-steal-time",
 231                                     "Set off to disable KVM steal time.");
 232 }
 233
 234 bool kvm_arm_pmu_supported(void)
 235 {
 236     return kvm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3);
 237 }
 238
 239 int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa)
 240 {
 241     KVMState *s = KVM_STATE(ms->accelerator);
 242     int ret;
 243
 244     ret = kvm_check_extension(s, KVM_CAP_ARM_VM_IPA_SIZE);
 245     *fixed_ipa = ret <= 0;
 246
 247     return ret > 0 ? ret : 40;
 248 }
 249
 250 int kvm_arch_init(MachineState *ms, KVMState *s)
 251 {
 252     int ret = 0;
 253     /* For ARM interrupt delivery is always asynchronous,
 254      * whether we are using an in-kernel VGIC or not.
 255      */
 256     kvm_async_interrupts_allowed = true;
 257
 258     /*
 259      * PSCI wakes up secondary cores, so we always need to
 260      * have vCPUs waiting in kernel space
 261      */
 262     kvm_halt_in_kernel_allowed = true;
 263
 264     cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
 265
 266     if (ms->smp.cpus > 256 &&
 267         !kvm_check_extension(s, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2)) {
 268         error_report("Using more than 256 vcpus requires a host kernel "
 269                      "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2");
 270         ret = -EINVAL;
 271     }
 272
 273     if (kvm_check_extension(s, KVM_CAP_ARM_NISV_TO_USER)) {
 274         if (kvm_vm_enable_cap(s, KVM_CAP_ARM_NISV_TO_USER, 0)) {
 275             error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap");
 276         } else {
 277             /* Set status for supporting the external dabt injection */
 278             cap_has_inject_ext_dabt = kvm_check_extension(s,
 279                                     KVM_CAP_ARM_INJECT_EXT_DABT);
 280         }
 281     }
 282
 283     kvm_arm_init_debug(s);
 284
 285     return ret;
 286 }
 287
 288 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
 289 {
 290     return cpu->cpu_index;
 291 }
 292
 293 /* We track all the KVM devices which need their memory addresses
 294  * passing to the kernel in a list of these structures.
 295  * When board init is complete we run through the list and
 296  * tell the kernel the base addresses of the memory regions.
 297  * We use a MemoryListener to track mapping and unmapping of
 298  * the regions during board creation, so the board models don't
 299  * need to do anything special for the KVM case.
 300  *
 301  * Sometimes the address must be OR'ed with some other fields
 302  * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
 303  * @kda_addr_ormask aims at storing the value of those fields.
 304  */
 305 typedef struct KVMDevice {
 306     struct kvm_arm_device_addr kda;
 307     struct kvm_device_attr kdattr;
 308     uint64_t kda_addr_ormask;
 309     MemoryRegion *mr;
 310     QSLIST_ENTRY(KVMDevice) entries;
 311     int dev_fd;
 312 } KVMDevice;
 313
 314 static QSLIST_HEAD(, KVMDevice) kvm_devices_head;
 315
 316 static void kvm_arm_devlistener_add(MemoryListener *listener,
 317                                     MemoryRegionSection *section)
 318 {
 319     KVMDevice *kd;
 320
 321     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
 322         if (section->mr == kd->mr) {
 323             kd->kda.addr = section->offset_within_address_space;
 324         }
 325     }
 326 }
 327
 328 static void kvm_arm_devlistener_del(MemoryListener *listener,
 329                                     MemoryRegionSection *section)
 330 {
 331     KVMDevice *kd;
 332
 333     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
 334         if (section->mr == kd->mr) {
 335             kd->kda.addr = -1;
 336         }
 337     }
 338 }
 339
 340 static MemoryListener devlistener = {
 341     .name = "kvm-arm",
 342     .region_add = kvm_arm_devlistener_add,
 343     .region_del = kvm_arm_devlistener_del,
 344 };
 345
 346 static void kvm_arm_set_device_addr(KVMDevice *kd)
 347 {
 348     struct kvm_device_attr *attr = &kd->kdattr;
 349     int ret;
 350
 351     /* If the device control API is available and we have a device fd on the
 352      * KVMDevice struct, let's use the newer API
 353      */
 354     if (kd->dev_fd >= 0) {
 355         uint64_t addr = kd->kda.addr;
 356
 357         addr |= kd->kda_addr_ormask;
 358         attr->addr = (uintptr_t)&addr;
 359         ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
 360     } else {
 361         ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
 362     }
 363
 364     if (ret < 0) {
 365         fprintf(stderr, "Failed to set device address: %s\n",
 366                 strerror(-ret));
 367         abort();
 368     }
 369 }
 370
 371 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
 372 {
 373     KVMDevice *kd, *tkd;
 374
 375     QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
 376         if (kd->kda.addr != -1) {
 377             kvm_arm_set_device_addr(kd);
 378         }
 379         memory_region_unref(kd->mr);
 380         QSLIST_REMOVE_HEAD(&kvm_devices_head, entries);
 381         g_free(kd);
 382     }
 383     memory_listener_unregister(&devlistener);
 384 }
 385
 386 static Notifier notify = {
 387     .notify = kvm_arm_machine_init_done,
 388 };
 389
 390 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
 391                              uint64_t attr, int dev_fd, uint64_t addr_ormask)
 392 {
 393     KVMDevice *kd;
 394
 395     if (!kvm_irqchip_in_kernel()) {
 396         return;
 397     }
 398
 399     if (QSLIST_EMPTY(&kvm_devices_head)) {
 400         memory_listener_register(&devlistener, &address_space_memory);
 401         qemu_add_machine_init_done_notifier(&notify);
 402     }
 403     kd = g_new0(KVMDevice, 1);
 404     kd->mr = mr;
 405     kd->kda.id = devid;
 406     kd->kda.addr = -1;
 407     kd->kdattr.flags = 0;
 408     kd->kdattr.group = group;
 409     kd->kdattr.attr = attr;
 410     kd->dev_fd = dev_fd;
 411     kd->kda_addr_ormask = addr_ormask;
 412     QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
 413     memory_region_ref(kd->mr);
 414 }
 415
 416 static int compare_u64(const void *a, const void *b)
 417 {
 418     if (*(uint64_t *)a > *(uint64_t *)b) {
 419         return 1;
 420     }
 421     if (*(uint64_t *)a < *(uint64_t *)b) {
 422         return -1;
 423     }
 424     return 0;
 425 }
 426
 427 /*
 428  * cpreg_values are sorted in ascending order by KVM register ID
 429  * (see kvm_arm_init_cpreg_list). This allows us to cheaply find
 430  * the storage for a KVM register by ID with a binary search.
 431  */
 432 static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU *cpu, uint64_t regidx)
 433 {
 434     uint64_t *res;
 435
 436     res = bsearch(&regidx, cpu->cpreg_indexes, cpu->cpreg_array_len,
 437                   sizeof(uint64_t), compare_u64);
 438     assert(res);
 439
 440     return &cpu->cpreg_values[res - cpu->cpreg_indexes];
 441 }
 442
 443 /* Initialize the ARMCPU cpreg list according to the kernel's
 444  * definition of what CPU registers it knows about (and throw away
 445  * the previous TCG-created cpreg list).
 446  */
 447 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
 448 {
 449     struct kvm_reg_list rl;
 450     struct kvm_reg_list *rlp;
 451     int i, ret, arraylen;
 452     CPUState *cs = CPU(cpu);
 453
 454     rl.n = 0;
 455     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
 456     if (ret != -E2BIG) {
 457         return ret;
 458     }
 459     rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
 460     rlp->n = rl.n;
 461     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
 462     if (ret) {
 463         goto out;
 464     }
 465     /* Sort the list we get back from the kernel, since cpreg_tuples
 466      * must be in strictly ascending order.
 467      */
 468     qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
 469
 470     for (i = 0, arraylen = 0; i < rlp->n; i++) {
 471         if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
 472             continue;
 473         }
 474         switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
 475         case KVM_REG_SIZE_U32:
 476         case KVM_REG_SIZE_U64:
 477             break;
 478         default:
 479             fprintf(stderr, "Can't handle size of register in kernel list\n");
 480             ret = -EINVAL;
 481             goto out;
 482         }
 483
 484         arraylen++;
 485     }
 486
 487     cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
 488     cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
 489     cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
 490                                          arraylen);
 491     cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
 492                                         arraylen);
 493     cpu->cpreg_array_len = arraylen;
 494     cpu->cpreg_vmstate_array_len = arraylen;
 495
 496     for (i = 0, arraylen = 0; i < rlp->n; i++) {
 497         uint64_t regidx = rlp->reg[i];
 498         if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
 499             continue;
 500         }
 501         cpu->cpreg_indexes[arraylen] = regidx;
 502         arraylen++;
 503     }
 504     assert(cpu->cpreg_array_len == arraylen);
 505
 506     if (!write_kvmstate_to_list(cpu)) {
 507         /* Shouldn't happen unless kernel is inconsistent about
 508          * what registers exist.
 509          */
 510         fprintf(stderr, "Initial read of kernel register state failed\n");
 511         ret = -EINVAL;
 512         goto out;
 513     }
 514
 515 out:
 516     g_free(rlp);
 517     return ret;
 518 }
 519
 520 bool write_kvmstate_to_list(ARMCPU *cpu)
 521 {
 522     CPUState *cs = CPU(cpu);
 523     int i;
 524     bool ok = true;
 525
 526     for (i = 0; i < cpu->cpreg_array_len; i++) {
 527         struct kvm_one_reg r;
 528         uint64_t regidx = cpu->cpreg_indexes[i];
 529         uint32_t v32;
 530         int ret;
 531
 532         r.id = regidx;
 533
 534         switch (regidx & KVM_REG_SIZE_MASK) {
 535         case KVM_REG_SIZE_U32:
 536             r.addr = (uintptr_t)&v32;
 537             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 538             if (!ret) {
 539                 cpu->cpreg_values[i] = v32;
 540             }
 541             break;
 542         case KVM_REG_SIZE_U64:
 543             r.addr = (uintptr_t)(cpu->cpreg_values + i);
 544             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 545             break;
 546         default:
 547             g_assert_not_reached();
 548         }
 549         if (ret) {
 550             ok = false;
 551         }
 552     }
 553     return ok;
 554 }
 555
 556 bool write_list_to_kvmstate(ARMCPU *cpu, int level)
 557 {
 558     CPUState *cs = CPU(cpu);
 559     int i;
 560     bool ok = true;
 561
 562     for (i = 0; i < cpu->cpreg_array_len; i++) {
 563         struct kvm_one_reg r;
 564         uint64_t regidx = cpu->cpreg_indexes[i];
 565         uint32_t v32;
 566         int ret;
 567
 568         if (kvm_arm_cpreg_level(regidx) > level) {
 569             continue;
 570         }
 571
 572         r.id = regidx;
 573         switch (regidx & KVM_REG_SIZE_MASK) {
 574         case KVM_REG_SIZE_U32:
 575             v32 = cpu->cpreg_values[i];
 576             r.addr = (uintptr_t)&v32;
 577             break;
 578         case KVM_REG_SIZE_U64:
 579             r.addr = (uintptr_t)(cpu->cpreg_values + i);
 580             break;
 581         default:
 582             g_assert_not_reached();
 583         }
 584         ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 585         if (ret) {
 586             /* We might fail for "unknown register" and also for
 587              * "you tried to set a register which is constant with
 588              * a different value from what it actually contains".
 589              */
 590             ok = false;
 591         }
 592     }
 593     return ok;
 594 }
 595
 596 void kvm_arm_cpu_pre_save(ARMCPU *cpu)
 597 {
 598     /* KVM virtual time adjustment */
 599     if (cpu->kvm_vtime_dirty) {
 600         *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT) = cpu->kvm_vtime;
 601     }
 602 }
 603
 604 void kvm_arm_cpu_post_load(ARMCPU *cpu)
 605 {
 606     /* KVM virtual time adjustment */
 607     if (cpu->kvm_adjvtime) {
 608         cpu->kvm_vtime = *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT);
 609         cpu->kvm_vtime_dirty = true;
 610     }
 611 }
 612
 613 void kvm_arm_reset_vcpu(ARMCPU *cpu)
 614 {
 615     int ret;
 616
 617     /* Re-init VCPU so that all registers are set to
 618      * their respective reset values.
 619      */
 620     ret = kvm_arm_vcpu_init(CPU(cpu));
 621     if (ret < 0) {
 622         fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
 623         abort();
 624     }
 625     if (!write_kvmstate_to_list(cpu)) {
 626         fprintf(stderr, "write_kvmstate_to_list failed\n");
 627         abort();
 628     }
 629     /*
 630      * Sync the reset values also into the CPUState. This is necessary
 631      * because the next thing we do will be a kvm_arch_put_registers()
 632      * which will update the list values from the CPUState before copying
 633      * the list values back to KVM. It's OK to ignore failure returns here
 634      * for the same reason we do so in kvm_arch_get_registers().
 635      */
 636     write_list_to_cpustate(cpu);
 637 }
 638
 639 /*
 640  * Update KVM's MP_STATE based on what QEMU thinks it is
 641  */
 642 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
 643 {
 644     if (cap_has_mp_state) {
 645         struct kvm_mp_state mp_state = {
 646             .mp_state = (cpu->power_state == PSCI_OFF) ?
 647             KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
 648         };
 649         int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
 650         if (ret) {
 651             fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
 652                     __func__, ret, strerror(-ret));
 653             return -1;
 654         }
 655     }
 656
 657     return 0;
 658 }
 659
 660 /*
 661  * Sync the KVM MP_STATE into QEMU
 662  */
 663 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
 664 {
 665     if (cap_has_mp_state) {
 666         struct kvm_mp_state mp_state;
 667         int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
 668         if (ret) {
 669             fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
 670                     __func__, ret, strerror(-ret));
 671             abort();
 672         }
 673         cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ?
 674             PSCI_OFF : PSCI_ON;
 675     }
 676
 677     return 0;
 678 }
 679
 680 void kvm_arm_get_virtual_time(CPUState *cs)
 681 {
 682     ARMCPU *cpu = ARM_CPU(cs);
 683     struct kvm_one_reg reg = {
 684         .id = KVM_REG_ARM_TIMER_CNT,
 685         .addr = (uintptr_t)&cpu->kvm_vtime,
 686     };
 687     int ret;
 688
 689     if (cpu->kvm_vtime_dirty) {
 690         return;
 691     }
 692
 693     ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);
 694     if (ret) {
 695         error_report("Failed to get KVM_REG_ARM_TIMER_CNT");
 696         abort();
 697     }
 698
 699     cpu->kvm_vtime_dirty = true;
 700 }
 701
 702 void kvm_arm_put_virtual_time(CPUState *cs)
 703 {
 704     ARMCPU *cpu = ARM_CPU(cs);
 705     struct kvm_one_reg reg = {
 706         .id = KVM_REG_ARM_TIMER_CNT,
 707         .addr = (uintptr_t)&cpu->kvm_vtime,
 708     };
 709     int ret;
 710
 711     if (!cpu->kvm_vtime_dirty) {
 712         return;
 713     }
 714
 715     ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
 716     if (ret) {
 717         error_report("Failed to set KVM_REG_ARM_TIMER_CNT");
 718         abort();
 719     }
 720
 721     cpu->kvm_vtime_dirty = false;
 722 }
 723
 724 int kvm_put_vcpu_events(ARMCPU *cpu)
 725 {
 726     CPUARMState *env = &cpu->env;
 727     struct kvm_vcpu_events events;
 728     int ret;
 729
 730     if (!kvm_has_vcpu_events()) {
 731         return 0;
 732     }
 733
 734     memset(&events, 0, sizeof(events));
 735     events.exception.serror_pending = env->serror.pending;
 736
 737     /* Inject SError to guest with specified syndrome if host kernel
 738      * supports it, otherwise inject SError without syndrome.
 739      */
 740     if (cap_has_inject_serror_esr) {
 741         events.exception.serror_has_esr = env->serror.has_esr;
 742         events.exception.serror_esr = env->serror.esr;
 743     }
 744
 745     ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events);
 746     if (ret) {
 747         error_report("failed to put vcpu events");
 748     }
 749
 750     return ret;
 751 }
 752
 753 int kvm_get_vcpu_events(ARMCPU *cpu)
 754 {
 755     CPUARMState *env = &cpu->env;
 756     struct kvm_vcpu_events events;
 757     int ret;
 758
 759     if (!kvm_has_vcpu_events()) {
 760         return 0;
 761     }
 762
 763     memset(&events, 0, sizeof(events));
 764     ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events);
 765     if (ret) {
 766         error_report("failed to get vcpu events");
 767         return ret;
 768     }
 769
 770     env->serror.pending = events.exception.serror_pending;
 771     env->serror.has_esr = events.exception.serror_has_esr;
 772     env->serror.esr = events.exception.serror_esr;
 773
 774     return 0;
 775 }
 776
 777 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
 778 {
 779     ARMCPU *cpu = ARM_CPU(cs);
 780     CPUARMState *env = &cpu->env;
 781
 782     if (unlikely(env->ext_dabt_raised)) {
 783         /*
 784          * Verifying that the ext DABT has been properly injected,
 785          * otherwise risking indefinitely re-running the faulting instruction
 786          * Covering a very narrow case for kernels 5.5..5.5.4
 787          * when injected abort was misconfigured to be
 788          * an IMPLEMENTATION DEFINED exception (for 32-bit EL1)
 789          */
 790         if (!arm_feature(env, ARM_FEATURE_AARCH64) &&
 791             unlikely(!kvm_arm_verify_ext_dabt_pending(cs))) {
 792
 793             error_report("Data abort exception with no valid ISS generated by "
 794                    "guest memory access. KVM unable to emulate faulting "
 795                    "instruction. Failed to inject an external data abort "
 796                    "into the guest.");
 797             abort();
 798        }
 799        /* Clear the status */
 800        env->ext_dabt_raised = 0;
 801     }
 802 }
 803
 804 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
 805 {
 806     ARMCPU *cpu;
 807     uint32_t switched_level;
 808
 809     if (kvm_irqchip_in_kernel()) {
 810         /*
 811          * We only need to sync timer states with user-space interrupt
 812          * controllers, so return early and save cycles if we don't.
 813          */
 814         return MEMTXATTRS_UNSPECIFIED;
 815     }
 816
 817     cpu = ARM_CPU(cs);
 818
 819     /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
 820     if (run->s.regs.device_irq_level != cpu->device_irq_level) {
 821         switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level;
 822
 823         qemu_mutex_lock_iothread();
 824
 825         if (switched_level & KVM_ARM_DEV_EL1_VTIMER) {
 826             qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT],
 827                          !!(run->s.regs.device_irq_level &
 828                             KVM_ARM_DEV_EL1_VTIMER));
 829             switched_level &= ~KVM_ARM_DEV_EL1_VTIMER;
 830         }
 831
 832         if (switched_level & KVM_ARM_DEV_EL1_PTIMER) {
 833             qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS],
 834                          !!(run->s.regs.device_irq_level &
 835                             KVM_ARM_DEV_EL1_PTIMER));
 836             switched_level &= ~KVM_ARM_DEV_EL1_PTIMER;
 837         }
 838
 839         if (switched_level & KVM_ARM_DEV_PMU) {
 840             qemu_set_irq(cpu->pmu_interrupt,
 841                          !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU));
 842             switched_level &= ~KVM_ARM_DEV_PMU;
 843         }
 844
 845         if (switched_level) {
 846             qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n",
 847                           __func__, switched_level);
 848         }
 849
 850         /* We also mark unknown levels as processed to not waste cycles */
 851         cpu->device_irq_level = run->s.regs.device_irq_level;
 852         qemu_mutex_unlock_iothread();
 853     }
 854
 855     return MEMTXATTRS_UNSPECIFIED;
 856 }
 857
 858 void kvm_arm_vm_state_change(void *opaque, bool running, RunState state)
 859 {
 860     CPUState *cs = opaque;
 861     ARMCPU *cpu = ARM_CPU(cs);
 862
 863     if (running) {
 864         if (cpu->kvm_adjvtime) {
 865             kvm_arm_put_virtual_time(cs);
 866         }
 867     } else {
 868         if (cpu->kvm_adjvtime) {
 869             kvm_arm_get_virtual_time(cs);
 870         }
 871     }
 872 }
 873
 874 /**
 875  * kvm_arm_handle_dabt_nisv:
 876  * @cs: CPUState
 877  * @esr_iss: ISS encoding (limited) for the exception from Data Abort
 878  *           ISV bit set to '0b0' -> no valid instruction syndrome
 879  * @fault_ipa: faulting address for the synchronous data abort
 880  *
 881  * Returns: 0 if the exception has been handled, < 0 otherwise
 882  */
 883 static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss,
 884                                     uint64_t fault_ipa)
 885 {
 886     ARMCPU *cpu = ARM_CPU(cs);
 887     CPUARMState *env = &cpu->env;
 888     /*
 889      * Request KVM to inject the external data abort into the guest
 890      */
 891     if (cap_has_inject_ext_dabt) {
 892         struct kvm_vcpu_events events = { };
 893         /*
 894          * The external data abort event will be handled immediately by KVM
 895          * using the address fault that triggered the exit on given VCPU.
 896          * Requesting injection of the external data abort does not rely
 897          * on any other VCPU state. Therefore, in this particular case, the VCPU
 898          * synchronization can be exceptionally skipped.
 899          */
 900         events.exception.ext_dabt_pending = 1;
 901         /* KVM_CAP_ARM_INJECT_EXT_DABT implies KVM_CAP_VCPU_EVENTS */
 902         if (!kvm_vcpu_ioctl(cs, KVM_SET_VCPU_EVENTS, &events)) {
 903             env->ext_dabt_raised = 1;
 904             return 0;
 905         }
 906     } else {
 907         error_report("Data abort exception triggered by guest memory access "
 908                      "at physical address: 0x"  TARGET_FMT_lx,
 909                      (target_ulong)fault_ipa);
 910         error_printf("KVM unable to emulate faulting instruction.\n");
 911     }
 912     return -1;
 913 }
 914
 915 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
 916 {
 917     int ret = 0;
 918
 919     switch (run->exit_reason) {
 920     case KVM_EXIT_DEBUG:
 921         if (kvm_arm_handle_debug(cs, &run->debug.arch)) {
 922             ret = EXCP_DEBUG;
 923         } /* otherwise return to guest */
 924         break;
 925     case KVM_EXIT_ARM_NISV:
 926         /* External DABT with no valid iss to decode */
 927         ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss,
 928                                        run->arm_nisv.fault_ipa);
 929         break;
 930     default:
 931         qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
 932                       __func__, run->exit_reason);
 933         break;
 934     }
 935     return ret;
 936 }
 937
 938 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
 939 {
 940     return true;
 941 }
 942
 943 int kvm_arch_process_async_events(CPUState *cs)
 944 {
 945     return 0;
 946 }
 947
 948 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
 949 {
 950     if (kvm_sw_breakpoints_active(cs)) {
 951         dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
 952     }
 953     if (kvm_arm_hw_debug_active(cs)) {
 954         dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW;
 955         kvm_arm_copy_hw_debug_data(&dbg->arch);
 956     }
 957 }
 958
 959 void kvm_arch_init_irq_routing(KVMState *s)
 960 {
 961 }
 962
 963 int kvm_arch_irqchip_create(KVMState *s)
 964 {
 965     if (kvm_kernel_irqchip_split()) {
 966         error_report("-machine kernel_irqchip=split is not supported on ARM.");
 967         exit(1);
 968     }
 969
 970     /* If we can create the VGIC using the newer device control API, we
 971      * let the device do this when it initializes itself, otherwise we
 972      * fall back to the old API */
 973     return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
 974 }
 975
 976 int kvm_arm_vgic_probe(void)
 977 {
 978     int val = 0;
 979
 980     if (kvm_create_device(kvm_state,
 981                           KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) {
 982         val |= KVM_ARM_VGIC_V3;
 983     }
 984     if (kvm_create_device(kvm_state,
 985                           KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) {
 986         val |= KVM_ARM_VGIC_V2;
 987     }
 988     return val;
 989 }
 990
 991 int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level)
 992 {
 993     int kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT) | irq;
 994     int cpu_idx1 = cpu % 256;
 995     int cpu_idx2 = cpu / 256;
 996
 997     kvm_irq |= (cpu_idx1 << KVM_ARM_IRQ_VCPU_SHIFT) |
 998                (cpu_idx2 << KVM_ARM_IRQ_VCPU2_SHIFT);
 999
1000     return kvm_set_irq(kvm_state, kvm_irq, !!level);
1001 }
1002
1003 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
1004                              uint64_t address, uint32_t data, PCIDevice *dev)
1005 {
1006     AddressSpace *as = pci_device_iommu_address_space(dev);
1007     hwaddr xlat, len, doorbell_gpa;
1008     MemoryRegionSection mrs;
1009     MemoryRegion *mr;
1010
1011     if (as == &address_space_memory) {
1012         return 0;
1013     }
1014
1015     /* MSI doorbell address is translated by an IOMMU */
1016
1017     RCU_READ_LOCK_GUARD();
1018
1019     mr = address_space_translate(as, address, &xlat, &len, true,
1020                                  MEMTXATTRS_UNSPECIFIED);
1021
1022     if (!mr) {
1023         return 1;
1024     }
1025
1026     mrs = memory_region_find(mr, xlat, 1);
1027
1028     if (!mrs.mr) {
1029         return 1;
1030     }
1031
1032     doorbell_gpa = mrs.offset_within_address_space;
1033     memory_region_unref(mrs.mr);
1034
1035     route->u.msi.address_lo = doorbell_gpa;
1036     route->u.msi.address_hi = doorbell_gpa >> 32;
1037
1038     trace_kvm_arm_fixup_msi_route(address, doorbell_gpa);
1039
1040     return 0;
1041 }
1042
1043 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
1044                                 int vector, PCIDevice *dev)
1045 {
1046     return 0;
1047 }
1048
1049 int kvm_arch_release_virq_post(int virq)
1050 {
1051     return 0;
1052 }
1053
1054 int kvm_arch_msi_data_to_gsi(uint32_t data)
1055 {
1056     return (data - 32) & 0xffff;
1057 }
1058
1059 bool kvm_arch_cpu_check_are_resettable(void)
1060 {
1061     return true;
1062 }
1063
1064 void kvm_arch_accel_class_init(ObjectClass *oc)
1065 {
1066 }