target/arm/kvm.c

   1 /*
   2  * ARM implementation of KVM hooks
   3  *
   4  * Copyright Christoffer Dall 2009-2010
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  *
   9  */
  10
  11 #include "qemu/osdep.h"
  12 #include <sys/ioctl.h>
  13
  14 #include <linux/kvm.h>
  15
  16 #include "qemu-common.h"
  17 #include "qemu/timer.h"
  18 #include "qemu/error-report.h"
  19 #include "sysemu/sysemu.h"
  20 #include "sysemu/kvm.h"
  21 #include "sysemu/kvm_int.h"
  22 #include "kvm_arm.h"
  23 #include "cpu.h"
  24 #include "trace.h"
  25 #include "internals.h"
  26 #include "hw/arm/arm.h"
  27 #include "hw/pci/pci.h"
  28 #include "exec/memattrs.h"
  29 #include "exec/address-spaces.h"
  30 #include "hw/boards.h"
  31 #include "qemu/log.h"
  32
  33 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
  34     KVM_CAP_LAST_INFO
  35 };
  36
  37 static bool cap_has_mp_state;
  38 static bool cap_has_inject_serror_esr;
  39
  40 static ARMHostCPUFeatures arm_host_cpu_features;
  41
  42 int kvm_arm_vcpu_init(CPUState *cs)
  43 {
  44     ARMCPU *cpu = ARM_CPU(cs);
  45     struct kvm_vcpu_init init;
  46
  47     init.target = cpu->kvm_target;
  48     memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
  49
  50     return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
  51 }
  52
  53 void kvm_arm_init_serror_injection(CPUState *cs)
  54 {
  55     cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state,
  56                                     KVM_CAP_ARM_INJECT_SERROR_ESR);
  57 }
  58
  59 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
  60                                       int *fdarray,
  61                                       struct kvm_vcpu_init *init)
  62 {
  63     int ret, kvmfd = -1, vmfd = -1, cpufd = -1;
  64
  65     kvmfd = qemu_open("/dev/kvm", O_RDWR);
  66     if (kvmfd < 0) {
  67         goto err;
  68     }
  69     vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
  70     if (vmfd < 0) {
  71         goto err;
  72     }
  73     cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
  74     if (cpufd < 0) {
  75         goto err;
  76     }
  77
  78     if (!init) {
  79         /* Caller doesn't want the VCPU to be initialized, so skip it */
  80         goto finish;
  81     }
  82
  83     ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init);
  84     if (ret >= 0) {
  85         ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
  86         if (ret < 0) {
  87             goto err;
  88         }
  89     } else if (cpus_to_try) {
  90         /* Old kernel which doesn't know about the
  91          * PREFERRED_TARGET ioctl: we know it will only support
  92          * creating one kind of guest CPU which is its preferred
  93          * CPU type.
  94          */
  95         while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
  96             init->target = *cpus_to_try++;
  97             memset(init->features, 0, sizeof(init->features));
  98             ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
  99             if (ret >= 0) {
 100                 break;
 101             }
 102         }
 103         if (ret < 0) {
 104             goto err;
 105         }
 106     } else {
 107         /* Treat a NULL cpus_to_try argument the same as an empty
 108          * list, which means we will fail the call since this must
 109          * be an old kernel which doesn't support PREFERRED_TARGET.
 110          */
 111         goto err;
 112     }
 113
 114 finish:
 115     fdarray[0] = kvmfd;
 116     fdarray[1] = vmfd;
 117     fdarray[2] = cpufd;
 118
 119     return true;
 120
 121 err:
 122     if (cpufd >= 0) {
 123         close(cpufd);
 124     }
 125     if (vmfd >= 0) {
 126         close(vmfd);
 127     }
 128     if (kvmfd >= 0) {
 129         close(kvmfd);
 130     }
 131
 132     return false;
 133 }
 134
 135 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
 136 {
 137     int i;
 138
 139     for (i = 2; i >= 0; i--) {
 140         close(fdarray[i]);
 141     }
 142 }
 143
 144 void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)
 145 {
 146     CPUARMState *env = &cpu->env;
 147
 148     if (!arm_host_cpu_features.dtb_compatible) {
 149         if (!kvm_enabled() ||
 150             !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) {
 151             /* We can't report this error yet, so flag that we need to
 152              * in arm_cpu_realizefn().
 153              */
 154             cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;
 155             cpu->host_cpu_probe_failed = true;
 156             return;
 157         }
 158     }
 159
 160     cpu->kvm_target = arm_host_cpu_features.target;
 161     cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;
 162     cpu->isar = arm_host_cpu_features.isar;
 163     env->features = arm_host_cpu_features.features;
 164 }
 165
 166 int kvm_arm_get_max_vm_ipa_size(MachineState *ms)
 167 {
 168     KVMState *s = KVM_STATE(ms->accelerator);
 169     int ret;
 170
 171     ret = kvm_check_extension(s, KVM_CAP_ARM_VM_IPA_SIZE);
 172     return ret > 0 ? ret : 40;
 173 }
 174
 175 int kvm_arch_init(MachineState *ms, KVMState *s)
 176 {
 177     /* For ARM interrupt delivery is always asynchronous,
 178      * whether we are using an in-kernel VGIC or not.
 179      */
 180     kvm_async_interrupts_allowed = true;
 181
 182     /*
 183      * PSCI wakes up secondary cores, so we always need to
 184      * have vCPUs waiting in kernel space
 185      */
 186     kvm_halt_in_kernel_allowed = true;
 187
 188     cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
 189
 190     return 0;
 191 }
 192
 193 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
 194 {
 195     return cpu->cpu_index;
 196 }
 197
 198 /* We track all the KVM devices which need their memory addresses
 199  * passing to the kernel in a list of these structures.
 200  * When board init is complete we run through the list and
 201  * tell the kernel the base addresses of the memory regions.
 202  * We use a MemoryListener to track mapping and unmapping of
 203  * the regions during board creation, so the board models don't
 204  * need to do anything special for the KVM case.
 205  *
 206  * Sometimes the address must be OR'ed with some other fields
 207  * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
 208  * @kda_addr_ormask aims at storing the value of those fields.
 209  */
 210 typedef struct KVMDevice {
 211     struct kvm_arm_device_addr kda;
 212     struct kvm_device_attr kdattr;
 213     uint64_t kda_addr_ormask;
 214     MemoryRegion *mr;
 215     QSLIST_ENTRY(KVMDevice) entries;
 216     int dev_fd;
 217 } KVMDevice;
 218
 219 static QSLIST_HEAD(, KVMDevice) kvm_devices_head;
 220
 221 static void kvm_arm_devlistener_add(MemoryListener *listener,
 222                                     MemoryRegionSection *section)
 223 {
 224     KVMDevice *kd;
 225
 226     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
 227         if (section->mr == kd->mr) {
 228             kd->kda.addr = section->offset_within_address_space;
 229         }
 230     }
 231 }
 232
 233 static void kvm_arm_devlistener_del(MemoryListener *listener,
 234                                     MemoryRegionSection *section)
 235 {
 236     KVMDevice *kd;
 237
 238     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
 239         if (section->mr == kd->mr) {
 240             kd->kda.addr = -1;
 241         }
 242     }
 243 }
 244
 245 static MemoryListener devlistener = {
 246     .region_add = kvm_arm_devlistener_add,
 247     .region_del = kvm_arm_devlistener_del,
 248 };
 249
 250 static void kvm_arm_set_device_addr(KVMDevice *kd)
 251 {
 252     struct kvm_device_attr *attr = &kd->kdattr;
 253     int ret;
 254
 255     /* If the device control API is available and we have a device fd on the
 256      * KVMDevice struct, let's use the newer API
 257      */
 258     if (kd->dev_fd >= 0) {
 259         uint64_t addr = kd->kda.addr;
 260
 261         addr |= kd->kda_addr_ormask;
 262         attr->addr = (uintptr_t)&addr;
 263         ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
 264     } else {
 265         ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
 266     }
 267
 268     if (ret < 0) {
 269         fprintf(stderr, "Failed to set device address: %s\n",
 270                 strerror(-ret));
 271         abort();
 272     }
 273 }
 274
 275 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
 276 {
 277     KVMDevice *kd, *tkd;
 278
 279     QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
 280         if (kd->kda.addr != -1) {
 281             kvm_arm_set_device_addr(kd);
 282         }
 283         memory_region_unref(kd->mr);
 284         QSLIST_REMOVE_HEAD(&kvm_devices_head, entries);
 285         g_free(kd);
 286     }
 287     memory_listener_unregister(&devlistener);
 288 }
 289
 290 static Notifier notify = {
 291     .notify = kvm_arm_machine_init_done,
 292 };
 293
 294 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
 295                              uint64_t attr, int dev_fd, uint64_t addr_ormask)
 296 {
 297     KVMDevice *kd;
 298
 299     if (!kvm_irqchip_in_kernel()) {
 300         return;
 301     }
 302
 303     if (QSLIST_EMPTY(&kvm_devices_head)) {
 304         memory_listener_register(&devlistener, &address_space_memory);
 305         qemu_add_machine_init_done_notifier(&notify);
 306     }
 307     kd = g_new0(KVMDevice, 1);
 308     kd->mr = mr;
 309     kd->kda.id = devid;
 310     kd->kda.addr = -1;
 311     kd->kdattr.flags = 0;
 312     kd->kdattr.group = group;
 313     kd->kdattr.attr = attr;
 314     kd->dev_fd = dev_fd;
 315     kd->kda_addr_ormask = addr_ormask;
 316     QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
 317     memory_region_ref(kd->mr);
 318 }
 319
 320 static int compare_u64(const void *a, const void *b)
 321 {
 322     if (*(uint64_t *)a > *(uint64_t *)b) {
 323         return 1;
 324     }
 325     if (*(uint64_t *)a < *(uint64_t *)b) {
 326         return -1;
 327     }
 328     return 0;
 329 }
 330
 331 /* Initialize the ARMCPU cpreg list according to the kernel's
 332  * definition of what CPU registers it knows about (and throw away
 333  * the previous TCG-created cpreg list).
 334  */
 335 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
 336 {
 337     struct kvm_reg_list rl;
 338     struct kvm_reg_list *rlp;
 339     int i, ret, arraylen;
 340     CPUState *cs = CPU(cpu);
 341
 342     rl.n = 0;
 343     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
 344     if (ret != -E2BIG) {
 345         return ret;
 346     }
 347     rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
 348     rlp->n = rl.n;
 349     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
 350     if (ret) {
 351         goto out;
 352     }
 353     /* Sort the list we get back from the kernel, since cpreg_tuples
 354      * must be in strictly ascending order.
 355      */
 356     qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
 357
 358     for (i = 0, arraylen = 0; i < rlp->n; i++) {
 359         if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
 360             continue;
 361         }
 362         switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
 363         case KVM_REG_SIZE_U32:
 364         case KVM_REG_SIZE_U64:
 365             break;
 366         default:
 367             fprintf(stderr, "Can't handle size of register in kernel list\n");
 368             ret = -EINVAL;
 369             goto out;
 370         }
 371
 372         arraylen++;
 373     }
 374
 375     cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
 376     cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
 377     cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
 378                                          arraylen);
 379     cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
 380                                         arraylen);
 381     cpu->cpreg_array_len = arraylen;
 382     cpu->cpreg_vmstate_array_len = arraylen;
 383
 384     for (i = 0, arraylen = 0; i < rlp->n; i++) {
 385         uint64_t regidx = rlp->reg[i];
 386         if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
 387             continue;
 388         }
 389         cpu->cpreg_indexes[arraylen] = regidx;
 390         arraylen++;
 391     }
 392     assert(cpu->cpreg_array_len == arraylen);
 393
 394     if (!write_kvmstate_to_list(cpu)) {
 395         /* Shouldn't happen unless kernel is inconsistent about
 396          * what registers exist.
 397          */
 398         fprintf(stderr, "Initial read of kernel register state failed\n");
 399         ret = -EINVAL;
 400         goto out;
 401     }
 402
 403 out:
 404     g_free(rlp);
 405     return ret;
 406 }
 407
 408 bool write_kvmstate_to_list(ARMCPU *cpu)
 409 {
 410     CPUState *cs = CPU(cpu);
 411     int i;
 412     bool ok = true;
 413
 414     for (i = 0; i < cpu->cpreg_array_len; i++) {
 415         struct kvm_one_reg r;
 416         uint64_t regidx = cpu->cpreg_indexes[i];
 417         uint32_t v32;
 418         int ret;
 419
 420         r.id = regidx;
 421
 422         switch (regidx & KVM_REG_SIZE_MASK) {
 423         case KVM_REG_SIZE_U32:
 424             r.addr = (uintptr_t)&v32;
 425             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 426             if (!ret) {
 427                 cpu->cpreg_values[i] = v32;
 428             }
 429             break;
 430         case KVM_REG_SIZE_U64:
 431             r.addr = (uintptr_t)(cpu->cpreg_values + i);
 432             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
 433             break;
 434         default:
 435             abort();
 436         }
 437         if (ret) {
 438             ok = false;
 439         }
 440     }
 441     return ok;
 442 }
 443
 444 bool write_list_to_kvmstate(ARMCPU *cpu, int level)
 445 {
 446     CPUState *cs = CPU(cpu);
 447     int i;
 448     bool ok = true;
 449
 450     for (i = 0; i < cpu->cpreg_array_len; i++) {
 451         struct kvm_one_reg r;
 452         uint64_t regidx = cpu->cpreg_indexes[i];
 453         uint32_t v32;
 454         int ret;
 455
 456         if (kvm_arm_cpreg_level(regidx) > level) {
 457             continue;
 458         }
 459
 460         r.id = regidx;
 461         switch (regidx & KVM_REG_SIZE_MASK) {
 462         case KVM_REG_SIZE_U32:
 463             v32 = cpu->cpreg_values[i];
 464             r.addr = (uintptr_t)&v32;
 465             break;
 466         case KVM_REG_SIZE_U64:
 467             r.addr = (uintptr_t)(cpu->cpreg_values + i);
 468             break;
 469         default:
 470             abort();
 471         }
 472         ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
 473         if (ret) {
 474             /* We might fail for "unknown register" and also for
 475              * "you tried to set a register which is constant with
 476              * a different value from what it actually contains".
 477              */
 478             ok = false;
 479         }
 480     }
 481     return ok;
 482 }
 483
 484 void kvm_arm_reset_vcpu(ARMCPU *cpu)
 485 {
 486     int ret;
 487
 488     /* Re-init VCPU so that all registers are set to
 489      * their respective reset values.
 490      */
 491     ret = kvm_arm_vcpu_init(CPU(cpu));
 492     if (ret < 0) {
 493         fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
 494         abort();
 495     }
 496     if (!write_kvmstate_to_list(cpu)) {
 497         fprintf(stderr, "write_kvmstate_to_list failed\n");
 498         abort();
 499     }
 500     /*
 501      * Sync the reset values also into the CPUState. This is necessary
 502      * because the next thing we do will be a kvm_arch_put_registers()
 503      * which will update the list values from the CPUState before copying
 504      * the list values back to KVM. It's OK to ignore failure returns here
 505      * for the same reason we do so in kvm_arch_get_registers().
 506      */
 507     write_list_to_cpustate(cpu);
 508 }
 509
 510 /*
 511  * Update KVM's MP_STATE based on what QEMU thinks it is
 512  */
 513 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
 514 {
 515     if (cap_has_mp_state) {
 516         struct kvm_mp_state mp_state = {
 517             .mp_state = (cpu->power_state == PSCI_OFF) ?
 518             KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
 519         };
 520         int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
 521         if (ret) {
 522             fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
 523                     __func__, ret, strerror(-ret));
 524             return -1;
 525         }
 526     }
 527
 528     return 0;
 529 }
 530
 531 /*
 532  * Sync the KVM MP_STATE into QEMU
 533  */
 534 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
 535 {
 536     if (cap_has_mp_state) {
 537         struct kvm_mp_state mp_state;
 538         int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
 539         if (ret) {
 540             fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
 541                     __func__, ret, strerror(-ret));
 542             abort();
 543         }
 544         cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ?
 545             PSCI_OFF : PSCI_ON;
 546     }
 547
 548     return 0;
 549 }
 550
 551 int kvm_put_vcpu_events(ARMCPU *cpu)
 552 {
 553     CPUARMState *env = &cpu->env;
 554     struct kvm_vcpu_events events;
 555     int ret;
 556
 557     if (!kvm_has_vcpu_events()) {
 558         return 0;
 559     }
 560
 561     memset(&events, 0, sizeof(events));
 562     events.exception.serror_pending = env->serror.pending;
 563
 564     /* Inject SError to guest with specified syndrome if host kernel
 565      * supports it, otherwise inject SError without syndrome.
 566      */
 567     if (cap_has_inject_serror_esr) {
 568         events.exception.serror_has_esr = env->serror.has_esr;
 569         events.exception.serror_esr = env->serror.esr;
 570     }
 571
 572     ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events);
 573     if (ret) {
 574         error_report("failed to put vcpu events");
 575     }
 576
 577     return ret;
 578 }
 579
 580 int kvm_get_vcpu_events(ARMCPU *cpu)
 581 {
 582     CPUARMState *env = &cpu->env;
 583     struct kvm_vcpu_events events;
 584     int ret;
 585
 586     if (!kvm_has_vcpu_events()) {
 587         return 0;
 588     }
 589
 590     memset(&events, 0, sizeof(events));
 591     ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events);
 592     if (ret) {
 593         error_report("failed to get vcpu events");
 594         return ret;
 595     }
 596
 597     env->serror.pending = events.exception.serror_pending;
 598     env->serror.has_esr = events.exception.serror_has_esr;
 599     env->serror.esr = events.exception.serror_esr;
 600
 601     return 0;
 602 }
 603
 604 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
 605 {
 606 }
 607
 608 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
 609 {
 610     ARMCPU *cpu;
 611     uint32_t switched_level;
 612
 613     if (kvm_irqchip_in_kernel()) {
 614         /*
 615          * We only need to sync timer states with user-space interrupt
 616          * controllers, so return early and save cycles if we don't.
 617          */
 618         return MEMTXATTRS_UNSPECIFIED;
 619     }
 620
 621     cpu = ARM_CPU(cs);
 622
 623     /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
 624     if (run->s.regs.device_irq_level != cpu->device_irq_level) {
 625         switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level;
 626
 627         qemu_mutex_lock_iothread();
 628
 629         if (switched_level & KVM_ARM_DEV_EL1_VTIMER) {
 630             qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT],
 631                          !!(run->s.regs.device_irq_level &
 632                             KVM_ARM_DEV_EL1_VTIMER));
 633             switched_level &= ~KVM_ARM_DEV_EL1_VTIMER;
 634         }
 635
 636         if (switched_level & KVM_ARM_DEV_EL1_PTIMER) {
 637             qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS],
 638                          !!(run->s.regs.device_irq_level &
 639                             KVM_ARM_DEV_EL1_PTIMER));
 640             switched_level &= ~KVM_ARM_DEV_EL1_PTIMER;
 641         }
 642
 643         if (switched_level & KVM_ARM_DEV_PMU) {
 644             qemu_set_irq(cpu->pmu_interrupt,
 645                          !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU));
 646             switched_level &= ~KVM_ARM_DEV_PMU;
 647         }
 648
 649         if (switched_level) {
 650             qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n",
 651                           __func__, switched_level);
 652         }
 653
 654         /* We also mark unknown levels as processed to not waste cycles */
 655         cpu->device_irq_level = run->s.regs.device_irq_level;
 656         qemu_mutex_unlock_iothread();
 657     }
 658
 659     return MEMTXATTRS_UNSPECIFIED;
 660 }
 661
 662
 663 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
 664 {
 665     int ret = 0;
 666
 667     switch (run->exit_reason) {
 668     case KVM_EXIT_DEBUG:
 669         if (kvm_arm_handle_debug(cs, &run->debug.arch)) {
 670             ret = EXCP_DEBUG;
 671         } /* otherwise return to guest */
 672         break;
 673     default:
 674         qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
 675                       __func__, run->exit_reason);
 676         break;
 677     }
 678     return ret;
 679 }
 680
 681 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
 682 {
 683     return true;
 684 }
 685
 686 int kvm_arch_process_async_events(CPUState *cs)
 687 {
 688     return 0;
 689 }
 690
 691 /* The #ifdef protections are until 32bit headers are imported and can
 692  * be removed once both 32 and 64 bit reach feature parity.
 693  */
 694 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
 695 {
 696 #ifdef KVM_GUESTDBG_USE_SW_BP
 697     if (kvm_sw_breakpoints_active(cs)) {
 698         dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
 699     }
 700 #endif
 701 #ifdef KVM_GUESTDBG_USE_HW
 702     if (kvm_arm_hw_debug_active(cs)) {
 703         dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW;
 704         kvm_arm_copy_hw_debug_data(&dbg->arch);
 705     }
 706 #endif
 707 }
 708
 709 void kvm_arch_init_irq_routing(KVMState *s)
 710 {
 711 }
 712
 713 int kvm_arch_irqchip_create(MachineState *ms, KVMState *s)
 714 {
 715      if (machine_kernel_irqchip_split(ms)) {
 716          perror("-machine kernel_irqchip=split is not supported on ARM.");
 717          exit(1);
 718     }
 719
 720     /* If we can create the VGIC using the newer device control API, we
 721      * let the device do this when it initializes itself, otherwise we
 722      * fall back to the old API */
 723     return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
 724 }
 725
 726 int kvm_arm_vgic_probe(void)
 727 {
 728     if (kvm_create_device(kvm_state,
 729                           KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) {
 730         return 3;
 731     } else if (kvm_create_device(kvm_state,
 732                                  KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) {
 733         return 2;
 734     } else {
 735         return 0;
 736     }
 737 }
 738
 739 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
 740                              uint64_t address, uint32_t data, PCIDevice *dev)
 741 {
 742     AddressSpace *as = pci_device_iommu_address_space(dev);
 743     hwaddr xlat, len, doorbell_gpa;
 744     MemoryRegionSection mrs;
 745     MemoryRegion *mr;
 746     int ret = 1;
 747
 748     if (as == &address_space_memory) {
 749         return 0;
 750     }
 751
 752     /* MSI doorbell address is translated by an IOMMU */
 753
 754     rcu_read_lock();
 755     mr = address_space_translate(as, address, &xlat, &len, true,
 756                                  MEMTXATTRS_UNSPECIFIED);
 757     if (!mr) {
 758         goto unlock;
 759     }
 760     mrs = memory_region_find(mr, xlat, 1);
 761     if (!mrs.mr) {
 762         goto unlock;
 763     }
 764
 765     doorbell_gpa = mrs.offset_within_address_space;
 766     memory_region_unref(mrs.mr);
 767
 768     route->u.msi.address_lo = doorbell_gpa;
 769     route->u.msi.address_hi = doorbell_gpa >> 32;
 770
 771     trace_kvm_arm_fixup_msi_route(address, doorbell_gpa);
 772
 773     ret = 0;
 774
 775 unlock:
 776     rcu_read_unlock();
 777     return ret;
 778 }
 779
 780 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
 781                                 int vector, PCIDevice *dev)
 782 {
 783     return 0;
 784 }
 785
 786 int kvm_arch_release_virq_post(int virq)
 787 {
 788     return 0;
 789 }
 790
 791 int kvm_arch_msi_data_to_gsi(uint32_t data)
 792 {
 793     return (data - 32) & 0xffff;
 794 }