2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * PCI bus layout on a real G5 (U3 based):
27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
49 #include "qemu/osdep.h"
50 #include "qapi/error.h"
52 #include "hw/ppc/ppc.h"
53 #include "hw/ppc/mac.h"
54 #include "hw/input/adb.h"
55 #include "hw/ppc/mac_dbdma.h"
56 #include "hw/timer/m48t59.h"
57 #include "hw/pci/pci.h"
59 #include "sysemu/sysemu.h"
60 #include "hw/boards.h"
61 #include "hw/nvram/fw_cfg.h"
62 #include "hw/char/escc.h"
63 #include "hw/ppc/openpic.h"
65 #include "hw/loader.h"
67 #include "qemu/error-report.h"
68 #include "sysemu/kvm.h"
71 #include "sysemu/block-backend.h"
72 #include "exec/address-spaces.h"
73 #include "hw/sysbus.h"
74 #include "qemu/cutils.h"
78 #define CFG_ADDR 0xf0000510
79 #define TBFREQ (100UL * 1000UL * 1000UL)
80 #define CLOCKFREQ (900UL * 1000UL * 1000UL)
81 #define BUSFREQ (100UL * 1000UL * 1000UL)
83 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
86 static void unin_write(void *opaque
, hwaddr addr
, uint64_t value
,
89 trace_mac99_uninorth_write(addr
, value
);
91 *(int*)opaque
= value
;
95 static uint64_t unin_read(void *opaque
, hwaddr addr
, unsigned size
)
102 value
= *(int*)opaque
;
105 trace_mac99_uninorth_read(addr
, value
);
110 static const MemoryRegionOps unin_ops
= {
113 .endianness
= DEVICE_NATIVE_ENDIAN
,
116 static void fw_cfg_boot_set(void *opaque
, const char *boot_device
,
119 fw_cfg_modify_i16(opaque
, FW_CFG_BOOT_DEVICE
, boot_device
[0]);
122 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
124 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
127 static void ppc_core99_reset(void *opaque
)
129 PowerPCCPU
*cpu
= opaque
;
132 /* 970 CPUs want to get their initial IP as part of their boot protocol */
133 cpu
->env
.nip
= PROM_ADDR
+ 0x100;
136 /* PowerPC Mac99 hardware initialisation */
137 static void ppc_core99_init(MachineState
*machine
)
139 ram_addr_t ram_size
= machine
->ram_size
;
140 const char *kernel_filename
= machine
->kernel_filename
;
141 const char *kernel_cmdline
= machine
->kernel_cmdline
;
142 const char *initrd_filename
= machine
->initrd_filename
;
143 const char *boot_device
= machine
->boot_order
;
144 PowerPCCPU
*cpu
= NULL
;
145 CPUPPCState
*env
= NULL
;
147 qemu_irq
*pic
, **openpic_irqs
;
148 MemoryRegion
*isa
= g_new(MemoryRegion
, 1);
149 MemoryRegion
*unin_memory
= g_new(MemoryRegion
, 1);
150 MemoryRegion
*unin2_memory
= g_new(MemoryRegion
, 1);
151 int linux_boot
, i
, j
, k
;
152 MemoryRegion
*ram
= g_new(MemoryRegion
, 1), *bios
= g_new(MemoryRegion
, 1);
153 hwaddr kernel_base
, initrd_base
, cmdline_base
= 0;
154 long kernel_size
, initrd_size
;
157 MACIOIDEState
*macio_ide
;
159 MacIONVRAMState
*nvr
;
160 int bios_size
, ndrv_size
;
162 MemoryRegion
*pic_mem
, *escc_mem
;
163 MemoryRegion
*escc_bar
= g_new(MemoryRegion
, 1);
165 DriveInfo
*hd
[MAX_IDE_BUS
* MAX_IDE_DEVS
];
170 int *token
= g_new(int, 1);
171 hwaddr nvram_addr
= 0xFFF04000;
174 linux_boot
= (kernel_filename
!= NULL
);
177 if (machine
->cpu_model
== NULL
) {
179 machine
->cpu_model
= "970fx";
181 machine
->cpu_model
= "G4";
184 for (i
= 0; i
< smp_cpus
; i
++) {
185 cpu
= POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU
,
186 machine
->cpu_model
));
189 /* Set time-base frequency to 100 Mhz */
190 cpu_ppc_tb_init(env
, TBFREQ
);
191 qemu_register_reset(ppc_core99_reset
, cpu
);
195 memory_region_allocate_system_memory(ram
, NULL
, "ppc_core99.ram", ram_size
);
196 memory_region_add_subregion(get_system_memory(), 0, ram
);
198 /* allocate and load BIOS */
199 memory_region_init_ram(bios
, NULL
, "ppc_core99.bios", BIOS_SIZE
,
202 if (bios_name
== NULL
)
203 bios_name
= PROM_FILENAME
;
204 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
205 memory_region_set_readonly(bios
, true);
206 memory_region_add_subregion(get_system_memory(), PROM_ADDR
, bios
);
208 /* Load OpenBIOS (ELF) */
210 bios_size
= load_elf(filename
, NULL
, NULL
, NULL
,
211 NULL
, NULL
, 1, PPC_ELF_MACHINE
, 0, 0);
217 if (bios_size
< 0 || bios_size
> BIOS_SIZE
) {
218 error_report("could not load PowerPC bios '%s'", bios_name
);
223 uint64_t lowaddr
= 0;
231 kernel_base
= KERNEL_LOAD_ADDR
;
233 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
234 NULL
, &lowaddr
, NULL
, 1, PPC_ELF_MACHINE
,
237 kernel_size
= load_aout(kernel_filename
, kernel_base
,
238 ram_size
- kernel_base
, bswap_needed
,
241 kernel_size
= load_image_targphys(kernel_filename
,
243 ram_size
- kernel_base
);
244 if (kernel_size
< 0) {
245 error_report("could not load kernel '%s'", kernel_filename
);
249 if (initrd_filename
) {
250 initrd_base
= TARGET_PAGE_ALIGN(kernel_base
+ kernel_size
+ KERNEL_GAP
);
251 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
252 ram_size
- initrd_base
);
253 if (initrd_size
< 0) {
254 error_report("could not load initial ram disk '%s'",
258 cmdline_base
= TARGET_PAGE_ALIGN(initrd_base
+ initrd_size
);
262 cmdline_base
= TARGET_PAGE_ALIGN(kernel_base
+ kernel_size
+ KERNEL_GAP
);
264 ppc_boot_device
= 'm';
270 ppc_boot_device
= '\0';
271 /* We consider that NewWorld PowerMac never have any floppy drive
272 * For now, OHW cannot boot from the network.
274 for (i
= 0; boot_device
[i
] != '\0'; i
++) {
275 if (boot_device
[i
] >= 'c' && boot_device
[i
] <= 'f') {
276 ppc_boot_device
= boot_device
[i
];
280 if (ppc_boot_device
== '\0') {
281 fprintf(stderr
, "No valid boot device for Mac99 machine\n");
286 /* Register 8 MB of ISA IO space */
287 memory_region_init_alias(isa
, NULL
, "isa_mmio",
288 get_system_io(), 0, 0x00800000);
289 memory_region_add_subregion(get_system_memory(), 0xf2000000, isa
);
291 /* UniN init: XXX should be a real device */
292 memory_region_init_io(unin_memory
, NULL
, &unin_ops
, token
, "unin", 0x1000);
293 memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory
);
295 memory_region_init_io(unin2_memory
, NULL
, &unin_ops
, token
, "unin", 0x1000);
296 memory_region_add_subregion(get_system_memory(), 0xf3000000, unin2_memory
);
298 openpic_irqs
= g_malloc0(smp_cpus
* sizeof(qemu_irq
*));
300 g_malloc0(smp_cpus
* sizeof(qemu_irq
) * OPENPIC_OUTPUT_NB
);
301 for (i
= 0; i
< smp_cpus
; i
++) {
302 /* Mac99 IRQ connection between OpenPIC outputs pins
303 * and PowerPC input pins
305 switch (PPC_INPUT(env
)) {
306 case PPC_FLAGS_INPUT_6xx
:
307 openpic_irqs
[i
] = openpic_irqs
[0] + (i
* OPENPIC_OUTPUT_NB
);
308 openpic_irqs
[i
][OPENPIC_OUTPUT_INT
] =
309 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_INT
];
310 openpic_irqs
[i
][OPENPIC_OUTPUT_CINT
] =
311 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_INT
];
312 openpic_irqs
[i
][OPENPIC_OUTPUT_MCK
] =
313 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_MCP
];
314 /* Not connected ? */
315 openpic_irqs
[i
][OPENPIC_OUTPUT_DEBUG
] = NULL
;
317 openpic_irqs
[i
][OPENPIC_OUTPUT_RESET
] =
318 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_HRESET
];
320 #if defined(TARGET_PPC64)
321 case PPC_FLAGS_INPUT_970
:
322 openpic_irqs
[i
] = openpic_irqs
[0] + (i
* OPENPIC_OUTPUT_NB
);
323 openpic_irqs
[i
][OPENPIC_OUTPUT_INT
] =
324 ((qemu_irq
*)env
->irq_inputs
)[PPC970_INPUT_INT
];
325 openpic_irqs
[i
][OPENPIC_OUTPUT_CINT
] =
326 ((qemu_irq
*)env
->irq_inputs
)[PPC970_INPUT_INT
];
327 openpic_irqs
[i
][OPENPIC_OUTPUT_MCK
] =
328 ((qemu_irq
*)env
->irq_inputs
)[PPC970_INPUT_MCP
];
329 /* Not connected ? */
330 openpic_irqs
[i
][OPENPIC_OUTPUT_DEBUG
] = NULL
;
332 openpic_irqs
[i
][OPENPIC_OUTPUT_RESET
] =
333 ((qemu_irq
*)env
->irq_inputs
)[PPC970_INPUT_HRESET
];
335 #endif /* defined(TARGET_PPC64) */
337 error_report("Bus model not supported on mac99 machine");
342 pic
= g_new0(qemu_irq
, 64);
344 dev
= qdev_create(NULL
, TYPE_OPENPIC
);
345 qdev_prop_set_uint32(dev
, "model", OPENPIC_MODEL_KEYLARGO
);
346 qdev_init_nofail(dev
);
347 s
= SYS_BUS_DEVICE(dev
);
348 pic_mem
= s
->mmio
[0].memory
;
350 for (i
= 0; i
< smp_cpus
; i
++) {
351 for (j
= 0; j
< OPENPIC_OUTPUT_NB
; j
++) {
352 sysbus_connect_irq(s
, k
++, openpic_irqs
[i
][j
]);
356 for (i
= 0; i
< 64; i
++) {
357 pic
[i
] = qdev_get_gpio_in(dev
, i
);
360 if (PPC_INPUT(env
) == PPC_FLAGS_INPUT_970
) {
361 /* 970 gets a U3 bus */
362 pci_bus
= pci_pmac_u3_init(pic
, get_system_memory(), get_system_io());
363 machine_arch
= ARCH_MAC99_U3
;
365 pci_bus
= pci_pmac_init(pic
, get_system_memory(), get_system_io());
366 machine_arch
= ARCH_MAC99
;
368 object_property_set_bool(OBJECT(pci_bus
), true, "realized", &error_abort
);
370 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
372 /* Timebase Frequency */
374 tbfreq
= kvmppc_get_tbfreq();
379 /* init basic PC hardware */
380 escc_mem
= escc_init(0, pic
[0x25], pic
[0x24],
381 serial_hds
[0], serial_hds
[1], ESCC_CLOCK
, 4);
382 memory_region_init_alias(escc_bar
, NULL
, "escc-bar",
383 escc_mem
, 0, memory_region_size(escc_mem
));
385 macio
= pci_create(pci_bus
, -1, TYPE_NEWWORLD_MACIO
);
387 qdev_connect_gpio_out(dev
, 0, pic
[0x19]); /* CUDA */
388 qdev_connect_gpio_out(dev
, 1, pic
[0x0d]); /* IDE */
389 qdev_connect_gpio_out(dev
, 2, pic
[0x02]); /* IDE DMA */
390 qdev_connect_gpio_out(dev
, 3, pic
[0x0e]); /* IDE */
391 qdev_connect_gpio_out(dev
, 4, pic
[0x03]); /* IDE DMA */
392 qdev_prop_set_uint64(dev
, "frequency", tbfreq
);
393 macio_init(macio
, pic_mem
, escc_bar
);
395 /* We only emulate 2 out of 3 IDE controllers for now */
396 ide_drive_get(hd
, ARRAY_SIZE(hd
));
398 macio_ide
= MACIO_IDE(object_resolve_path_component(OBJECT(macio
),
400 macio_ide_init_drives(macio_ide
, hd
);
402 macio_ide
= MACIO_IDE(object_resolve_path_component(OBJECT(macio
),
404 macio_ide_init_drives(macio_ide
, &hd
[MAX_IDE_DEVS
]);
406 dev
= DEVICE(object_resolve_path_component(OBJECT(macio
), "cuda"));
407 adb_bus
= qdev_get_child_bus(dev
, "adb.0");
408 dev
= qdev_create(adb_bus
, TYPE_ADB_KEYBOARD
);
409 qdev_init_nofail(dev
);
410 dev
= qdev_create(adb_bus
, TYPE_ADB_MOUSE
);
411 qdev_init_nofail(dev
);
414 pci_create_simple(pci_bus
, -1, "pci-ohci");
416 /* U3 needs to use USB for input because Linux doesn't support via-cuda
418 if (machine_arch
== ARCH_MAC99_U3
) {
419 USBBus
*usb_bus
= usb_bus_find(-1);
421 usb_create_simple(usb_bus
, "usb-kbd");
422 usb_create_simple(usb_bus
, "usb-mouse");
426 pci_vga_init(pci_bus
);
428 if (graphic_depth
!= 15 && graphic_depth
!= 32 && graphic_depth
!= 8) {
432 for (i
= 0; i
< nb_nics
; i
++) {
433 pci_nic_init_nofail(&nd_table
[i
], pci_bus
, "ne2k_pci", NULL
);
436 /* The NewWorld NVRAM is not located in the MacIO device */
438 if (kvm_enabled() && getpagesize() > 4096) {
439 /* We can't combine read-write and read-only in a single page, so
440 move the NVRAM out of ROM again for KVM */
441 nvram_addr
= 0xFFE00000;
444 dev
= qdev_create(NULL
, TYPE_MACIO_NVRAM
);
445 qdev_prop_set_uint32(dev
, "size", 0x2000);
446 qdev_prop_set_uint32(dev
, "it_shift", 1);
447 qdev_init_nofail(dev
);
448 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, nvram_addr
);
449 nvr
= MACIO_NVRAM(dev
);
450 pmac_format_nvram_partition(nvr
, 0x2000);
451 /* No PCI init: the BIOS will do it */
453 fw_cfg
= fw_cfg_init_mem(CFG_ADDR
, CFG_ADDR
+ 2);
454 fw_cfg_add_i16(fw_cfg
, FW_CFG_NB_CPUS
, (uint16_t)smp_cpus
);
455 fw_cfg_add_i16(fw_cfg
, FW_CFG_MAX_CPUS
, (uint16_t)max_cpus
);
456 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
457 fw_cfg_add_i16(fw_cfg
, FW_CFG_MACHINE_ID
, machine_arch
);
458 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, kernel_base
);
459 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
460 if (kernel_cmdline
) {
461 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_CMDLINE
, cmdline_base
);
462 pstrcpy_targphys("cmdline", cmdline_base
, TARGET_PAGE_SIZE
, kernel_cmdline
);
464 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_CMDLINE
, 0);
466 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_base
);
467 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
468 fw_cfg_add_i16(fw_cfg
, FW_CFG_BOOT_DEVICE
, ppc_boot_device
);
470 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_WIDTH
, graphic_width
);
471 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_HEIGHT
, graphic_height
);
472 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_DEPTH
, graphic_depth
);
474 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_IS_KVM
, kvm_enabled());
479 hypercall
= g_malloc(16);
480 kvmppc_get_hypercall(env
, hypercall
, 16);
481 fw_cfg_add_bytes(fw_cfg
, FW_CFG_PPC_KVM_HC
, hypercall
, 16);
482 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_KVM_PID
, getpid());
485 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_TBFREQ
, tbfreq
);
486 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
487 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_CLOCKFREQ
, CLOCKFREQ
);
488 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_BUSFREQ
, BUSFREQ
);
489 fw_cfg_add_i32(fw_cfg
, FW_CFG_PPC_NVRAM_ADDR
, nvram_addr
);
491 /* MacOS NDRV VGA driver */
492 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, NDRV_VGA_FILENAME
);
494 ndrv_size
= get_image_size(filename
);
495 if (ndrv_size
!= -1) {
496 ndrv_file
= g_malloc(ndrv_size
);
497 ndrv_size
= load_image(filename
, ndrv_file
);
499 fw_cfg_add_file(fw_cfg
, "ndrv/qemu_vga.ndrv", ndrv_file
, ndrv_size
);
504 qemu_register_boot_set(fw_cfg_boot_set
, fw_cfg
);
507 static int core99_kvm_type(const char *arg
)
509 /* Always force PR KVM */
513 static void core99_machine_class_init(ObjectClass
*oc
, void *data
)
515 MachineClass
*mc
= MACHINE_CLASS(oc
);
517 mc
->desc
= "Mac99 based PowerMAC";
518 mc
->init
= ppc_core99_init
;
519 mc
->block_default_type
= IF_IDE
;
520 mc
->max_cpus
= MAX_CPUS
;
521 mc
->default_boot_order
= "cd";
522 mc
->kvm_type
= core99_kvm_type
;
525 static const TypeInfo core99_machine_info
= {
526 .name
= MACHINE_TYPE_NAME("mac99"),
527 .parent
= TYPE_MACHINE
,
528 .class_init
= core99_machine_class_init
,
531 static void mac_machine_register_types(void)
533 type_register_static(&core99_machine_info
);
536 type_init(mac_machine_register_types
)