cpu.c

   1 /*
   2  * Target-specific parts of the CPU object
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "qapi/error.h"
  22
  23 #include "exec/target_page.h"
  24 #include "hw/qdev-core.h"
  25 #include "hw/qdev-properties.h"
  26 #include "qemu/error-report.h"
  27 #include "migration/vmstate.h"
  28 #ifdef CONFIG_USER_ONLY
  29 #include "qemu.h"
  30 #else
  31 #include "hw/core/sysemu-cpu-ops.h"
  32 #include "exec/address-spaces.h"
  33 #endif
  34 #include "sysemu/tcg.h"
  35 #include "sysemu/kvm.h"
  36 #include "sysemu/replay.h"
  37 #include "exec/cpu-common.h"
  38 #include "exec/exec-all.h"
  39 #include "exec/translate-all.h"
  40 #include "exec/log.h"
  41 #include "hw/core/accel-cpu.h"
  42 #include "trace/trace-root.h"
  43 #include "qemu/accel.h"
  44
  45 uintptr_t qemu_host_page_size;
  46 intptr_t qemu_host_page_mask;
  47
  48 #ifndef CONFIG_USER_ONLY
  49 static int cpu_common_post_load(void *opaque, int version_id)
  50 {
  51     CPUState *cpu = opaque;
  52
  53     /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
  54        version_id is increased. */
  55     cpu->interrupt_request &= ~0x01;
  56     tlb_flush(cpu);
  57
  58     /* loadvm has just updated the content of RAM, bypassing the
  59      * usual mechanisms that ensure we flush TBs for writes to
  60      * memory we've translated code from. So we must flush all TBs,
  61      * which will now be stale.
  62      */
  63     tb_flush(cpu);
  64
  65     return 0;
  66 }
  67
  68 static int cpu_common_pre_load(void *opaque)
  69 {
  70     CPUState *cpu = opaque;
  71
  72     cpu->exception_index = -1;
  73
  74     return 0;
  75 }
  76
  77 static bool cpu_common_exception_index_needed(void *opaque)
  78 {
  79     CPUState *cpu = opaque;
  80
  81     return tcg_enabled() && cpu->exception_index != -1;
  82 }
  83
  84 static const VMStateDescription vmstate_cpu_common_exception_index = {
  85     .name = "cpu_common/exception_index",
  86     .version_id = 1,
  87     .minimum_version_id = 1,
  88     .needed = cpu_common_exception_index_needed,
  89     .fields = (VMStateField[]) {
  90         VMSTATE_INT32(exception_index, CPUState),
  91         VMSTATE_END_OF_LIST()
  92     }
  93 };
  94
  95 static bool cpu_common_crash_occurred_needed(void *opaque)
  96 {
  97     CPUState *cpu = opaque;
  98
  99     return cpu->crash_occurred;
 100 }
 101
 102 static const VMStateDescription vmstate_cpu_common_crash_occurred = {
 103     .name = "cpu_common/crash_occurred",
 104     .version_id = 1,
 105     .minimum_version_id = 1,
 106     .needed = cpu_common_crash_occurred_needed,
 107     .fields = (VMStateField[]) {
 108         VMSTATE_BOOL(crash_occurred, CPUState),
 109         VMSTATE_END_OF_LIST()
 110     }
 111 };
 112
 113 const VMStateDescription vmstate_cpu_common = {
 114     .name = "cpu_common",
 115     .version_id = 1,
 116     .minimum_version_id = 1,
 117     .pre_load = cpu_common_pre_load,
 118     .post_load = cpu_common_post_load,
 119     .fields = (VMStateField[]) {
 120         VMSTATE_UINT32(halted, CPUState),
 121         VMSTATE_UINT32(interrupt_request, CPUState),
 122         VMSTATE_END_OF_LIST()
 123     },
 124     .subsections = (const VMStateDescription*[]) {
 125         &vmstate_cpu_common_exception_index,
 126         &vmstate_cpu_common_crash_occurred,
 127         NULL
 128     }
 129 };
 130 #endif
 131
 132 void cpu_exec_realizefn(CPUState *cpu, Error **errp)
 133 {
 134     /* cache the cpu class for the hotpath */
 135     cpu->cc = CPU_GET_CLASS(cpu);
 136
 137     if (!accel_cpu_realizefn(cpu, errp)) {
 138         return;
 139     }
 140
 141     /* NB: errp parameter is unused currently */
 142     if (tcg_enabled()) {
 143         tcg_exec_realizefn(cpu, errp);
 144     }
 145
 146     /* Wait until cpu initialization complete before exposing cpu. */
 147     cpu_list_add(cpu);
 148
 149     /* Plugin initialization must wait until cpu_index assigned. */
 150     if (tcg_enabled()) {
 151         qemu_plugin_vcpu_init_hook(cpu);
 152     }
 153
 154 #ifdef CONFIG_USER_ONLY
 155     assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
 156            qdev_get_vmsd(DEVICE(cpu))->unmigratable);
 157 #else
 158     if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
 159         vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
 160     }
 161     if (cpu->cc->sysemu_ops->legacy_vmsd != NULL) {
 162         vmstate_register(NULL, cpu->cpu_index, cpu->cc->sysemu_ops->legacy_vmsd, cpu);
 163     }
 164 #endif /* CONFIG_USER_ONLY */
 165 }
 166
 167 void cpu_exec_unrealizefn(CPUState *cpu)
 168 {
 169 #ifndef CONFIG_USER_ONLY
 170     CPUClass *cc = CPU_GET_CLASS(cpu);
 171
 172     if (cc->sysemu_ops->legacy_vmsd != NULL) {
 173         vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
 174     }
 175     if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
 176         vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
 177     }
 178 #endif
 179
 180     /* Call the plugin hook before clearing cpu->cpu_index in cpu_list_remove */
 181     if (tcg_enabled()) {
 182         qemu_plugin_vcpu_exit_hook(cpu);
 183     }
 184
 185     cpu_list_remove(cpu);
 186     /*
 187      * Now that the vCPU has been removed from the RCU list, we can call
 188      * tcg_exec_unrealizefn, which may free fields using call_rcu.
 189      */
 190     if (tcg_enabled()) {
 191         tcg_exec_unrealizefn(cpu);
 192     }
 193 }
 194
 195 /*
 196  * This can't go in hw/core/cpu.c because that file is compiled only
 197  * once for both user-mode and system builds.
 198  */
 199 static Property cpu_common_props[] = {
 200 #ifdef CONFIG_USER_ONLY
 201     /*
 202      * Create a property for the user-only object, so users can
 203      * adjust prctl(PR_SET_UNALIGN) from the command-line.
 204      * Has no effect if the target does not support the feature.
 205      */
 206     DEFINE_PROP_BOOL("prctl-unalign-sigbus", CPUState,
 207                      prctl_unalign_sigbus, false),
 208 #else
 209     /*
 210      * Create a memory property for softmmu CPU object, so users can
 211      * wire up its memory.  The default if no link is set up is to use
 212      * the system address space.
 213      */
 214     DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
 215                      MemoryRegion *),
 216 #endif
 217     DEFINE_PROP_END_OF_LIST(),
 218 };
 219
 220 static bool cpu_get_start_powered_off(Object *obj, Error **errp)
 221 {
 222     CPUState *cpu = CPU(obj);
 223     return cpu->start_powered_off;
 224 }
 225
 226 static void cpu_set_start_powered_off(Object *obj, bool value, Error **errp)
 227 {
 228     CPUState *cpu = CPU(obj);
 229     cpu->start_powered_off = value;
 230 }
 231
 232 void cpu_class_init_props(DeviceClass *dc)
 233 {
 234     ObjectClass *oc = OBJECT_CLASS(dc);
 235
 236     device_class_set_props(dc, cpu_common_props);
 237     /*
 238      * We can't use DEFINE_PROP_BOOL in the Property array for this
 239      * property, because we want this to be settable after realize.
 240      */
 241     object_class_property_add_bool(oc, "start-powered-off",
 242                                    cpu_get_start_powered_off,
 243                                    cpu_set_start_powered_off);
 244 }
 245
 246 void cpu_exec_initfn(CPUState *cpu)
 247 {
 248     cpu->as = NULL;
 249     cpu->num_ases = 0;
 250
 251 #ifndef CONFIG_USER_ONLY
 252     cpu->thread_id = qemu_get_thread_id();
 253     cpu->memory = get_system_memory();
 254     object_ref(OBJECT(cpu->memory));
 255 #endif
 256 }
 257
 258 const char *parse_cpu_option(const char *cpu_option)
 259 {
 260     ObjectClass *oc;
 261     CPUClass *cc;
 262     gchar **model_pieces;
 263     const char *cpu_type;
 264
 265     model_pieces = g_strsplit(cpu_option, ",", 2);
 266     if (!model_pieces[0]) {
 267         error_report("-cpu option cannot be empty");
 268         exit(1);
 269     }
 270
 271     oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
 272     if (oc == NULL) {
 273         error_report("unable to find CPU model '%s'", model_pieces[0]);
 274         g_strfreev(model_pieces);
 275         exit(EXIT_FAILURE);
 276     }
 277
 278     cpu_type = object_class_get_name(oc);
 279     cc = CPU_CLASS(oc);
 280     cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
 281     g_strfreev(model_pieces);
 282     return cpu_type;
 283 }
 284
 285 void list_cpus(const char *optarg)
 286 {
 287     /* XXX: implement xxx_cpu_list for targets that still miss it */
 288 #if defined(cpu_list)
 289     cpu_list();
 290 #endif
 291 }
 292
 293 #if defined(CONFIG_USER_ONLY)
 294 void tb_invalidate_phys_addr(target_ulong addr)
 295 {
 296     mmap_lock();
 297     tb_invalidate_phys_page(addr);
 298     mmap_unlock();
 299 }
 300 #else
 301 void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
 302 {
 303     ram_addr_t ram_addr;
 304     MemoryRegion *mr;
 305     hwaddr l = 1;
 306
 307     if (!tcg_enabled()) {
 308         return;
 309     }
 310
 311     RCU_READ_LOCK_GUARD();
 312     mr = address_space_translate(as, addr, &addr, &l, false, attrs);
 313     if (!(memory_region_is_ram(mr)
 314           || memory_region_is_romd(mr))) {
 315         return;
 316     }
 317     ram_addr = memory_region_get_ram_addr(mr) + addr;
 318     tb_invalidate_phys_page(ram_addr);
 319 }
 320 #endif
 321
 322 /* Add a breakpoint.  */
 323 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
 324                           CPUBreakpoint **breakpoint)
 325 {
 326     CPUClass *cc = CPU_GET_CLASS(cpu);
 327     CPUBreakpoint *bp;
 328
 329     if (cc->gdb_adjust_breakpoint) {
 330         pc = cc->gdb_adjust_breakpoint(cpu, pc);
 331     }
 332
 333     bp = g_malloc(sizeof(*bp));
 334
 335     bp->pc = pc;
 336     bp->flags = flags;
 337
 338     /* keep all GDB-injected breakpoints in front */
 339     if (flags & BP_GDB) {
 340         QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
 341     } else {
 342         QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
 343     }
 344
 345     if (breakpoint) {
 346         *breakpoint = bp;
 347     }
 348
 349     trace_breakpoint_insert(cpu->cpu_index, pc, flags);
 350     return 0;
 351 }
 352
 353 /* Remove a specific breakpoint.  */
 354 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
 355 {
 356     CPUClass *cc = CPU_GET_CLASS(cpu);
 357     CPUBreakpoint *bp;
 358
 359     if (cc->gdb_adjust_breakpoint) {
 360         pc = cc->gdb_adjust_breakpoint(cpu, pc);
 361     }
 362
 363     QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
 364         if (bp->pc == pc && bp->flags == flags) {
 365             cpu_breakpoint_remove_by_ref(cpu, bp);
 366             return 0;
 367         }
 368     }
 369     return -ENOENT;
 370 }
 371
 372 /* Remove a specific breakpoint by reference.  */
 373 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *bp)
 374 {
 375     QTAILQ_REMOVE(&cpu->breakpoints, bp, entry);
 376
 377     trace_breakpoint_remove(cpu->cpu_index, bp->pc, bp->flags);
 378     g_free(bp);
 379 }
 380
 381 /* Remove all matching breakpoints. */
 382 void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
 383 {
 384     CPUBreakpoint *bp, *next;
 385
 386     QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
 387         if (bp->flags & mask) {
 388             cpu_breakpoint_remove_by_ref(cpu, bp);
 389         }
 390     }
 391 }
 392
 393 /* enable or disable single step mode. EXCP_DEBUG is returned by the
 394    CPU loop after each instruction */
 395 void cpu_single_step(CPUState *cpu, int enabled)
 396 {
 397     if (cpu->singlestep_enabled != enabled) {
 398         cpu->singlestep_enabled = enabled;
 399         if (kvm_enabled()) {
 400             kvm_update_guest_debug(cpu, 0);
 401         }
 402         trace_breakpoint_singlestep(cpu->cpu_index, enabled);
 403     }
 404 }
 405
 406 void cpu_abort(CPUState *cpu, const char *fmt, ...)
 407 {
 408     va_list ap;
 409     va_list ap2;
 410
 411     va_start(ap, fmt);
 412     va_copy(ap2, ap);
 413     fprintf(stderr, "qemu: fatal: ");
 414     vfprintf(stderr, fmt, ap);
 415     fprintf(stderr, "\n");
 416     cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
 417     if (qemu_log_separate()) {
 418         FILE *logfile = qemu_log_trylock();
 419         if (logfile) {
 420             fprintf(logfile, "qemu: fatal: ");
 421             vfprintf(logfile, fmt, ap2);
 422             fprintf(logfile, "\n");
 423             cpu_dump_state(cpu, logfile, CPU_DUMP_FPU | CPU_DUMP_CCOP);
 424             qemu_log_unlock(logfile);
 425         }
 426     }
 427     va_end(ap2);
 428     va_end(ap);
 429     replay_finish();
 430 #if defined(CONFIG_USER_ONLY)
 431     {
 432         struct sigaction act;
 433         sigfillset(&act.sa_mask);
 434         act.sa_handler = SIG_DFL;
 435         act.sa_flags = 0;
 436         sigaction(SIGABRT, &act, NULL);
 437     }
 438 #endif
 439     abort();
 440 }
 441
 442 /* physical memory access (slow version, mainly for debug) */
 443 #if defined(CONFIG_USER_ONLY)
 444 int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
 445                         void *ptr, size_t len, bool is_write)
 446 {
 447     int flags;
 448     vaddr l, page;
 449     void * p;
 450     uint8_t *buf = ptr;
 451
 452     while (len > 0) {
 453         page = addr & TARGET_PAGE_MASK;
 454         l = (page + TARGET_PAGE_SIZE) - addr;
 455         if (l > len)
 456             l = len;
 457         flags = page_get_flags(page);
 458         if (!(flags & PAGE_VALID))
 459             return -1;
 460         if (is_write) {
 461             if (!(flags & PAGE_WRITE))
 462                 return -1;
 463             /* XXX: this code should not depend on lock_user */
 464             if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
 465                 return -1;
 466             memcpy(p, buf, l);
 467             unlock_user(p, addr, l);
 468         } else {
 469             if (!(flags & PAGE_READ))
 470                 return -1;
 471             /* XXX: this code should not depend on lock_user */
 472             if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
 473                 return -1;
 474             memcpy(buf, p, l);
 475             unlock_user(p, addr, 0);
 476         }
 477         len -= l;
 478         buf += l;
 479         addr += l;
 480     }
 481     return 0;
 482 }
 483 #endif
 484
 485 bool target_words_bigendian(void)
 486 {
 487 #if TARGET_BIG_ENDIAN
 488     return true;
 489 #else
 490     return false;
 491 #endif
 492 }
 493
 494 void page_size_init(void)
 495 {
 496     /* NOTE: we can always suppose that qemu_host_page_size >=
 497        TARGET_PAGE_SIZE */
 498     if (qemu_host_page_size == 0) {
 499         qemu_host_page_size = qemu_real_host_page_size();
 500     }
 501     if (qemu_host_page_size < TARGET_PAGE_SIZE) {
 502         qemu_host_page_size = TARGET_PAGE_SIZE;
 503     }
 504     qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
 505 }