target/m68k: Remove DISAS_JUMP_NEXT as unused
[qemu/kevin.git] / hw / misc / ivshmem.c
blob16f03701b7ab21478f1bbdd02d3cdce65625bfa3
1 /*
2 * Inter-VM Shared Memory PCI device.
4 * Author:
5 * Cam Macdonell <cam@cs.ualberta.ca>
7 * Based On: cirrus_vga.c
8 * Copyright (c) 2004 Fabrice Bellard
9 * Copyright (c) 2004 Makoto Suzuki (suzu)
11 * and rtl8139.c
12 * Copyright (c) 2006 Igor Kovalenko
14 * This code is licensed under the GNU GPL v2.
16 * Contributions after 2012-01-13 are licensed under the terms of the
17 * GNU GPL, version 2 or (at your option) any later version.
19 #include "qemu/osdep.h"
20 #include "qapi/error.h"
21 #include "qemu/cutils.h"
22 #include "hw/hw.h"
23 #include "hw/pci/pci.h"
24 #include "hw/pci/msi.h"
25 #include "hw/pci/msix.h"
26 #include "sysemu/kvm.h"
27 #include "migration/blocker.h"
28 #include "qemu/error-report.h"
29 #include "qemu/event_notifier.h"
30 #include "qom/object_interfaces.h"
31 #include "chardev/char-fe.h"
32 #include "sysemu/hostmem.h"
33 #include "sysemu/qtest.h"
34 #include "qapi/visitor.h"
36 #include "hw/misc/ivshmem.h"
38 #define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET
39 #define PCI_DEVICE_ID_IVSHMEM 0x1110
41 #define IVSHMEM_MAX_PEERS UINT16_MAX
42 #define IVSHMEM_IOEVENTFD 0
43 #define IVSHMEM_MSI 1
45 #define IVSHMEM_REG_BAR_SIZE 0x100
47 #define IVSHMEM_DEBUG 0
48 #define IVSHMEM_DPRINTF(fmt, ...) \
49 do { \
50 if (IVSHMEM_DEBUG) { \
51 printf("IVSHMEM: " fmt, ## __VA_ARGS__); \
52 } \
53 } while (0)
55 #define TYPE_IVSHMEM_COMMON "ivshmem-common"
56 #define IVSHMEM_COMMON(obj) \
57 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_COMMON)
59 #define TYPE_IVSHMEM_PLAIN "ivshmem-plain"
60 #define IVSHMEM_PLAIN(obj) \
61 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_PLAIN)
63 #define TYPE_IVSHMEM_DOORBELL "ivshmem-doorbell"
64 #define IVSHMEM_DOORBELL(obj) \
65 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_DOORBELL)
67 #define TYPE_IVSHMEM "ivshmem"
68 #define IVSHMEM(obj) \
69 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM)
71 typedef struct Peer {
72 int nb_eventfds;
73 EventNotifier *eventfds;
74 } Peer;
76 typedef struct MSIVector {
77 PCIDevice *pdev;
78 int virq;
79 bool unmasked;
80 } MSIVector;
82 typedef struct IVShmemState {
83 /*< private >*/
84 PCIDevice parent_obj;
85 /*< public >*/
87 uint32_t features;
89 /* exactly one of these two may be set */
90 HostMemoryBackend *hostmem; /* with interrupts */
91 CharBackend server_chr; /* without interrupts */
93 /* registers */
94 uint32_t intrmask;
95 uint32_t intrstatus;
96 int vm_id;
98 /* BARs */
99 MemoryRegion ivshmem_mmio; /* BAR 0 (registers) */
100 MemoryRegion *ivshmem_bar2; /* BAR 2 (shared memory) */
101 MemoryRegion server_bar2; /* used with server_chr */
103 /* interrupt support */
104 Peer *peers;
105 int nb_peers; /* space in @peers[] */
106 uint32_t vectors;
107 MSIVector *msi_vectors;
108 uint64_t msg_buf; /* buffer for receiving server messages */
109 int msg_buffered_bytes; /* #bytes in @msg_buf */
111 /* migration stuff */
112 OnOffAuto master;
113 Error *migration_blocker;
115 /* legacy cruft */
116 char *role;
117 char *shmobj;
118 char *sizearg;
119 size_t legacy_size;
120 uint32_t not_legacy_32bit;
121 } IVShmemState;
123 /* registers for the Inter-VM shared memory device */
124 enum ivshmem_registers {
125 INTRMASK = 0,
126 INTRSTATUS = 4,
127 IVPOSITION = 8,
128 DOORBELL = 12,
131 static inline uint32_t ivshmem_has_feature(IVShmemState *ivs,
132 unsigned int feature) {
133 return (ivs->features & (1 << feature));
136 static inline bool ivshmem_is_master(IVShmemState *s)
138 assert(s->master != ON_OFF_AUTO_AUTO);
139 return s->master == ON_OFF_AUTO_ON;
142 static void ivshmem_update_irq(IVShmemState *s)
144 PCIDevice *d = PCI_DEVICE(s);
145 uint32_t isr = s->intrstatus & s->intrmask;
148 * Do nothing unless the device actually uses INTx. Here's how
149 * the device variants signal interrupts, what they put in PCI
150 * config space:
151 * Device variant Interrupt Interrupt Pin MSI-X cap.
152 * ivshmem-plain none 0 no
153 * ivshmem-doorbell MSI-X 1 yes(1)
154 * ivshmem,msi=off INTx 1 no
155 * ivshmem,msi=on MSI-X 1(2) yes(1)
156 * (1) if guest enabled MSI-X
157 * (2) the device lies
158 * Leads to the condition for doing nothing:
160 if (ivshmem_has_feature(s, IVSHMEM_MSI)
161 || !d->config[PCI_INTERRUPT_PIN]) {
162 return;
165 /* don't print ISR resets */
166 if (isr) {
167 IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
168 isr ? 1 : 0, s->intrstatus, s->intrmask);
171 pci_set_irq(d, isr != 0);
174 static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val)
176 IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
178 s->intrmask = val;
179 ivshmem_update_irq(s);
182 static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
184 uint32_t ret = s->intrmask;
186 IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
187 return ret;
190 static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val)
192 IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
194 s->intrstatus = val;
195 ivshmem_update_irq(s);
198 static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
200 uint32_t ret = s->intrstatus;
202 /* reading ISR clears all interrupts */
203 s->intrstatus = 0;
204 ivshmem_update_irq(s);
205 return ret;
208 static void ivshmem_io_write(void *opaque, hwaddr addr,
209 uint64_t val, unsigned size)
211 IVShmemState *s = opaque;
213 uint16_t dest = val >> 16;
214 uint16_t vector = val & 0xff;
216 addr &= 0xfc;
218 IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr);
219 switch (addr)
221 case INTRMASK:
222 ivshmem_IntrMask_write(s, val);
223 break;
225 case INTRSTATUS:
226 ivshmem_IntrStatus_write(s, val);
227 break;
229 case DOORBELL:
230 /* check that dest VM ID is reasonable */
231 if (dest >= s->nb_peers) {
232 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
233 break;
236 /* check doorbell range */
237 if (vector < s->peers[dest].nb_eventfds) {
238 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector);
239 event_notifier_set(&s->peers[dest].eventfds[vector]);
240 } else {
241 IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n",
242 vector, dest);
244 break;
245 default:
246 IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx "\n", addr);
250 static uint64_t ivshmem_io_read(void *opaque, hwaddr addr,
251 unsigned size)
254 IVShmemState *s = opaque;
255 uint32_t ret;
257 switch (addr)
259 case INTRMASK:
260 ret = ivshmem_IntrMask_read(s);
261 break;
263 case INTRSTATUS:
264 ret = ivshmem_IntrStatus_read(s);
265 break;
267 case IVPOSITION:
268 ret = s->vm_id;
269 break;
271 default:
272 IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr);
273 ret = 0;
276 return ret;
279 static const MemoryRegionOps ivshmem_mmio_ops = {
280 .read = ivshmem_io_read,
281 .write = ivshmem_io_write,
282 .endianness = DEVICE_NATIVE_ENDIAN,
283 .impl = {
284 .min_access_size = 4,
285 .max_access_size = 4,
289 static void ivshmem_vector_notify(void *opaque)
291 MSIVector *entry = opaque;
292 PCIDevice *pdev = entry->pdev;
293 IVShmemState *s = IVSHMEM_COMMON(pdev);
294 int vector = entry - s->msi_vectors;
295 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
297 if (!event_notifier_test_and_clear(n)) {
298 return;
301 IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, vector);
302 if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
303 if (msix_enabled(pdev)) {
304 msix_notify(pdev, vector);
306 } else {
307 ivshmem_IntrStatus_write(s, 1);
311 static int ivshmem_vector_unmask(PCIDevice *dev, unsigned vector,
312 MSIMessage msg)
314 IVShmemState *s = IVSHMEM_COMMON(dev);
315 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
316 MSIVector *v = &s->msi_vectors[vector];
317 int ret;
319 IVSHMEM_DPRINTF("vector unmask %p %d\n", dev, vector);
320 if (!v->pdev) {
321 error_report("ivshmem: vector %d route does not exist", vector);
322 return -EINVAL;
324 assert(!v->unmasked);
326 ret = kvm_irqchip_update_msi_route(kvm_state, v->virq, msg, dev);
327 if (ret < 0) {
328 return ret;
330 kvm_irqchip_commit_routes(kvm_state);
332 ret = kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, v->virq);
333 if (ret < 0) {
334 return ret;
336 v->unmasked = true;
338 return 0;
341 static void ivshmem_vector_mask(PCIDevice *dev, unsigned vector)
343 IVShmemState *s = IVSHMEM_COMMON(dev);
344 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
345 MSIVector *v = &s->msi_vectors[vector];
346 int ret;
348 IVSHMEM_DPRINTF("vector mask %p %d\n", dev, vector);
349 if (!v->pdev) {
350 error_report("ivshmem: vector %d route does not exist", vector);
351 return;
353 assert(v->unmasked);
355 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, v->virq);
356 if (ret < 0) {
357 error_report("remove_irqfd_notifier_gsi failed");
358 return;
360 v->unmasked = false;
363 static void ivshmem_vector_poll(PCIDevice *dev,
364 unsigned int vector_start,
365 unsigned int vector_end)
367 IVShmemState *s = IVSHMEM_COMMON(dev);
368 unsigned int vector;
370 IVSHMEM_DPRINTF("vector poll %p %d-%d\n", dev, vector_start, vector_end);
372 vector_end = MIN(vector_end, s->vectors);
374 for (vector = vector_start; vector < vector_end; vector++) {
375 EventNotifier *notifier = &s->peers[s->vm_id].eventfds[vector];
377 if (!msix_is_masked(dev, vector)) {
378 continue;
381 if (event_notifier_test_and_clear(notifier)) {
382 msix_set_pending(dev, vector);
387 static void watch_vector_notifier(IVShmemState *s, EventNotifier *n,
388 int vector)
390 int eventfd = event_notifier_get_fd(n);
392 assert(!s->msi_vectors[vector].pdev);
393 s->msi_vectors[vector].pdev = PCI_DEVICE(s);
395 qemu_set_fd_handler(eventfd, ivshmem_vector_notify,
396 NULL, &s->msi_vectors[vector]);
399 static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i)
401 memory_region_add_eventfd(&s->ivshmem_mmio,
402 DOORBELL,
404 true,
405 (posn << 16) | i,
406 &s->peers[posn].eventfds[i]);
409 static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i)
411 memory_region_del_eventfd(&s->ivshmem_mmio,
412 DOORBELL,
414 true,
415 (posn << 16) | i,
416 &s->peers[posn].eventfds[i]);
419 static void close_peer_eventfds(IVShmemState *s, int posn)
421 int i, n;
423 assert(posn >= 0 && posn < s->nb_peers);
424 n = s->peers[posn].nb_eventfds;
426 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
427 memory_region_transaction_begin();
428 for (i = 0; i < n; i++) {
429 ivshmem_del_eventfd(s, posn, i);
431 memory_region_transaction_commit();
434 for (i = 0; i < n; i++) {
435 event_notifier_cleanup(&s->peers[posn].eventfds[i]);
438 g_free(s->peers[posn].eventfds);
439 s->peers[posn].nb_eventfds = 0;
442 static void resize_peers(IVShmemState *s, int nb_peers)
444 int old_nb_peers = s->nb_peers;
445 int i;
447 assert(nb_peers > old_nb_peers);
448 IVSHMEM_DPRINTF("bumping storage to %d peers\n", nb_peers);
450 s->peers = g_realloc(s->peers, nb_peers * sizeof(Peer));
451 s->nb_peers = nb_peers;
453 for (i = old_nb_peers; i < nb_peers; i++) {
454 s->peers[i].eventfds = g_new0(EventNotifier, s->vectors);
455 s->peers[i].nb_eventfds = 0;
459 static void ivshmem_add_kvm_msi_virq(IVShmemState *s, int vector,
460 Error **errp)
462 PCIDevice *pdev = PCI_DEVICE(s);
463 int ret;
465 IVSHMEM_DPRINTF("ivshmem_add_kvm_msi_virq vector:%d\n", vector);
466 assert(!s->msi_vectors[vector].pdev);
468 ret = kvm_irqchip_add_msi_route(kvm_state, vector, pdev);
469 if (ret < 0) {
470 error_setg(errp, "kvm_irqchip_add_msi_route failed");
471 return;
474 s->msi_vectors[vector].virq = ret;
475 s->msi_vectors[vector].pdev = pdev;
478 static void setup_interrupt(IVShmemState *s, int vector, Error **errp)
480 EventNotifier *n = &s->peers[s->vm_id].eventfds[vector];
481 bool with_irqfd = kvm_msi_via_irqfd_enabled() &&
482 ivshmem_has_feature(s, IVSHMEM_MSI);
483 PCIDevice *pdev = PCI_DEVICE(s);
484 Error *err = NULL;
486 IVSHMEM_DPRINTF("setting up interrupt for vector: %d\n", vector);
488 if (!with_irqfd) {
489 IVSHMEM_DPRINTF("with eventfd\n");
490 watch_vector_notifier(s, n, vector);
491 } else if (msix_enabled(pdev)) {
492 IVSHMEM_DPRINTF("with irqfd\n");
493 ivshmem_add_kvm_msi_virq(s, vector, &err);
494 if (err) {
495 error_propagate(errp, err);
496 return;
499 if (!msix_is_masked(pdev, vector)) {
500 kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL,
501 s->msi_vectors[vector].virq);
502 /* TODO handle error */
504 } else {
505 /* it will be delayed until msix is enabled, in write_config */
506 IVSHMEM_DPRINTF("with irqfd, delayed until msix enabled\n");
510 static void process_msg_shmem(IVShmemState *s, int fd, Error **errp)
512 Error *local_err = NULL;
513 struct stat buf;
514 size_t size;
516 if (s->ivshmem_bar2) {
517 error_setg(errp, "server sent unexpected shared memory message");
518 close(fd);
519 return;
522 if (fstat(fd, &buf) < 0) {
523 error_setg_errno(errp, errno,
524 "can't determine size of shared memory sent by server");
525 close(fd);
526 return;
529 size = buf.st_size;
531 /* Legacy cruft */
532 if (s->legacy_size != SIZE_MAX) {
533 if (size < s->legacy_size) {
534 error_setg(errp, "server sent only %zd bytes of shared memory",
535 (size_t)buf.st_size);
536 close(fd);
537 return;
539 size = s->legacy_size;
542 /* mmap the region and map into the BAR2 */
543 memory_region_init_ram_from_fd(&s->server_bar2, OBJECT(s),
544 "ivshmem.bar2", size, true, fd, &local_err);
545 if (local_err) {
546 error_propagate(errp, local_err);
547 return;
550 s->ivshmem_bar2 = &s->server_bar2;
553 static void process_msg_disconnect(IVShmemState *s, uint16_t posn,
554 Error **errp)
556 IVSHMEM_DPRINTF("posn %d has gone away\n", posn);
557 if (posn >= s->nb_peers || posn == s->vm_id) {
558 error_setg(errp, "invalid peer %d", posn);
559 return;
561 close_peer_eventfds(s, posn);
564 static void process_msg_connect(IVShmemState *s, uint16_t posn, int fd,
565 Error **errp)
567 Peer *peer = &s->peers[posn];
568 int vector;
571 * The N-th connect message for this peer comes with the file
572 * descriptor for vector N-1. Count messages to find the vector.
574 if (peer->nb_eventfds >= s->vectors) {
575 error_setg(errp, "Too many eventfd received, device has %d vectors",
576 s->vectors);
577 close(fd);
578 return;
580 vector = peer->nb_eventfds++;
582 IVSHMEM_DPRINTF("eventfds[%d][%d] = %d\n", posn, vector, fd);
583 event_notifier_init_fd(&peer->eventfds[vector], fd);
584 fcntl_setfl(fd, O_NONBLOCK); /* msix/irqfd poll non block */
586 if (posn == s->vm_id) {
587 setup_interrupt(s, vector, errp);
588 /* TODO do we need to handle the error? */
591 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
592 ivshmem_add_eventfd(s, posn, vector);
596 static void process_msg(IVShmemState *s, int64_t msg, int fd, Error **errp)
598 IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n", msg, fd);
600 if (msg < -1 || msg > IVSHMEM_MAX_PEERS) {
601 error_setg(errp, "server sent invalid message %" PRId64, msg);
602 close(fd);
603 return;
606 if (msg == -1) {
607 process_msg_shmem(s, fd, errp);
608 return;
611 if (msg >= s->nb_peers) {
612 resize_peers(s, msg + 1);
615 if (fd >= 0) {
616 process_msg_connect(s, msg, fd, errp);
617 } else {
618 process_msg_disconnect(s, msg, errp);
622 static int ivshmem_can_receive(void *opaque)
624 IVShmemState *s = opaque;
626 assert(s->msg_buffered_bytes < sizeof(s->msg_buf));
627 return sizeof(s->msg_buf) - s->msg_buffered_bytes;
630 static void ivshmem_read(void *opaque, const uint8_t *buf, int size)
632 IVShmemState *s = opaque;
633 Error *err = NULL;
634 int fd;
635 int64_t msg;
637 assert(size >= 0 && s->msg_buffered_bytes + size <= sizeof(s->msg_buf));
638 memcpy((unsigned char *)&s->msg_buf + s->msg_buffered_bytes, buf, size);
639 s->msg_buffered_bytes += size;
640 if (s->msg_buffered_bytes < sizeof(s->msg_buf)) {
641 return;
643 msg = le64_to_cpu(s->msg_buf);
644 s->msg_buffered_bytes = 0;
646 fd = qemu_chr_fe_get_msgfd(&s->server_chr);
648 process_msg(s, msg, fd, &err);
649 if (err) {
650 error_report_err(err);
654 static int64_t ivshmem_recv_msg(IVShmemState *s, int *pfd, Error **errp)
656 int64_t msg;
657 int n, ret;
659 n = 0;
660 do {
661 ret = qemu_chr_fe_read_all(&s->server_chr, (uint8_t *)&msg + n,
662 sizeof(msg) - n);
663 if (ret < 0) {
664 if (ret == -EINTR) {
665 continue;
667 error_setg_errno(errp, -ret, "read from server failed");
668 return INT64_MIN;
670 n += ret;
671 } while (n < sizeof(msg));
673 *pfd = qemu_chr_fe_get_msgfd(&s->server_chr);
674 return le64_to_cpu(msg);
677 static void ivshmem_recv_setup(IVShmemState *s, Error **errp)
679 Error *err = NULL;
680 int64_t msg;
681 int fd;
683 msg = ivshmem_recv_msg(s, &fd, &err);
684 if (err) {
685 error_propagate(errp, err);
686 return;
688 if (msg != IVSHMEM_PROTOCOL_VERSION) {
689 error_setg(errp, "server sent version %" PRId64 ", expecting %d",
690 msg, IVSHMEM_PROTOCOL_VERSION);
691 return;
693 if (fd != -1) {
694 error_setg(errp, "server sent invalid version message");
695 return;
699 * ivshmem-server sends the remaining initial messages in a fixed
700 * order, but the device has always accepted them in any order.
701 * Stay as compatible as practical, just in case people use
702 * servers that behave differently.
706 * ivshmem_device_spec.txt has always required the ID message
707 * right here, and ivshmem-server has always complied. However,
708 * older versions of the device accepted it out of order, but
709 * broke when an interrupt setup message arrived before it.
711 msg = ivshmem_recv_msg(s, &fd, &err);
712 if (err) {
713 error_propagate(errp, err);
714 return;
716 if (fd != -1 || msg < 0 || msg > IVSHMEM_MAX_PEERS) {
717 error_setg(errp, "server sent invalid ID message");
718 return;
720 s->vm_id = msg;
723 * Receive more messages until we got shared memory.
725 do {
726 msg = ivshmem_recv_msg(s, &fd, &err);
727 if (err) {
728 error_propagate(errp, err);
729 return;
731 process_msg(s, msg, fd, &err);
732 if (err) {
733 error_propagate(errp, err);
734 return;
736 } while (msg != -1);
739 * This function must either map the shared memory or fail. The
740 * loop above ensures that: it terminates normally only after it
741 * successfully processed the server's shared memory message.
742 * Assert that actually mapped the shared memory:
744 assert(s->ivshmem_bar2);
747 /* Select the MSI-X vectors used by device.
748 * ivshmem maps events to vectors statically, so
749 * we just enable all vectors on init and after reset. */
750 static void ivshmem_msix_vector_use(IVShmemState *s)
752 PCIDevice *d = PCI_DEVICE(s);
753 int i;
755 for (i = 0; i < s->vectors; i++) {
756 msix_vector_use(d, i);
760 static void ivshmem_disable_irqfd(IVShmemState *s);
762 static void ivshmem_reset(DeviceState *d)
764 IVShmemState *s = IVSHMEM_COMMON(d);
766 ivshmem_disable_irqfd(s);
768 s->intrstatus = 0;
769 s->intrmask = 0;
770 if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
771 ivshmem_msix_vector_use(s);
775 static int ivshmem_setup_interrupts(IVShmemState *s, Error **errp)
777 /* allocate QEMU callback data for receiving interrupts */
778 s->msi_vectors = g_malloc0(s->vectors * sizeof(MSIVector));
780 if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
781 if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1, errp)) {
782 return -1;
785 IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
786 ivshmem_msix_vector_use(s);
789 return 0;
792 static void ivshmem_remove_kvm_msi_virq(IVShmemState *s, int vector)
794 IVSHMEM_DPRINTF("ivshmem_remove_kvm_msi_virq vector:%d\n", vector);
796 if (s->msi_vectors[vector].pdev == NULL) {
797 return;
800 /* it was cleaned when masked in the frontend. */
801 kvm_irqchip_release_virq(kvm_state, s->msi_vectors[vector].virq);
803 s->msi_vectors[vector].pdev = NULL;
806 static void ivshmem_enable_irqfd(IVShmemState *s)
808 PCIDevice *pdev = PCI_DEVICE(s);
809 int i;
811 for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) {
812 Error *err = NULL;
814 ivshmem_add_kvm_msi_virq(s, i, &err);
815 if (err) {
816 error_report_err(err);
817 goto undo;
821 if (msix_set_vector_notifiers(pdev,
822 ivshmem_vector_unmask,
823 ivshmem_vector_mask,
824 ivshmem_vector_poll)) {
825 error_report("ivshmem: msix_set_vector_notifiers failed");
826 goto undo;
828 return;
830 undo:
831 while (--i >= 0) {
832 ivshmem_remove_kvm_msi_virq(s, i);
836 static void ivshmem_disable_irqfd(IVShmemState *s)
838 PCIDevice *pdev = PCI_DEVICE(s);
839 int i;
841 if (!pdev->msix_vector_use_notifier) {
842 return;
845 msix_unset_vector_notifiers(pdev);
847 for (i = 0; i < s->peers[s->vm_id].nb_eventfds; i++) {
849 * MSI-X is already disabled here so msix_unset_vector_notifiers()
850 * didn't call our release notifier. Do it now to keep our masks and
851 * unmasks balanced.
853 if (s->msi_vectors[i].unmasked) {
854 ivshmem_vector_mask(pdev, i);
856 ivshmem_remove_kvm_msi_virq(s, i);
861 static void ivshmem_write_config(PCIDevice *pdev, uint32_t address,
862 uint32_t val, int len)
864 IVShmemState *s = IVSHMEM_COMMON(pdev);
865 int is_enabled, was_enabled = msix_enabled(pdev);
867 pci_default_write_config(pdev, address, val, len);
868 is_enabled = msix_enabled(pdev);
870 if (kvm_msi_via_irqfd_enabled()) {
871 if (!was_enabled && is_enabled) {
872 ivshmem_enable_irqfd(s);
873 } else if (was_enabled && !is_enabled) {
874 ivshmem_disable_irqfd(s);
879 static void ivshmem_common_realize(PCIDevice *dev, Error **errp)
881 IVShmemState *s = IVSHMEM_COMMON(dev);
882 Error *err = NULL;
883 uint8_t *pci_conf;
884 uint8_t attr = PCI_BASE_ADDRESS_SPACE_MEMORY |
885 PCI_BASE_ADDRESS_MEM_PREFETCH;
886 Error *local_err = NULL;
888 /* IRQFD requires MSI */
889 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
890 !ivshmem_has_feature(s, IVSHMEM_MSI)) {
891 error_setg(errp, "ioeventfd/irqfd requires MSI");
892 return;
895 pci_conf = dev->config;
896 pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
898 memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s,
899 "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
901 /* region for registers*/
902 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
903 &s->ivshmem_mmio);
905 if (s->not_legacy_32bit) {
906 attr |= PCI_BASE_ADDRESS_MEM_TYPE_64;
909 if (s->hostmem != NULL) {
910 IVSHMEM_DPRINTF("using hostmem\n");
912 s->ivshmem_bar2 = host_memory_backend_get_memory(s->hostmem,
913 &error_abort);
914 } else {
915 Chardev *chr = qemu_chr_fe_get_driver(&s->server_chr);
916 assert(chr);
918 IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
919 chr->filename);
921 /* we allocate enough space for 16 peers and grow as needed */
922 resize_peers(s, 16);
925 * Receive setup messages from server synchronously.
926 * Older versions did it asynchronously, but that creates a
927 * number of entertaining race conditions.
929 ivshmem_recv_setup(s, &err);
930 if (err) {
931 error_propagate(errp, err);
932 return;
935 if (s->master == ON_OFF_AUTO_ON && s->vm_id != 0) {
936 error_setg(errp,
937 "master must connect to the server before any peers");
938 return;
941 qemu_chr_fe_set_handlers(&s->server_chr, ivshmem_can_receive,
942 ivshmem_read, NULL, NULL, s, NULL, true);
944 if (ivshmem_setup_interrupts(s, errp) < 0) {
945 error_prepend(errp, "Failed to initialize interrupts: ");
946 return;
950 if (s->master == ON_OFF_AUTO_AUTO) {
951 s->master = s->vm_id == 0 ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
954 if (!ivshmem_is_master(s)) {
955 error_setg(&s->migration_blocker,
956 "Migration is disabled when using feature 'peer mode' in device 'ivshmem'");
957 migrate_add_blocker(s->migration_blocker, &local_err);
958 if (local_err) {
959 error_propagate(errp, local_err);
960 error_free(s->migration_blocker);
961 return;
965 vmstate_register_ram(s->ivshmem_bar2, DEVICE(s));
966 pci_register_bar(PCI_DEVICE(s), 2, attr, s->ivshmem_bar2);
969 static void ivshmem_exit(PCIDevice *dev)
971 IVShmemState *s = IVSHMEM_COMMON(dev);
972 int i;
974 if (s->migration_blocker) {
975 migrate_del_blocker(s->migration_blocker);
976 error_free(s->migration_blocker);
979 if (memory_region_is_mapped(s->ivshmem_bar2)) {
980 if (!s->hostmem) {
981 void *addr = memory_region_get_ram_ptr(s->ivshmem_bar2);
982 int fd;
984 if (munmap(addr, memory_region_size(s->ivshmem_bar2) == -1)) {
985 error_report("Failed to munmap shared memory %s",
986 strerror(errno));
989 fd = memory_region_get_fd(s->ivshmem_bar2);
990 close(fd);
993 vmstate_unregister_ram(s->ivshmem_bar2, DEVICE(dev));
996 if (s->peers) {
997 for (i = 0; i < s->nb_peers; i++) {
998 close_peer_eventfds(s, i);
1000 g_free(s->peers);
1003 if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
1004 msix_uninit_exclusive_bar(dev);
1007 g_free(s->msi_vectors);
1010 static int ivshmem_pre_load(void *opaque)
1012 IVShmemState *s = opaque;
1014 if (!ivshmem_is_master(s)) {
1015 error_report("'peer' devices are not migratable");
1016 return -EINVAL;
1019 return 0;
1022 static int ivshmem_post_load(void *opaque, int version_id)
1024 IVShmemState *s = opaque;
1026 if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
1027 ivshmem_msix_vector_use(s);
1029 return 0;
1032 static void ivshmem_common_class_init(ObjectClass *klass, void *data)
1034 DeviceClass *dc = DEVICE_CLASS(klass);
1035 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1037 k->realize = ivshmem_common_realize;
1038 k->exit = ivshmem_exit;
1039 k->config_write = ivshmem_write_config;
1040 k->vendor_id = PCI_VENDOR_ID_IVSHMEM;
1041 k->device_id = PCI_DEVICE_ID_IVSHMEM;
1042 k->class_id = PCI_CLASS_MEMORY_RAM;
1043 k->revision = 1;
1044 dc->reset = ivshmem_reset;
1045 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
1046 dc->desc = "Inter-VM shared memory";
1049 static const TypeInfo ivshmem_common_info = {
1050 .name = TYPE_IVSHMEM_COMMON,
1051 .parent = TYPE_PCI_DEVICE,
1052 .instance_size = sizeof(IVShmemState),
1053 .abstract = true,
1054 .class_init = ivshmem_common_class_init,
1055 .interfaces = (InterfaceInfo[]) {
1056 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
1057 { },
1061 static const VMStateDescription ivshmem_plain_vmsd = {
1062 .name = TYPE_IVSHMEM_PLAIN,
1063 .version_id = 0,
1064 .minimum_version_id = 0,
1065 .pre_load = ivshmem_pre_load,
1066 .post_load = ivshmem_post_load,
1067 .fields = (VMStateField[]) {
1068 VMSTATE_PCI_DEVICE(parent_obj, IVShmemState),
1069 VMSTATE_UINT32(intrstatus, IVShmemState),
1070 VMSTATE_UINT32(intrmask, IVShmemState),
1071 VMSTATE_END_OF_LIST()
1075 static Property ivshmem_plain_properties[] = {
1076 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF),
1077 DEFINE_PROP_LINK("memdev", IVShmemState, hostmem, TYPE_MEMORY_BACKEND,
1078 HostMemoryBackend *),
1079 DEFINE_PROP_END_OF_LIST(),
1082 static void ivshmem_plain_init(Object *obj)
1084 IVShmemState *s = IVSHMEM_PLAIN(obj);
1086 s->not_legacy_32bit = 1;
1089 static void ivshmem_plain_realize(PCIDevice *dev, Error **errp)
1091 IVShmemState *s = IVSHMEM_COMMON(dev);
1093 if (!s->hostmem) {
1094 error_setg(errp, "You must specify a 'memdev'");
1095 return;
1096 } else if (host_memory_backend_is_mapped(s->hostmem)) {
1097 char *path = object_get_canonical_path_component(OBJECT(s->hostmem));
1098 error_setg(errp, "can't use already busy memdev: %s", path);
1099 g_free(path);
1100 return;
1103 ivshmem_common_realize(dev, errp);
1104 host_memory_backend_set_mapped(s->hostmem, true);
1107 static void ivshmem_plain_exit(PCIDevice *pci_dev)
1109 IVShmemState *s = IVSHMEM_COMMON(pci_dev);
1111 host_memory_backend_set_mapped(s->hostmem, false);
1114 static void ivshmem_plain_class_init(ObjectClass *klass, void *data)
1116 DeviceClass *dc = DEVICE_CLASS(klass);
1117 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1119 k->realize = ivshmem_plain_realize;
1120 k->exit = ivshmem_plain_exit;
1121 dc->props = ivshmem_plain_properties;
1122 dc->vmsd = &ivshmem_plain_vmsd;
1125 static const TypeInfo ivshmem_plain_info = {
1126 .name = TYPE_IVSHMEM_PLAIN,
1127 .parent = TYPE_IVSHMEM_COMMON,
1128 .instance_size = sizeof(IVShmemState),
1129 .instance_init = ivshmem_plain_init,
1130 .class_init = ivshmem_plain_class_init,
1133 static const VMStateDescription ivshmem_doorbell_vmsd = {
1134 .name = TYPE_IVSHMEM_DOORBELL,
1135 .version_id = 0,
1136 .minimum_version_id = 0,
1137 .pre_load = ivshmem_pre_load,
1138 .post_load = ivshmem_post_load,
1139 .fields = (VMStateField[]) {
1140 VMSTATE_PCI_DEVICE(parent_obj, IVShmemState),
1141 VMSTATE_MSIX(parent_obj, IVShmemState),
1142 VMSTATE_UINT32(intrstatus, IVShmemState),
1143 VMSTATE_UINT32(intrmask, IVShmemState),
1144 VMSTATE_END_OF_LIST()
1148 static Property ivshmem_doorbell_properties[] = {
1149 DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
1150 DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
1151 DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD,
1152 true),
1153 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF),
1154 DEFINE_PROP_END_OF_LIST(),
1157 static void ivshmem_doorbell_init(Object *obj)
1159 IVShmemState *s = IVSHMEM_DOORBELL(obj);
1161 s->features |= (1 << IVSHMEM_MSI);
1162 s->legacy_size = SIZE_MAX; /* whatever the server sends */
1163 s->not_legacy_32bit = 1;
1166 static void ivshmem_doorbell_realize(PCIDevice *dev, Error **errp)
1168 IVShmemState *s = IVSHMEM_COMMON(dev);
1170 if (!qemu_chr_fe_backend_connected(&s->server_chr)) {
1171 error_setg(errp, "You must specify a 'chardev'");
1172 return;
1175 ivshmem_common_realize(dev, errp);
1178 static void ivshmem_doorbell_class_init(ObjectClass *klass, void *data)
1180 DeviceClass *dc = DEVICE_CLASS(klass);
1181 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1183 k->realize = ivshmem_doorbell_realize;
1184 dc->props = ivshmem_doorbell_properties;
1185 dc->vmsd = &ivshmem_doorbell_vmsd;
1188 static const TypeInfo ivshmem_doorbell_info = {
1189 .name = TYPE_IVSHMEM_DOORBELL,
1190 .parent = TYPE_IVSHMEM_COMMON,
1191 .instance_size = sizeof(IVShmemState),
1192 .instance_init = ivshmem_doorbell_init,
1193 .class_init = ivshmem_doorbell_class_init,
1196 static int ivshmem_load_old(QEMUFile *f, void *opaque, int version_id)
1198 IVShmemState *s = opaque;
1199 PCIDevice *pdev = PCI_DEVICE(s);
1200 int ret;
1202 IVSHMEM_DPRINTF("ivshmem_load_old\n");
1204 if (version_id != 0) {
1205 return -EINVAL;
1208 ret = ivshmem_pre_load(s);
1209 if (ret) {
1210 return ret;
1213 ret = pci_device_load(pdev, f);
1214 if (ret) {
1215 return ret;
1218 if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
1219 msix_load(pdev, f);
1220 ivshmem_msix_vector_use(s);
1221 } else {
1222 s->intrstatus = qemu_get_be32(f);
1223 s->intrmask = qemu_get_be32(f);
1226 return 0;
1229 static bool test_msix(void *opaque, int version_id)
1231 IVShmemState *s = opaque;
1233 return ivshmem_has_feature(s, IVSHMEM_MSI);
1236 static bool test_no_msix(void *opaque, int version_id)
1238 return !test_msix(opaque, version_id);
1241 static const VMStateDescription ivshmem_vmsd = {
1242 .name = "ivshmem",
1243 .version_id = 1,
1244 .minimum_version_id = 1,
1245 .pre_load = ivshmem_pre_load,
1246 .post_load = ivshmem_post_load,
1247 .fields = (VMStateField[]) {
1248 VMSTATE_PCI_DEVICE(parent_obj, IVShmemState),
1250 VMSTATE_MSIX_TEST(parent_obj, IVShmemState, test_msix),
1251 VMSTATE_UINT32_TEST(intrstatus, IVShmemState, test_no_msix),
1252 VMSTATE_UINT32_TEST(intrmask, IVShmemState, test_no_msix),
1254 VMSTATE_END_OF_LIST()
1256 .load_state_old = ivshmem_load_old,
1257 .minimum_version_id_old = 0
1260 static Property ivshmem_properties[] = {
1261 DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
1262 DEFINE_PROP_STRING("size", IVShmemState, sizearg),
1263 DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
1264 DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD,
1265 false),
1266 DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
1267 DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
1268 DEFINE_PROP_STRING("role", IVShmemState, role),
1269 DEFINE_PROP_UINT32("use64", IVShmemState, not_legacy_32bit, 1),
1270 DEFINE_PROP_END_OF_LIST(),
1273 static void desugar_shm(IVShmemState *s)
1275 Object *obj;
1276 char *path;
1278 obj = object_new("memory-backend-file");
1279 path = g_strdup_printf("/dev/shm/%s", s->shmobj);
1280 object_property_set_str(obj, path, "mem-path", &error_abort);
1281 g_free(path);
1282 object_property_set_int(obj, s->legacy_size, "size", &error_abort);
1283 object_property_set_bool(obj, true, "share", &error_abort);
1284 object_property_add_child(OBJECT(s), "internal-shm-backend", obj,
1285 &error_abort);
1286 user_creatable_complete(obj, &error_abort);
1287 s->hostmem = MEMORY_BACKEND(obj);
1290 static void ivshmem_realize(PCIDevice *dev, Error **errp)
1292 IVShmemState *s = IVSHMEM_COMMON(dev);
1294 if (!qtest_enabled()) {
1295 error_report("ivshmem is deprecated, please use ivshmem-plain"
1296 " or ivshmem-doorbell instead");
1299 if (qemu_chr_fe_backend_connected(&s->server_chr) + !!s->shmobj != 1) {
1300 error_setg(errp, "You must specify either 'shm' or 'chardev'");
1301 return;
1304 if (s->sizearg == NULL) {
1305 s->legacy_size = 4 << 20; /* 4 MB default */
1306 } else {
1307 int ret;
1308 uint64_t size;
1310 ret = qemu_strtosz_MiB(s->sizearg, NULL, &size);
1311 if (ret < 0 || (size_t)size != size || !is_power_of_2(size)) {
1312 error_setg(errp, "Invalid size %s", s->sizearg);
1313 return;
1315 s->legacy_size = size;
1318 /* check that role is reasonable */
1319 if (s->role) {
1320 if (strncmp(s->role, "peer", 5) == 0) {
1321 s->master = ON_OFF_AUTO_OFF;
1322 } else if (strncmp(s->role, "master", 7) == 0) {
1323 s->master = ON_OFF_AUTO_ON;
1324 } else {
1325 error_setg(errp, "'role' must be 'peer' or 'master'");
1326 return;
1328 } else {
1329 s->master = ON_OFF_AUTO_AUTO;
1332 if (s->shmobj) {
1333 desugar_shm(s);
1337 * Note: we don't use INTx with IVSHMEM_MSI at all, so this is a
1338 * bald-faced lie then. But it's a backwards compatible lie.
1340 pci_config_set_interrupt_pin(dev->config, 1);
1342 ivshmem_common_realize(dev, errp);
1345 static void ivshmem_class_init(ObjectClass *klass, void *data)
1347 DeviceClass *dc = DEVICE_CLASS(klass);
1348 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1350 k->realize = ivshmem_realize;
1351 k->revision = 0;
1352 dc->desc = "Inter-VM shared memory (legacy)";
1353 dc->props = ivshmem_properties;
1354 dc->vmsd = &ivshmem_vmsd;
1357 static const TypeInfo ivshmem_info = {
1358 .name = TYPE_IVSHMEM,
1359 .parent = TYPE_IVSHMEM_COMMON,
1360 .instance_size = sizeof(IVShmemState),
1361 .class_init = ivshmem_class_init,
1364 static void ivshmem_register_types(void)
1366 type_register_static(&ivshmem_common_info);
1367 type_register_static(&ivshmem_plain_info);
1368 type_register_static(&ivshmem_doorbell_info);
1369 type_register_static(&ivshmem_info);
1372 type_init(ivshmem_register_types)