include/exec/translator.h

   1 /*
   2  * Generic intermediate code generation.
   3  *
   4  * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu>
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  */
   9
  10 #ifndef EXEC__TRANSLATOR_H
  11 #define EXEC__TRANSLATOR_H
  12
  13 /*
  14  * Include this header from a target-specific file, and add a
  15  *
  16  *     DisasContextBase base;
  17  *
  18  * member in your target-specific DisasContext.
  19  */
  20
  21 #include "qemu/bswap.h"
  22 #include "exec/cpu_ldst.h"      /* for abi_ptr */
  23
  24 /**
  25  * gen_intermediate_code
  26  * @cpu: cpu context
  27  * @tb: translation block
  28  * @max_insns: max number of instructions to translate
  29  * @pc: guest virtual program counter address
  30  * @host_pc: host physical program counter address
  31  *
  32  * This function must be provided by the target, which should create
  33  * the target-specific DisasContext, and then invoke translator_loop.
  34  */
  35 void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int *max_insns,
  36                            target_ulong pc, void *host_pc);
  37
  38 /**
  39  * DisasJumpType:
  40  * @DISAS_NEXT: Next instruction in program order.
  41  * @DISAS_TOO_MANY: Too many instructions translated.
  42  * @DISAS_NORETURN: Following code is dead.
  43  * @DISAS_TARGET_*: Start of target-specific conditions.
  44  *
  45  * What instruction to disassemble next.
  46  */
  47 typedef enum DisasJumpType {
  48     DISAS_NEXT,
  49     DISAS_TOO_MANY,
  50     DISAS_NORETURN,
  51     DISAS_TARGET_0,
  52     DISAS_TARGET_1,
  53     DISAS_TARGET_2,
  54     DISAS_TARGET_3,
  55     DISAS_TARGET_4,
  56     DISAS_TARGET_5,
  57     DISAS_TARGET_6,
  58     DISAS_TARGET_7,
  59     DISAS_TARGET_8,
  60     DISAS_TARGET_9,
  61     DISAS_TARGET_10,
  62     DISAS_TARGET_11,
  63 } DisasJumpType;
  64
  65 /**
  66  * DisasContextBase:
  67  * @tb: Translation block for this disassembly.
  68  * @pc_first: Address of first guest instruction in this TB.
  69  * @pc_next: Address of next guest instruction in this TB (current during
  70  *           disassembly).
  71  * @is_jmp: What instruction to disassemble next.
  72  * @num_insns: Number of translated instructions (including current).
  73  * @max_insns: Maximum number of instructions to be translated in this TB.
  74  * @singlestep_enabled: "Hardware" single stepping enabled.
  75  * @saved_can_do_io: Known value of cpu->neg.can_do_io, or -1 for unknown.
  76  * @plugin_enabled: TCG plugin enabled in this TB.
  77  *
  78  * Architecture-agnostic disassembly context.
  79  */
  80 typedef struct DisasContextBase {
  81     TranslationBlock *tb;
  82     target_ulong pc_first;
  83     target_ulong pc_next;
  84     DisasJumpType is_jmp;
  85     int num_insns;
  86     int max_insns;
  87     bool singlestep_enabled;
  88     int8_t saved_can_do_io;
  89     bool plugin_enabled;
  90     void *host_addr[2];
  91 } DisasContextBase;
  92
  93 /**
  94  * TranslatorOps:
  95  * @init_disas_context:
  96  *      Initialize the target-specific portions of DisasContext struct.
  97  *      The generic DisasContextBase has already been initialized.
  98  *
  99  * @tb_start:
 100  *      Emit any code required before the start of the main loop,
 101  *      after the generic gen_tb_start().
 102  *
 103  * @insn_start:
 104  *      Emit the tcg_gen_insn_start opcode.
 105  *
 106  * @translate_insn:
 107  *      Disassemble one instruction and set db->pc_next for the start
 108  *      of the following instruction.  Set db->is_jmp as necessary to
 109  *      terminate the main loop.
 110  *
 111  * @tb_stop:
 112  *      Emit any opcodes required to exit the TB, based on db->is_jmp.
 113  *
 114  * @disas_log:
 115  *      Print instruction disassembly to log.
 116  */
 117 typedef struct TranslatorOps {
 118     void (*init_disas_context)(DisasContextBase *db, CPUState *cpu);
 119     void (*tb_start)(DisasContextBase *db, CPUState *cpu);
 120     void (*insn_start)(DisasContextBase *db, CPUState *cpu);
 121     void (*translate_insn)(DisasContextBase *db, CPUState *cpu);
 122     void (*tb_stop)(DisasContextBase *db, CPUState *cpu);
 123     void (*disas_log)(const DisasContextBase *db, CPUState *cpu, FILE *f);
 124 } TranslatorOps;
 125
 126 /**
 127  * translator_loop:
 128  * @cpu: Target vCPU.
 129  * @tb: Translation block.
 130  * @max_insns: Maximum number of insns to translate.
 131  * @pc: guest virtual program counter address
 132  * @host_pc: host physical program counter address
 133  * @ops: Target-specific operations.
 134  * @db: Disassembly context.
 135  *
 136  * Generic translator loop.
 137  *
 138  * Translation will stop in the following cases (in order):
 139  * - When is_jmp set by #TranslatorOps::breakpoint_check.
 140  *   - set to DISAS_TOO_MANY exits after translating one more insn
 141  *   - set to any other value than DISAS_NEXT exits immediately.
 142  * - When is_jmp set by #TranslatorOps::translate_insn.
 143  *   - set to any value other than DISAS_NEXT exits immediately.
 144  * - When the TCG operation buffer is full.
 145  * - When single-stepping is enabled (system-wide or on the current vCPU).
 146  * - When too many instructions have been translated.
 147  */
 148 void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
 149                      vaddr pc, void *host_pc, const TranslatorOps *ops,
 150                      DisasContextBase *db);
 151
 152 /**
 153  * translator_use_goto_tb
 154  * @db: Disassembly context
 155  * @dest: target pc of the goto
 156  *
 157  * Return true if goto_tb is allowed between the current TB
 158  * and the destination PC.
 159  */
 160 bool translator_use_goto_tb(DisasContextBase *db, vaddr dest);
 161
 162 /**
 163  * translator_io_start
 164  * @db: Disassembly context
 165  *
 166  * If icount is enabled, set cpu->can_do_io, adjust db->is_jmp to
 167  * DISAS_TOO_MANY if it is still DISAS_NEXT, and return true.
 168  * Otherwise return false.
 169  */
 170 bool translator_io_start(DisasContextBase *db);
 171
 172 /*
 173  * Translator Load Functions
 174  *
 175  * These are intended to replace the direct usage of the cpu_ld*_code
 176  * functions and are mandatory for front-ends that have been migrated
 177  * to the common translator_loop. These functions are only intended
 178  * to be called from the translation stage and should not be called
 179  * from helper functions. Those functions should be converted to encode
 180  * the relevant information at translation time.
 181  */
 182
 183 uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
 184 uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
 185 uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
 186 uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
 187
 188 static inline uint16_t
 189 translator_lduw_swap(CPUArchState *env, DisasContextBase *db,
 190                      abi_ptr pc, bool do_swap)
 191 {
 192     uint16_t ret = translator_lduw(env, db, pc);
 193     if (do_swap) {
 194         ret = bswap16(ret);
 195     }
 196     return ret;
 197 }
 198
 199 static inline uint32_t
 200 translator_ldl_swap(CPUArchState *env, DisasContextBase *db,
 201                     abi_ptr pc, bool do_swap)
 202 {
 203     uint32_t ret = translator_ldl(env, db, pc);
 204     if (do_swap) {
 205         ret = bswap32(ret);
 206     }
 207     return ret;
 208 }
 209
 210 static inline uint64_t
 211 translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
 212                     abi_ptr pc, bool do_swap)
 213 {
 214     uint64_t ret = translator_ldq(env, db, pc);
 215     if (do_swap) {
 216         ret = bswap64(ret);
 217     }
 218     return ret;
 219 }
 220
 221 /**
 222  * translator_fake_ldb - fake instruction load
 223  * @insn8: byte of instruction
 224  * @pc: program counter of instruction
 225  *
 226  * This is a special case helper used where the instruction we are
 227  * about to translate comes from somewhere else (e.g. being
 228  * re-synthesised for s390x "ex"). It ensures we update other areas of
 229  * the translator with details of the executed instruction.
 230  */
 231 void translator_fake_ldb(uint8_t insn8, abi_ptr pc);
 232
 233 /*
 234  * Return whether addr is on the same page as where disassembly started.
 235  * Translators can use this to enforce the rule that only single-insn
 236  * translation blocks are allowed to cross page boundaries.
 237  */
 238 static inline bool is_same_page(const DisasContextBase *db, target_ulong addr)
 239 {
 240     return ((addr ^ db->pc_first) & TARGET_PAGE_MASK) == 0;
 241 }
 242
 243 #endif /* EXEC__TRANSLATOR_H */