include/hw/timer/ibex_timer.h

   1 /*
   2  * QEMU lowRISC Ibex Timer device
   3  *
   4  * Copyright (c) 2021 Western Digital
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef HW_IBEX_TIMER_H
  26 #define HW_IBEX_TIMER_H
  27
  28 #include "hw/sysbus.h"
  29
  30 #define TYPE_IBEX_TIMER "ibex-timer"
  31 OBJECT_DECLARE_SIMPLE_TYPE(IbexTimerState, IBEX_TIMER)
  32
  33 struct IbexTimerState {
  34     /* <private> */
  35     SysBusDevice parent_obj;
  36     uint64_t mtimecmp;
  37     QEMUTimer *mtimer; /* Internal timer for M-mode interrupt */
  38
  39     /* <public> */
  40     MemoryRegion mmio;
  41
  42     uint32_t timer_ctrl;
  43     uint32_t timer_cfg0;
  44     uint32_t timer_compare_lower0;
  45     uint32_t timer_compare_upper0;
  46     uint32_t timer_intr_enable;
  47     uint32_t timer_intr_state;
  48
  49     uint32_t timebase_freq;
  50
  51     qemu_irq irq;
  52
  53     qemu_irq m_timer_irq;
  54 };
  55 #endif /* HW_IBEX_TIMER_H */