hw/spapr.c

   1 /*
   2  * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  * Copyright (c) 2010 David Gibson, IBM Corporation.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  *
  26  */
  27 #include "sysemu.h"
  28 #include "hw.h"
  29 #include "elf.h"
  30 #include "net.h"
  31 #include "blockdev.h"
  32 #include "cpus.h"
  33 #include "kvm.h"
  34 #include "kvm_ppc.h"
  35
  36 #include "hw/boards.h"
  37 #include "hw/ppc.h"
  38 #include "hw/loader.h"
  39
  40 #include "hw/spapr.h"
  41 #include "hw/spapr_vio.h"
  42 #include "hw/spapr_pci.h"
  43 #include "hw/xics.h"
  44
  45 #include "kvm.h"
  46 #include "kvm_ppc.h"
  47 #include "pci.h"
  48
  49 #include "exec-memory.h"
  50
  51 #include <libfdt.h>
  52
  53 /* SLOF memory layout:
  54  *
  55  * SLOF raw image loaded at 0, copies its romfs right below the flat
  56  * device-tree, then position SLOF itself 31M below that
  57  *
  58  * So we set FW_OVERHEAD to 40MB which should account for all of that
  59  * and more
  60  *
  61  * We load our kernel at 4M, leaving space for SLOF initial image
  62  */
  63 #define FDT_MAX_SIZE            0x10000
  64 #define RTAS_MAX_SIZE           0x10000
  65 #define FW_MAX_SIZE             0x400000
  66 #define FW_FILE_NAME            "slof.bin"
  67 #define FW_OVERHEAD             0x2800000
  68 #define KERNEL_LOAD_ADDR        FW_MAX_SIZE
  69
  70 #define MIN_RMA_SLOF            128UL
  71
  72 #define TIMEBASE_FREQ           512000000ULL
  73
  74 #define MAX_CPUS                256
  75 #define XICS_IRQS               1024
  76
  77 #define SPAPR_PCI_BUID          0x800000020000001ULL
  78 #define SPAPR_PCI_MEM_WIN_ADDR  (0x10000000000ULL + 0xA0000000)
  79 #define SPAPR_PCI_MEM_WIN_SIZE  0x20000000
  80 #define SPAPR_PCI_IO_WIN_ADDR   (0x10000000000ULL + 0x80000000)
  81
  82 #define PHANDLE_XICP            0x00001111
  83
  84 sPAPREnvironment *spapr;
  85
  86 qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num,
  87                             enum xics_irq_type type)
  88 {
  89     uint32_t irq;
  90     qemu_irq qirq;
  91
  92     if (hint) {
  93         irq = hint;
  94         /* FIXME: we should probably check for collisions somehow */
  95     } else {
  96         irq = spapr->next_irq++;
  97     }
  98
  99     qirq = xics_assign_irq(spapr->icp, irq, type);
 100     if (!qirq) {
 101         return NULL;
 102     }
 103
 104     if (irq_num) {
 105         *irq_num = irq;
 106     }
 107
 108     return qirq;
 109 }
 110
 111 static int spapr_set_associativity(void *fdt, sPAPREnvironment *spapr)
 112 {
 113     int ret = 0, offset;
 114     CPUPPCState *env;
 115     char cpu_model[32];
 116     int smt = kvmppc_smt_threads();
 117
 118     assert(spapr->cpu_model);
 119
 120     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 121         uint32_t associativity[] = {cpu_to_be32(0x5),
 122                                     cpu_to_be32(0x0),
 123                                     cpu_to_be32(0x0),
 124                                     cpu_to_be32(0x0),
 125                                     cpu_to_be32(env->numa_node),
 126                                     cpu_to_be32(env->cpu_index)};
 127
 128         if ((env->cpu_index % smt) != 0) {
 129             continue;
 130         }
 131
 132         snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model,
 133                  env->cpu_index);
 134
 135         offset = fdt_path_offset(fdt, cpu_model);
 136         if (offset < 0) {
 137             return offset;
 138         }
 139
 140         ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
 141                           sizeof(associativity));
 142         if (ret < 0) {
 143             return ret;
 144         }
 145     }
 146     return ret;
 147 }
 148
 149
 150 static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop,
 151                                      size_t maxsize)
 152 {
 153     size_t maxcells = maxsize / sizeof(uint32_t);
 154     int i, j, count;
 155     uint32_t *p = prop;
 156
 157     for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) {
 158         struct ppc_one_seg_page_size *sps = &env->sps.sps[i];
 159
 160         if (!sps->page_shift) {
 161             break;
 162         }
 163         for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) {
 164             if (sps->enc[count].page_shift == 0) {
 165                 break;
 166             }
 167         }
 168         if ((p - prop) >= (maxcells - 3 - count * 2)) {
 169             break;
 170         }
 171         *(p++) = cpu_to_be32(sps->page_shift);
 172         *(p++) = cpu_to_be32(sps->slb_enc);
 173         *(p++) = cpu_to_be32(count);
 174         for (j = 0; j < count; j++) {
 175             *(p++) = cpu_to_be32(sps->enc[j].page_shift);
 176             *(p++) = cpu_to_be32(sps->enc[j].pte_enc);
 177         }
 178     }
 179
 180     return (p - prop) * sizeof(uint32_t);
 181 }
 182
 183 static void *spapr_create_fdt_skel(const char *cpu_model,
 184                                    target_phys_addr_t rma_size,
 185                                    target_phys_addr_t initrd_base,
 186                                    target_phys_addr_t initrd_size,
 187                                    target_phys_addr_t kernel_size,
 188                                    const char *boot_device,
 189                                    const char *kernel_cmdline,
 190                                    long hash_shift)
 191 {
 192     void *fdt;
 193     CPUPPCState *env;
 194     uint64_t mem_reg_property[2];
 195     uint32_t start_prop = cpu_to_be32(initrd_base);
 196     uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
 197     uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
 198     char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
 199         "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
 200     uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
 201     int i;
 202     char *modelname;
 203     int smt = kvmppc_smt_threads();
 204     unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
 205     uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
 206     uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
 207                                 cpu_to_be32(0x0), cpu_to_be32(0x0),
 208                                 cpu_to_be32(0x0)};
 209     char mem_name[32];
 210     target_phys_addr_t node0_size, mem_start;
 211
 212 #define _FDT(exp) \
 213     do { \
 214         int ret = (exp);                                           \
 215         if (ret < 0) {                                             \
 216             fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
 217                     #exp, fdt_strerror(ret));                      \
 218             exit(1);                                               \
 219         }                                                          \
 220     } while (0)
 221
 222     fdt = g_malloc0(FDT_MAX_SIZE);
 223     _FDT((fdt_create(fdt, FDT_MAX_SIZE)));
 224
 225     if (kernel_size) {
 226         _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size)));
 227     }
 228     if (initrd_size) {
 229         _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size)));
 230     }
 231     _FDT((fdt_finish_reservemap(fdt)));
 232
 233     /* Root node */
 234     _FDT((fdt_begin_node(fdt, "")));
 235     _FDT((fdt_property_string(fdt, "device_type", "chrp")));
 236     _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
 237
 238     _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
 239     _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
 240
 241     /* /chosen */
 242     _FDT((fdt_begin_node(fdt, "chosen")));
 243
 244     /* Set Form1_affinity */
 245     _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5))));
 246
 247     _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
 248     _FDT((fdt_property(fdt, "linux,initrd-start",
 249                        &start_prop, sizeof(start_prop))));
 250     _FDT((fdt_property(fdt, "linux,initrd-end",
 251                        &end_prop, sizeof(end_prop))));
 252     if (kernel_size) {
 253         uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
 254                               cpu_to_be64(kernel_size) };
 255
 256         _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop))));
 257     }
 258     _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
 259
 260     _FDT((fdt_end_node(fdt)));
 261
 262     /* memory node(s) */
 263     node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size;
 264     if (rma_size > node0_size) {
 265         rma_size = node0_size;
 266     }
 267
 268     /* RMA */
 269     mem_reg_property[0] = 0;
 270     mem_reg_property[1] = cpu_to_be64(rma_size);
 271     _FDT((fdt_begin_node(fdt, "memory@0")));
 272     _FDT((fdt_property_string(fdt, "device_type", "memory")));
 273     _FDT((fdt_property(fdt, "reg", mem_reg_property,
 274         sizeof(mem_reg_property))));
 275     _FDT((fdt_property(fdt, "ibm,associativity", associativity,
 276         sizeof(associativity))));
 277     _FDT((fdt_end_node(fdt)));
 278
 279     /* RAM: Node 0 */
 280     if (node0_size > rma_size) {
 281         mem_reg_property[0] = cpu_to_be64(rma_size);
 282         mem_reg_property[1] = cpu_to_be64(node0_size - rma_size);
 283
 284         sprintf(mem_name, "memory@" TARGET_FMT_lx, rma_size);
 285         _FDT((fdt_begin_node(fdt, mem_name)));
 286         _FDT((fdt_property_string(fdt, "device_type", "memory")));
 287         _FDT((fdt_property(fdt, "reg", mem_reg_property,
 288                            sizeof(mem_reg_property))));
 289         _FDT((fdt_property(fdt, "ibm,associativity", associativity,
 290                            sizeof(associativity))));
 291         _FDT((fdt_end_node(fdt)));
 292     }
 293
 294     /* RAM: Node 1 and beyond */
 295     mem_start = node0_size;
 296     for (i = 1; i < nb_numa_nodes; i++) {
 297         mem_reg_property[0] = cpu_to_be64(mem_start);
 298         mem_reg_property[1] = cpu_to_be64(node_mem[i]);
 299         associativity[3] = associativity[4] = cpu_to_be32(i);
 300         sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
 301         _FDT((fdt_begin_node(fdt, mem_name)));
 302         _FDT((fdt_property_string(fdt, "device_type", "memory")));
 303         _FDT((fdt_property(fdt, "reg", mem_reg_property,
 304             sizeof(mem_reg_property))));
 305         _FDT((fdt_property(fdt, "ibm,associativity", associativity,
 306             sizeof(associativity))));
 307         _FDT((fdt_end_node(fdt)));
 308         mem_start += node_mem[i];
 309     }
 310
 311     /* cpus */
 312     _FDT((fdt_begin_node(fdt, "cpus")));
 313
 314     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 315     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 316
 317     modelname = g_strdup(cpu_model);
 318
 319     for (i = 0; i < strlen(modelname); i++) {
 320         modelname[i] = toupper(modelname[i]);
 321     }
 322
 323     /* This is needed during FDT finalization */
 324     spapr->cpu_model = g_strdup(modelname);
 325
 326     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 327         int index = env->cpu_index;
 328         uint32_t servers_prop[smp_threads];
 329         uint32_t gservers_prop[smp_threads * 2];
 330         char *nodename;
 331         uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
 332                            0xffffffff, 0xffffffff};
 333         uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
 334         uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
 335         uint32_t page_sizes_prop[64];
 336         size_t page_sizes_prop_size;
 337
 338         if ((index % smt) != 0) {
 339             continue;
 340         }
 341
 342         if (asprintf(&nodename, "%s@%x", modelname, index) < 0) {
 343             fprintf(stderr, "Allocation failure\n");
 344             exit(1);
 345         }
 346
 347         _FDT((fdt_begin_node(fdt, nodename)));
 348
 349         free(nodename);
 350
 351         _FDT((fdt_property_cell(fdt, "reg", index)));
 352         _FDT((fdt_property_string(fdt, "device_type", "cpu")));
 353
 354         _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
 355         _FDT((fdt_property_cell(fdt, "dcache-block-size",
 356                                 env->dcache_line_size)));
 357         _FDT((fdt_property_cell(fdt, "icache-block-size",
 358                                 env->icache_line_size)));
 359         _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
 360         _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
 361         _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
 362         _FDT((fdt_property(fdt, "ibm,pft-size",
 363                            pft_size_prop, sizeof(pft_size_prop))));
 364         _FDT((fdt_property_string(fdt, "status", "okay")));
 365         _FDT((fdt_property(fdt, "64-bit", NULL, 0)));
 366
 367         /* Build interrupt servers and gservers properties */
 368         for (i = 0; i < smp_threads; i++) {
 369             servers_prop[i] = cpu_to_be32(index + i);
 370             /* Hack, direct the group queues back to cpu 0 */
 371             gservers_prop[i*2] = cpu_to_be32(index + i);
 372             gservers_prop[i*2 + 1] = 0;
 373         }
 374         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
 375                            servers_prop, sizeof(servers_prop))));
 376         _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
 377                            gservers_prop, sizeof(gservers_prop))));
 378
 379         if (env->mmu_model & POWERPC_MMU_1TSEG) {
 380             _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
 381                                segs, sizeof(segs))));
 382         }
 383
 384         /* Advertise VMX/VSX (vector extensions) if available
 385          *   0 / no property == no vector extensions
 386          *   1               == VMX / Altivec available
 387          *   2               == VSX available */
 388         if (env->insns_flags & PPC_ALTIVEC) {
 389             uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;
 390
 391             _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
 392         }
 393
 394         /* Advertise DFP (Decimal Floating Point) if available
 395          *   0 / no property == no DFP
 396          *   1               == DFP available */
 397         if (env->insns_flags2 & PPC2_DFP) {
 398             _FDT((fdt_property_cell(fdt, "ibm,dfp", 1)));
 399         }
 400
 401         page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop,
 402                                                       sizeof(page_sizes_prop));
 403         if (page_sizes_prop_size) {
 404             _FDT((fdt_property(fdt, "ibm,segment-page-sizes",
 405                                page_sizes_prop, page_sizes_prop_size)));
 406         }
 407
 408         _FDT((fdt_end_node(fdt)));
 409     }
 410
 411     g_free(modelname);
 412
 413     _FDT((fdt_end_node(fdt)));
 414
 415     /* RTAS */
 416     _FDT((fdt_begin_node(fdt, "rtas")));
 417
 418     _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
 419                        sizeof(hypertas_prop))));
 420
 421     _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
 422         refpoints, sizeof(refpoints))));
 423
 424     _FDT((fdt_end_node(fdt)));
 425
 426     /* interrupt controller */
 427     _FDT((fdt_begin_node(fdt, "interrupt-controller")));
 428
 429     _FDT((fdt_property_string(fdt, "device_type",
 430                               "PowerPC-External-Interrupt-Presentation")));
 431     _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
 432     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 433     _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
 434                        interrupt_server_ranges_prop,
 435                        sizeof(interrupt_server_ranges_prop))));
 436     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
 437     _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
 438     _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
 439
 440     _FDT((fdt_end_node(fdt)));
 441
 442     /* vdevice */
 443     _FDT((fdt_begin_node(fdt, "vdevice")));
 444
 445     _FDT((fdt_property_string(fdt, "device_type", "vdevice")));
 446     _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
 447     _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
 448     _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
 449     _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
 450     _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
 451
 452     _FDT((fdt_end_node(fdt)));
 453
 454     _FDT((fdt_end_node(fdt))); /* close root node */
 455     _FDT((fdt_finish(fdt)));
 456
 457     return fdt;
 458 }
 459
 460 static void spapr_finalize_fdt(sPAPREnvironment *spapr,
 461                                target_phys_addr_t fdt_addr,
 462                                target_phys_addr_t rtas_addr,
 463                                target_phys_addr_t rtas_size)
 464 {
 465     int ret;
 466     void *fdt;
 467     sPAPRPHBState *phb;
 468
 469     fdt = g_malloc(FDT_MAX_SIZE);
 470
 471     /* open out the base tree into a temp buffer for the final tweaks */
 472     _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
 473
 474     ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
 475     if (ret < 0) {
 476         fprintf(stderr, "couldn't setup vio devices in fdt\n");
 477         exit(1);
 478     }
 479
 480     QLIST_FOREACH(phb, &spapr->phbs, list) {
 481         ret = spapr_populate_pci_devices(phb, PHANDLE_XICP, fdt);
 482     }
 483
 484     if (ret < 0) {
 485         fprintf(stderr, "couldn't setup PCI devices in fdt\n");
 486         exit(1);
 487     }
 488
 489     /* RTAS */
 490     ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
 491     if (ret < 0) {
 492         fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
 493     }
 494
 495     /* Advertise NUMA via ibm,associativity */
 496     if (nb_numa_nodes > 1) {
 497         ret = spapr_set_associativity(fdt, spapr);
 498         if (ret < 0) {
 499             fprintf(stderr, "Couldn't set up NUMA device tree properties\n");
 500         }
 501     }
 502
 503     spapr_populate_chosen_stdout(fdt, spapr->vio_bus);
 504
 505     _FDT((fdt_pack(fdt)));
 506
 507     if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
 508         hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
 509                  fdt_totalsize(fdt), FDT_MAX_SIZE);
 510         exit(1);
 511     }
 512
 513     cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
 514
 515     g_free(fdt);
 516 }
 517
 518 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
 519 {
 520     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 521 }
 522
 523 static void emulate_spapr_hypercall(CPUPPCState *env)
 524 {
 525     env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]);
 526 }
 527
 528 static void spapr_reset(void *opaque)
 529 {
 530     sPAPREnvironment *spapr = (sPAPREnvironment *)opaque;
 531
 532     fprintf(stderr, "sPAPR reset\n");
 533
 534     /* flush out the hash table */
 535     memset(spapr->htab, 0, spapr->htab_size);
 536
 537     /* Load the fdt */
 538     spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
 539                        spapr->rtas_size);
 540
 541     /* Set up the entry state */
 542     first_cpu->gpr[3] = spapr->fdt_addr;
 543     first_cpu->gpr[5] = 0;
 544     first_cpu->halted = 0;
 545     first_cpu->nip = spapr->entry_point;
 546
 547 }
 548
 549 static void spapr_cpu_reset(void *opaque)
 550 {
 551     PowerPCCPU *cpu = opaque;
 552
 553     cpu_reset(CPU(cpu));
 554 }
 555
 556 /* pSeries LPAR / sPAPR hardware init */
 557 static void ppc_spapr_init(ram_addr_t ram_size,
 558                            const char *boot_device,
 559                            const char *kernel_filename,
 560                            const char *kernel_cmdline,
 561                            const char *initrd_filename,
 562                            const char *cpu_model)
 563 {
 564     PowerPCCPU *cpu;
 565     CPUPPCState *env;
 566     int i;
 567     MemoryRegion *sysmem = get_system_memory();
 568     MemoryRegion *ram = g_new(MemoryRegion, 1);
 569     target_phys_addr_t rma_alloc_size, rma_size;
 570     uint32_t initrd_base = 0;
 571     long kernel_size = 0, initrd_size = 0;
 572     long load_limit, rtas_limit, fw_size;
 573     long pteg_shift = 17;
 574     char *filename;
 575
 576     spapr = g_malloc0(sizeof(*spapr));
 577     QLIST_INIT(&spapr->phbs);
 578
 579     cpu_ppc_hypercall = emulate_spapr_hypercall;
 580
 581     /* Allocate RMA if necessary */
 582     rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
 583
 584     if (rma_alloc_size == -1) {
 585         hw_error("qemu: Unable to create RMA\n");
 586         exit(1);
 587     }
 588     if (rma_alloc_size && (rma_alloc_size < ram_size)) {
 589         rma_size = rma_alloc_size;
 590     } else {
 591         rma_size = ram_size;
 592     }
 593
 594     /* We place the device tree and RTAS just below either the top of the RMA,
 595      * or just below 2GB, whichever is lowere, so that it can be
 596      * processed with 32-bit real mode code if necessary */
 597     rtas_limit = MIN(rma_size, 0x80000000);
 598     spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE;
 599     spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE;
 600     load_limit = spapr->fdt_addr - FW_OVERHEAD;
 601
 602     /* init CPUs */
 603     if (cpu_model == NULL) {
 604         cpu_model = kvm_enabled() ? "host" : "POWER7";
 605     }
 606     for (i = 0; i < smp_cpus; i++) {
 607         cpu = cpu_ppc_init(cpu_model);
 608         if (cpu == NULL) {
 609             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 610             exit(1);
 611         }
 612         env = &cpu->env;
 613
 614         /* Set time-base frequency to 512 MHz */
 615         cpu_ppc_tb_init(env, TIMEBASE_FREQ);
 616         qemu_register_reset(spapr_cpu_reset, cpu);
 617
 618         env->hreset_vector = 0x60;
 619         env->hreset_excp_prefix = 0;
 620         env->gpr[3] = env->cpu_index;
 621     }
 622
 623     /* allocate RAM */
 624     spapr->ram_limit = ram_size;
 625     if (spapr->ram_limit > rma_alloc_size) {
 626         ram_addr_t nonrma_base = rma_alloc_size;
 627         ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;
 628
 629         memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
 630         vmstate_register_ram_global(ram);
 631         memory_region_add_subregion(sysmem, nonrma_base, ram);
 632     }
 633
 634     /* allocate hash page table.  For now we always make this 16mb,
 635      * later we should probably make it scale to the size of guest
 636      * RAM */
 637     spapr->htab_size = 1ULL << (pteg_shift + 7);
 638     spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size);
 639
 640     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 641         env->external_htab = spapr->htab;
 642         env->htab_base = -1;
 643         env->htab_mask = spapr->htab_size - 1;
 644
 645         /* Tell KVM that we're in PAPR mode */
 646         env->spr[SPR_SDR1] = (unsigned long)spapr->htab |
 647                              ((pteg_shift + 7) - 18);
 648         env->spr[SPR_HIOR] = 0;
 649
 650         if (kvm_enabled()) {
 651             kvmppc_set_papr(env);
 652         }
 653     }
 654
 655     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
 656     spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr,
 657                                            rtas_limit - spapr->rtas_addr);
 658     if (spapr->rtas_size < 0) {
 659         hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 660         exit(1);
 661     }
 662     if (spapr->rtas_size > RTAS_MAX_SIZE) {
 663         hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
 664                  spapr->rtas_size, RTAS_MAX_SIZE);
 665         exit(1);
 666     }
 667     g_free(filename);
 668
 669
 670     /* Set up Interrupt Controller */
 671     spapr->icp = xics_system_init(XICS_IRQS);
 672     spapr->next_irq = 16;
 673
 674     /* Set up VIO bus */
 675     spapr->vio_bus = spapr_vio_bus_init();
 676
 677     for (i = 0; i < MAX_SERIAL_PORTS; i++) {
 678         if (serial_hds[i]) {
 679             spapr_vty_create(spapr->vio_bus, serial_hds[i]);
 680         }
 681     }
 682
 683     /* Set up PCI */
 684     spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
 685                      SPAPR_PCI_MEM_WIN_ADDR,
 686                      SPAPR_PCI_MEM_WIN_SIZE,
 687                      SPAPR_PCI_IO_WIN_ADDR);
 688
 689     for (i = 0; i < nb_nics; i++) {
 690         NICInfo *nd = &nd_table[i];
 691
 692         if (!nd->model) {
 693             nd->model = g_strdup("ibmveth");
 694         }
 695
 696         if (strcmp(nd->model, "ibmveth") == 0) {
 697             spapr_vlan_create(spapr->vio_bus, nd);
 698         } else {
 699             pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
 700         }
 701     }
 702
 703     for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
 704         spapr_vscsi_create(spapr->vio_bus);
 705     }
 706
 707     if (rma_size < (MIN_RMA_SLOF << 20)) {
 708         fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
 709                 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
 710         exit(1);
 711     }
 712
 713     fprintf(stderr, "sPAPR memory map:\n");
 714     fprintf(stderr, "RTAS                 : 0x%08lx..%08lx\n",
 715             (unsigned long)spapr->rtas_addr,
 716             (unsigned long)(spapr->rtas_addr + spapr->rtas_size - 1));
 717     fprintf(stderr, "FDT                  : 0x%08lx..%08lx\n",
 718             (unsigned long)spapr->fdt_addr,
 719             (unsigned long)(spapr->fdt_addr + FDT_MAX_SIZE - 1));
 720
 721     if (kernel_filename) {
 722         uint64_t lowaddr = 0;
 723
 724         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 725                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 726         if (kernel_size < 0) {
 727             kernel_size = load_image_targphys(kernel_filename,
 728                                               KERNEL_LOAD_ADDR,
 729                                               load_limit - KERNEL_LOAD_ADDR);
 730         }
 731         if (kernel_size < 0) {
 732             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 733                     kernel_filename);
 734             exit(1);
 735         }
 736         fprintf(stderr, "Kernel               : 0x%08x..%08lx\n",
 737                 KERNEL_LOAD_ADDR, KERNEL_LOAD_ADDR + kernel_size - 1);
 738
 739         /* load initrd */
 740         if (initrd_filename) {
 741             /* Try to locate the initrd in the gap between the kernel
 742              * and the firmware. Add a bit of space just in case
 743              */
 744             initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff;
 745             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 746                                               load_limit - initrd_base);
 747             if (initrd_size < 0) {
 748                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 749                         initrd_filename);
 750                 exit(1);
 751             }
 752             fprintf(stderr, "Ramdisk              : 0x%08lx..%08lx\n",
 753                     (long)initrd_base, (long)(initrd_base + initrd_size - 1));
 754         } else {
 755             initrd_base = 0;
 756             initrd_size = 0;
 757         }
 758     }
 759
 760     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME);
 761     fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
 762     if (fw_size < 0) {
 763         hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
 764         exit(1);
 765     }
 766     g_free(filename);
 767     fprintf(stderr, "Firmware load        : 0x%08x..%08lx\n",
 768             0, fw_size);
 769     fprintf(stderr, "Firmware runtime     : 0x%08lx..%08lx\n",
 770             load_limit, (unsigned long)spapr->fdt_addr);
 771
 772     spapr->entry_point = 0x100;
 773
 774     /* SLOF will startup the secondary CPUs using RTAS */
 775     for (env = first_cpu; env != NULL; env = env->next_cpu) {
 776         env->halted = 1;
 777     }
 778
 779     /* Prepare the device tree */
 780     spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, rma_size,
 781                                             initrd_base, initrd_size,
 782                                             kernel_size,
 783                                             boot_device, kernel_cmdline,
 784                                             pteg_shift + 7);
 785     assert(spapr->fdt_skel != NULL);
 786
 787     qemu_register_reset(spapr_reset, spapr);
 788 }
 789
 790 static QEMUMachine spapr_machine = {
 791     .name = "pseries",
 792     .desc = "pSeries Logical Partition (PAPR compliant)",
 793     .init = ppc_spapr_init,
 794     .max_cpus = MAX_CPUS,
 795     .no_parallel = 1,
 796     .use_scsi = 1,
 797 };
 798
 799 static void spapr_machine_init(void)
 800 {
 801     qemu_register_machine(&spapr_machine);
 802 }
 803
 804 machine_init(spapr_machine_init);