2 * Channel subsystem base support.
4 * Copyright 2012 IBM Corp.
5 * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
7 * This work is licensed under the terms of the GNU GPL, version 2 or (at
8 * your option) any later version. See the COPYING file in the top-level
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "qapi/visitor.h"
16 #include "qemu/error-report.h"
17 #include "qemu/bitops.h"
18 #include "qemu/error-report.h"
19 #include "exec/address-spaces.h"
21 #include "hw/s390x/ioinst.h"
22 #include "hw/s390x/css.h"
24 #include "hw/s390x/s390_flic.h"
25 #include "hw/s390x/s390-virtio-ccw.h"
27 typedef struct CrwContainer
{
29 QTAILQ_ENTRY(CrwContainer
) sibling
;
32 static const VMStateDescription vmstate_crw
= {
35 .minimum_version_id
= 1,
36 .fields
= (VMStateField
[]) {
37 VMSTATE_UINT16(flags
, CRW
),
38 VMSTATE_UINT16(rsid
, CRW
),
43 static const VMStateDescription vmstate_crw_container
= {
44 .name
= "s390_crw_container",
46 .minimum_version_id
= 1,
47 .fields
= (VMStateField
[]) {
48 VMSTATE_STRUCT(crw
, CrwContainer
, 0, vmstate_crw
, CRW
),
53 typedef struct ChpInfo
{
59 static const VMStateDescription vmstate_chp_info
= {
60 .name
= "s390_chp_info",
62 .minimum_version_id
= 1,
63 .fields
= (VMStateField
[]) {
64 VMSTATE_UINT8(in_use
, ChpInfo
),
65 VMSTATE_UINT8(type
, ChpInfo
),
66 VMSTATE_UINT8(is_virtual
, ChpInfo
),
71 typedef struct SubchSet
{
72 SubchDev
*sch
[MAX_SCHID
+ 1];
73 unsigned long schids_used
[BITS_TO_LONGS(MAX_SCHID
+ 1)];
74 unsigned long devnos_used
[BITS_TO_LONGS(MAX_SCHID
+ 1)];
77 static const VMStateDescription vmstate_scsw
= {
80 .minimum_version_id
= 1,
81 .fields
= (VMStateField
[]) {
82 VMSTATE_UINT16(flags
, SCSW
),
83 VMSTATE_UINT16(ctrl
, SCSW
),
84 VMSTATE_UINT32(cpa
, SCSW
),
85 VMSTATE_UINT8(dstat
, SCSW
),
86 VMSTATE_UINT8(cstat
, SCSW
),
87 VMSTATE_UINT16(count
, SCSW
),
92 static const VMStateDescription vmstate_pmcw
= {
95 .minimum_version_id
= 1,
96 .fields
= (VMStateField
[]) {
97 VMSTATE_UINT32(intparm
, PMCW
),
98 VMSTATE_UINT16(flags
, PMCW
),
99 VMSTATE_UINT16(devno
, PMCW
),
100 VMSTATE_UINT8(lpm
, PMCW
),
101 VMSTATE_UINT8(pnom
, PMCW
),
102 VMSTATE_UINT8(lpum
, PMCW
),
103 VMSTATE_UINT8(pim
, PMCW
),
104 VMSTATE_UINT16(mbi
, PMCW
),
105 VMSTATE_UINT8(pom
, PMCW
),
106 VMSTATE_UINT8(pam
, PMCW
),
107 VMSTATE_UINT8_ARRAY(chpid
, PMCW
, 8),
108 VMSTATE_UINT32(chars
, PMCW
),
109 VMSTATE_END_OF_LIST()
113 static const VMStateDescription vmstate_schib
= {
114 .name
= "s390_schib",
116 .minimum_version_id
= 1,
117 .fields
= (VMStateField
[]) {
118 VMSTATE_STRUCT(pmcw
, SCHIB
, 0, vmstate_pmcw
, PMCW
),
119 VMSTATE_STRUCT(scsw
, SCHIB
, 0, vmstate_scsw
, SCSW
),
120 VMSTATE_UINT64(mba
, SCHIB
),
121 VMSTATE_UINT8_ARRAY(mda
, SCHIB
, 4),
122 VMSTATE_END_OF_LIST()
127 static const VMStateDescription vmstate_ccw1
= {
130 .minimum_version_id
= 1,
131 .fields
= (VMStateField
[]) {
132 VMSTATE_UINT8(cmd_code
, CCW1
),
133 VMSTATE_UINT8(flags
, CCW1
),
134 VMSTATE_UINT16(count
, CCW1
),
135 VMSTATE_UINT32(cda
, CCW1
),
136 VMSTATE_END_OF_LIST()
140 static const VMStateDescription vmstate_ciw
= {
143 .minimum_version_id
= 1,
144 .fields
= (VMStateField
[]) {
145 VMSTATE_UINT8(type
, CIW
),
146 VMSTATE_UINT8(command
, CIW
),
147 VMSTATE_UINT16(count
, CIW
),
148 VMSTATE_END_OF_LIST()
152 static const VMStateDescription vmstate_sense_id
= {
153 .name
= "s390_sense_id",
155 .minimum_version_id
= 1,
156 .fields
= (VMStateField
[]) {
157 VMSTATE_UINT8(reserved
, SenseId
),
158 VMSTATE_UINT16(cu_type
, SenseId
),
159 VMSTATE_UINT8(cu_model
, SenseId
),
160 VMSTATE_UINT16(dev_type
, SenseId
),
161 VMSTATE_UINT8(dev_model
, SenseId
),
162 VMSTATE_UINT8(unused
, SenseId
),
163 VMSTATE_STRUCT_ARRAY(ciw
, SenseId
, MAX_CIWS
, 0, vmstate_ciw
, CIW
),
164 VMSTATE_END_OF_LIST()
168 static const VMStateDescription vmstate_orb
= {
171 .minimum_version_id
= 1,
172 .fields
= (VMStateField
[]) {
173 VMSTATE_UINT32(intparm
, ORB
),
174 VMSTATE_UINT16(ctrl0
, ORB
),
175 VMSTATE_UINT8(lpm
, ORB
),
176 VMSTATE_UINT8(ctrl1
, ORB
),
177 VMSTATE_UINT32(cpa
, ORB
),
178 VMSTATE_END_OF_LIST()
182 static bool vmstate_schdev_orb_needed(void *opaque
)
184 return css_migration_enabled();
187 static const VMStateDescription vmstate_schdev_orb
= {
188 .name
= "s390_subch_dev/orb",
190 .minimum_version_id
= 1,
191 .needed
= vmstate_schdev_orb_needed
,
192 .fields
= (VMStateField
[]) {
193 VMSTATE_STRUCT(orb
, SubchDev
, 1, vmstate_orb
, ORB
),
194 VMSTATE_END_OF_LIST()
198 static int subch_dev_post_load(void *opaque
, int version_id
);
199 static int subch_dev_pre_save(void *opaque
);
201 const char err_hint_devno
[] = "Devno mismatch, tried to load wrong section!"
202 " Likely reason: some sequences of plug and unplug can break"
203 " migration for machine versions prior to 2.7 (known design flaw).";
205 const VMStateDescription vmstate_subch_dev
= {
206 .name
= "s390_subch_dev",
208 .minimum_version_id
= 1,
209 .post_load
= subch_dev_post_load
,
210 .pre_save
= subch_dev_pre_save
,
211 .fields
= (VMStateField
[]) {
212 VMSTATE_UINT8_EQUAL(cssid
, SubchDev
, "Bug!"),
213 VMSTATE_UINT8_EQUAL(ssid
, SubchDev
, "Bug!"),
214 VMSTATE_UINT16(migrated_schid
, SubchDev
),
215 VMSTATE_UINT16_EQUAL(devno
, SubchDev
, err_hint_devno
),
216 VMSTATE_BOOL(thinint_active
, SubchDev
),
217 VMSTATE_STRUCT(curr_status
, SubchDev
, 0, vmstate_schib
, SCHIB
),
218 VMSTATE_UINT8_ARRAY(sense_data
, SubchDev
, 32),
219 VMSTATE_UINT64(channel_prog
, SubchDev
),
220 VMSTATE_STRUCT(last_cmd
, SubchDev
, 0, vmstate_ccw1
, CCW1
),
221 VMSTATE_BOOL(last_cmd_valid
, SubchDev
),
222 VMSTATE_STRUCT(id
, SubchDev
, 0, vmstate_sense_id
, SenseId
),
223 VMSTATE_BOOL(ccw_fmt_1
, SubchDev
),
224 VMSTATE_UINT8(ccw_no_data_cnt
, SubchDev
),
225 VMSTATE_END_OF_LIST()
227 .subsections
= (const VMStateDescription
* []) {
233 typedef struct IndAddrPtrTmp
{
239 static int post_load_ind_addr(void *opaque
, int version_id
)
241 IndAddrPtrTmp
*ptmp
= opaque
;
242 IndAddr
**ind_addr
= ptmp
->parent
;
244 if (ptmp
->len
!= 0) {
245 *ind_addr
= get_indicator(ptmp
->addr
, ptmp
->len
);
252 static int pre_save_ind_addr(void *opaque
)
254 IndAddrPtrTmp
*ptmp
= opaque
;
255 IndAddr
*ind_addr
= *(ptmp
->parent
);
257 if (ind_addr
!= NULL
) {
258 ptmp
->len
= ind_addr
->len
;
259 ptmp
->addr
= ind_addr
->addr
;
268 const VMStateDescription vmstate_ind_addr_tmp
= {
269 .name
= "s390_ind_addr_tmp",
270 .pre_save
= pre_save_ind_addr
,
271 .post_load
= post_load_ind_addr
,
273 .fields
= (VMStateField
[]) {
274 VMSTATE_INT32(len
, IndAddrPtrTmp
),
275 VMSTATE_UINT64(addr
, IndAddrPtrTmp
),
276 VMSTATE_END_OF_LIST()
280 const VMStateDescription vmstate_ind_addr
= {
281 .name
= "s390_ind_addr_tmp",
282 .fields
= (VMStateField
[]) {
283 VMSTATE_WITH_TMP(IndAddr
*, IndAddrPtrTmp
, vmstate_ind_addr_tmp
),
284 VMSTATE_END_OF_LIST()
288 typedef struct CssImage
{
289 SubchSet
*sch_set
[MAX_SSID
+ 1];
290 ChpInfo chpids
[MAX_CHPID
+ 1];
293 static const VMStateDescription vmstate_css_img
= {
294 .name
= "s390_css_img",
296 .minimum_version_id
= 1,
297 .fields
= (VMStateField
[]) {
298 /* Subchannel sets have no relevant state. */
299 VMSTATE_STRUCT_ARRAY(chpids
, CssImage
, MAX_CHPID
+ 1, 0,
300 vmstate_chp_info
, ChpInfo
),
301 VMSTATE_END_OF_LIST()
306 typedef struct IoAdapter
{
313 typedef struct ChannelSubSys
{
314 QTAILQ_HEAD(, CrwContainer
) pending_crws
;
321 uint64_t chnmon_area
;
322 CssImage
*css
[MAX_CSSID
+ 1];
323 uint8_t default_cssid
;
324 /* don't migrate, see css_register_io_adapters */
325 IoAdapter
*io_adapters
[CSS_IO_ADAPTER_TYPE_NUMS
][MAX_ISC
+ 1];
326 /* don't migrate, see get_indicator and IndAddrPtrTmp */
327 QTAILQ_HEAD(, IndAddr
) indicator_addresses
;
330 static const VMStateDescription vmstate_css
= {
333 .minimum_version_id
= 1,
334 .fields
= (VMStateField
[]) {
335 VMSTATE_QTAILQ_V(pending_crws
, ChannelSubSys
, 1, vmstate_crw_container
,
336 CrwContainer
, sibling
),
337 VMSTATE_BOOL(sei_pending
, ChannelSubSys
),
338 VMSTATE_BOOL(do_crw_mchk
, ChannelSubSys
),
339 VMSTATE_BOOL(crws_lost
, ChannelSubSys
),
340 /* These were kind of migrated by virtio */
341 VMSTATE_UINT8(max_cssid
, ChannelSubSys
),
342 VMSTATE_UINT8(max_ssid
, ChannelSubSys
),
343 VMSTATE_BOOL(chnmon_active
, ChannelSubSys
),
344 VMSTATE_UINT64(chnmon_area
, ChannelSubSys
),
345 VMSTATE_ARRAY_OF_POINTER_TO_STRUCT(css
, ChannelSubSys
, MAX_CSSID
+ 1,
346 0, vmstate_css_img
, CssImage
),
347 VMSTATE_UINT8(default_cssid
, ChannelSubSys
),
348 VMSTATE_END_OF_LIST()
352 static ChannelSubSys channel_subsys
= {
353 .pending_crws
= QTAILQ_HEAD_INITIALIZER(channel_subsys
.pending_crws
),
355 .sei_pending
= false,
358 .chnmon_active
= false,
359 .indicator_addresses
=
360 QTAILQ_HEAD_INITIALIZER(channel_subsys
.indicator_addresses
),
363 static int subch_dev_pre_save(void *opaque
)
365 SubchDev
*s
= opaque
;
367 /* Prepare remote_schid for save */
368 s
->migrated_schid
= s
->schid
;
373 static int subch_dev_post_load(void *opaque
, int version_id
)
376 SubchDev
*s
= opaque
;
378 /* Re-assign the subchannel to remote_schid if necessary */
379 if (s
->migrated_schid
!= s
->schid
) {
380 if (css_find_subch(true, s
->cssid
, s
->ssid
, s
->schid
) == s
) {
382 * Cleanup the slot before moving to s->migrated_schid provided
383 * it still belongs to us, i.e. it was not changed by previous
384 * invocation of this function.
386 css_subch_assign(s
->cssid
, s
->ssid
, s
->schid
, s
->devno
, NULL
);
388 /* It's OK to re-assign without a prior de-assign. */
389 s
->schid
= s
->migrated_schid
;
390 css_subch_assign(s
->cssid
, s
->ssid
, s
->schid
, s
->devno
, s
);
393 if (css_migration_enabled()) {
394 /* No compat voodoo to do ;) */
398 * Hack alert. If we don't migrate the channel subsystem status
399 * we still need to find out if the guest enabled mss/mcss-e.
400 * If the subchannel is enabled, it certainly was able to access it,
401 * so adjust the max_ssid/max_cssid values for relevant ssid/cssid
402 * values. This is not watertight, but better than nothing.
404 if (s
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_ENA
) {
406 channel_subsys
.max_ssid
= MAX_SSID
;
408 if (s
->cssid
!= channel_subsys
.default_cssid
) {
409 channel_subsys
.max_cssid
= MAX_CSSID
;
415 void css_register_vmstate(void)
417 vmstate_register(NULL
, 0, &vmstate_css
, &channel_subsys
);
420 IndAddr
*get_indicator(hwaddr ind_addr
, int len
)
424 QTAILQ_FOREACH(indicator
, &channel_subsys
.indicator_addresses
, sibling
) {
425 if (indicator
->addr
== ind_addr
) {
430 indicator
= g_new0(IndAddr
, 1);
431 indicator
->addr
= ind_addr
;
432 indicator
->len
= len
;
433 indicator
->refcnt
= 1;
434 QTAILQ_INSERT_TAIL(&channel_subsys
.indicator_addresses
,
439 static int s390_io_adapter_map(AdapterInfo
*adapter
, uint64_t map_addr
,
442 S390FLICState
*fs
= s390_get_flic();
443 S390FLICStateClass
*fsc
= S390_FLIC_COMMON_GET_CLASS(fs
);
445 return fsc
->io_adapter_map(fs
, adapter
->adapter_id
, map_addr
, do_map
);
448 void release_indicator(AdapterInfo
*adapter
, IndAddr
*indicator
)
450 assert(indicator
->refcnt
> 0);
452 if (indicator
->refcnt
> 0) {
455 QTAILQ_REMOVE(&channel_subsys
.indicator_addresses
, indicator
, sibling
);
456 if (indicator
->map
) {
457 s390_io_adapter_map(adapter
, indicator
->map
, false);
462 int map_indicator(AdapterInfo
*adapter
, IndAddr
*indicator
)
466 if (indicator
->map
) {
467 return 0; /* already mapped is not an error */
469 indicator
->map
= indicator
->addr
;
470 ret
= s390_io_adapter_map(adapter
, indicator
->map
, true);
471 if ((ret
!= 0) && (ret
!= -ENOSYS
)) {
481 int css_create_css_image(uint8_t cssid
, bool default_image
)
483 trace_css_new_image(cssid
, default_image
? "(default)" : "");
484 /* 255 is reserved */
488 if (channel_subsys
.css
[cssid
]) {
491 channel_subsys
.css
[cssid
] = g_malloc0(sizeof(CssImage
));
493 channel_subsys
.default_cssid
= cssid
;
498 uint32_t css_get_adapter_id(CssIoAdapterType type
, uint8_t isc
)
500 if (type
>= CSS_IO_ADAPTER_TYPE_NUMS
|| isc
> MAX_ISC
||
501 !channel_subsys
.io_adapters
[type
][isc
]) {
505 return channel_subsys
.io_adapters
[type
][isc
]->id
;
509 * css_register_io_adapters: Register I/O adapters per ISC during init
511 * @swap: an indication if byte swap is needed.
512 * @maskable: an indication if the adapter is subject to the mask operation.
513 * @flags: further characteristics of the adapter.
514 * e.g. suppressible, an indication if the adapter is subject to AIS.
515 * @errp: location to store error information.
517 void css_register_io_adapters(CssIoAdapterType type
, bool swap
, bool maskable
,
518 uint8_t flags
, Error
**errp
)
523 S390FLICState
*fs
= s390_get_flic();
524 S390FLICStateClass
*fsc
= S390_FLIC_COMMON_GET_CLASS(fs
);
527 * Disallow multiple registrations for the same device type.
528 * Report an error if registering for an already registered type.
530 if (channel_subsys
.io_adapters
[type
][0]) {
531 error_setg(errp
, "Adapters for type %d already registered", type
);
534 for (isc
= 0; isc
<= MAX_ISC
; isc
++) {
535 id
= (type
<< 3) | isc
;
536 ret
= fsc
->register_io_adapter(fs
, id
, isc
, swap
, maskable
, flags
);
538 adapter
= g_new0(IoAdapter
, 1);
541 adapter
->type
= type
;
542 adapter
->flags
= flags
;
543 channel_subsys
.io_adapters
[type
][isc
] = adapter
;
545 error_setg_errno(errp
, -ret
, "Unexpected error %d when "
546 "registering adapter %d", ret
, id
);
552 * No need to free registered adapters in kvm: kvm will clean up
553 * when the machine goes away.
556 for (isc
--; isc
>= 0; isc
--) {
557 g_free(channel_subsys
.io_adapters
[type
][isc
]);
558 channel_subsys
.io_adapters
[type
][isc
] = NULL
;
564 static void css_clear_io_interrupt(uint16_t subchannel_id
,
565 uint16_t subchannel_nr
)
568 static bool no_clear_irq
;
569 S390FLICState
*fs
= s390_get_flic();
570 S390FLICStateClass
*fsc
= S390_FLIC_COMMON_GET_CLASS(fs
);
573 if (unlikely(no_clear_irq
)) {
576 r
= fsc
->clear_io_irq(fs
, subchannel_id
, subchannel_nr
);
583 * Ignore unavailability, as the user can't do anything
588 error_setg_errno(&err
, -r
, "unexpected error condition");
589 error_propagate(&error_abort
, err
);
593 static inline uint16_t css_do_build_subchannel_id(uint8_t cssid
, uint8_t ssid
)
595 if (channel_subsys
.max_cssid
> 0) {
596 return (cssid
<< 8) | (1 << 3) | (ssid
<< 1) | 1;
598 return (ssid
<< 1) | 1;
601 uint16_t css_build_subchannel_id(SubchDev
*sch
)
603 return css_do_build_subchannel_id(sch
->cssid
, sch
->ssid
);
606 void css_inject_io_interrupt(SubchDev
*sch
)
608 uint8_t isc
= (sch
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_ISC
) >> 11;
610 trace_css_io_interrupt(sch
->cssid
, sch
->ssid
, sch
->schid
,
611 sch
->curr_status
.pmcw
.intparm
, isc
, "");
612 s390_io_interrupt(css_build_subchannel_id(sch
),
614 sch
->curr_status
.pmcw
.intparm
,
618 void css_conditional_io_interrupt(SubchDev
*sch
)
621 * If the subchannel is not currently status pending, make it pending
624 if (!(sch
->curr_status
.scsw
.ctrl
& SCSW_STCTL_STATUS_PEND
)) {
625 uint8_t isc
= (sch
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_ISC
) >> 11;
627 trace_css_io_interrupt(sch
->cssid
, sch
->ssid
, sch
->schid
,
628 sch
->curr_status
.pmcw
.intparm
, isc
,
630 sch
->curr_status
.scsw
.ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
631 sch
->curr_status
.scsw
.ctrl
|=
632 SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
633 /* Inject an I/O interrupt. */
634 s390_io_interrupt(css_build_subchannel_id(sch
),
636 sch
->curr_status
.pmcw
.intparm
,
641 int css_do_sic(CPUS390XState
*env
, uint8_t isc
, uint16_t mode
)
643 S390FLICState
*fs
= s390_get_flic();
644 S390FLICStateClass
*fsc
= S390_FLIC_COMMON_GET_CLASS(fs
);
647 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
652 trace_css_do_sic(mode
, isc
);
654 case SIC_IRQ_MODE_ALL
:
655 case SIC_IRQ_MODE_SINGLE
:
662 r
= fsc
->modify_ais_mode(fs
, isc
, mode
) ? -PGM_OPERATION
: 0;
667 void css_adapter_interrupt(CssIoAdapterType type
, uint8_t isc
)
669 S390FLICState
*fs
= s390_get_flic();
670 S390FLICStateClass
*fsc
= S390_FLIC_COMMON_GET_CLASS(fs
);
671 uint32_t io_int_word
= (isc
<< 27) | IO_INT_WORD_AI
;
672 IoAdapter
*adapter
= channel_subsys
.io_adapters
[type
][isc
];
678 trace_css_adapter_interrupt(isc
);
679 if (fs
->ais_supported
) {
680 if (fsc
->inject_airq(fs
, type
, isc
, adapter
->flags
)) {
681 error_report("Failed to inject airq with AIS supported");
685 s390_io_interrupt(0, 0, 0, io_int_word
);
689 static void sch_handle_clear_func(SubchDev
*sch
)
691 PMCW
*p
= &sch
->curr_status
.pmcw
;
692 SCSW
*s
= &sch
->curr_status
.scsw
;
695 /* Path management: In our simple css, we always choose the only path. */
698 /* Reset values prior to 'issuing the clear signal'. */
701 s
->flags
&= ~SCSW_FLAGS_MASK_PNO
;
703 /* We always 'attempt to issue the clear signal', and we always succeed. */
704 sch
->channel_prog
= 0x0;
705 sch
->last_cmd_valid
= false;
706 s
->ctrl
&= ~SCSW_ACTL_CLEAR_PEND
;
707 s
->ctrl
|= SCSW_STCTL_STATUS_PEND
;
715 static void sch_handle_halt_func(SubchDev
*sch
)
718 PMCW
*p
= &sch
->curr_status
.pmcw
;
719 SCSW
*s
= &sch
->curr_status
.scsw
;
720 hwaddr curr_ccw
= sch
->channel_prog
;
723 /* Path management: In our simple css, we always choose the only path. */
726 /* We always 'attempt to issue the halt signal', and we always succeed. */
727 sch
->channel_prog
= 0x0;
728 sch
->last_cmd_valid
= false;
729 s
->ctrl
&= ~SCSW_ACTL_HALT_PEND
;
730 s
->ctrl
|= SCSW_STCTL_STATUS_PEND
;
732 if ((s
->ctrl
& (SCSW_ACTL_SUBCH_ACTIVE
| SCSW_ACTL_DEVICE_ACTIVE
)) ||
733 !((s
->ctrl
& SCSW_ACTL_START_PEND
) ||
734 (s
->ctrl
& SCSW_ACTL_SUSP
))) {
735 s
->dstat
= SCSW_DSTAT_DEVICE_END
;
737 if ((s
->ctrl
& (SCSW_ACTL_SUBCH_ACTIVE
| SCSW_ACTL_DEVICE_ACTIVE
)) ||
738 (s
->ctrl
& SCSW_ACTL_SUSP
)) {
739 s
->cpa
= curr_ccw
+ 8;
746 static void copy_sense_id_to_guest(SenseId
*dest
, SenseId
*src
)
750 dest
->reserved
= src
->reserved
;
751 dest
->cu_type
= cpu_to_be16(src
->cu_type
);
752 dest
->cu_model
= src
->cu_model
;
753 dest
->dev_type
= cpu_to_be16(src
->dev_type
);
754 dest
->dev_model
= src
->dev_model
;
755 dest
->unused
= src
->unused
;
756 for (i
= 0; i
< ARRAY_SIZE(dest
->ciw
); i
++) {
757 dest
->ciw
[i
].type
= src
->ciw
[i
].type
;
758 dest
->ciw
[i
].command
= src
->ciw
[i
].command
;
759 dest
->ciw
[i
].count
= cpu_to_be16(src
->ciw
[i
].count
);
763 static CCW1
copy_ccw_from_guest(hwaddr addr
, bool fmt1
)
770 cpu_physical_memory_read(addr
, &tmp1
, sizeof(tmp1
));
771 ret
.cmd_code
= tmp1
.cmd_code
;
772 ret
.flags
= tmp1
.flags
;
773 ret
.count
= be16_to_cpu(tmp1
.count
);
774 ret
.cda
= be32_to_cpu(tmp1
.cda
);
776 cpu_physical_memory_read(addr
, &tmp0
, sizeof(tmp0
));
777 if ((tmp0
.cmd_code
& 0x0f) == CCW_CMD_TIC
) {
778 ret
.cmd_code
= CCW_CMD_TIC
;
782 ret
.cmd_code
= tmp0
.cmd_code
;
783 ret
.flags
= tmp0
.flags
;
784 ret
.count
= be16_to_cpu(tmp0
.count
);
786 ret
.cda
= be16_to_cpu(tmp0
.cda1
) | (tmp0
.cda0
<< 16);
791 * If out of bounds marks the stream broken. If broken returns -EINVAL,
792 * otherwise the requested length (may be zero)
794 static inline int cds_check_len(CcwDataStream
*cds
, int len
)
796 if (cds
->at_byte
+ len
> cds
->count
) {
797 cds
->flags
|= CDS_F_STREAM_BROKEN
;
799 return cds
->flags
& CDS_F_STREAM_BROKEN
? -EINVAL
: len
;
802 static int ccw_dstream_rw_noflags(CcwDataStream
*cds
, void *buff
, int len
,
807 ret
= cds_check_len(cds
, len
);
811 if (op
== CDS_OP_A
) {
814 ret
= address_space_rw(&address_space_memory
, cds
->cda
,
815 MEMTXATTRS_UNSPECIFIED
, buff
, len
, op
);
816 if (ret
!= MEMTX_OK
) {
817 cds
->flags
|= CDS_F_STREAM_BROKEN
;
826 void ccw_dstream_init(CcwDataStream
*cds
, CCW1
const *ccw
, ORB
const *orb
)
829 * We don't support MIDA (an optional facility) yet and we
830 * catch this earlier. Just for expressing the precondition.
832 g_assert(!(orb
->ctrl1
& ORB_CTRL1_MASK_MIDAW
));
833 cds
->flags
= (orb
->ctrl0
& ORB_CTRL0_MASK_I2K
? CDS_F_I2K
: 0) |
834 (orb
->ctrl0
& ORB_CTRL0_MASK_C64
? CDS_F_C64
: 0) |
835 (ccw
->flags
& CCW_FLAG_IDA
? CDS_F_IDA
: 0);
836 cds
->count
= ccw
->count
;
837 cds
->cda_orig
= ccw
->cda
;
838 ccw_dstream_rewind(cds
);
839 if (!(cds
->flags
& CDS_F_IDA
)) {
840 cds
->op_handler
= ccw_dstream_rw_noflags
;
846 static int css_interpret_ccw(SubchDev
*sch
, hwaddr ccw_addr
,
847 bool suspend_allowed
)
855 return -EINVAL
; /* channel-program check */
857 /* Check doubleword aligned and 31 or 24 (fmt 0) bit addressable. */
858 if (ccw_addr
& (sch
->ccw_fmt_1
? 0x80000007 : 0xff000007)) {
862 /* Translate everything to format-1 ccws - the information is the same. */
863 ccw
= copy_ccw_from_guest(ccw_addr
, sch
->ccw_fmt_1
);
865 /* Check for invalid command codes. */
866 if ((ccw
.cmd_code
& 0x0f) == 0) {
869 if (((ccw
.cmd_code
& 0x0f) == CCW_CMD_TIC
) &&
870 ((ccw
.cmd_code
& 0xf0) != 0)) {
873 if (!sch
->ccw_fmt_1
&& (ccw
.count
== 0) &&
874 (ccw
.cmd_code
!= CCW_CMD_TIC
)) {
878 /* We don't support MIDA. */
879 if (ccw
.flags
& CCW_FLAG_MIDA
) {
883 if (ccw
.flags
& CCW_FLAG_SUSPEND
) {
884 return suspend_allowed
? -EINPROGRESS
: -EINVAL
;
887 check_len
= !((ccw
.flags
& CCW_FLAG_SLI
) && !(ccw
.flags
& CCW_FLAG_DC
));
890 if (sch
->ccw_no_data_cnt
== 255) {
893 sch
->ccw_no_data_cnt
++;
896 /* Look at the command. */
897 switch (ccw
.cmd_code
) {
902 case CCW_CMD_BASIC_SENSE
:
904 if (ccw
.count
!= sizeof(sch
->sense_data
)) {
909 len
= MIN(ccw
.count
, sizeof(sch
->sense_data
));
910 cpu_physical_memory_write(ccw
.cda
, sch
->sense_data
, len
);
911 sch
->curr_status
.scsw
.count
= ccw
.count
- len
;
912 memset(sch
->sense_data
, 0, sizeof(sch
->sense_data
));
915 case CCW_CMD_SENSE_ID
:
919 copy_sense_id_to_guest(&sense_id
, &sch
->id
);
920 /* Sense ID information is device specific. */
922 if (ccw
.count
!= sizeof(sense_id
)) {
927 len
= MIN(ccw
.count
, sizeof(sense_id
));
929 * Only indicate 0xff in the first sense byte if we actually
930 * have enough place to store at least bytes 0-3.
933 sense_id
.reserved
= 0xff;
935 sense_id
.reserved
= 0;
937 cpu_physical_memory_write(ccw
.cda
, &sense_id
, len
);
938 sch
->curr_status
.scsw
.count
= ccw
.count
- len
;
943 if (sch
->last_cmd_valid
&& (sch
->last_cmd
.cmd_code
== CCW_CMD_TIC
)) {
947 if (ccw
.flags
|| ccw
.count
) {
948 /* We have already sanitized these if converted from fmt 0. */
952 sch
->channel_prog
= ccw
.cda
;
957 /* Handle device specific commands. */
958 ret
= sch
->ccw_cb(sch
, ccw
);
965 sch
->last_cmd_valid
= true;
967 if (ccw
.flags
& CCW_FLAG_CC
) {
968 sch
->channel_prog
+= 8;
976 static void sch_handle_start_func_virtual(SubchDev
*sch
)
979 PMCW
*p
= &sch
->curr_status
.pmcw
;
980 SCSW
*s
= &sch
->curr_status
.scsw
;
983 bool suspend_allowed
;
985 /* Path management: In our simple css, we always choose the only path. */
988 if (!(s
->ctrl
& SCSW_ACTL_SUSP
)) {
989 /* Start Function triggered via ssch, i.e. we have an ORB */
990 ORB
*orb
= &sch
->orb
;
993 /* Look at the orb and try to execute the channel program. */
994 p
->intparm
= orb
->intparm
;
995 if (!(orb
->lpm
& path
)) {
996 /* Generate a deferred cc 3 condition. */
997 s
->flags
|= SCSW_FLAGS_MASK_CC
;
998 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
999 s
->ctrl
|= (SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
);
1002 sch
->ccw_fmt_1
= !!(orb
->ctrl0
& ORB_CTRL0_MASK_FMT
);
1003 s
->flags
|= (sch
->ccw_fmt_1
) ? SCSW_FLAGS_MASK_FMT
: 0;
1004 sch
->ccw_no_data_cnt
= 0;
1005 suspend_allowed
= !!(orb
->ctrl0
& ORB_CTRL0_MASK_SPND
);
1007 /* Start Function resumed via rsch */
1008 s
->ctrl
&= ~(SCSW_ACTL_SUSP
| SCSW_ACTL_RESUME_PEND
);
1009 /* The channel program had been suspended before. */
1010 suspend_allowed
= true;
1012 sch
->last_cmd_valid
= false;
1014 ret
= css_interpret_ccw(sch
, sch
->channel_prog
, suspend_allowed
);
1017 /* ccw chain, continue processing */
1021 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
1022 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
1023 s
->ctrl
|= SCSW_STCTL_PRIMARY
| SCSW_STCTL_SECONDARY
|
1024 SCSW_STCTL_STATUS_PEND
;
1025 s
->dstat
= SCSW_DSTAT_CHANNEL_END
| SCSW_DSTAT_DEVICE_END
;
1026 s
->cpa
= sch
->channel_prog
+ 8;
1029 /* I/O errors, status depends on specific devices */
1032 /* unsupported command, generate unit check (command reject) */
1033 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
1034 s
->dstat
= SCSW_DSTAT_UNIT_CHECK
;
1035 /* Set sense bit 0 in ecw0. */
1036 sch
->sense_data
[0] = 0x80;
1037 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
1038 s
->ctrl
|= SCSW_STCTL_PRIMARY
| SCSW_STCTL_SECONDARY
|
1039 SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
1040 s
->cpa
= sch
->channel_prog
+ 8;
1043 /* channel program has been suspended */
1044 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
1045 s
->ctrl
|= SCSW_ACTL_SUSP
;
1048 /* error, generate channel program check */
1049 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
1050 s
->cstat
= SCSW_CSTAT_PROG_CHECK
;
1051 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
1052 s
->ctrl
|= SCSW_STCTL_PRIMARY
| SCSW_STCTL_SECONDARY
|
1053 SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
1054 s
->cpa
= sch
->channel_prog
+ 8;
1057 } while (ret
== -EAGAIN
);
1061 static int sch_handle_start_func_passthrough(SubchDev
*sch
)
1064 PMCW
*p
= &sch
->curr_status
.pmcw
;
1065 SCSW
*s
= &sch
->curr_status
.scsw
;
1068 ORB
*orb
= &sch
->orb
;
1069 if (!(s
->ctrl
& SCSW_ACTL_SUSP
)) {
1070 assert(orb
!= NULL
);
1071 p
->intparm
= orb
->intparm
;
1075 * Only support prefetch enable mode.
1076 * Only support 64bit addressing idal.
1078 if (!(orb
->ctrl0
& ORB_CTRL0_MASK_PFCH
) ||
1079 !(orb
->ctrl0
& ORB_CTRL0_MASK_C64
)) {
1083 ret
= s390_ccw_cmd_request(orb
, s
, sch
->driver_data
);
1085 /* Currently we don't update control block and just return the cc code. */
1093 /* Let's reflect an inaccessible host device by cc 3. */
1098 * All other return codes will trigger a program check,
1108 * On real machines, this would run asynchronously to the main vcpus.
1109 * We might want to make some parts of the ssch handling (interpreting
1110 * read/writes) asynchronous later on if we start supporting more than
1111 * our current very simple devices.
1113 int do_subchannel_work_virtual(SubchDev
*sch
)
1116 SCSW
*s
= &sch
->curr_status
.scsw
;
1118 if (s
->ctrl
& SCSW_FCTL_CLEAR_FUNC
) {
1119 sch_handle_clear_func(sch
);
1120 } else if (s
->ctrl
& SCSW_FCTL_HALT_FUNC
) {
1121 sch_handle_halt_func(sch
);
1122 } else if (s
->ctrl
& SCSW_FCTL_START_FUNC
) {
1123 /* Triggered by both ssch and rsch. */
1124 sch_handle_start_func_virtual(sch
);
1126 /* Cannot happen. */
1129 css_inject_io_interrupt(sch
);
1133 int do_subchannel_work_passthrough(SubchDev
*sch
)
1136 SCSW
*s
= &sch
->curr_status
.scsw
;
1138 if (s
->ctrl
& SCSW_FCTL_CLEAR_FUNC
) {
1139 /* TODO: Clear handling */
1140 sch_handle_clear_func(sch
);
1142 } else if (s
->ctrl
& SCSW_FCTL_HALT_FUNC
) {
1143 /* TODO: Halt handling */
1144 sch_handle_halt_func(sch
);
1146 } else if (s
->ctrl
& SCSW_FCTL_START_FUNC
) {
1147 ret
= sch_handle_start_func_passthrough(sch
);
1149 /* Cannot happen. */
1156 static int do_subchannel_work(SubchDev
*sch
)
1158 if (sch
->do_subchannel_work
) {
1159 return sch
->do_subchannel_work(sch
);
1165 static void copy_pmcw_to_guest(PMCW
*dest
, const PMCW
*src
)
1169 dest
->intparm
= cpu_to_be32(src
->intparm
);
1170 dest
->flags
= cpu_to_be16(src
->flags
);
1171 dest
->devno
= cpu_to_be16(src
->devno
);
1172 dest
->lpm
= src
->lpm
;
1173 dest
->pnom
= src
->pnom
;
1174 dest
->lpum
= src
->lpum
;
1175 dest
->pim
= src
->pim
;
1176 dest
->mbi
= cpu_to_be16(src
->mbi
);
1177 dest
->pom
= src
->pom
;
1178 dest
->pam
= src
->pam
;
1179 for (i
= 0; i
< ARRAY_SIZE(dest
->chpid
); i
++) {
1180 dest
->chpid
[i
] = src
->chpid
[i
];
1182 dest
->chars
= cpu_to_be32(src
->chars
);
1185 void copy_scsw_to_guest(SCSW
*dest
, const SCSW
*src
)
1187 dest
->flags
= cpu_to_be16(src
->flags
);
1188 dest
->ctrl
= cpu_to_be16(src
->ctrl
);
1189 dest
->cpa
= cpu_to_be32(src
->cpa
);
1190 dest
->dstat
= src
->dstat
;
1191 dest
->cstat
= src
->cstat
;
1192 dest
->count
= cpu_to_be16(src
->count
);
1195 static void copy_schib_to_guest(SCHIB
*dest
, const SCHIB
*src
)
1199 copy_pmcw_to_guest(&dest
->pmcw
, &src
->pmcw
);
1200 copy_scsw_to_guest(&dest
->scsw
, &src
->scsw
);
1201 dest
->mba
= cpu_to_be64(src
->mba
);
1202 for (i
= 0; i
< ARRAY_SIZE(dest
->mda
); i
++) {
1203 dest
->mda
[i
] = src
->mda
[i
];
1207 int css_do_stsch(SubchDev
*sch
, SCHIB
*schib
)
1209 /* Use current status. */
1210 copy_schib_to_guest(schib
, &sch
->curr_status
);
1214 static void copy_pmcw_from_guest(PMCW
*dest
, const PMCW
*src
)
1218 dest
->intparm
= be32_to_cpu(src
->intparm
);
1219 dest
->flags
= be16_to_cpu(src
->flags
);
1220 dest
->devno
= be16_to_cpu(src
->devno
);
1221 dest
->lpm
= src
->lpm
;
1222 dest
->pnom
= src
->pnom
;
1223 dest
->lpum
= src
->lpum
;
1224 dest
->pim
= src
->pim
;
1225 dest
->mbi
= be16_to_cpu(src
->mbi
);
1226 dest
->pom
= src
->pom
;
1227 dest
->pam
= src
->pam
;
1228 for (i
= 0; i
< ARRAY_SIZE(dest
->chpid
); i
++) {
1229 dest
->chpid
[i
] = src
->chpid
[i
];
1231 dest
->chars
= be32_to_cpu(src
->chars
);
1234 static void copy_scsw_from_guest(SCSW
*dest
, const SCSW
*src
)
1236 dest
->flags
= be16_to_cpu(src
->flags
);
1237 dest
->ctrl
= be16_to_cpu(src
->ctrl
);
1238 dest
->cpa
= be32_to_cpu(src
->cpa
);
1239 dest
->dstat
= src
->dstat
;
1240 dest
->cstat
= src
->cstat
;
1241 dest
->count
= be16_to_cpu(src
->count
);
1244 static void copy_schib_from_guest(SCHIB
*dest
, const SCHIB
*src
)
1248 copy_pmcw_from_guest(&dest
->pmcw
, &src
->pmcw
);
1249 copy_scsw_from_guest(&dest
->scsw
, &src
->scsw
);
1250 dest
->mba
= be64_to_cpu(src
->mba
);
1251 for (i
= 0; i
< ARRAY_SIZE(dest
->mda
); i
++) {
1252 dest
->mda
[i
] = src
->mda
[i
];
1256 int css_do_msch(SubchDev
*sch
, const SCHIB
*orig_schib
)
1258 SCSW
*s
= &sch
->curr_status
.scsw
;
1259 PMCW
*p
= &sch
->curr_status
.pmcw
;
1264 if (!(sch
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_DNV
)) {
1269 if (s
->ctrl
& SCSW_STCTL_STATUS_PEND
) {
1275 (SCSW_FCTL_START_FUNC
|SCSW_FCTL_HALT_FUNC
|SCSW_FCTL_CLEAR_FUNC
)) {
1280 copy_schib_from_guest(&schib
, orig_schib
);
1281 /* Only update the program-modifiable fields. */
1282 p
->intparm
= schib
.pmcw
.intparm
;
1283 oldflags
= p
->flags
;
1284 p
->flags
&= ~(PMCW_FLAGS_MASK_ISC
| PMCW_FLAGS_MASK_ENA
|
1285 PMCW_FLAGS_MASK_LM
| PMCW_FLAGS_MASK_MME
|
1286 PMCW_FLAGS_MASK_MP
);
1287 p
->flags
|= schib
.pmcw
.flags
&
1288 (PMCW_FLAGS_MASK_ISC
| PMCW_FLAGS_MASK_ENA
|
1289 PMCW_FLAGS_MASK_LM
| PMCW_FLAGS_MASK_MME
|
1290 PMCW_FLAGS_MASK_MP
);
1291 p
->lpm
= schib
.pmcw
.lpm
;
1292 p
->mbi
= schib
.pmcw
.mbi
;
1293 p
->pom
= schib
.pmcw
.pom
;
1294 p
->chars
&= ~(PMCW_CHARS_MASK_MBFC
| PMCW_CHARS_MASK_CSENSE
);
1295 p
->chars
|= schib
.pmcw
.chars
&
1296 (PMCW_CHARS_MASK_MBFC
| PMCW_CHARS_MASK_CSENSE
);
1297 sch
->curr_status
.mba
= schib
.mba
;
1299 /* Has the channel been disabled? */
1300 if (sch
->disable_cb
&& (oldflags
& PMCW_FLAGS_MASK_ENA
) != 0
1301 && (p
->flags
& PMCW_FLAGS_MASK_ENA
) == 0) {
1302 sch
->disable_cb(sch
);
1311 int css_do_xsch(SubchDev
*sch
)
1313 SCSW
*s
= &sch
->curr_status
.scsw
;
1314 PMCW
*p
= &sch
->curr_status
.pmcw
;
1317 if (~(p
->flags
) & (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
)) {
1322 if (s
->ctrl
& SCSW_CTRL_MASK_STCTL
) {
1327 if (!(s
->ctrl
& SCSW_CTRL_MASK_FCTL
) ||
1328 ((s
->ctrl
& SCSW_CTRL_MASK_FCTL
) != SCSW_FCTL_START_FUNC
) ||
1330 (SCSW_ACTL_RESUME_PEND
| SCSW_ACTL_START_PEND
| SCSW_ACTL_SUSP
))) ||
1331 (s
->ctrl
& SCSW_ACTL_SUBCH_ACTIVE
)) {
1336 /* Cancel the current operation. */
1337 s
->ctrl
&= ~(SCSW_FCTL_START_FUNC
|
1338 SCSW_ACTL_RESUME_PEND
|
1339 SCSW_ACTL_START_PEND
|
1341 sch
->channel_prog
= 0x0;
1342 sch
->last_cmd_valid
= false;
1351 int css_do_csch(SubchDev
*sch
)
1353 SCSW
*s
= &sch
->curr_status
.scsw
;
1354 PMCW
*p
= &sch
->curr_status
.pmcw
;
1357 if (~(p
->flags
) & (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
)) {
1362 /* Trigger the clear function. */
1363 s
->ctrl
&= ~(SCSW_CTRL_MASK_FCTL
| SCSW_CTRL_MASK_ACTL
);
1364 s
->ctrl
|= SCSW_FCTL_CLEAR_FUNC
| SCSW_ACTL_CLEAR_PEND
;
1366 do_subchannel_work(sch
);
1373 int css_do_hsch(SubchDev
*sch
)
1375 SCSW
*s
= &sch
->curr_status
.scsw
;
1376 PMCW
*p
= &sch
->curr_status
.pmcw
;
1379 if (~(p
->flags
) & (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
)) {
1384 if (((s
->ctrl
& SCSW_CTRL_MASK_STCTL
) == SCSW_STCTL_STATUS_PEND
) ||
1385 (s
->ctrl
& (SCSW_STCTL_PRIMARY
|
1386 SCSW_STCTL_SECONDARY
|
1387 SCSW_STCTL_ALERT
))) {
1392 if (s
->ctrl
& (SCSW_FCTL_HALT_FUNC
| SCSW_FCTL_CLEAR_FUNC
)) {
1397 /* Trigger the halt function. */
1398 s
->ctrl
|= SCSW_FCTL_HALT_FUNC
;
1399 s
->ctrl
&= ~SCSW_FCTL_START_FUNC
;
1400 if (((s
->ctrl
& SCSW_CTRL_MASK_ACTL
) ==
1401 (SCSW_ACTL_SUBCH_ACTIVE
| SCSW_ACTL_DEVICE_ACTIVE
)) &&
1402 ((s
->ctrl
& SCSW_CTRL_MASK_STCTL
) == SCSW_STCTL_INTERMEDIATE
)) {
1403 s
->ctrl
&= ~SCSW_STCTL_STATUS_PEND
;
1405 s
->ctrl
|= SCSW_ACTL_HALT_PEND
;
1407 do_subchannel_work(sch
);
1414 static void css_update_chnmon(SubchDev
*sch
)
1416 if (!(sch
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_MME
)) {
1420 /* The counter is conveniently located at the beginning of the struct. */
1421 if (sch
->curr_status
.pmcw
.chars
& PMCW_CHARS_MASK_MBFC
) {
1422 /* Format 1, per-subchannel area. */
1425 count
= address_space_ldl(&address_space_memory
,
1426 sch
->curr_status
.mba
,
1427 MEMTXATTRS_UNSPECIFIED
,
1430 address_space_stl(&address_space_memory
, sch
->curr_status
.mba
, count
,
1431 MEMTXATTRS_UNSPECIFIED
, NULL
);
1433 /* Format 0, global area. */
1437 offset
= sch
->curr_status
.pmcw
.mbi
<< 5;
1438 count
= address_space_lduw(&address_space_memory
,
1439 channel_subsys
.chnmon_area
+ offset
,
1440 MEMTXATTRS_UNSPECIFIED
,
1443 address_space_stw(&address_space_memory
,
1444 channel_subsys
.chnmon_area
+ offset
, count
,
1445 MEMTXATTRS_UNSPECIFIED
, NULL
);
1449 int css_do_ssch(SubchDev
*sch
, ORB
*orb
)
1451 SCSW
*s
= &sch
->curr_status
.scsw
;
1452 PMCW
*p
= &sch
->curr_status
.pmcw
;
1455 if (~(p
->flags
) & (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
)) {
1460 if (s
->ctrl
& SCSW_STCTL_STATUS_PEND
) {
1465 if (s
->ctrl
& (SCSW_FCTL_START_FUNC
|
1466 SCSW_FCTL_HALT_FUNC
|
1467 SCSW_FCTL_CLEAR_FUNC
)) {
1472 /* If monitoring is active, update counter. */
1473 if (channel_subsys
.chnmon_active
) {
1474 css_update_chnmon(sch
);
1477 sch
->channel_prog
= orb
->cpa
;
1478 /* Trigger the start function. */
1479 s
->ctrl
|= (SCSW_FCTL_START_FUNC
| SCSW_ACTL_START_PEND
);
1480 s
->flags
&= ~SCSW_FLAGS_MASK_PNO
;
1482 ret
= do_subchannel_work(sch
);
1488 static void copy_irb_to_guest(IRB
*dest
, const IRB
*src
, PMCW
*pmcw
,
1492 uint16_t stctl
= src
->scsw
.ctrl
& SCSW_CTRL_MASK_STCTL
;
1493 uint16_t actl
= src
->scsw
.ctrl
& SCSW_CTRL_MASK_ACTL
;
1495 copy_scsw_to_guest(&dest
->scsw
, &src
->scsw
);
1497 for (i
= 0; i
< ARRAY_SIZE(dest
->esw
); i
++) {
1498 dest
->esw
[i
] = cpu_to_be32(src
->esw
[i
]);
1500 for (i
= 0; i
< ARRAY_SIZE(dest
->ecw
); i
++) {
1501 dest
->ecw
[i
] = cpu_to_be32(src
->ecw
[i
]);
1503 *irb_len
= sizeof(*dest
) - sizeof(dest
->emw
);
1505 /* extended measurements enabled? */
1506 if ((src
->scsw
.flags
& SCSW_FLAGS_MASK_ESWF
) ||
1507 !(pmcw
->flags
& PMCW_FLAGS_MASK_TF
) ||
1508 !(pmcw
->chars
& PMCW_CHARS_MASK_XMWME
)) {
1511 /* extended measurements pending? */
1512 if (!(stctl
& SCSW_STCTL_STATUS_PEND
)) {
1515 if ((stctl
& SCSW_STCTL_PRIMARY
) ||
1516 (stctl
== SCSW_STCTL_SECONDARY
) ||
1517 ((stctl
& SCSW_STCTL_INTERMEDIATE
) && (actl
& SCSW_ACTL_SUSP
))) {
1518 for (i
= 0; i
< ARRAY_SIZE(dest
->emw
); i
++) {
1519 dest
->emw
[i
] = cpu_to_be32(src
->emw
[i
]);
1522 *irb_len
= sizeof(*dest
);
1525 int css_do_tsch_get_irb(SubchDev
*sch
, IRB
*target_irb
, int *irb_len
)
1527 SCSW
*s
= &sch
->curr_status
.scsw
;
1528 PMCW
*p
= &sch
->curr_status
.pmcw
;
1532 if (~(p
->flags
) & (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
)) {
1536 stctl
= s
->ctrl
& SCSW_CTRL_MASK_STCTL
;
1538 /* Prepare the irb for the guest. */
1539 memset(&irb
, 0, sizeof(IRB
));
1541 /* Copy scsw from current status. */
1542 memcpy(&irb
.scsw
, s
, sizeof(SCSW
));
1543 if (stctl
& SCSW_STCTL_STATUS_PEND
) {
1544 if (s
->cstat
& (SCSW_CSTAT_DATA_CHECK
|
1545 SCSW_CSTAT_CHN_CTRL_CHK
|
1546 SCSW_CSTAT_INTF_CTRL_CHK
)) {
1547 irb
.scsw
.flags
|= SCSW_FLAGS_MASK_ESWF
;
1548 irb
.esw
[0] = 0x04804000;
1550 irb
.esw
[0] = 0x00800000;
1552 /* If a unit check is pending, copy sense data. */
1553 if ((s
->dstat
& SCSW_DSTAT_UNIT_CHECK
) &&
1554 (p
->chars
& PMCW_CHARS_MASK_CSENSE
)) {
1557 irb
.scsw
.flags
|= SCSW_FLAGS_MASK_ESWF
| SCSW_FLAGS_MASK_ECTL
;
1558 /* Attention: sense_data is already BE! */
1559 memcpy(irb
.ecw
, sch
->sense_data
, sizeof(sch
->sense_data
));
1560 for (i
= 0; i
< ARRAY_SIZE(irb
.ecw
); i
++) {
1561 irb
.ecw
[i
] = be32_to_cpu(irb
.ecw
[i
]);
1563 irb
.esw
[1] = 0x01000000 | (sizeof(sch
->sense_data
) << 8);
1566 /* Store the irb to the guest. */
1567 copy_irb_to_guest(target_irb
, &irb
, p
, irb_len
);
1569 return ((stctl
& SCSW_STCTL_STATUS_PEND
) == 0);
1572 void css_do_tsch_update_subch(SubchDev
*sch
)
1574 SCSW
*s
= &sch
->curr_status
.scsw
;
1575 PMCW
*p
= &sch
->curr_status
.pmcw
;
1580 stctl
= s
->ctrl
& SCSW_CTRL_MASK_STCTL
;
1581 fctl
= s
->ctrl
& SCSW_CTRL_MASK_FCTL
;
1582 actl
= s
->ctrl
& SCSW_CTRL_MASK_ACTL
;
1584 /* Clear conditions on subchannel, if applicable. */
1585 if (stctl
& SCSW_STCTL_STATUS_PEND
) {
1586 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
1587 if ((stctl
!= (SCSW_STCTL_INTERMEDIATE
| SCSW_STCTL_STATUS_PEND
)) ||
1588 ((fctl
& SCSW_FCTL_HALT_FUNC
) &&
1589 (actl
& SCSW_ACTL_SUSP
))) {
1590 s
->ctrl
&= ~SCSW_CTRL_MASK_FCTL
;
1592 if (stctl
!= (SCSW_STCTL_INTERMEDIATE
| SCSW_STCTL_STATUS_PEND
)) {
1593 s
->flags
&= ~SCSW_FLAGS_MASK_PNO
;
1594 s
->ctrl
&= ~(SCSW_ACTL_RESUME_PEND
|
1595 SCSW_ACTL_START_PEND
|
1596 SCSW_ACTL_HALT_PEND
|
1597 SCSW_ACTL_CLEAR_PEND
|
1600 if ((actl
& SCSW_ACTL_SUSP
) &&
1601 (fctl
& SCSW_FCTL_START_FUNC
)) {
1602 s
->flags
&= ~SCSW_FLAGS_MASK_PNO
;
1603 if (fctl
& SCSW_FCTL_HALT_FUNC
) {
1604 s
->ctrl
&= ~(SCSW_ACTL_RESUME_PEND
|
1605 SCSW_ACTL_START_PEND
|
1606 SCSW_ACTL_HALT_PEND
|
1607 SCSW_ACTL_CLEAR_PEND
|
1610 s
->ctrl
&= ~SCSW_ACTL_RESUME_PEND
;
1614 /* Clear pending sense data. */
1615 if (p
->chars
& PMCW_CHARS_MASK_CSENSE
) {
1616 memset(sch
->sense_data
, 0 , sizeof(sch
->sense_data
));
1621 static void copy_crw_to_guest(CRW
*dest
, const CRW
*src
)
1623 dest
->flags
= cpu_to_be16(src
->flags
);
1624 dest
->rsid
= cpu_to_be16(src
->rsid
);
1627 int css_do_stcrw(CRW
*crw
)
1629 CrwContainer
*crw_cont
;
1632 crw_cont
= QTAILQ_FIRST(&channel_subsys
.pending_crws
);
1634 QTAILQ_REMOVE(&channel_subsys
.pending_crws
, crw_cont
, sibling
);
1635 copy_crw_to_guest(crw
, &crw_cont
->crw
);
1639 /* List was empty, turn crw machine checks on again. */
1640 memset(crw
, 0, sizeof(*crw
));
1641 channel_subsys
.do_crw_mchk
= true;
1648 static void copy_crw_from_guest(CRW
*dest
, const CRW
*src
)
1650 dest
->flags
= be16_to_cpu(src
->flags
);
1651 dest
->rsid
= be16_to_cpu(src
->rsid
);
1654 void css_undo_stcrw(CRW
*crw
)
1656 CrwContainer
*crw_cont
;
1658 crw_cont
= g_try_malloc0(sizeof(CrwContainer
));
1660 channel_subsys
.crws_lost
= true;
1663 copy_crw_from_guest(&crw_cont
->crw
, crw
);
1665 QTAILQ_INSERT_HEAD(&channel_subsys
.pending_crws
, crw_cont
, sibling
);
1668 int css_do_tpi(IOIntCode
*int_code
, int lowcore
)
1670 /* No pending interrupts for !KVM. */
1674 int css_collect_chp_desc(int m
, uint8_t cssid
, uint8_t f_chpid
, uint8_t l_chpid
,
1675 int rfmt
, void *buf
)
1679 uint32_t chpid_type_word
;
1683 css
= channel_subsys
.css
[channel_subsys
.default_cssid
];
1685 css
= channel_subsys
.css
[cssid
];
1691 for (i
= f_chpid
; i
<= l_chpid
; i
++) {
1692 if (css
->chpids
[i
].in_use
) {
1693 chpid_type_word
= 0x80000000 | (css
->chpids
[i
].type
<< 8) | i
;
1695 words
[0] = cpu_to_be32(chpid_type_word
);
1697 memcpy(buf
+ desc_size
, words
, 8);
1699 } else if (rfmt
== 1) {
1700 words
[0] = cpu_to_be32(chpid_type_word
);
1708 memcpy(buf
+ desc_size
, words
, 32);
1716 void css_do_schm(uint8_t mbk
, int update
, int dct
, uint64_t mbo
)
1718 /* dct is currently ignored (not really meaningful for our devices) */
1719 /* TODO: Don't ignore mbk. */
1720 if (update
&& !channel_subsys
.chnmon_active
) {
1721 /* Enable measuring. */
1722 channel_subsys
.chnmon_area
= mbo
;
1723 channel_subsys
.chnmon_active
= true;
1725 if (!update
&& channel_subsys
.chnmon_active
) {
1726 /* Disable measuring. */
1727 channel_subsys
.chnmon_area
= 0;
1728 channel_subsys
.chnmon_active
= false;
1732 int css_do_rsch(SubchDev
*sch
)
1734 SCSW
*s
= &sch
->curr_status
.scsw
;
1735 PMCW
*p
= &sch
->curr_status
.pmcw
;
1738 if (~(p
->flags
) & (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
)) {
1743 if (s
->ctrl
& SCSW_STCTL_STATUS_PEND
) {
1748 if (((s
->ctrl
& SCSW_CTRL_MASK_FCTL
) != SCSW_FCTL_START_FUNC
) ||
1749 (s
->ctrl
& SCSW_ACTL_RESUME_PEND
) ||
1750 (!(s
->ctrl
& SCSW_ACTL_SUSP
))) {
1755 /* If monitoring is active, update counter. */
1756 if (channel_subsys
.chnmon_active
) {
1757 css_update_chnmon(sch
);
1760 s
->ctrl
|= SCSW_ACTL_RESUME_PEND
;
1761 do_subchannel_work(sch
);
1768 int css_do_rchp(uint8_t cssid
, uint8_t chpid
)
1772 if (cssid
> channel_subsys
.max_cssid
) {
1775 if (channel_subsys
.max_cssid
== 0) {
1776 real_cssid
= channel_subsys
.default_cssid
;
1780 if (!channel_subsys
.css
[real_cssid
]) {
1784 if (!channel_subsys
.css
[real_cssid
]->chpids
[chpid
].in_use
) {
1788 if (!channel_subsys
.css
[real_cssid
]->chpids
[chpid
].is_virtual
) {
1790 "rchp unsupported for non-virtual chpid %x.%02x!\n",
1795 /* We don't really use a channel path, so we're done here. */
1796 css_queue_crw(CRW_RSC_CHP
, CRW_ERC_INIT
, 1,
1797 channel_subsys
.max_cssid
> 0 ? 1 : 0, chpid
);
1798 if (channel_subsys
.max_cssid
> 0) {
1799 css_queue_crw(CRW_RSC_CHP
, CRW_ERC_INIT
, 1, 0, real_cssid
<< 8);
1804 bool css_schid_final(int m
, uint8_t cssid
, uint8_t ssid
, uint16_t schid
)
1809 real_cssid
= (!m
&& (cssid
== 0)) ? channel_subsys
.default_cssid
: cssid
;
1810 if (ssid
> MAX_SSID
||
1811 !channel_subsys
.css
[real_cssid
] ||
1812 !channel_subsys
.css
[real_cssid
]->sch_set
[ssid
]) {
1815 set
= channel_subsys
.css
[real_cssid
]->sch_set
[ssid
];
1816 return schid
> find_last_bit(set
->schids_used
,
1817 (MAX_SCHID
+ 1) / sizeof(unsigned long));
1820 unsigned int css_find_free_chpid(uint8_t cssid
)
1822 CssImage
*css
= channel_subsys
.css
[cssid
];
1826 return MAX_CHPID
+ 1;
1829 for (chpid
= 0; chpid
<= MAX_CHPID
; chpid
++) {
1830 /* skip reserved chpid */
1831 if (chpid
== VIRTIO_CCW_CHPID
) {
1834 if (!css
->chpids
[chpid
].in_use
) {
1838 return MAX_CHPID
+ 1;
1841 static int css_add_chpid(uint8_t cssid
, uint8_t chpid
, uint8_t type
,
1846 trace_css_chpid_add(cssid
, chpid
, type
);
1847 css
= channel_subsys
.css
[cssid
];
1851 if (css
->chpids
[chpid
].in_use
) {
1854 css
->chpids
[chpid
].in_use
= 1;
1855 css
->chpids
[chpid
].type
= type
;
1856 css
->chpids
[chpid
].is_virtual
= is_virt
;
1858 css_generate_chp_crws(cssid
, chpid
);
1863 void css_sch_build_virtual_schib(SubchDev
*sch
, uint8_t chpid
, uint8_t type
)
1865 PMCW
*p
= &sch
->curr_status
.pmcw
;
1866 SCSW
*s
= &sch
->curr_status
.scsw
;
1868 CssImage
*css
= channel_subsys
.css
[sch
->cssid
];
1870 assert(css
!= NULL
);
1871 memset(p
, 0, sizeof(PMCW
));
1872 p
->flags
|= PMCW_FLAGS_MASK_DNV
;
1873 p
->devno
= sch
->devno
;
1878 p
->chpid
[0] = chpid
;
1879 if (!css
->chpids
[chpid
].in_use
) {
1880 css_add_chpid(sch
->cssid
, chpid
, type
, true);
1883 memset(s
, 0, sizeof(SCSW
));
1884 sch
->curr_status
.mba
= 0;
1885 for (i
= 0; i
< ARRAY_SIZE(sch
->curr_status
.mda
); i
++) {
1886 sch
->curr_status
.mda
[i
] = 0;
1890 SubchDev
*css_find_subch(uint8_t m
, uint8_t cssid
, uint8_t ssid
, uint16_t schid
)
1894 real_cssid
= (!m
&& (cssid
== 0)) ? channel_subsys
.default_cssid
: cssid
;
1896 if (!channel_subsys
.css
[real_cssid
]) {
1900 if (!channel_subsys
.css
[real_cssid
]->sch_set
[ssid
]) {
1904 return channel_subsys
.css
[real_cssid
]->sch_set
[ssid
]->sch
[schid
];
1908 * Return free device number in subchannel set.
1910 * Return index of the first free device number in the subchannel set
1911 * identified by @p cssid and @p ssid, beginning the search at @p
1912 * start and wrapping around at MAX_DEVNO. Return a value exceeding
1913 * MAX_SCHID if there are no free device numbers in the subchannel
1916 static uint32_t css_find_free_devno(uint8_t cssid
, uint8_t ssid
,
1921 for (round
= 0; round
<= MAX_DEVNO
; round
++) {
1922 uint16_t devno
= (start
+ round
) % MAX_DEVNO
;
1924 if (!css_devno_used(cssid
, ssid
, devno
)) {
1928 return MAX_DEVNO
+ 1;
1932 * Return first free subchannel (id) in subchannel set.
1934 * Return index of the first free subchannel in the subchannel set
1935 * identified by @p cssid and @p ssid, if there is any. Return a value
1936 * exceeding MAX_SCHID if there are no free subchannels in the
1939 static uint32_t css_find_free_subch(uint8_t cssid
, uint8_t ssid
)
1943 for (schid
= 0; schid
<= MAX_SCHID
; schid
++) {
1944 if (!css_find_subch(1, cssid
, ssid
, schid
)) {
1948 return MAX_SCHID
+ 1;
1952 * Return first free subchannel (id) in subchannel set for a device number
1954 * Verify the device number @p devno is not used yet in the subchannel
1955 * set identified by @p cssid and @p ssid. Set @p schid to the index
1956 * of the first free subchannel in the subchannel set, if there is
1957 * any. Return true if everything succeeded and false otherwise.
1959 static bool css_find_free_subch_for_devno(uint8_t cssid
, uint8_t ssid
,
1960 uint16_t devno
, uint16_t *schid
,
1963 uint32_t free_schid
;
1966 if (css_devno_used(cssid
, ssid
, devno
)) {
1967 error_setg(errp
, "Device %x.%x.%04x already exists",
1968 cssid
, ssid
, devno
);
1971 free_schid
= css_find_free_subch(cssid
, ssid
);
1972 if (free_schid
> MAX_SCHID
) {
1973 error_setg(errp
, "No free subchannel found for %x.%x.%04x",
1974 cssid
, ssid
, devno
);
1977 *schid
= free_schid
;
1982 * Return first free subchannel (id) and device number
1984 * Locate the first free subchannel and first free device number in
1985 * any of the subchannel sets of the channel subsystem identified by
1986 * @p cssid. Return false if no free subchannel / device number could
1987 * be found. Otherwise set @p ssid, @p devno and @p schid to identify
1988 * the available subchannel and device number and return true.
1990 * May modify @p ssid, @p devno and / or @p schid even if no free
1991 * subchannel / device number could be found.
1993 static bool css_find_free_subch_and_devno(uint8_t cssid
, uint8_t *ssid
,
1994 uint16_t *devno
, uint16_t *schid
,
1997 uint32_t free_schid
, free_devno
;
1999 assert(ssid
&& devno
&& schid
);
2000 for (*ssid
= 0; *ssid
<= MAX_SSID
; (*ssid
)++) {
2001 free_schid
= css_find_free_subch(cssid
, *ssid
);
2002 if (free_schid
> MAX_SCHID
) {
2005 free_devno
= css_find_free_devno(cssid
, *ssid
, free_schid
);
2006 if (free_devno
> MAX_DEVNO
) {
2009 *schid
= free_schid
;
2010 *devno
= free_devno
;
2013 error_setg(errp
, "Virtual channel subsystem is full!");
2017 bool css_subch_visible(SubchDev
*sch
)
2019 if (sch
->ssid
> channel_subsys
.max_ssid
) {
2023 if (sch
->cssid
!= channel_subsys
.default_cssid
) {
2024 return (channel_subsys
.max_cssid
> 0);
2030 bool css_present(uint8_t cssid
)
2032 return (channel_subsys
.css
[cssid
] != NULL
);
2035 bool css_devno_used(uint8_t cssid
, uint8_t ssid
, uint16_t devno
)
2037 if (!channel_subsys
.css
[cssid
]) {
2040 if (!channel_subsys
.css
[cssid
]->sch_set
[ssid
]) {
2044 return !!test_bit(devno
,
2045 channel_subsys
.css
[cssid
]->sch_set
[ssid
]->devnos_used
);
2048 void css_subch_assign(uint8_t cssid
, uint8_t ssid
, uint16_t schid
,
2049 uint16_t devno
, SubchDev
*sch
)
2054 trace_css_assign_subch(sch
? "assign" : "deassign", cssid
, ssid
, schid
,
2056 if (!channel_subsys
.css
[cssid
]) {
2058 "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n",
2059 __func__
, cssid
, ssid
, schid
);
2062 css
= channel_subsys
.css
[cssid
];
2064 if (!css
->sch_set
[ssid
]) {
2065 css
->sch_set
[ssid
] = g_malloc0(sizeof(SubchSet
));
2067 s_set
= css
->sch_set
[ssid
];
2069 s_set
->sch
[schid
] = sch
;
2071 set_bit(schid
, s_set
->schids_used
);
2072 set_bit(devno
, s_set
->devnos_used
);
2074 clear_bit(schid
, s_set
->schids_used
);
2075 clear_bit(devno
, s_set
->devnos_used
);
2079 void css_queue_crw(uint8_t rsc
, uint8_t erc
, int solicited
,
2080 int chain
, uint16_t rsid
)
2082 CrwContainer
*crw_cont
;
2084 trace_css_crw(rsc
, erc
, rsid
, chain
? "(chained)" : "");
2085 /* TODO: Maybe use a static crw pool? */
2086 crw_cont
= g_try_malloc0(sizeof(CrwContainer
));
2088 channel_subsys
.crws_lost
= true;
2091 crw_cont
->crw
.flags
= (rsc
<< 8) | erc
;
2093 crw_cont
->crw
.flags
|= CRW_FLAGS_MASK_S
;
2096 crw_cont
->crw
.flags
|= CRW_FLAGS_MASK_C
;
2098 crw_cont
->crw
.rsid
= rsid
;
2099 if (channel_subsys
.crws_lost
) {
2100 crw_cont
->crw
.flags
|= CRW_FLAGS_MASK_R
;
2101 channel_subsys
.crws_lost
= false;
2104 QTAILQ_INSERT_TAIL(&channel_subsys
.pending_crws
, crw_cont
, sibling
);
2106 if (channel_subsys
.do_crw_mchk
) {
2107 channel_subsys
.do_crw_mchk
= false;
2108 /* Inject crw pending machine check. */
2113 void css_generate_sch_crws(uint8_t cssid
, uint8_t ssid
, uint16_t schid
,
2114 int hotplugged
, int add
)
2116 uint8_t guest_cssid
;
2119 if (add
&& !hotplugged
) {
2122 if (channel_subsys
.max_cssid
== 0) {
2123 /* Default cssid shows up as 0. */
2124 guest_cssid
= (cssid
== channel_subsys
.default_cssid
) ? 0 : cssid
;
2126 /* Show real cssid to the guest. */
2127 guest_cssid
= cssid
;
2130 * Only notify for higher subchannel sets/channel subsystems if the
2131 * guest has enabled it.
2133 if ((ssid
> channel_subsys
.max_ssid
) ||
2134 (guest_cssid
> channel_subsys
.max_cssid
) ||
2135 ((channel_subsys
.max_cssid
== 0) &&
2136 (cssid
!= channel_subsys
.default_cssid
))) {
2139 chain_crw
= (channel_subsys
.max_ssid
> 0) ||
2140 (channel_subsys
.max_cssid
> 0);
2141 css_queue_crw(CRW_RSC_SUBCH
, CRW_ERC_IPI
, 0, chain_crw
? 1 : 0, schid
);
2143 css_queue_crw(CRW_RSC_SUBCH
, CRW_ERC_IPI
, 0, 0,
2144 (guest_cssid
<< 8) | (ssid
<< 4));
2146 /* RW_ERC_IPI --> clear pending interrupts */
2147 css_clear_io_interrupt(css_do_build_subchannel_id(cssid
, ssid
), schid
);
2150 void css_generate_chp_crws(uint8_t cssid
, uint8_t chpid
)
2155 void css_generate_css_crws(uint8_t cssid
)
2157 if (!channel_subsys
.sei_pending
) {
2158 css_queue_crw(CRW_RSC_CSS
, CRW_ERC_EVENT
, 0, 0, cssid
);
2160 channel_subsys
.sei_pending
= true;
2163 void css_clear_sei_pending(void)
2165 channel_subsys
.sei_pending
= false;
2168 int css_enable_mcsse(void)
2170 trace_css_enable_facility("mcsse");
2171 channel_subsys
.max_cssid
= MAX_CSSID
;
2175 int css_enable_mss(void)
2177 trace_css_enable_facility("mss");
2178 channel_subsys
.max_ssid
= MAX_SSID
;
2182 void css_reset_sch(SubchDev
*sch
)
2184 PMCW
*p
= &sch
->curr_status
.pmcw
;
2186 if ((p
->flags
& PMCW_FLAGS_MASK_ENA
) != 0 && sch
->disable_cb
) {
2187 sch
->disable_cb(sch
);
2191 p
->flags
&= ~(PMCW_FLAGS_MASK_ISC
| PMCW_FLAGS_MASK_ENA
|
2192 PMCW_FLAGS_MASK_LM
| PMCW_FLAGS_MASK_MME
|
2193 PMCW_FLAGS_MASK_MP
| PMCW_FLAGS_MASK_TF
);
2194 p
->flags
|= PMCW_FLAGS_MASK_DNV
;
2195 p
->devno
= sch
->devno
;
2203 p
->chars
&= ~(PMCW_CHARS_MASK_MBFC
| PMCW_CHARS_MASK_XMWME
|
2204 PMCW_CHARS_MASK_CSENSE
);
2206 memset(&sch
->curr_status
.scsw
, 0, sizeof(sch
->curr_status
.scsw
));
2207 sch
->curr_status
.mba
= 0;
2209 sch
->channel_prog
= 0x0;
2210 sch
->last_cmd_valid
= false;
2211 sch
->thinint_active
= false;
2214 void css_reset(void)
2216 CrwContainer
*crw_cont
;
2218 /* Clean up monitoring. */
2219 channel_subsys
.chnmon_active
= false;
2220 channel_subsys
.chnmon_area
= 0;
2222 /* Clear pending CRWs. */
2223 while ((crw_cont
= QTAILQ_FIRST(&channel_subsys
.pending_crws
))) {
2224 QTAILQ_REMOVE(&channel_subsys
.pending_crws
, crw_cont
, sibling
);
2227 channel_subsys
.sei_pending
= false;
2228 channel_subsys
.do_crw_mchk
= true;
2229 channel_subsys
.crws_lost
= false;
2231 /* Reset maximum ids. */
2232 channel_subsys
.max_cssid
= 0;
2233 channel_subsys
.max_ssid
= 0;
2236 static void get_css_devid(Object
*obj
, Visitor
*v
, const char *name
,
2237 void *opaque
, Error
**errp
)
2239 DeviceState
*dev
= DEVICE(obj
);
2240 Property
*prop
= opaque
;
2241 CssDevId
*dev_id
= qdev_get_prop_ptr(dev
, prop
);
2242 char buffer
[] = "xx.x.xxxx";
2246 if (dev_id
->valid
) {
2248 r
= snprintf(buffer
, sizeof(buffer
), "%02x.%1x.%04x", dev_id
->cssid
,
2249 dev_id
->ssid
, dev_id
->devid
);
2250 assert(r
== sizeof(buffer
) - 1);
2252 /* drop leading zero */
2253 if (dev_id
->cssid
<= 0xf) {
2257 snprintf(buffer
, sizeof(buffer
), "<unset>");
2260 visit_type_str(v
, name
, &p
, errp
);
2264 * parse <cssid>.<ssid>.<devid> and assert valid range for cssid/ssid
2266 static void set_css_devid(Object
*obj
, Visitor
*v
, const char *name
,
2267 void *opaque
, Error
**errp
)
2269 DeviceState
*dev
= DEVICE(obj
);
2270 Property
*prop
= opaque
;
2271 CssDevId
*dev_id
= qdev_get_prop_ptr(dev
, prop
);
2272 Error
*local_err
= NULL
;
2275 unsigned int cssid
, ssid
, devid
;
2277 if (dev
->realized
) {
2278 qdev_prop_set_after_realize(dev
, name
, errp
);
2282 visit_type_str(v
, name
, &str
, &local_err
);
2284 error_propagate(errp
, local_err
);
2288 num
= sscanf(str
, "%2x.%1x%n.%4x%n", &cssid
, &ssid
, &n1
, &devid
, &n2
);
2289 if (num
!= 3 || (n2
- n1
) != 5 || strlen(str
) != n2
) {
2290 error_set_from_qdev_prop_error(errp
, EINVAL
, dev
, prop
, str
);
2293 if ((cssid
> MAX_CSSID
) || (ssid
> MAX_SSID
)) {
2294 error_setg(errp
, "Invalid cssid or ssid: cssid %x, ssid %x",
2299 dev_id
->cssid
= cssid
;
2300 dev_id
->ssid
= ssid
;
2301 dev_id
->devid
= devid
;
2302 dev_id
->valid
= true;
2308 const PropertyInfo css_devid_propinfo
= {
2310 .description
= "Identifier of an I/O device in the channel "
2311 "subsystem, example: fe.1.23ab",
2312 .get
= get_css_devid
,
2313 .set
= set_css_devid
,
2316 const PropertyInfo css_devid_ro_propinfo
= {
2318 .description
= "Read-only identifier of an I/O device in the channel "
2319 "subsystem, example: fe.1.23ab",
2320 .get
= get_css_devid
,
2323 SubchDev
*css_create_sch(CssDevId bus_id
, bool is_virtual
, bool squash_mcss
,
2330 if (is_virtual
!= (bus_id
.cssid
== VIRTUAL_CSSID
)) {
2331 error_setg(errp
, "cssid %hhx not valid for %s devices",
2333 (is_virtual
? "virtual" : "non-virtual"));
2340 bus_id
.cssid
= channel_subsys
.default_cssid
;
2341 } else if (!channel_subsys
.css
[bus_id
.cssid
]) {
2342 css_create_css_image(bus_id
.cssid
, false);
2345 if (!css_find_free_subch_for_devno(bus_id
.cssid
, bus_id
.ssid
,
2346 bus_id
.devid
, &schid
, errp
)) {
2349 } else if (squash_mcss
|| is_virtual
) {
2350 bus_id
.cssid
= channel_subsys
.default_cssid
;
2352 if (!css_find_free_subch_and_devno(bus_id
.cssid
, &bus_id
.ssid
,
2353 &bus_id
.devid
, &schid
, errp
)) {
2357 for (bus_id
.cssid
= 0; bus_id
.cssid
< MAX_CSSID
; ++bus_id
.cssid
) {
2358 if (bus_id
.cssid
== VIRTUAL_CSSID
) {
2362 if (!channel_subsys
.css
[bus_id
.cssid
]) {
2363 css_create_css_image(bus_id
.cssid
, false);
2366 if (css_find_free_subch_and_devno(bus_id
.cssid
, &bus_id
.ssid
,
2367 &bus_id
.devid
, &schid
,
2371 if (bus_id
.cssid
== MAX_CSSID
) {
2372 error_setg(errp
, "Virtual channel subsystem is full!");
2378 sch
= g_malloc0(sizeof(*sch
));
2379 sch
->cssid
= bus_id
.cssid
;
2380 sch
->ssid
= bus_id
.ssid
;
2381 sch
->devno
= bus_id
.devid
;
2383 css_subch_assign(sch
->cssid
, sch
->ssid
, schid
, sch
->devno
, sch
);
2387 static int css_sch_get_chpids(SubchDev
*sch
, CssDevId
*dev_id
)
2393 PMCW
*p
= &sch
->curr_status
.pmcw
;
2395 fid_path
= g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/chpids",
2396 dev_id
->cssid
, dev_id
->ssid
, dev_id
->devid
);
2397 fd
= fopen(fid_path
, "r");
2399 error_report("%s: open %s failed", __func__
, fid_path
);
2404 if (fscanf(fd
, "%x %x %x %x %x %x %x %x",
2405 &chpid
[0], &chpid
[1], &chpid
[2], &chpid
[3],
2406 &chpid
[4], &chpid
[5], &chpid
[6], &chpid
[7]) != 8) {
2412 for (i
= 0; i
< ARRAY_SIZE(p
->chpid
); i
++) {
2413 p
->chpid
[i
] = chpid
[i
];
2422 static int css_sch_get_path_masks(SubchDev
*sch
, CssDevId
*dev_id
)
2426 uint32_t pim
, pam
, pom
;
2427 PMCW
*p
= &sch
->curr_status
.pmcw
;
2429 fid_path
= g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/pimpampom",
2430 dev_id
->cssid
, dev_id
->ssid
, dev_id
->devid
);
2431 fd
= fopen(fid_path
, "r");
2433 error_report("%s: open %s failed", __func__
, fid_path
);
2438 if (fscanf(fd
, "%x %x %x", &pim
, &pam
, &pom
) != 3) {
2453 static int css_sch_get_chpid_type(uint8_t chpid
, uint32_t *type
,
2459 fid_path
= g_strdup_printf("/sys/devices/css%x/chp0.%02x/type",
2460 dev_id
->cssid
, chpid
);
2461 fd
= fopen(fid_path
, "r");
2463 error_report("%s: open %s failed", __func__
, fid_path
);
2468 if (fscanf(fd
, "%x", type
) != 1) {
2481 * We currently retrieve the real device information from sysfs to build the
2482 * guest subchannel information block without considering the migration feature.
2483 * We need to revisit this problem when we want to add migration support.
2485 int css_sch_build_schib(SubchDev
*sch
, CssDevId
*dev_id
)
2487 CssImage
*css
= channel_subsys
.css
[sch
->cssid
];
2488 PMCW
*p
= &sch
->curr_status
.pmcw
;
2489 SCSW
*s
= &sch
->curr_status
.scsw
;
2493 assert(css
!= NULL
);
2494 memset(p
, 0, sizeof(PMCW
));
2495 p
->flags
|= PMCW_FLAGS_MASK_DNV
;
2496 /* We are dealing with I/O subchannels only. */
2497 p
->devno
= sch
->devno
;
2499 /* Grab path mask from sysfs. */
2500 ret
= css_sch_get_path_masks(sch
, dev_id
);
2505 /* Grab chpids from sysfs. */
2506 ret
= css_sch_get_chpids(sch
, dev_id
);
2511 /* Build chpid type. */
2512 for (i
= 0; i
< ARRAY_SIZE(p
->chpid
); i
++) {
2513 if (p
->chpid
[i
] && !css
->chpids
[p
->chpid
[i
]].in_use
) {
2514 ret
= css_sch_get_chpid_type(p
->chpid
[i
], &type
, dev_id
);
2518 css_add_chpid(sch
->cssid
, p
->chpid
[i
], type
, false);
2522 memset(s
, 0, sizeof(SCSW
));
2523 sch
->curr_status
.mba
= 0;
2524 for (i
= 0; i
< ARRAY_SIZE(sch
->curr_status
.mda
); i
++) {
2525 sch
->curr_status
.mda
[i
] = 0;