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qga-win: Enable 'can-offline' field in 'guest-get-vcpus' reply
[qemu/kevin.git] / hw / s390x / css.c
blobc03bb20bc994a8cba2b87ca82f83b90b0f908c7e
1 /*
2 * Channel subsystem base support.
3 *
4 * Copyright 2012 IBM Corp.
5 * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
6 *
7 * This work is licensed under the terms of the GNU GPL, version 2 or (at
8 * your option) any later version. See the COPYING file in the top-level
9 * directory.
10 */
11
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "qapi/visitor.h"
15 #include "hw/qdev.h"
16 #include "qemu/bitops.h"
17 #include "exec/address-spaces.h"
18 #include "cpu.h"
19 #include "hw/s390x/ioinst.h"
20 #include "hw/s390x/css.h"
21 #include "trace.h"
22 #include "hw/s390x/s390_flic.h"
23
24 typedef struct CrwContainer {
25 CRW crw;
26 QTAILQ_ENTRY(CrwContainer) sibling;
27 } CrwContainer;
28
29 typedef struct ChpInfo {
30 uint8_t in_use;
31 uint8_t type;
32 uint8_t is_virtual;
33 } ChpInfo;
34
35 typedef struct SubchSet {
36 SubchDev *sch[MAX_SCHID + 1];
37 unsigned long schids_used[BITS_TO_LONGS(MAX_SCHID + 1)];
38 unsigned long devnos_used[BITS_TO_LONGS(MAX_SCHID + 1)];
39 } SubchSet;
40
41 typedef struct CssImage {
42 SubchSet *sch_set[MAX_SSID + 1];
43 ChpInfo chpids[MAX_CHPID + 1];
44 } CssImage;
45
46 typedef struct IoAdapter {
47 uint32_t id;
48 uint8_t type;
49 uint8_t isc;
50 } IoAdapter;
51
52 typedef struct ChannelSubSys {
53 QTAILQ_HEAD(, CrwContainer) pending_crws;
54 bool sei_pending;
55 bool do_crw_mchk;
56 bool crws_lost;
57 uint8_t max_cssid;
58 uint8_t max_ssid;
59 bool chnmon_active;
60 uint64_t chnmon_area;
61 CssImage *css[MAX_CSSID + 1];
62 uint8_t default_cssid;
63 IoAdapter *io_adapters[CSS_IO_ADAPTER_TYPE_NUMS][MAX_ISC + 1];
64 QTAILQ_HEAD(, IndAddr) indicator_addresses;
65 } ChannelSubSys;
66
67 static ChannelSubSys channel_subsys = {
68 .pending_crws = QTAILQ_HEAD_INITIALIZER(channel_subsys.pending_crws),
69 .do_crw_mchk = true,
70 .sei_pending = false,
71 .do_crw_mchk = true,
72 .crws_lost = false,
73 .chnmon_active = false,
74 .indicator_addresses =
75 QTAILQ_HEAD_INITIALIZER(channel_subsys.indicator_addresses),
76 };
77
78 IndAddr *get_indicator(hwaddr ind_addr, int len)
79 {
80 IndAddr *indicator;
81
82 QTAILQ_FOREACH(indicator, &channel_subsys.indicator_addresses, sibling) {
83 if (indicator->addr == ind_addr) {
84 indicator->refcnt++;
85 return indicator;
86 }
87 }
88 indicator = g_new0(IndAddr, 1);
89 indicator->addr = ind_addr;
90 indicator->len = len;
91 indicator->refcnt = 1;
92 QTAILQ_INSERT_TAIL(&channel_subsys.indicator_addresses,
93 indicator, sibling);
94 return indicator;
95 }
96
97 static int s390_io_adapter_map(AdapterInfo *adapter, uint64_t map_addr,
98 bool do_map)
99 {
100 S390FLICState *fs = s390_get_flic();
101 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
102
103 return fsc->io_adapter_map(fs, adapter->adapter_id, map_addr, do_map);
104 }
105
106 void release_indicator(AdapterInfo *adapter, IndAddr *indicator)
107 {
108 assert(indicator->refcnt > 0);
109 indicator->refcnt--;
110 if (indicator->refcnt > 0) {
111 return;
112 }
113 QTAILQ_REMOVE(&channel_subsys.indicator_addresses, indicator, sibling);
114 if (indicator->map) {
115 s390_io_adapter_map(adapter, indicator->map, false);
116 }
117 g_free(indicator);
118 }
119
120 int map_indicator(AdapterInfo *adapter, IndAddr *indicator)
121 {
122 int ret;
123
124 if (indicator->map) {
125 return 0; /* already mapped is not an error */
126 }
127 indicator->map = indicator->addr;
128 ret = s390_io_adapter_map(adapter, indicator->map, true);
129 if ((ret != 0) && (ret != -ENOSYS)) {
130 goto out_err;
131 }
132 return 0;
133
134 out_err:
135 indicator->map = 0;
136 return ret;
137 }
138
139 int css_create_css_image(uint8_t cssid, bool default_image)
140 {
141 trace_css_new_image(cssid, default_image ? "(default)" : "");
142 /* 255 is reserved */
143 if (cssid == 255) {
144 return -EINVAL;
145 }
146 if (channel_subsys.css[cssid]) {
147 return -EBUSY;
148 }
149 channel_subsys.css[cssid] = g_malloc0(sizeof(CssImage));
150 if (default_image) {
151 channel_subsys.default_cssid = cssid;
152 }
153 return 0;
154 }
155
156 uint32_t css_get_adapter_id(CssIoAdapterType type, uint8_t isc)
157 {
158 if (type >= CSS_IO_ADAPTER_TYPE_NUMS || isc > MAX_ISC ||
159 !channel_subsys.io_adapters[type][isc]) {
160 return -1;
161 }
162
163 return channel_subsys.io_adapters[type][isc]->id;
164 }
165
166 /**
167 * css_register_io_adapters: Register I/O adapters per ISC during init
168 *
169 * @swap: an indication if byte swap is needed.
170 * @maskable: an indication if the adapter is subject to the mask operation.
171 * @errp: location to store error information.
172 */
173 void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maskable,
174 Error **errp)
175 {
176 uint32_t id;
177 int ret, isc;
178 IoAdapter *adapter;
179 S390FLICState *fs = s390_get_flic();
180 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
181
182 /*
183 * Disallow multiple registrations for the same device type.
184 * Report an error if registering for an already registered type.
185 */
186 if (channel_subsys.io_adapters[type][0]) {
187 error_setg(errp, "Adapters for type %d already registered", type);
188 }
189
190 for (isc = 0; isc <= MAX_ISC; isc++) {
191 id = (type << 3) | isc;
192 ret = fsc->register_io_adapter(fs, id, isc, swap, maskable);
193 if (ret == 0) {
194 adapter = g_new0(IoAdapter, 1);
195 adapter->id = id;
196 adapter->isc = isc;
197 adapter->type = type;
198 channel_subsys.io_adapters[type][isc] = adapter;
199 } else {
200 error_setg_errno(errp, -ret, "Unexpected error %d when "
201 "registering adapter %d", ret, id);
202 break;
203 }
204 }
205
206 /*
207 * No need to free registered adapters in kvm: kvm will clean up
208 * when the machine goes away.
209 */
210 if (ret) {
211 for (isc--; isc >= 0; isc--) {
212 g_free(channel_subsys.io_adapters[type][isc]);
213 channel_subsys.io_adapters[type][isc] = NULL;
214 }
215 }
216
217 }
218
219 static void css_clear_io_interrupt(uint16_t subchannel_id,
220 uint16_t subchannel_nr)
221 {
222 Error *err = NULL;
223 static bool no_clear_irq;
224 S390FLICState *fs = s390_get_flic();
225 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
226 int r;
227
228 if (unlikely(no_clear_irq)) {
229 return;
230 }
231 r = fsc->clear_io_irq(fs, subchannel_id, subchannel_nr);
232 switch (r) {
233 case 0:
234 break;
235 case -ENOSYS:
236 no_clear_irq = true;
237 /*
238 * Ignore unavailability, as the user can't do anything
239 * about it anyway.
240 */
241 break;
242 default:
243 error_setg_errno(&err, -r, "unexpected error condition");
244 error_propagate(&error_abort, err);
245 }
246 }
247
248 static inline uint16_t css_do_build_subchannel_id(uint8_t cssid, uint8_t ssid)
249 {
250 if (channel_subsys.max_cssid > 0) {
251 return (cssid << 8) | (1 << 3) | (ssid << 1) | 1;
252 }
253 return (ssid << 1) | 1;
254 }
255
256 uint16_t css_build_subchannel_id(SubchDev *sch)
257 {
258 return css_do_build_subchannel_id(sch->cssid, sch->ssid);
259 }
260
261 static void css_inject_io_interrupt(SubchDev *sch)
262 {
263 uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
264
265 trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
266 sch->curr_status.pmcw.intparm, isc, "");
267 s390_io_interrupt(css_build_subchannel_id(sch),
268 sch->schid,
269 sch->curr_status.pmcw.intparm,
270 isc << 27);
271 }
272
273 void css_conditional_io_interrupt(SubchDev *sch)
274 {
275 /*
276 * If the subchannel is not currently status pending, make it pending
277 * with alert status.
278 */
279 if (!(sch->curr_status.scsw.ctrl & SCSW_STCTL_STATUS_PEND)) {
280 uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
281
282 trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
283 sch->curr_status.pmcw.intparm, isc,
284 "(unsolicited)");
285 sch->curr_status.scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
286 sch->curr_status.scsw.ctrl |=
287 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
288 /* Inject an I/O interrupt. */
289 s390_io_interrupt(css_build_subchannel_id(sch),
290 sch->schid,
291 sch->curr_status.pmcw.intparm,
292 isc << 27);
293 }
294 }
295
296 void css_adapter_interrupt(uint8_t isc)
297 {
298 uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI;
299
300 trace_css_adapter_interrupt(isc);
301 s390_io_interrupt(0, 0, 0, io_int_word);
302 }
303
304 static void sch_handle_clear_func(SubchDev *sch)
305 {
306 PMCW *p = &sch->curr_status.pmcw;
307 SCSW *s = &sch->curr_status.scsw;
308 int path;
309
310 /* Path management: In our simple css, we always choose the only path. */
311 path = 0x80;
312
313 /* Reset values prior to 'issuing the clear signal'. */
314 p->lpum = 0;
315 p->pom = 0xff;
316 s->flags &= ~SCSW_FLAGS_MASK_PNO;
317
318 /* We always 'attempt to issue the clear signal', and we always succeed. */
319 sch->channel_prog = 0x0;
320 sch->last_cmd_valid = false;
321 s->ctrl &= ~SCSW_ACTL_CLEAR_PEND;
322 s->ctrl |= SCSW_STCTL_STATUS_PEND;
323
324 s->dstat = 0;
325 s->cstat = 0;
326 p->lpum = path;
327
328 }
329
330 static void sch_handle_halt_func(SubchDev *sch)
331 {
332
333 PMCW *p = &sch->curr_status.pmcw;
334 SCSW *s = &sch->curr_status.scsw;
335 hwaddr curr_ccw = sch->channel_prog;
336 int path;
337
338 /* Path management: In our simple css, we always choose the only path. */
339 path = 0x80;
340
341 /* We always 'attempt to issue the halt signal', and we always succeed. */
342 sch->channel_prog = 0x0;
343 sch->last_cmd_valid = false;
344 s->ctrl &= ~SCSW_ACTL_HALT_PEND;
345 s->ctrl |= SCSW_STCTL_STATUS_PEND;
346
347 if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
348 !((s->ctrl & SCSW_ACTL_START_PEND) ||
349 (s->ctrl & SCSW_ACTL_SUSP))) {
350 s->dstat = SCSW_DSTAT_DEVICE_END;
351 }
352 if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
353 (s->ctrl & SCSW_ACTL_SUSP)) {
354 s->cpa = curr_ccw + 8;
355 }
356 s->cstat = 0;
357 p->lpum = path;
358
359 }
360
361 static void copy_sense_id_to_guest(SenseId *dest, SenseId *src)
362 {
363 int i;
364
365 dest->reserved = src->reserved;
366 dest->cu_type = cpu_to_be16(src->cu_type);
367 dest->cu_model = src->cu_model;
368 dest->dev_type = cpu_to_be16(src->dev_type);
369 dest->dev_model = src->dev_model;
370 dest->unused = src->unused;
371 for (i = 0; i < ARRAY_SIZE(dest->ciw); i++) {
372 dest->ciw[i].type = src->ciw[i].type;
373 dest->ciw[i].command = src->ciw[i].command;
374 dest->ciw[i].count = cpu_to_be16(src->ciw[i].count);
375 }
376 }
377
378 static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1)
379 {
380 CCW0 tmp0;
381 CCW1 tmp1;
382 CCW1 ret;
383
384 if (fmt1) {
385 cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1));
386 ret.cmd_code = tmp1.cmd_code;
387 ret.flags = tmp1.flags;
388 ret.count = be16_to_cpu(tmp1.count);
389 ret.cda = be32_to_cpu(tmp1.cda);
390 } else {
391 cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0));
392 if ((tmp0.cmd_code & 0x0f) == CCW_CMD_TIC) {
393 ret.cmd_code = CCW_CMD_TIC;
394 ret.flags = 0;
395 ret.count = 0;
396 } else {
397 ret.cmd_code = tmp0.cmd_code;
398 ret.flags = tmp0.flags;
399 ret.count = be16_to_cpu(tmp0.count);
400 }
401 ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16);
402 }
403 return ret;
404 }
405
406 static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr,
407 bool suspend_allowed)
408 {
409 int ret;
410 bool check_len;
411 int len;
412 CCW1 ccw;
413
414 if (!ccw_addr) {
415 return -EIO;
416 }
417
418 /* Translate everything to format-1 ccws - the information is the same. */
419 ccw = copy_ccw_from_guest(ccw_addr, sch->ccw_fmt_1);
420
421 /* Check for invalid command codes. */
422 if ((ccw.cmd_code & 0x0f) == 0) {
423 return -EINVAL;
424 }
425 if (((ccw.cmd_code & 0x0f) == CCW_CMD_TIC) &&
426 ((ccw.cmd_code & 0xf0) != 0)) {
427 return -EINVAL;
428 }
429 if (!sch->ccw_fmt_1 && (ccw.count == 0) &&
430 (ccw.cmd_code != CCW_CMD_TIC)) {
431 return -EINVAL;
432 }
433
434 if (ccw.flags & CCW_FLAG_SUSPEND) {
435 return suspend_allowed ? -EINPROGRESS : -EINVAL;
436 }
437
438 check_len = !((ccw.flags & CCW_FLAG_SLI) && !(ccw.flags & CCW_FLAG_DC));
439
440 if (!ccw.cda) {
441 if (sch->ccw_no_data_cnt == 255) {
442 return -EINVAL;
443 }
444 sch->ccw_no_data_cnt++;
445 }
446
447 /* Look at the command. */
448 switch (ccw.cmd_code) {
449 case CCW_CMD_NOOP:
450 /* Nothing to do. */
451 ret = 0;
452 break;
453 case CCW_CMD_BASIC_SENSE:
454 if (check_len) {
455 if (ccw.count != sizeof(sch->sense_data)) {
456 ret = -EINVAL;
457 break;
458 }
459 }
460 len = MIN(ccw.count, sizeof(sch->sense_data));
461 cpu_physical_memory_write(ccw.cda, sch->sense_data, len);
462 sch->curr_status.scsw.count = ccw.count - len;
463 memset(sch->sense_data, 0, sizeof(sch->sense_data));
464 ret = 0;
465 break;
466 case CCW_CMD_SENSE_ID:
467 {
468 SenseId sense_id;
469
470 copy_sense_id_to_guest(&sense_id, &sch->id);
471 /* Sense ID information is device specific. */
472 if (check_len) {
473 if (ccw.count != sizeof(sense_id)) {
474 ret = -EINVAL;
475 break;
476 }
477 }
478 len = MIN(ccw.count, sizeof(sense_id));
479 /*
480 * Only indicate 0xff in the first sense byte if we actually
481 * have enough place to store at least bytes 0-3.
482 */
483 if (len >= 4) {
484 sense_id.reserved = 0xff;
485 } else {
486 sense_id.reserved = 0;
487 }
488 cpu_physical_memory_write(ccw.cda, &sense_id, len);
489 sch->curr_status.scsw.count = ccw.count - len;
490 ret = 0;
491 break;
492 }
493 case CCW_CMD_TIC:
494 if (sch->last_cmd_valid && (sch->last_cmd.cmd_code == CCW_CMD_TIC)) {
495 ret = -EINVAL;
496 break;
497 }
498 if (ccw.flags & (CCW_FLAG_CC | CCW_FLAG_DC)) {
499 ret = -EINVAL;
500 break;
501 }
502 sch->channel_prog = ccw.cda;
503 ret = -EAGAIN;
504 break;
505 default:
506 if (sch->ccw_cb) {
507 /* Handle device specific commands. */
508 ret = sch->ccw_cb(sch, ccw);
509 } else {
510 ret = -ENOSYS;
511 }
512 break;
513 }
514 sch->last_cmd = ccw;
515 sch->last_cmd_valid = true;
516 if (ret == 0) {
517 if (ccw.flags & CCW_FLAG_CC) {
518 sch->channel_prog += 8;
519 ret = -EAGAIN;
520 }
521 }
522
523 return ret;
524 }
525
526 static void sch_handle_start_func(SubchDev *sch, ORB *orb)
527 {
528
529 PMCW *p = &sch->curr_status.pmcw;
530 SCSW *s = &sch->curr_status.scsw;
531 int path;
532 int ret;
533 bool suspend_allowed;
534
535 /* Path management: In our simple css, we always choose the only path. */
536 path = 0x80;
537
538 if (!(s->ctrl & SCSW_ACTL_SUSP)) {
539 /* Start Function triggered via ssch, i.e. we have an ORB */
540 s->cstat = 0;
541 s->dstat = 0;
542 /* Look at the orb and try to execute the channel program. */
543 assert(orb != NULL); /* resume does not pass an orb */
544 p->intparm = orb->intparm;
545 if (!(orb->lpm & path)) {
546 /* Generate a deferred cc 3 condition. */
547 s->flags |= SCSW_FLAGS_MASK_CC;
548 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
549 s->ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND);
550 return;
551 }
552 sch->ccw_fmt_1 = !!(orb->ctrl0 & ORB_CTRL0_MASK_FMT);
553 s->flags |= (sch->ccw_fmt_1) ? SCSW_FLAGS_MASK_FMT : 0;
554 sch->ccw_no_data_cnt = 0;
555 suspend_allowed = !!(orb->ctrl0 & ORB_CTRL0_MASK_SPND);
556 } else {
557 /* Start Function resumed via rsch, i.e. we don't have an
558 * ORB */
559 s->ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND);
560 /* The channel program had been suspended before. */
561 suspend_allowed = true;
562 }
563 sch->last_cmd_valid = false;
564 do {
565 ret = css_interpret_ccw(sch, sch->channel_prog, suspend_allowed);
566 switch (ret) {
567 case -EAGAIN:
568 /* ccw chain, continue processing */
569 break;
570 case 0:
571 /* success */
572 s->ctrl &= ~SCSW_ACTL_START_PEND;
573 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
574 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
575 SCSW_STCTL_STATUS_PEND;
576 s->dstat = SCSW_DSTAT_CHANNEL_END | SCSW_DSTAT_DEVICE_END;
577 s->cpa = sch->channel_prog + 8;
578 break;
579 case -ENOSYS:
580 /* unsupported command, generate unit check (command reject) */
581 s->ctrl &= ~SCSW_ACTL_START_PEND;
582 s->dstat = SCSW_DSTAT_UNIT_CHECK;
583 /* Set sense bit 0 in ecw0. */
584 sch->sense_data[0] = 0x80;
585 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
586 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
587 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
588 s->cpa = sch->channel_prog + 8;
589 break;
590 case -EFAULT:
591 /* memory problem, generate channel data check */
592 s->ctrl &= ~SCSW_ACTL_START_PEND;
593 s->cstat = SCSW_CSTAT_DATA_CHECK;
594 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
595 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
596 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
597 s->cpa = sch->channel_prog + 8;
598 break;
599 case -EBUSY:
600 /* subchannel busy, generate deferred cc 1 */
601 s->flags &= ~SCSW_FLAGS_MASK_CC;
602 s->flags |= (1 << 8);
603 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
604 s->ctrl |= SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
605 break;
606 case -EINPROGRESS:
607 /* channel program has been suspended */
608 s->ctrl &= ~SCSW_ACTL_START_PEND;
609 s->ctrl |= SCSW_ACTL_SUSP;
610 break;
611 default:
612 /* error, generate channel program check */
613 s->ctrl &= ~SCSW_ACTL_START_PEND;
614 s->cstat = SCSW_CSTAT_PROG_CHECK;
615 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
616 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
617 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
618 s->cpa = sch->channel_prog + 8;
619 break;
620 }
621 } while (ret == -EAGAIN);
622
623 }
624
625 /*
626 * On real machines, this would run asynchronously to the main vcpus.
627 * We might want to make some parts of the ssch handling (interpreting
628 * read/writes) asynchronous later on if we start supporting more than
629 * our current very simple devices.
630 */
631 static void do_subchannel_work(SubchDev *sch, ORB *orb)
632 {
633
634 SCSW *s = &sch->curr_status.scsw;
635
636 if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) {
637 sch_handle_clear_func(sch);
638 } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) {
639 sch_handle_halt_func(sch);
640 } else if (s->ctrl & SCSW_FCTL_START_FUNC) {
641 /* Triggered by both ssch and rsch. */
642 sch_handle_start_func(sch, orb);
643 } else {
644 /* Cannot happen. */
645 return;
646 }
647 css_inject_io_interrupt(sch);
648 }
649
650 static void copy_pmcw_to_guest(PMCW *dest, const PMCW *src)
651 {
652 int i;
653
654 dest->intparm = cpu_to_be32(src->intparm);
655 dest->flags = cpu_to_be16(src->flags);
656 dest->devno = cpu_to_be16(src->devno);
657 dest->lpm = src->lpm;
658 dest->pnom = src->pnom;
659 dest->lpum = src->lpum;
660 dest->pim = src->pim;
661 dest->mbi = cpu_to_be16(src->mbi);
662 dest->pom = src->pom;
663 dest->pam = src->pam;
664 for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
665 dest->chpid[i] = src->chpid[i];
666 }
667 dest->chars = cpu_to_be32(src->chars);
668 }
669
670 static void copy_scsw_to_guest(SCSW *dest, const SCSW *src)
671 {
672 dest->flags = cpu_to_be16(src->flags);
673 dest->ctrl = cpu_to_be16(src->ctrl);
674 dest->cpa = cpu_to_be32(src->cpa);
675 dest->dstat = src->dstat;
676 dest->cstat = src->cstat;
677 dest->count = cpu_to_be16(src->count);
678 }
679
680 static void copy_schib_to_guest(SCHIB *dest, const SCHIB *src)
681 {
682 int i;
683
684 copy_pmcw_to_guest(&dest->pmcw, &src->pmcw);
685 copy_scsw_to_guest(&dest->scsw, &src->scsw);
686 dest->mba = cpu_to_be64(src->mba);
687 for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
688 dest->mda[i] = src->mda[i];
689 }
690 }
691
692 int css_do_stsch(SubchDev *sch, SCHIB *schib)
693 {
694 /* Use current status. */
695 copy_schib_to_guest(schib, &sch->curr_status);
696 return 0;
697 }
698
699 static void copy_pmcw_from_guest(PMCW *dest, const PMCW *src)
700 {
701 int i;
702
703 dest->intparm = be32_to_cpu(src->intparm);
704 dest->flags = be16_to_cpu(src->flags);
705 dest->devno = be16_to_cpu(src->devno);
706 dest->lpm = src->lpm;
707 dest->pnom = src->pnom;
708 dest->lpum = src->lpum;
709 dest->pim = src->pim;
710 dest->mbi = be16_to_cpu(src->mbi);
711 dest->pom = src->pom;
712 dest->pam = src->pam;
713 for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
714 dest->chpid[i] = src->chpid[i];
715 }
716 dest->chars = be32_to_cpu(src->chars);
717 }
718
719 static void copy_scsw_from_guest(SCSW *dest, const SCSW *src)
720 {
721 dest->flags = be16_to_cpu(src->flags);
722 dest->ctrl = be16_to_cpu(src->ctrl);
723 dest->cpa = be32_to_cpu(src->cpa);
724 dest->dstat = src->dstat;
725 dest->cstat = src->cstat;
726 dest->count = be16_to_cpu(src->count);
727 }
728
729 static void copy_schib_from_guest(SCHIB *dest, const SCHIB *src)
730 {
731 int i;
732
733 copy_pmcw_from_guest(&dest->pmcw, &src->pmcw);
734 copy_scsw_from_guest(&dest->scsw, &src->scsw);
735 dest->mba = be64_to_cpu(src->mba);
736 for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
737 dest->mda[i] = src->mda[i];
738 }
739 }
740
741 int css_do_msch(SubchDev *sch, const SCHIB *orig_schib)
742 {
743 SCSW *s = &sch->curr_status.scsw;
744 PMCW *p = &sch->curr_status.pmcw;
745 uint16_t oldflags;
746 int ret;
747 SCHIB schib;
748
749 if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_DNV)) {
750 ret = 0;
751 goto out;
752 }
753
754 if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
755 ret = -EINPROGRESS;
756 goto out;
757 }
758
759 if (s->ctrl &
760 (SCSW_FCTL_START_FUNC|SCSW_FCTL_HALT_FUNC|SCSW_FCTL_CLEAR_FUNC)) {
761 ret = -EBUSY;
762 goto out;
763 }
764
765 copy_schib_from_guest(&schib, orig_schib);
766 /* Only update the program-modifiable fields. */
767 p->intparm = schib.pmcw.intparm;
768 oldflags = p->flags;
769 p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
770 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
771 PMCW_FLAGS_MASK_MP);
772 p->flags |= schib.pmcw.flags &
773 (PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
774 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
775 PMCW_FLAGS_MASK_MP);
776 p->lpm = schib.pmcw.lpm;
777 p->mbi = schib.pmcw.mbi;
778 p->pom = schib.pmcw.pom;
779 p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
780 p->chars |= schib.pmcw.chars &
781 (PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
782 sch->curr_status.mba = schib.mba;
783
784 /* Has the channel been disabled? */
785 if (sch->disable_cb && (oldflags & PMCW_FLAGS_MASK_ENA) != 0
786 && (p->flags & PMCW_FLAGS_MASK_ENA) == 0) {
787 sch->disable_cb(sch);
788 }
789
790 ret = 0;
791
792 out:
793 return ret;
794 }
795
796 int css_do_xsch(SubchDev *sch)
797 {
798 SCSW *s = &sch->curr_status.scsw;
799 PMCW *p = &sch->curr_status.pmcw;
800 int ret;
801
802 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
803 ret = -ENODEV;
804 goto out;
805 }
806
807 if (!(s->ctrl & SCSW_CTRL_MASK_FCTL) ||
808 ((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
809 (!(s->ctrl &
810 (SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_SUSP))) ||
811 (s->ctrl & SCSW_ACTL_SUBCH_ACTIVE)) {
812 ret = -EINPROGRESS;
813 goto out;
814 }
815
816 if (s->ctrl & SCSW_CTRL_MASK_STCTL) {
817 ret = -EBUSY;
818 goto out;
819 }
820
821 /* Cancel the current operation. */
822 s->ctrl &= ~(SCSW_FCTL_START_FUNC |
823 SCSW_ACTL_RESUME_PEND |
824 SCSW_ACTL_START_PEND |
825 SCSW_ACTL_SUSP);
826 sch->channel_prog = 0x0;
827 sch->last_cmd_valid = false;
828 s->dstat = 0;
829 s->cstat = 0;
830 ret = 0;
831
832 out:
833 return ret;
834 }
835
836 int css_do_csch(SubchDev *sch)
837 {
838 SCSW *s = &sch->curr_status.scsw;
839 PMCW *p = &sch->curr_status.pmcw;
840 int ret;
841
842 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
843 ret = -ENODEV;
844 goto out;
845 }
846
847 /* Trigger the clear function. */
848 s->ctrl &= ~(SCSW_CTRL_MASK_FCTL | SCSW_CTRL_MASK_ACTL);
849 s->ctrl |= SCSW_FCTL_CLEAR_FUNC | SCSW_ACTL_CLEAR_PEND;
850
851 do_subchannel_work(sch, NULL);
852 ret = 0;
853
854 out:
855 return ret;
856 }
857
858 int css_do_hsch(SubchDev *sch)
859 {
860 SCSW *s = &sch->curr_status.scsw;
861 PMCW *p = &sch->curr_status.pmcw;
862 int ret;
863
864 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
865 ret = -ENODEV;
866 goto out;
867 }
868
869 if (((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_STATUS_PEND) ||
870 (s->ctrl & (SCSW_STCTL_PRIMARY |
871 SCSW_STCTL_SECONDARY |
872 SCSW_STCTL_ALERT))) {
873 ret = -EINPROGRESS;
874 goto out;
875 }
876
877 if (s->ctrl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) {
878 ret = -EBUSY;
879 goto out;
880 }
881
882 /* Trigger the halt function. */
883 s->ctrl |= SCSW_FCTL_HALT_FUNC;
884 s->ctrl &= ~SCSW_FCTL_START_FUNC;
885 if (((s->ctrl & SCSW_CTRL_MASK_ACTL) ==
886 (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) &&
887 ((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_INTERMEDIATE)) {
888 s->ctrl &= ~SCSW_STCTL_STATUS_PEND;
889 }
890 s->ctrl |= SCSW_ACTL_HALT_PEND;
891
892 do_subchannel_work(sch, NULL);
893 ret = 0;
894
895 out:
896 return ret;
897 }
898
899 static void css_update_chnmon(SubchDev *sch)
900 {
901 if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_MME)) {
902 /* Not active. */
903 return;
904 }
905 /* The counter is conveniently located at the beginning of the struct. */
906 if (sch->curr_status.pmcw.chars & PMCW_CHARS_MASK_MBFC) {
907 /* Format 1, per-subchannel area. */
908 uint32_t count;
909
910 count = address_space_ldl(&address_space_memory,
911 sch->curr_status.mba,
912 MEMTXATTRS_UNSPECIFIED,
913 NULL);
914 count++;
915 address_space_stl(&address_space_memory, sch->curr_status.mba, count,
916 MEMTXATTRS_UNSPECIFIED, NULL);
917 } else {
918 /* Format 0, global area. */
919 uint32_t offset;
920 uint16_t count;
921
922 offset = sch->curr_status.pmcw.mbi << 5;
923 count = address_space_lduw(&address_space_memory,
924 channel_subsys.chnmon_area + offset,
925 MEMTXATTRS_UNSPECIFIED,
926 NULL);
927 count++;
928 address_space_stw(&address_space_memory,
929 channel_subsys.chnmon_area + offset, count,
930 MEMTXATTRS_UNSPECIFIED, NULL);
931 }
932 }
933
934 int css_do_ssch(SubchDev *sch, ORB *orb)
935 {
936 SCSW *s = &sch->curr_status.scsw;
937 PMCW *p = &sch->curr_status.pmcw;
938 int ret;
939
940 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
941 ret = -ENODEV;
942 goto out;
943 }
944
945 if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
946 ret = -EINPROGRESS;
947 goto out;
948 }
949
950 if (s->ctrl & (SCSW_FCTL_START_FUNC |
951 SCSW_FCTL_HALT_FUNC |
952 SCSW_FCTL_CLEAR_FUNC)) {
953 ret = -EBUSY;
954 goto out;
955 }
956
957 /* If monitoring is active, update counter. */
958 if (channel_subsys.chnmon_active) {
959 css_update_chnmon(sch);
960 }
961 sch->channel_prog = orb->cpa;
962 /* Trigger the start function. */
963 s->ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND);
964 s->flags &= ~SCSW_FLAGS_MASK_PNO;
965
966 do_subchannel_work(sch, orb);
967 ret = 0;
968
969 out:
970 return ret;
971 }
972
973 static void copy_irb_to_guest(IRB *dest, const IRB *src, PMCW *pmcw,
974 int *irb_len)
975 {
976 int i;
977 uint16_t stctl = src->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
978 uint16_t actl = src->scsw.ctrl & SCSW_CTRL_MASK_ACTL;
979
980 copy_scsw_to_guest(&dest->scsw, &src->scsw);
981
982 for (i = 0; i < ARRAY_SIZE(dest->esw); i++) {
983 dest->esw[i] = cpu_to_be32(src->esw[i]);
984 }
985 for (i = 0; i < ARRAY_SIZE(dest->ecw); i++) {
986 dest->ecw[i] = cpu_to_be32(src->ecw[i]);
987 }
988 *irb_len = sizeof(*dest) - sizeof(dest->emw);
989
990 /* extended measurements enabled? */
991 if ((src->scsw.flags & SCSW_FLAGS_MASK_ESWF) ||
992 !(pmcw->flags & PMCW_FLAGS_MASK_TF) ||
993 !(pmcw->chars & PMCW_CHARS_MASK_XMWME)) {
994 return;
995 }
996 /* extended measurements pending? */
997 if (!(stctl & SCSW_STCTL_STATUS_PEND)) {
998 return;
999 }
1000 if ((stctl & SCSW_STCTL_PRIMARY) ||
1001 (stctl == SCSW_STCTL_SECONDARY) ||
1002 ((stctl & SCSW_STCTL_INTERMEDIATE) && (actl & SCSW_ACTL_SUSP))) {
1003 for (i = 0; i < ARRAY_SIZE(dest->emw); i++) {
1004 dest->emw[i] = cpu_to_be32(src->emw[i]);
1005 }
1006 }
1007 *irb_len = sizeof(*dest);
1008 }
1009
1010 int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len)
1011 {
1012 SCSW *s = &sch->curr_status.scsw;
1013 PMCW *p = &sch->curr_status.pmcw;
1014 uint16_t stctl;
1015 IRB irb;
1016
1017 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1018 return 3;
1019 }
1020
1021 stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
1022
1023 /* Prepare the irb for the guest. */
1024 memset(&irb, 0, sizeof(IRB));
1025
1026 /* Copy scsw from current status. */
1027 memcpy(&irb.scsw, s, sizeof(SCSW));
1028 if (stctl & SCSW_STCTL_STATUS_PEND) {
1029 if (s->cstat & (SCSW_CSTAT_DATA_CHECK |
1030 SCSW_CSTAT_CHN_CTRL_CHK |
1031 SCSW_CSTAT_INTF_CTRL_CHK)) {
1032 irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF;
1033 irb.esw[0] = 0x04804000;
1034 } else {
1035 irb.esw[0] = 0x00800000;
1036 }
1037 /* If a unit check is pending, copy sense data. */
1038 if ((s->dstat & SCSW_DSTAT_UNIT_CHECK) &&
1039 (p->chars & PMCW_CHARS_MASK_CSENSE)) {
1040 int i;
1041
1042 irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
1043 /* Attention: sense_data is already BE! */
1044 memcpy(irb.ecw, sch->sense_data, sizeof(sch->sense_data));
1045 for (i = 0; i < ARRAY_SIZE(irb.ecw); i++) {
1046 irb.ecw[i] = be32_to_cpu(irb.ecw[i]);
1047 }
1048 irb.esw[1] = 0x01000000 | (sizeof(sch->sense_data) << 8);
1049 }
1050 }
1051 /* Store the irb to the guest. */
1052 copy_irb_to_guest(target_irb, &irb, p, irb_len);
1053
1054 return ((stctl & SCSW_STCTL_STATUS_PEND) == 0);
1055 }
1056
1057 void css_do_tsch_update_subch(SubchDev *sch)
1058 {
1059 SCSW *s = &sch->curr_status.scsw;
1060 PMCW *p = &sch->curr_status.pmcw;
1061 uint16_t stctl;
1062 uint16_t fctl;
1063 uint16_t actl;
1064
1065 stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
1066 fctl = s->ctrl & SCSW_CTRL_MASK_FCTL;
1067 actl = s->ctrl & SCSW_CTRL_MASK_ACTL;
1068
1069 /* Clear conditions on subchannel, if applicable. */
1070 if (stctl & SCSW_STCTL_STATUS_PEND) {
1071 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
1072 if ((stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) ||
1073 ((fctl & SCSW_FCTL_HALT_FUNC) &&
1074 (actl & SCSW_ACTL_SUSP))) {
1075 s->ctrl &= ~SCSW_CTRL_MASK_FCTL;
1076 }
1077 if (stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) {
1078 s->flags &= ~SCSW_FLAGS_MASK_PNO;
1079 s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
1080 SCSW_ACTL_START_PEND |
1081 SCSW_ACTL_HALT_PEND |
1082 SCSW_ACTL_CLEAR_PEND |
1083 SCSW_ACTL_SUSP);
1084 } else {
1085 if ((actl & SCSW_ACTL_SUSP) &&
1086 (fctl & SCSW_FCTL_START_FUNC)) {
1087 s->flags &= ~SCSW_FLAGS_MASK_PNO;
1088 if (fctl & SCSW_FCTL_HALT_FUNC) {
1089 s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
1090 SCSW_ACTL_START_PEND |
1091 SCSW_ACTL_HALT_PEND |
1092 SCSW_ACTL_CLEAR_PEND |
1093 SCSW_ACTL_SUSP);
1094 } else {
1095 s->ctrl &= ~SCSW_ACTL_RESUME_PEND;
1096 }
1097 }
1098 }
1099 /* Clear pending sense data. */
1100 if (p->chars & PMCW_CHARS_MASK_CSENSE) {
1101 memset(sch->sense_data, 0 , sizeof(sch->sense_data));
1102 }
1103 }
1104 }
1105
1106 static void copy_crw_to_guest(CRW *dest, const CRW *src)
1107 {
1108 dest->flags = cpu_to_be16(src->flags);
1109 dest->rsid = cpu_to_be16(src->rsid);
1110 }
1111
1112 int css_do_stcrw(CRW *crw)
1113 {
1114 CrwContainer *crw_cont;
1115 int ret;
1116
1117 crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws);
1118 if (crw_cont) {
1119 QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
1120 copy_crw_to_guest(crw, &crw_cont->crw);
1121 g_free(crw_cont);
1122 ret = 0;
1123 } else {
1124 /* List was empty, turn crw machine checks on again. */
1125 memset(crw, 0, sizeof(*crw));
1126 channel_subsys.do_crw_mchk = true;
1127 ret = 1;
1128 }
1129
1130 return ret;
1131 }
1132
1133 static void copy_crw_from_guest(CRW *dest, const CRW *src)
1134 {
1135 dest->flags = be16_to_cpu(src->flags);
1136 dest->rsid = be16_to_cpu(src->rsid);
1137 }
1138
1139 void css_undo_stcrw(CRW *crw)
1140 {
1141 CrwContainer *crw_cont;
1142
1143 crw_cont = g_try_malloc0(sizeof(CrwContainer));
1144 if (!crw_cont) {
1145 channel_subsys.crws_lost = true;
1146 return;
1147 }
1148 copy_crw_from_guest(&crw_cont->crw, crw);
1149
1150 QTAILQ_INSERT_HEAD(&channel_subsys.pending_crws, crw_cont, sibling);
1151 }
1152
1153 int css_do_tpi(IOIntCode *int_code, int lowcore)
1154 {
1155 /* No pending interrupts for !KVM. */
1156 return 0;
1157 }
1158
1159 int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
1160 int rfmt, void *buf)
1161 {
1162 int i, desc_size;
1163 uint32_t words[8];
1164 uint32_t chpid_type_word;
1165 CssImage *css;
1166
1167 if (!m && !cssid) {
1168 css = channel_subsys.css[channel_subsys.default_cssid];
1169 } else {
1170 css = channel_subsys.css[cssid];
1171 }
1172 if (!css) {
1173 return 0;
1174 }
1175 desc_size = 0;
1176 for (i = f_chpid; i <= l_chpid; i++) {
1177 if (css->chpids[i].in_use) {
1178 chpid_type_word = 0x80000000 | (css->chpids[i].type << 8) | i;
1179 if (rfmt == 0) {
1180 words[0] = cpu_to_be32(chpid_type_word);
1181 words[1] = 0;
1182 memcpy(buf + desc_size, words, 8);
1183 desc_size += 8;
1184 } else if (rfmt == 1) {
1185 words[0] = cpu_to_be32(chpid_type_word);
1186 words[1] = 0;
1187 words[2] = 0;
1188 words[3] = 0;
1189 words[4] = 0;
1190 words[5] = 0;
1191 words[6] = 0;
1192 words[7] = 0;
1193 memcpy(buf + desc_size, words, 32);
1194 desc_size += 32;
1195 }
1196 }
1197 }
1198 return desc_size;
1199 }
1200
1201 void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo)
1202 {
1203 /* dct is currently ignored (not really meaningful for our devices) */
1204 /* TODO: Don't ignore mbk. */
1205 if (update && !channel_subsys.chnmon_active) {
1206 /* Enable measuring. */
1207 channel_subsys.chnmon_area = mbo;
1208 channel_subsys.chnmon_active = true;
1209 }
1210 if (!update && channel_subsys.chnmon_active) {
1211 /* Disable measuring. */
1212 channel_subsys.chnmon_area = 0;
1213 channel_subsys.chnmon_active = false;
1214 }
1215 }
1216
1217 int css_do_rsch(SubchDev *sch)
1218 {
1219 SCSW *s = &sch->curr_status.scsw;
1220 PMCW *p = &sch->curr_status.pmcw;
1221 int ret;
1222
1223 if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {
1224 ret = -ENODEV;
1225 goto out;
1226 }
1227
1228 if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
1229 ret = -EINPROGRESS;
1230 goto out;
1231 }
1232
1233 if (((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
1234 (s->ctrl & SCSW_ACTL_RESUME_PEND) ||
1235 (!(s->ctrl & SCSW_ACTL_SUSP))) {
1236 ret = -EINVAL;
1237 goto out;
1238 }
1239
1240 /* If monitoring is active, update counter. */
1241 if (channel_subsys.chnmon_active) {
1242 css_update_chnmon(sch);
1243 }
1244
1245 s->ctrl |= SCSW_ACTL_RESUME_PEND;
1246 do_subchannel_work(sch, NULL);
1247 ret = 0;
1248
1249 out:
1250 return ret;
1251 }
1252
1253 int css_do_rchp(uint8_t cssid, uint8_t chpid)
1254 {
1255 uint8_t real_cssid;
1256
1257 if (cssid > channel_subsys.max_cssid) {
1258 return -EINVAL;
1259 }
1260 if (channel_subsys.max_cssid == 0) {
1261 real_cssid = channel_subsys.default_cssid;
1262 } else {
1263 real_cssid = cssid;
1264 }
1265 if (!channel_subsys.css[real_cssid]) {
1266 return -EINVAL;
1267 }
1268
1269 if (!channel_subsys.css[real_cssid]->chpids[chpid].in_use) {
1270 return -ENODEV;
1271 }
1272
1273 if (!channel_subsys.css[real_cssid]->chpids[chpid].is_virtual) {
1274 fprintf(stderr,
1275 "rchp unsupported for non-virtual chpid %x.%02x!\n",
1276 real_cssid, chpid);
1277 return -ENODEV;
1278 }
1279
1280 /* We don't really use a channel path, so we're done here. */
1281 css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT,
1282 channel_subsys.max_cssid > 0 ? 1 : 0, chpid);
1283 if (channel_subsys.max_cssid > 0) {
1284 css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 0, real_cssid << 8);
1285 }
1286 return 0;
1287 }
1288
1289 bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1290 {
1291 SubchSet *set;
1292 uint8_t real_cssid;
1293
1294 real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
1295 if (ssid > MAX_SSID ||
1296 !channel_subsys.css[real_cssid] ||
1297 !channel_subsys.css[real_cssid]->sch_set[ssid]) {
1298 return true;
1299 }
1300 set = channel_subsys.css[real_cssid]->sch_set[ssid];
1301 return schid > find_last_bit(set->schids_used,
1302 (MAX_SCHID + 1) / sizeof(unsigned long));
1303 }
1304
1305 static int css_add_virtual_chpid(uint8_t cssid, uint8_t chpid, uint8_t type)
1306 {
1307 CssImage *css;
1308
1309 trace_css_chpid_add(cssid, chpid, type);
1310 css = channel_subsys.css[cssid];
1311 if (!css) {
1312 return -EINVAL;
1313 }
1314 if (css->chpids[chpid].in_use) {
1315 return -EEXIST;
1316 }
1317 css->chpids[chpid].in_use = 1;
1318 css->chpids[chpid].type = type;
1319 css->chpids[chpid].is_virtual = 1;
1320
1321 css_generate_chp_crws(cssid, chpid);
1322
1323 return 0;
1324 }
1325
1326 void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type)
1327 {
1328 PMCW *p = &sch->curr_status.pmcw;
1329 SCSW *s = &sch->curr_status.scsw;
1330 int i;
1331 CssImage *css = channel_subsys.css[sch->cssid];
1332
1333 assert(css != NULL);
1334 memset(p, 0, sizeof(PMCW));
1335 p->flags |= PMCW_FLAGS_MASK_DNV;
1336 p->devno = sch->devno;
1337 /* single path */
1338 p->pim = 0x80;
1339 p->pom = 0xff;
1340 p->pam = 0x80;
1341 p->chpid[0] = chpid;
1342 if (!css->chpids[chpid].in_use) {
1343 css_add_virtual_chpid(sch->cssid, chpid, type);
1344 }
1345
1346 memset(s, 0, sizeof(SCSW));
1347 sch->curr_status.mba = 0;
1348 for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) {
1349 sch->curr_status.mda[i] = 0;
1350 }
1351 }
1352
1353 SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1354 {
1355 uint8_t real_cssid;
1356
1357 real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
1358
1359 if (!channel_subsys.css[real_cssid]) {
1360 return NULL;
1361 }
1362
1363 if (!channel_subsys.css[real_cssid]->sch_set[ssid]) {
1364 return NULL;
1365 }
1366
1367 return channel_subsys.css[real_cssid]->sch_set[ssid]->sch[schid];
1368 }
1369
1370 /**
1371 * Return free device number in subchannel set.
1372 *
1373 * Return index of the first free device number in the subchannel set
1374 * identified by @p cssid and @p ssid, beginning the search at @p
1375 * start and wrapping around at MAX_DEVNO. Return a value exceeding
1376 * MAX_SCHID if there are no free device numbers in the subchannel
1377 * set.
1378 */
1379 static uint32_t css_find_free_devno(uint8_t cssid, uint8_t ssid,
1380 uint16_t start)
1381 {
1382 uint32_t round;
1383
1384 for (round = 0; round <= MAX_DEVNO; round++) {
1385 uint16_t devno = (start + round) % MAX_DEVNO;
1386
1387 if (!css_devno_used(cssid, ssid, devno)) {
1388 return devno;
1389 }
1390 }
1391 return MAX_DEVNO + 1;
1392 }
1393
1394 /**
1395 * Return first free subchannel (id) in subchannel set.
1396 *
1397 * Return index of the first free subchannel in the subchannel set
1398 * identified by @p cssid and @p ssid, if there is any. Return a value
1399 * exceeding MAX_SCHID if there are no free subchannels in the
1400 * subchannel set.
1401 */
1402 static uint32_t css_find_free_subch(uint8_t cssid, uint8_t ssid)
1403 {
1404 uint32_t schid;
1405
1406 for (schid = 0; schid <= MAX_SCHID; schid++) {
1407 if (!css_find_subch(1, cssid, ssid, schid)) {
1408 return schid;
1409 }
1410 }
1411 return MAX_SCHID + 1;
1412 }
1413
1414 /**
1415 * Return first free subchannel (id) in subchannel set for a device number
1416 *
1417 * Verify the device number @p devno is not used yet in the subchannel
1418 * set identified by @p cssid and @p ssid. Set @p schid to the index
1419 * of the first free subchannel in the subchannel set, if there is
1420 * any. Return true if everything succeeded and false otherwise.
1421 */
1422 static bool css_find_free_subch_for_devno(uint8_t cssid, uint8_t ssid,
1423 uint16_t devno, uint16_t *schid,
1424 Error **errp)
1425 {
1426 uint32_t free_schid;
1427
1428 assert(schid);
1429 if (css_devno_used(cssid, ssid, devno)) {
1430 error_setg(errp, "Device %x.%x.%04x already exists",
1431 cssid, ssid, devno);
1432 return false;
1433 }
1434 free_schid = css_find_free_subch(cssid, ssid);
1435 if (free_schid > MAX_SCHID) {
1436 error_setg(errp, "No free subchannel found for %x.%x.%04x",
1437 cssid, ssid, devno);
1438 return false;
1439 }
1440 *schid = free_schid;
1441 return true;
1442 }
1443
1444 /**
1445 * Return first free subchannel (id) and device number
1446 *
1447 * Locate the first free subchannel and first free device number in
1448 * any of the subchannel sets of the channel subsystem identified by
1449 * @p cssid. Return false if no free subchannel / device number could
1450 * be found. Otherwise set @p ssid, @p devno and @p schid to identify
1451 * the available subchannel and device number and return true.
1452 *
1453 * May modify @p ssid, @p devno and / or @p schid even if no free
1454 * subchannel / device number could be found.
1455 */
1456 static bool css_find_free_subch_and_devno(uint8_t cssid, uint8_t *ssid,
1457 uint16_t *devno, uint16_t *schid,
1458 Error **errp)
1459 {
1460 uint32_t free_schid, free_devno;
1461
1462 assert(ssid && devno && schid);
1463 for (*ssid = 0; *ssid <= MAX_SSID; (*ssid)++) {
1464 free_schid = css_find_free_subch(cssid, *ssid);
1465 if (free_schid > MAX_SCHID) {
1466 continue;
1467 }
1468 free_devno = css_find_free_devno(cssid, *ssid, free_schid);
1469 if (free_devno > MAX_DEVNO) {
1470 continue;
1471 }
1472 *schid = free_schid;
1473 *devno = free_devno;
1474 return true;
1475 }
1476 error_setg(errp, "Virtual channel subsystem is full!");
1477 return false;
1478 }
1479
1480 bool css_subch_visible(SubchDev *sch)
1481 {
1482 if (sch->ssid > channel_subsys.max_ssid) {
1483 return false;
1484 }
1485
1486 if (sch->cssid != channel_subsys.default_cssid) {
1487 return (channel_subsys.max_cssid > 0);
1488 }
1489
1490 return true;
1491 }
1492
1493 bool css_present(uint8_t cssid)
1494 {
1495 return (channel_subsys.css[cssid] != NULL);
1496 }
1497
1498 bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno)
1499 {
1500 if (!channel_subsys.css[cssid]) {
1501 return false;
1502 }
1503 if (!channel_subsys.css[cssid]->sch_set[ssid]) {
1504 return false;
1505 }
1506
1507 return !!test_bit(devno,
1508 channel_subsys.css[cssid]->sch_set[ssid]->devnos_used);
1509 }
1510
1511 void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid,
1512 uint16_t devno, SubchDev *sch)
1513 {
1514 CssImage *css;
1515 SubchSet *s_set;
1516
1517 trace_css_assign_subch(sch ? "assign" : "deassign", cssid, ssid, schid,
1518 devno);
1519 if (!channel_subsys.css[cssid]) {
1520 fprintf(stderr,
1521 "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n",
1522 __func__, cssid, ssid, schid);
1523 return;
1524 }
1525 css = channel_subsys.css[cssid];
1526
1527 if (!css->sch_set[ssid]) {
1528 css->sch_set[ssid] = g_malloc0(sizeof(SubchSet));
1529 }
1530 s_set = css->sch_set[ssid];
1531
1532 s_set->sch[schid] = sch;
1533 if (sch) {
1534 set_bit(schid, s_set->schids_used);
1535 set_bit(devno, s_set->devnos_used);
1536 } else {
1537 clear_bit(schid, s_set->schids_used);
1538 clear_bit(devno, s_set->devnos_used);
1539 }
1540 }
1541
1542 void css_queue_crw(uint8_t rsc, uint8_t erc, int chain, uint16_t rsid)
1543 {
1544 CrwContainer *crw_cont;
1545
1546 trace_css_crw(rsc, erc, rsid, chain ? "(chained)" : "");
1547 /* TODO: Maybe use a static crw pool? */
1548 crw_cont = g_try_malloc0(sizeof(CrwContainer));
1549 if (!crw_cont) {
1550 channel_subsys.crws_lost = true;
1551 return;
1552 }
1553 crw_cont->crw.flags = (rsc << 8) | erc;
1554 if (chain) {
1555 crw_cont->crw.flags |= CRW_FLAGS_MASK_C;
1556 }
1557 crw_cont->crw.rsid = rsid;
1558 if (channel_subsys.crws_lost) {
1559 crw_cont->crw.flags |= CRW_FLAGS_MASK_R;
1560 channel_subsys.crws_lost = false;
1561 }
1562
1563 QTAILQ_INSERT_TAIL(&channel_subsys.pending_crws, crw_cont, sibling);
1564
1565 if (channel_subsys.do_crw_mchk) {
1566 channel_subsys.do_crw_mchk = false;
1567 /* Inject crw pending machine check. */
1568 s390_crw_mchk();
1569 }
1570 }
1571
1572 void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid,
1573 int hotplugged, int add)
1574 {
1575 uint8_t guest_cssid;
1576 bool chain_crw;
1577
1578 if (add && !hotplugged) {
1579 return;
1580 }
1581 if (channel_subsys.max_cssid == 0) {
1582 /* Default cssid shows up as 0. */
1583 guest_cssid = (cssid == channel_subsys.default_cssid) ? 0 : cssid;
1584 } else {
1585 /* Show real cssid to the guest. */
1586 guest_cssid = cssid;
1587 }
1588 /*
1589 * Only notify for higher subchannel sets/channel subsystems if the
1590 * guest has enabled it.
1591 */
1592 if ((ssid > channel_subsys.max_ssid) ||
1593 (guest_cssid > channel_subsys.max_cssid) ||
1594 ((channel_subsys.max_cssid == 0) &&
1595 (cssid != channel_subsys.default_cssid))) {
1596 return;
1597 }
1598 chain_crw = (channel_subsys.max_ssid > 0) ||
1599 (channel_subsys.max_cssid > 0);
1600 css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, chain_crw ? 1 : 0, schid);
1601 if (chain_crw) {
1602 css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, 0,
1603 (guest_cssid << 8) | (ssid << 4));
1604 }
1605 /* RW_ERC_IPI --> clear pending interrupts */
1606 css_clear_io_interrupt(css_do_build_subchannel_id(cssid, ssid), schid);
1607 }
1608
1609 void css_generate_chp_crws(uint8_t cssid, uint8_t chpid)
1610 {
1611 /* TODO */
1612 }
1613
1614 void css_generate_css_crws(uint8_t cssid)
1615 {
1616 if (!channel_subsys.sei_pending) {
1617 css_queue_crw(CRW_RSC_CSS, 0, 0, cssid);
1618 }
1619 channel_subsys.sei_pending = true;
1620 }
1621
1622 void css_clear_sei_pending(void)
1623 {
1624 channel_subsys.sei_pending = false;
1625 }
1626
1627 int css_enable_mcsse(void)
1628 {
1629 trace_css_enable_facility("mcsse");
1630 channel_subsys.max_cssid = MAX_CSSID;
1631 return 0;
1632 }
1633
1634 int css_enable_mss(void)
1635 {
1636 trace_css_enable_facility("mss");
1637 channel_subsys.max_ssid = MAX_SSID;
1638 return 0;
1639 }
1640
1641 void subch_device_save(SubchDev *s, QEMUFile *f)
1642 {
1643 int i;
1644
1645 qemu_put_byte(f, s->cssid);
1646 qemu_put_byte(f, s->ssid);
1647 qemu_put_be16(f, s->schid);
1648 qemu_put_be16(f, s->devno);
1649 qemu_put_byte(f, s->thinint_active);
1650 /* SCHIB */
1651 /* PMCW */
1652 qemu_put_be32(f, s->curr_status.pmcw.intparm);
1653 qemu_put_be16(f, s->curr_status.pmcw.flags);
1654 qemu_put_be16(f, s->curr_status.pmcw.devno);
1655 qemu_put_byte(f, s->curr_status.pmcw.lpm);
1656 qemu_put_byte(f, s->curr_status.pmcw.pnom);
1657 qemu_put_byte(f, s->curr_status.pmcw.lpum);
1658 qemu_put_byte(f, s->curr_status.pmcw.pim);
1659 qemu_put_be16(f, s->curr_status.pmcw.mbi);
1660 qemu_put_byte(f, s->curr_status.pmcw.pom);
1661 qemu_put_byte(f, s->curr_status.pmcw.pam);
1662 qemu_put_buffer(f, s->curr_status.pmcw.chpid, 8);
1663 qemu_put_be32(f, s->curr_status.pmcw.chars);
1664 /* SCSW */
1665 qemu_put_be16(f, s->curr_status.scsw.flags);
1666 qemu_put_be16(f, s->curr_status.scsw.ctrl);
1667 qemu_put_be32(f, s->curr_status.scsw.cpa);
1668 qemu_put_byte(f, s->curr_status.scsw.dstat);
1669 qemu_put_byte(f, s->curr_status.scsw.cstat);
1670 qemu_put_be16(f, s->curr_status.scsw.count);
1671 qemu_put_be64(f, s->curr_status.mba);
1672 qemu_put_buffer(f, s->curr_status.mda, 4);
1673 /* end SCHIB */
1674 qemu_put_buffer(f, s->sense_data, 32);
1675 qemu_put_be64(f, s->channel_prog);
1676 /* last cmd */
1677 qemu_put_byte(f, s->last_cmd.cmd_code);
1678 qemu_put_byte(f, s->last_cmd.flags);
1679 qemu_put_be16(f, s->last_cmd.count);
1680 qemu_put_be32(f, s->last_cmd.cda);
1681 qemu_put_byte(f, s->last_cmd_valid);
1682 qemu_put_byte(f, s->id.reserved);
1683 qemu_put_be16(f, s->id.cu_type);
1684 qemu_put_byte(f, s->id.cu_model);
1685 qemu_put_be16(f, s->id.dev_type);
1686 qemu_put_byte(f, s->id.dev_model);
1687 qemu_put_byte(f, s->id.unused);
1688 for (i = 0; i < ARRAY_SIZE(s->id.ciw); i++) {
1689 qemu_put_byte(f, s->id.ciw[i].type);
1690 qemu_put_byte(f, s->id.ciw[i].command);
1691 qemu_put_be16(f, s->id.ciw[i].count);
1692 }
1693 qemu_put_byte(f, s->ccw_fmt_1);
1694 qemu_put_byte(f, s->ccw_no_data_cnt);
1695 }
1696
1697 int subch_device_load(SubchDev *s, QEMUFile *f)
1698 {
1699 SubchDev *old_s;
1700 uint16_t old_schid = s->schid;
1701 int i;
1702
1703 s->cssid = qemu_get_byte(f);
1704 s->ssid = qemu_get_byte(f);
1705 s->schid = qemu_get_be16(f);
1706 s->devno = qemu_get_be16(f);
1707 /* Re-assign subch. */
1708 if (old_schid != s->schid) {
1709 old_s = channel_subsys.css[s->cssid]->sch_set[s->ssid]->sch[old_schid];
1710 /*
1711 * (old_s != s) means that some other device has its correct
1712 * subchannel already assigned (in load).
1713 */
1714 if (old_s == s) {
1715 css_subch_assign(s->cssid, s->ssid, old_schid, s->devno, NULL);
1716 }
1717 /* It's OK to re-assign without a prior de-assign. */
1718 css_subch_assign(s->cssid, s->ssid, s->schid, s->devno, s);
1719 }
1720 s->thinint_active = qemu_get_byte(f);
1721 /* SCHIB */
1722 /* PMCW */
1723 s->curr_status.pmcw.intparm = qemu_get_be32(f);
1724 s->curr_status.pmcw.flags = qemu_get_be16(f);
1725 s->curr_status.pmcw.devno = qemu_get_be16(f);
1726 s->curr_status.pmcw.lpm = qemu_get_byte(f);
1727 s->curr_status.pmcw.pnom = qemu_get_byte(f);
1728 s->curr_status.pmcw.lpum = qemu_get_byte(f);
1729 s->curr_status.pmcw.pim = qemu_get_byte(f);
1730 s->curr_status.pmcw.mbi = qemu_get_be16(f);
1731 s->curr_status.pmcw.pom = qemu_get_byte(f);
1732 s->curr_status.pmcw.pam = qemu_get_byte(f);
1733 qemu_get_buffer(f, s->curr_status.pmcw.chpid, 8);
1734 s->curr_status.pmcw.chars = qemu_get_be32(f);
1735 /* SCSW */
1736 s->curr_status.scsw.flags = qemu_get_be16(f);
1737 s->curr_status.scsw.ctrl = qemu_get_be16(f);
1738 s->curr_status.scsw.cpa = qemu_get_be32(f);
1739 s->curr_status.scsw.dstat = qemu_get_byte(f);
1740 s->curr_status.scsw.cstat = qemu_get_byte(f);
1741 s->curr_status.scsw.count = qemu_get_be16(f);
1742 s->curr_status.mba = qemu_get_be64(f);
1743 qemu_get_buffer(f, s->curr_status.mda, 4);
1744 /* end SCHIB */
1745 qemu_get_buffer(f, s->sense_data, 32);
1746 s->channel_prog = qemu_get_be64(f);
1747 /* last cmd */
1748 s->last_cmd.cmd_code = qemu_get_byte(f);
1749 s->last_cmd.flags = qemu_get_byte(f);
1750 s->last_cmd.count = qemu_get_be16(f);
1751 s->last_cmd.cda = qemu_get_be32(f);
1752 s->last_cmd_valid = qemu_get_byte(f);
1753 s->id.reserved = qemu_get_byte(f);
1754 s->id.cu_type = qemu_get_be16(f);
1755 s->id.cu_model = qemu_get_byte(f);
1756 s->id.dev_type = qemu_get_be16(f);
1757 s->id.dev_model = qemu_get_byte(f);
1758 s->id.unused = qemu_get_byte(f);
1759 for (i = 0; i < ARRAY_SIZE(s->id.ciw); i++) {
1760 s->id.ciw[i].type = qemu_get_byte(f);
1761 s->id.ciw[i].command = qemu_get_byte(f);
1762 s->id.ciw[i].count = qemu_get_be16(f);
1763 }
1764 s->ccw_fmt_1 = qemu_get_byte(f);
1765 s->ccw_no_data_cnt = qemu_get_byte(f);
1766 /*
1767 * Hack alert. We don't migrate the channel subsystem status (no
1768 * device!), but we need to find out if the guest enabled mss/mcss-e.
1769 * If the subchannel is enabled, it certainly was able to access it,
1770 * so adjust the max_ssid/max_cssid values for relevant ssid/cssid
1771 * values. This is not watertight, but better than nothing.
1772 */
1773 if (s->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ENA) {
1774 if (s->ssid) {
1775 channel_subsys.max_ssid = MAX_SSID;
1776 }
1777 if (s->cssid != channel_subsys.default_cssid) {
1778 channel_subsys.max_cssid = MAX_CSSID;
1779 }
1780 }
1781 return 0;
1782 }
1783
1784 void css_reset_sch(SubchDev *sch)
1785 {
1786 PMCW *p = &sch->curr_status.pmcw;
1787
1788 if ((p->flags & PMCW_FLAGS_MASK_ENA) != 0 && sch->disable_cb) {
1789 sch->disable_cb(sch);
1790 }
1791
1792 p->intparm = 0;
1793 p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
1794 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
1795 PMCW_FLAGS_MASK_MP | PMCW_FLAGS_MASK_TF);
1796 p->flags |= PMCW_FLAGS_MASK_DNV;
1797 p->devno = sch->devno;
1798 p->pim = 0x80;
1799 p->lpm = p->pim;
1800 p->pnom = 0;
1801 p->lpum = 0;
1802 p->mbi = 0;
1803 p->pom = 0xff;
1804 p->pam = 0x80;
1805 p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_XMWME |
1806 PMCW_CHARS_MASK_CSENSE);
1807
1808 memset(&sch->curr_status.scsw, 0, sizeof(sch->curr_status.scsw));
1809 sch->curr_status.mba = 0;
1810
1811 sch->channel_prog = 0x0;
1812 sch->last_cmd_valid = false;
1813 sch->thinint_active = false;
1814 }
1815
1816 void css_reset(void)
1817 {
1818 CrwContainer *crw_cont;
1819
1820 /* Clean up monitoring. */
1821 channel_subsys.chnmon_active = false;
1822 channel_subsys.chnmon_area = 0;
1823
1824 /* Clear pending CRWs. */
1825 while ((crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws))) {
1826 QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
1827 g_free(crw_cont);
1828 }
1829 channel_subsys.sei_pending = false;
1830 channel_subsys.do_crw_mchk = true;
1831 channel_subsys.crws_lost = false;
1832
1833 /* Reset maximum ids. */
1834 channel_subsys.max_cssid = 0;
1835 channel_subsys.max_ssid = 0;
1836 }
1837
1838 static void get_css_devid(Object *obj, Visitor *v, const char *name,
1839 void *opaque, Error **errp)
1840 {
1841 DeviceState *dev = DEVICE(obj);
1842 Property *prop = opaque;
1843 CssDevId *dev_id = qdev_get_prop_ptr(dev, prop);
1844 char buffer[] = "xx.x.xxxx";
1845 char *p = buffer;
1846 int r;
1847
1848 if (dev_id->valid) {
1849
1850 r = snprintf(buffer, sizeof(buffer), "%02x.%1x.%04x", dev_id->cssid,
1851 dev_id->ssid, dev_id->devid);
1852 assert(r == sizeof(buffer) - 1);
1853
1854 /* drop leading zero */
1855 if (dev_id->cssid <= 0xf) {
1856 p++;
1857 }
1858 } else {
1859 snprintf(buffer, sizeof(buffer), "<unset>");
1860 }
1861
1862 visit_type_str(v, name, &p, errp);
1863 }
1864
1865 /*
1866 * parse <cssid>.<ssid>.<devid> and assert valid range for cssid/ssid
1867 */
1868 static void set_css_devid(Object *obj, Visitor *v, const char *name,
1869 void *opaque, Error **errp)
1870 {
1871 DeviceState *dev = DEVICE(obj);
1872 Property *prop = opaque;
1873 CssDevId *dev_id = qdev_get_prop_ptr(dev, prop);
1874 Error *local_err = NULL;
1875 char *str;
1876 int num, n1, n2;
1877 unsigned int cssid, ssid, devid;
1878
1879 if (dev->realized) {
1880 qdev_prop_set_after_realize(dev, name, errp);
1881 return;
1882 }
1883
1884 visit_type_str(v, name, &str, &local_err);
1885 if (local_err) {
1886 error_propagate(errp, local_err);
1887 return;
1888 }
1889
1890 num = sscanf(str, "%2x.%1x%n.%4x%n", &cssid, &ssid, &n1, &devid, &n2);
1891 if (num != 3 || (n2 - n1) != 5 || strlen(str) != n2) {
1892 error_set_from_qdev_prop_error(errp, EINVAL, dev, prop, str);
1893 goto out;
1894 }
1895 if ((cssid > MAX_CSSID) || (ssid > MAX_SSID)) {
1896 error_setg(errp, "Invalid cssid or ssid: cssid %x, ssid %x",
1897 cssid, ssid);
1898 goto out;
1899 }
1900
1901 dev_id->cssid = cssid;
1902 dev_id->ssid = ssid;
1903 dev_id->devid = devid;
1904 dev_id->valid = true;
1905
1906 out:
1907 g_free(str);
1908 }
1909
1910 PropertyInfo css_devid_propinfo = {
1911 .name = "str",
1912 .description = "Identifier of an I/O device in the channel "
1913 "subsystem, example: fe.1.23ab",
1914 .get = get_css_devid,
1915 .set = set_css_devid,
1916 };
1917
1918 PropertyInfo css_devid_ro_propinfo = {
1919 .name = "str",
1920 .description = "Read-only identifier of an I/O device in the channel "
1921 "subsystem, example: fe.1.23ab",
1922 .get = get_css_devid,
1923 };
1924
1925 SubchDev *css_create_virtual_sch(CssDevId bus_id, Error **errp)
1926 {
1927 uint16_t schid = 0;
1928 SubchDev *sch;
1929
1930 if (bus_id.valid) {
1931 /* Enforce use of virtual cssid. */
1932 if (bus_id.cssid != VIRTUAL_CSSID) {
1933 error_setg(errp, "cssid %hhx not valid for virtual devices",
1934 bus_id.cssid);
1935 return NULL;
1936 }
1937 if (!css_find_free_subch_for_devno(bus_id.cssid, bus_id.ssid,
1938 bus_id.devid, &schid, errp)) {
1939 return NULL;
1940 }
1941 } else {
1942 bus_id.cssid = VIRTUAL_CSSID;
1943 if (!css_find_free_subch_and_devno(bus_id.cssid, &bus_id.ssid,
1944 &bus_id.devid, &schid, errp)) {
1945 return NULL;
1946 }
1947 }
1948
1949 sch = g_malloc0(sizeof(*sch));
1950 sch->cssid = bus_id.cssid;
1951 sch->ssid = bus_id.ssid;
1952 sch->devno = bus_id.devid;
1953 sch->schid = schid;
1954 css_subch_assign(sch->cssid, sch->ssid, schid, sch->devno, sch);
1955 return sch;
1956 }
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