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tpm: mark correct memory region range dirty when clearing RAM
[qemu/kevin.git] / softmmu / memory.c
blobdb182e5d3da74cc3ce314bb18cc168c362022d5b
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qemu/log.h"
18 #include "qapi/error.h"
19 #include "exec/memory.h"
20 #include "qapi/visitor.h"
21 #include "qemu/bitops.h"
22 #include "qemu/error-report.h"
23 #include "qemu/main-loop.h"
24 #include "qemu/qemu-print.h"
25 #include "qom/object.h"
26 #include "trace.h"
27
28 #include "exec/memory-internal.h"
29 #include "exec/ram_addr.h"
30 #include "sysemu/kvm.h"
31 #include "sysemu/runstate.h"
32 #include "sysemu/tcg.h"
33 #include "qemu/accel.h"
34 #include "hw/boards.h"
35 #include "migration/vmstate.h"
36
37 //#define DEBUG_UNASSIGNED
38
39 static unsigned memory_region_transaction_depth;
40 static bool memory_region_update_pending;
41 static bool ioeventfd_update_pending;
42 bool global_dirty_log;
43
44 static QTAILQ_HEAD(, MemoryListener) memory_listeners
45 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
46
47 static QTAILQ_HEAD(, AddressSpace) address_spaces
48 = QTAILQ_HEAD_INITIALIZER(address_spaces);
49
50 static GHashTable *flat_views;
51
52 typedef struct AddrRange AddrRange;
53
54 /*
55 * Note that signed integers are needed for negative offsetting in aliases
56 * (large MemoryRegion::alias_offset).
57 */
58 struct AddrRange {
59 Int128 start;
60 Int128 size;
61 };
62
63 static AddrRange addrrange_make(Int128 start, Int128 size)
64 {
65 return (AddrRange) { start, size };
66 }
67
68 static bool addrrange_equal(AddrRange r1, AddrRange r2)
69 {
70 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
71 }
72
73 static Int128 addrrange_end(AddrRange r)
74 {
75 return int128_add(r.start, r.size);
76 }
77
78 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
79 {
80 int128_addto(&range.start, delta);
81 return range;
82 }
83
84 static bool addrrange_contains(AddrRange range, Int128 addr)
85 {
86 return int128_ge(addr, range.start)
87 && int128_lt(addr, addrrange_end(range));
88 }
89
90 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
91 {
92 return addrrange_contains(r1, r2.start)
93 || addrrange_contains(r2, r1.start);
94 }
95
96 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
97 {
98 Int128 start = int128_max(r1.start, r2.start);
99 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
100 return addrrange_make(start, int128_sub(end, start));
101 }
102
103 enum ListenerDirection { Forward, Reverse };
104
105 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
106 do { \
107 MemoryListener *_listener; \
108 \
109 switch (_direction) { \
110 case Forward: \
111 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
112 if (_listener->_callback) { \
113 _listener->_callback(_listener, ##_args); \
114 } \
115 } \
116 break; \
117 case Reverse: \
118 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
119 if (_listener->_callback) { \
120 _listener->_callback(_listener, ##_args); \
121 } \
122 } \
123 break; \
124 default: \
125 abort(); \
126 } \
127 } while (0)
128
129 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
130 do { \
131 MemoryListener *_listener; \
132 \
133 switch (_direction) { \
134 case Forward: \
135 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
136 if (_listener->_callback) { \
137 _listener->_callback(_listener, _section, ##_args); \
138 } \
139 } \
140 break; \
141 case Reverse: \
142 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
143 if (_listener->_callback) { \
144 _listener->_callback(_listener, _section, ##_args); \
145 } \
146 } \
147 break; \
148 default: \
149 abort(); \
150 } \
151 } while (0)
152
153 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
154 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
155 do { \
156 MemoryRegionSection mrs = section_from_flat_range(fr, \
157 address_space_to_flatview(as)); \
158 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
159 } while(0)
160
161 struct CoalescedMemoryRange {
162 AddrRange addr;
163 QTAILQ_ENTRY(CoalescedMemoryRange) link;
164 };
165
166 struct MemoryRegionIoeventfd {
167 AddrRange addr;
168 bool match_data;
169 uint64_t data;
170 EventNotifier *e;
171 };
172
173 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
174 MemoryRegionIoeventfd *b)
175 {
176 if (int128_lt(a->addr.start, b->addr.start)) {
177 return true;
178 } else if (int128_gt(a->addr.start, b->addr.start)) {
179 return false;
180 } else if (int128_lt(a->addr.size, b->addr.size)) {
181 return true;
182 } else if (int128_gt(a->addr.size, b->addr.size)) {
183 return false;
184 } else if (a->match_data < b->match_data) {
185 return true;
186 } else if (a->match_data > b->match_data) {
187 return false;
188 } else if (a->match_data) {
189 if (a->data < b->data) {
190 return true;
191 } else if (a->data > b->data) {
192 return false;
193 }
194 }
195 if (a->e < b->e) {
196 return true;
197 } else if (a->e > b->e) {
198 return false;
199 }
200 return false;
201 }
202
203 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
204 MemoryRegionIoeventfd *b)
205 {
206 if (int128_eq(a->addr.start, b->addr.start) &&
207 (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
208 (int128_eq(a->addr.size, b->addr.size) &&
209 (a->match_data == b->match_data) &&
210 ((a->match_data && (a->data == b->data)) || !a->match_data) &&
211 (a->e == b->e))))
212 return true;
213
214 return false;
215 }
216
217 /* Range of memory in the global map. Addresses are absolute. */
218 struct FlatRange {
219 MemoryRegion *mr;
220 hwaddr offset_in_region;
221 AddrRange addr;
222 uint8_t dirty_log_mask;
223 bool romd_mode;
224 bool readonly;
225 bool nonvolatile;
226 };
227
228 #define FOR_EACH_FLAT_RANGE(var, view) \
229 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
230
231 static inline MemoryRegionSection
232 section_from_flat_range(FlatRange *fr, FlatView *fv)
233 {
234 return (MemoryRegionSection) {
235 .mr = fr->mr,
236 .fv = fv,
237 .offset_within_region = fr->offset_in_region,
238 .size = fr->addr.size,
239 .offset_within_address_space = int128_get64(fr->addr.start),
240 .readonly = fr->readonly,
241 .nonvolatile = fr->nonvolatile,
242 };
243 }
244
245 static bool flatrange_equal(FlatRange *a, FlatRange *b)
246 {
247 return a->mr == b->mr
248 && addrrange_equal(a->addr, b->addr)
249 && a->offset_in_region == b->offset_in_region
250 && a->romd_mode == b->romd_mode
251 && a->readonly == b->readonly
252 && a->nonvolatile == b->nonvolatile;
253 }
254
255 static FlatView *flatview_new(MemoryRegion *mr_root)
256 {
257 FlatView *view;
258
259 view = g_new0(FlatView, 1);
260 view->ref = 1;
261 view->root = mr_root;
262 memory_region_ref(mr_root);
263 trace_flatview_new(view, mr_root);
264
265 return view;
266 }
267
268 /* Insert a range into a given position. Caller is responsible for maintaining
269 * sorting order.
270 */
271 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
272 {
273 if (view->nr == view->nr_allocated) {
274 view->nr_allocated = MAX(2 * view->nr, 10);
275 view->ranges = g_realloc(view->ranges,
276 view->nr_allocated * sizeof(*view->ranges));
277 }
278 memmove(view->ranges + pos + 1, view->ranges + pos,
279 (view->nr - pos) * sizeof(FlatRange));
280 view->ranges[pos] = *range;
281 memory_region_ref(range->mr);
282 ++view->nr;
283 }
284
285 static void flatview_destroy(FlatView *view)
286 {
287 int i;
288
289 trace_flatview_destroy(view, view->root);
290 if (view->dispatch) {
291 address_space_dispatch_free(view->dispatch);
292 }
293 for (i = 0; i < view->nr; i++) {
294 memory_region_unref(view->ranges[i].mr);
295 }
296 g_free(view->ranges);
297 memory_region_unref(view->root);
298 g_free(view);
299 }
300
301 static bool flatview_ref(FlatView *view)
302 {
303 return qatomic_fetch_inc_nonzero(&view->ref) > 0;
304 }
305
306 void flatview_unref(FlatView *view)
307 {
308 if (qatomic_fetch_dec(&view->ref) == 1) {
309 trace_flatview_destroy_rcu(view, view->root);
310 assert(view->root);
311 call_rcu(view, flatview_destroy, rcu);
312 }
313 }
314
315 static bool can_merge(FlatRange *r1, FlatRange *r2)
316 {
317 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
318 && r1->mr == r2->mr
319 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
320 r1->addr.size),
321 int128_make64(r2->offset_in_region))
322 && r1->dirty_log_mask == r2->dirty_log_mask
323 && r1->romd_mode == r2->romd_mode
324 && r1->readonly == r2->readonly
325 && r1->nonvolatile == r2->nonvolatile;
326 }
327
328 /* Attempt to simplify a view by merging adjacent ranges */
329 static void flatview_simplify(FlatView *view)
330 {
331 unsigned i, j, k;
332
333 i = 0;
334 while (i < view->nr) {
335 j = i + 1;
336 while (j < view->nr
337 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
338 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
339 ++j;
340 }
341 ++i;
342 for (k = i; k < j; k++) {
343 memory_region_unref(view->ranges[k].mr);
344 }
345 memmove(&view->ranges[i], &view->ranges[j],
346 (view->nr - j) * sizeof(view->ranges[j]));
347 view->nr -= j - i;
348 }
349 }
350
351 static bool memory_region_big_endian(MemoryRegion *mr)
352 {
353 #ifdef TARGET_WORDS_BIGENDIAN
354 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
355 #else
356 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
357 #endif
358 }
359
360 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
361 {
362 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
363 switch (op & MO_SIZE) {
364 case MO_8:
365 break;
366 case MO_16:
367 *data = bswap16(*data);
368 break;
369 case MO_32:
370 *data = bswap32(*data);
371 break;
372 case MO_64:
373 *data = bswap64(*data);
374 break;
375 default:
376 g_assert_not_reached();
377 }
378 }
379 }
380
381 static inline void memory_region_shift_read_access(uint64_t *value,
382 signed shift,
383 uint64_t mask,
384 uint64_t tmp)
385 {
386 if (shift >= 0) {
387 *value |= (tmp & mask) << shift;
388 } else {
389 *value |= (tmp & mask) >> -shift;
390 }
391 }
392
393 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
394 signed shift,
395 uint64_t mask)
396 {
397 uint64_t tmp;
398
399 if (shift >= 0) {
400 tmp = (*value >> shift) & mask;
401 } else {
402 tmp = (*value << -shift) & mask;
403 }
404
405 return tmp;
406 }
407
408 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
409 {
410 MemoryRegion *root;
411 hwaddr abs_addr = offset;
412
413 abs_addr += mr->addr;
414 for (root = mr; root->container; ) {
415 root = root->container;
416 abs_addr += root->addr;
417 }
418
419 return abs_addr;
420 }
421
422 static int get_cpu_index(void)
423 {
424 if (current_cpu) {
425 return current_cpu->cpu_index;
426 }
427 return -1;
428 }
429
430 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
431 hwaddr addr,
432 uint64_t *value,
433 unsigned size,
434 signed shift,
435 uint64_t mask,
436 MemTxAttrs attrs)
437 {
438 uint64_t tmp;
439
440 tmp = mr->ops->read(mr->opaque, addr, size);
441 if (mr->subpage) {
442 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
443 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
444 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
445 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
446 memory_region_name(mr));
447 }
448 memory_region_shift_read_access(value, shift, mask, tmp);
449 return MEMTX_OK;
450 }
451
452 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
453 hwaddr addr,
454 uint64_t *value,
455 unsigned size,
456 signed shift,
457 uint64_t mask,
458 MemTxAttrs attrs)
459 {
460 uint64_t tmp = 0;
461 MemTxResult r;
462
463 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
464 if (mr->subpage) {
465 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
466 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
467 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
468 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
469 memory_region_name(mr));
470 }
471 memory_region_shift_read_access(value, shift, mask, tmp);
472 return r;
473 }
474
475 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
476 hwaddr addr,
477 uint64_t *value,
478 unsigned size,
479 signed shift,
480 uint64_t mask,
481 MemTxAttrs attrs)
482 {
483 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
484
485 if (mr->subpage) {
486 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
487 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
488 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
489 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
490 memory_region_name(mr));
491 }
492 mr->ops->write(mr->opaque, addr, tmp, size);
493 return MEMTX_OK;
494 }
495
496 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
497 hwaddr addr,
498 uint64_t *value,
499 unsigned size,
500 signed shift,
501 uint64_t mask,
502 MemTxAttrs attrs)
503 {
504 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
505
506 if (mr->subpage) {
507 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
508 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
509 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
510 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
511 memory_region_name(mr));
512 }
513 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
514 }
515
516 static MemTxResult access_with_adjusted_size(hwaddr addr,
517 uint64_t *value,
518 unsigned size,
519 unsigned access_size_min,
520 unsigned access_size_max,
521 MemTxResult (*access_fn)
522 (MemoryRegion *mr,
523 hwaddr addr,
524 uint64_t *value,
525 unsigned size,
526 signed shift,
527 uint64_t mask,
528 MemTxAttrs attrs),
529 MemoryRegion *mr,
530 MemTxAttrs attrs)
531 {
532 uint64_t access_mask;
533 unsigned access_size;
534 unsigned i;
535 MemTxResult r = MEMTX_OK;
536
537 if (!access_size_min) {
538 access_size_min = 1;
539 }
540 if (!access_size_max) {
541 access_size_max = 4;
542 }
543
544 /* FIXME: support unaligned access? */
545 access_size = MAX(MIN(size, access_size_max), access_size_min);
546 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
547 if (memory_region_big_endian(mr)) {
548 for (i = 0; i < size; i += access_size) {
549 r |= access_fn(mr, addr + i, value, access_size,
550 (size - access_size - i) * 8, access_mask, attrs);
551 }
552 } else {
553 for (i = 0; i < size; i += access_size) {
554 r |= access_fn(mr, addr + i, value, access_size, i * 8,
555 access_mask, attrs);
556 }
557 }
558 return r;
559 }
560
561 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
562 {
563 AddressSpace *as;
564
565 while (mr->container) {
566 mr = mr->container;
567 }
568 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
569 if (mr == as->root) {
570 return as;
571 }
572 }
573 return NULL;
574 }
575
576 /* Render a memory region into the global view. Ranges in @view obscure
577 * ranges in @mr.
578 */
579 static void render_memory_region(FlatView *view,
580 MemoryRegion *mr,
581 Int128 base,
582 AddrRange clip,
583 bool readonly,
584 bool nonvolatile)
585 {
586 MemoryRegion *subregion;
587 unsigned i;
588 hwaddr offset_in_region;
589 Int128 remain;
590 Int128 now;
591 FlatRange fr;
592 AddrRange tmp;
593
594 if (!mr->enabled) {
595 return;
596 }
597
598 int128_addto(&base, int128_make64(mr->addr));
599 readonly |= mr->readonly;
600 nonvolatile |= mr->nonvolatile;
601
602 tmp = addrrange_make(base, mr->size);
603
604 if (!addrrange_intersects(tmp, clip)) {
605 return;
606 }
607
608 clip = addrrange_intersection(tmp, clip);
609
610 if (mr->alias) {
611 int128_subfrom(&base, int128_make64(mr->alias->addr));
612 int128_subfrom(&base, int128_make64(mr->alias_offset));
613 render_memory_region(view, mr->alias, base, clip,
614 readonly, nonvolatile);
615 return;
616 }
617
618 /* Render subregions in priority order. */
619 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
620 render_memory_region(view, subregion, base, clip,
621 readonly, nonvolatile);
622 }
623
624 if (!mr->terminates) {
625 return;
626 }
627
628 offset_in_region = int128_get64(int128_sub(clip.start, base));
629 base = clip.start;
630 remain = clip.size;
631
632 fr.mr = mr;
633 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
634 fr.romd_mode = mr->romd_mode;
635 fr.readonly = readonly;
636 fr.nonvolatile = nonvolatile;
637
638 /* Render the region itself into any gaps left by the current view. */
639 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
640 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
641 continue;
642 }
643 if (int128_lt(base, view->ranges[i].addr.start)) {
644 now = int128_min(remain,
645 int128_sub(view->ranges[i].addr.start, base));
646 fr.offset_in_region = offset_in_region;
647 fr.addr = addrrange_make(base, now);
648 flatview_insert(view, i, &fr);
649 ++i;
650 int128_addto(&base, now);
651 offset_in_region += int128_get64(now);
652 int128_subfrom(&remain, now);
653 }
654 now = int128_sub(int128_min(int128_add(base, remain),
655 addrrange_end(view->ranges[i].addr)),
656 base);
657 int128_addto(&base, now);
658 offset_in_region += int128_get64(now);
659 int128_subfrom(&remain, now);
660 }
661 if (int128_nz(remain)) {
662 fr.offset_in_region = offset_in_region;
663 fr.addr = addrrange_make(base, remain);
664 flatview_insert(view, i, &fr);
665 }
666 }
667
668 void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
669 {
670 FlatRange *fr;
671
672 assert(fv);
673 assert(cb);
674
675 FOR_EACH_FLAT_RANGE(fr, fv) {
676 if (cb(fr->addr.start, fr->addr.size, fr->mr,
677 fr->offset_in_region, opaque)) {
678 break;
679 }
680 }
681 }
682
683 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
684 {
685 while (mr->enabled) {
686 if (mr->alias) {
687 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
688 /* The alias is included in its entirety. Use it as
689 * the "real" root, so that we can share more FlatViews.
690 */
691 mr = mr->alias;
692 continue;
693 }
694 } else if (!mr->terminates) {
695 unsigned int found = 0;
696 MemoryRegion *child, *next = NULL;
697 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
698 if (child->enabled) {
699 if (++found > 1) {
700 next = NULL;
701 break;
702 }
703 if (!child->addr && int128_ge(mr->size, child->size)) {
704 /* A child is included in its entirety. If it's the only
705 * enabled one, use it in the hope of finding an alias down the
706 * way. This will also let us share FlatViews.
707 */
708 next = child;
709 }
710 }
711 }
712 if (found == 0) {
713 return NULL;
714 }
715 if (next) {
716 mr = next;
717 continue;
718 }
719 }
720
721 return mr;
722 }
723
724 return NULL;
725 }
726
727 /* Render a memory topology into a list of disjoint absolute ranges. */
728 static FlatView *generate_memory_topology(MemoryRegion *mr)
729 {
730 int i;
731 FlatView *view;
732
733 view = flatview_new(mr);
734
735 if (mr) {
736 render_memory_region(view, mr, int128_zero(),
737 addrrange_make(int128_zero(), int128_2_64()),
738 false, false);
739 }
740 flatview_simplify(view);
741
742 view->dispatch = address_space_dispatch_new(view);
743 for (i = 0; i < view->nr; i++) {
744 MemoryRegionSection mrs =
745 section_from_flat_range(&view->ranges[i], view);
746 flatview_add_to_dispatch(view, &mrs);
747 }
748 address_space_dispatch_compact(view->dispatch);
749 g_hash_table_replace(flat_views, mr, view);
750
751 return view;
752 }
753
754 static void address_space_add_del_ioeventfds(AddressSpace *as,
755 MemoryRegionIoeventfd *fds_new,
756 unsigned fds_new_nb,
757 MemoryRegionIoeventfd *fds_old,
758 unsigned fds_old_nb)
759 {
760 unsigned iold, inew;
761 MemoryRegionIoeventfd *fd;
762 MemoryRegionSection section;
763
764 /* Generate a symmetric difference of the old and new fd sets, adding
765 * and deleting as necessary.
766 */
767
768 iold = inew = 0;
769 while (iold < fds_old_nb || inew < fds_new_nb) {
770 if (iold < fds_old_nb
771 && (inew == fds_new_nb
772 || memory_region_ioeventfd_before(&fds_old[iold],
773 &fds_new[inew]))) {
774 fd = &fds_old[iold];
775 section = (MemoryRegionSection) {
776 .fv = address_space_to_flatview(as),
777 .offset_within_address_space = int128_get64(fd->addr.start),
778 .size = fd->addr.size,
779 };
780 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
781 fd->match_data, fd->data, fd->e);
782 ++iold;
783 } else if (inew < fds_new_nb
784 && (iold == fds_old_nb
785 || memory_region_ioeventfd_before(&fds_new[inew],
786 &fds_old[iold]))) {
787 fd = &fds_new[inew];
788 section = (MemoryRegionSection) {
789 .fv = address_space_to_flatview(as),
790 .offset_within_address_space = int128_get64(fd->addr.start),
791 .size = fd->addr.size,
792 };
793 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
794 fd->match_data, fd->data, fd->e);
795 ++inew;
796 } else {
797 ++iold;
798 ++inew;
799 }
800 }
801 }
802
803 FlatView *address_space_get_flatview(AddressSpace *as)
804 {
805 FlatView *view;
806
807 RCU_READ_LOCK_GUARD();
808 do {
809 view = address_space_to_flatview(as);
810 /* If somebody has replaced as->current_map concurrently,
811 * flatview_ref returns false.
812 */
813 } while (!flatview_ref(view));
814 return view;
815 }
816
817 static void address_space_update_ioeventfds(AddressSpace *as)
818 {
819 FlatView *view;
820 FlatRange *fr;
821 unsigned ioeventfd_nb = 0;
822 unsigned ioeventfd_max;
823 MemoryRegionIoeventfd *ioeventfds;
824 AddrRange tmp;
825 unsigned i;
826
827 /*
828 * It is likely that the number of ioeventfds hasn't changed much, so use
829 * the previous size as the starting value, with some headroom to avoid
830 * gratuitous reallocations.
831 */
832 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
833 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
834
835 view = address_space_get_flatview(as);
836 FOR_EACH_FLAT_RANGE(fr, view) {
837 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
838 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
839 int128_sub(fr->addr.start,
840 int128_make64(fr->offset_in_region)));
841 if (addrrange_intersects(fr->addr, tmp)) {
842 ++ioeventfd_nb;
843 if (ioeventfd_nb > ioeventfd_max) {
844 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
845 ioeventfds = g_realloc(ioeventfds,
846 ioeventfd_max * sizeof(*ioeventfds));
847 }
848 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
849 ioeventfds[ioeventfd_nb-1].addr = tmp;
850 }
851 }
852 }
853
854 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
855 as->ioeventfds, as->ioeventfd_nb);
856
857 g_free(as->ioeventfds);
858 as->ioeventfds = ioeventfds;
859 as->ioeventfd_nb = ioeventfd_nb;
860 flatview_unref(view);
861 }
862
863 /*
864 * Notify the memory listeners about the coalesced IO change events of
865 * range `cmr'. Only the part that has intersection of the specified
866 * FlatRange will be sent.
867 */
868 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
869 CoalescedMemoryRange *cmr, bool add)
870 {
871 AddrRange tmp;
872
873 tmp = addrrange_shift(cmr->addr,
874 int128_sub(fr->addr.start,
875 int128_make64(fr->offset_in_region)));
876 if (!addrrange_intersects(tmp, fr->addr)) {
877 return;
878 }
879 tmp = addrrange_intersection(tmp, fr->addr);
880
881 if (add) {
882 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
883 int128_get64(tmp.start),
884 int128_get64(tmp.size));
885 } else {
886 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
887 int128_get64(tmp.start),
888 int128_get64(tmp.size));
889 }
890 }
891
892 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
893 {
894 CoalescedMemoryRange *cmr;
895
896 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
897 flat_range_coalesced_io_notify(fr, as, cmr, false);
898 }
899 }
900
901 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
902 {
903 MemoryRegion *mr = fr->mr;
904 CoalescedMemoryRange *cmr;
905
906 if (QTAILQ_EMPTY(&mr->coalesced)) {
907 return;
908 }
909
910 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
911 flat_range_coalesced_io_notify(fr, as, cmr, true);
912 }
913 }
914
915 static void address_space_update_topology_pass(AddressSpace *as,
916 const FlatView *old_view,
917 const FlatView *new_view,
918 bool adding)
919 {
920 unsigned iold, inew;
921 FlatRange *frold, *frnew;
922
923 /* Generate a symmetric difference of the old and new memory maps.
924 * Kill ranges in the old map, and instantiate ranges in the new map.
925 */
926 iold = inew = 0;
927 while (iold < old_view->nr || inew < new_view->nr) {
928 if (iold < old_view->nr) {
929 frold = &old_view->ranges[iold];
930 } else {
931 frold = NULL;
932 }
933 if (inew < new_view->nr) {
934 frnew = &new_view->ranges[inew];
935 } else {
936 frnew = NULL;
937 }
938
939 if (frold
940 && (!frnew
941 || int128_lt(frold->addr.start, frnew->addr.start)
942 || (int128_eq(frold->addr.start, frnew->addr.start)
943 && !flatrange_equal(frold, frnew)))) {
944 /* In old but not in new, or in both but attributes changed. */
945
946 if (!adding) {
947 flat_range_coalesced_io_del(frold, as);
948 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
949 }
950
951 ++iold;
952 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
953 /* In both and unchanged (except logging may have changed) */
954
955 if (adding) {
956 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
957 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
958 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
959 frold->dirty_log_mask,
960 frnew->dirty_log_mask);
961 }
962 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
963 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
964 frold->dirty_log_mask,
965 frnew->dirty_log_mask);
966 }
967 }
968
969 ++iold;
970 ++inew;
971 } else {
972 /* In new */
973
974 if (adding) {
975 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
976 flat_range_coalesced_io_add(frnew, as);
977 }
978
979 ++inew;
980 }
981 }
982 }
983
984 static void flatviews_init(void)
985 {
986 static FlatView *empty_view;
987
988 if (flat_views) {
989 return;
990 }
991
992 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
993 (GDestroyNotify) flatview_unref);
994 if (!empty_view) {
995 empty_view = generate_memory_topology(NULL);
996 /* We keep it alive forever in the global variable. */
997 flatview_ref(empty_view);
998 } else {
999 g_hash_table_replace(flat_views, NULL, empty_view);
1000 flatview_ref(empty_view);
1001 }
1002 }
1003
1004 static void flatviews_reset(void)
1005 {
1006 AddressSpace *as;
1007
1008 if (flat_views) {
1009 g_hash_table_unref(flat_views);
1010 flat_views = NULL;
1011 }
1012 flatviews_init();
1013
1014 /* Render unique FVs */
1015 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1016 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1017
1018 if (g_hash_table_lookup(flat_views, physmr)) {
1019 continue;
1020 }
1021
1022 generate_memory_topology(physmr);
1023 }
1024 }
1025
1026 static void address_space_set_flatview(AddressSpace *as)
1027 {
1028 FlatView *old_view = address_space_to_flatview(as);
1029 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1030 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1031
1032 assert(new_view);
1033
1034 if (old_view == new_view) {
1035 return;
1036 }
1037
1038 if (old_view) {
1039 flatview_ref(old_view);
1040 }
1041
1042 flatview_ref(new_view);
1043
1044 if (!QTAILQ_EMPTY(&as->listeners)) {
1045 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1046
1047 if (!old_view2) {
1048 old_view2 = &tmpview;
1049 }
1050 address_space_update_topology_pass(as, old_view2, new_view, false);
1051 address_space_update_topology_pass(as, old_view2, new_view, true);
1052 }
1053
1054 /* Writes are protected by the BQL. */
1055 qatomic_rcu_set(&as->current_map, new_view);
1056 if (old_view) {
1057 flatview_unref(old_view);
1058 }
1059
1060 /* Note that all the old MemoryRegions are still alive up to this
1061 * point. This relieves most MemoryListeners from the need to
1062 * ref/unref the MemoryRegions they get---unless they use them
1063 * outside the iothread mutex, in which case precise reference
1064 * counting is necessary.
1065 */
1066 if (old_view) {
1067 flatview_unref(old_view);
1068 }
1069 }
1070
1071 static void address_space_update_topology(AddressSpace *as)
1072 {
1073 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1074
1075 flatviews_init();
1076 if (!g_hash_table_lookup(flat_views, physmr)) {
1077 generate_memory_topology(physmr);
1078 }
1079 address_space_set_flatview(as);
1080 }
1081
1082 void memory_region_transaction_begin(void)
1083 {
1084 qemu_flush_coalesced_mmio_buffer();
1085 ++memory_region_transaction_depth;
1086 }
1087
1088 void memory_region_transaction_commit(void)
1089 {
1090 AddressSpace *as;
1091
1092 assert(memory_region_transaction_depth);
1093 assert(qemu_mutex_iothread_locked());
1094
1095 --memory_region_transaction_depth;
1096 if (!memory_region_transaction_depth) {
1097 if (memory_region_update_pending) {
1098 flatviews_reset();
1099
1100 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1101
1102 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1103 address_space_set_flatview(as);
1104 address_space_update_ioeventfds(as);
1105 }
1106 memory_region_update_pending = false;
1107 ioeventfd_update_pending = false;
1108 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1109 } else if (ioeventfd_update_pending) {
1110 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1111 address_space_update_ioeventfds(as);
1112 }
1113 ioeventfd_update_pending = false;
1114 }
1115 }
1116 }
1117
1118 static void memory_region_destructor_none(MemoryRegion *mr)
1119 {
1120 }
1121
1122 static void memory_region_destructor_ram(MemoryRegion *mr)
1123 {
1124 qemu_ram_free(mr->ram_block);
1125 }
1126
1127 static bool memory_region_need_escape(char c)
1128 {
1129 return c == '/' || c == '[' || c == '\\' || c == ']';
1130 }
1131
1132 static char *memory_region_escape_name(const char *name)
1133 {
1134 const char *p;
1135 char *escaped, *q;
1136 uint8_t c;
1137 size_t bytes = 0;
1138
1139 for (p = name; *p; p++) {
1140 bytes += memory_region_need_escape(*p) ? 4 : 1;
1141 }
1142 if (bytes == p - name) {
1143 return g_memdup(name, bytes + 1);
1144 }
1145
1146 escaped = g_malloc(bytes + 1);
1147 for (p = name, q = escaped; *p; p++) {
1148 c = *p;
1149 if (unlikely(memory_region_need_escape(c))) {
1150 *q++ = '\\';
1151 *q++ = 'x';
1152 *q++ = "0123456789abcdef"[c >> 4];
1153 c = "0123456789abcdef"[c & 15];
1154 }
1155 *q++ = c;
1156 }
1157 *q = 0;
1158 return escaped;
1159 }
1160
1161 static void memory_region_do_init(MemoryRegion *mr,
1162 Object *owner,
1163 const char *name,
1164 uint64_t size)
1165 {
1166 mr->size = int128_make64(size);
1167 if (size == UINT64_MAX) {
1168 mr->size = int128_2_64();
1169 }
1170 mr->name = g_strdup(name);
1171 mr->owner = owner;
1172 mr->ram_block = NULL;
1173
1174 if (name) {
1175 char *escaped_name = memory_region_escape_name(name);
1176 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1177
1178 if (!owner) {
1179 owner = container_get(qdev_get_machine(), "/unattached");
1180 }
1181
1182 object_property_add_child(owner, name_array, OBJECT(mr));
1183 object_unref(OBJECT(mr));
1184 g_free(name_array);
1185 g_free(escaped_name);
1186 }
1187 }
1188
1189 void memory_region_init(MemoryRegion *mr,
1190 Object *owner,
1191 const char *name,
1192 uint64_t size)
1193 {
1194 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1195 memory_region_do_init(mr, owner, name, size);
1196 }
1197
1198 static void memory_region_get_container(Object *obj, Visitor *v,
1199 const char *name, void *opaque,
1200 Error **errp)
1201 {
1202 MemoryRegion *mr = MEMORY_REGION(obj);
1203 char *path = (char *)"";
1204
1205 if (mr->container) {
1206 path = object_get_canonical_path(OBJECT(mr->container));
1207 }
1208 visit_type_str(v, name, &path, errp);
1209 if (mr->container) {
1210 g_free(path);
1211 }
1212 }
1213
1214 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1215 const char *part)
1216 {
1217 MemoryRegion *mr = MEMORY_REGION(obj);
1218
1219 return OBJECT(mr->container);
1220 }
1221
1222 static void memory_region_get_priority(Object *obj, Visitor *v,
1223 const char *name, void *opaque,
1224 Error **errp)
1225 {
1226 MemoryRegion *mr = MEMORY_REGION(obj);
1227 int32_t value = mr->priority;
1228
1229 visit_type_int32(v, name, &value, errp);
1230 }
1231
1232 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1233 void *opaque, Error **errp)
1234 {
1235 MemoryRegion *mr = MEMORY_REGION(obj);
1236 uint64_t value = memory_region_size(mr);
1237
1238 visit_type_uint64(v, name, &value, errp);
1239 }
1240
1241 static void memory_region_initfn(Object *obj)
1242 {
1243 MemoryRegion *mr = MEMORY_REGION(obj);
1244 ObjectProperty *op;
1245
1246 mr->ops = &unassigned_mem_ops;
1247 mr->enabled = true;
1248 mr->romd_mode = true;
1249 mr->destructor = memory_region_destructor_none;
1250 QTAILQ_INIT(&mr->subregions);
1251 QTAILQ_INIT(&mr->coalesced);
1252
1253 op = object_property_add(OBJECT(mr), "container",
1254 "link<" TYPE_MEMORY_REGION ">",
1255 memory_region_get_container,
1256 NULL, /* memory_region_set_container */
1257 NULL, NULL);
1258 op->resolve = memory_region_resolve_container;
1259
1260 object_property_add_uint64_ptr(OBJECT(mr), "addr",
1261 &mr->addr, OBJ_PROP_FLAG_READ);
1262 object_property_add(OBJECT(mr), "priority", "uint32",
1263 memory_region_get_priority,
1264 NULL, /* memory_region_set_priority */
1265 NULL, NULL);
1266 object_property_add(OBJECT(mr), "size", "uint64",
1267 memory_region_get_size,
1268 NULL, /* memory_region_set_size, */
1269 NULL, NULL);
1270 }
1271
1272 static void iommu_memory_region_initfn(Object *obj)
1273 {
1274 MemoryRegion *mr = MEMORY_REGION(obj);
1275
1276 mr->is_iommu = true;
1277 }
1278
1279 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1280 unsigned size)
1281 {
1282 #ifdef DEBUG_UNASSIGNED
1283 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1284 #endif
1285 return 0;
1286 }
1287
1288 static void unassigned_mem_write(void *opaque, hwaddr addr,
1289 uint64_t val, unsigned size)
1290 {
1291 #ifdef DEBUG_UNASSIGNED
1292 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1293 #endif
1294 }
1295
1296 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1297 unsigned size, bool is_write,
1298 MemTxAttrs attrs)
1299 {
1300 return false;
1301 }
1302
1303 const MemoryRegionOps unassigned_mem_ops = {
1304 .valid.accepts = unassigned_mem_accepts,
1305 .endianness = DEVICE_NATIVE_ENDIAN,
1306 };
1307
1308 static uint64_t memory_region_ram_device_read(void *opaque,
1309 hwaddr addr, unsigned size)
1310 {
1311 MemoryRegion *mr = opaque;
1312 uint64_t data = (uint64_t)~0;
1313
1314 switch (size) {
1315 case 1:
1316 data = *(uint8_t *)(mr->ram_block->host + addr);
1317 break;
1318 case 2:
1319 data = *(uint16_t *)(mr->ram_block->host + addr);
1320 break;
1321 case 4:
1322 data = *(uint32_t *)(mr->ram_block->host + addr);
1323 break;
1324 case 8:
1325 data = *(uint64_t *)(mr->ram_block->host + addr);
1326 break;
1327 }
1328
1329 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1330
1331 return data;
1332 }
1333
1334 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1335 uint64_t data, unsigned size)
1336 {
1337 MemoryRegion *mr = opaque;
1338
1339 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1340
1341 switch (size) {
1342 case 1:
1343 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1344 break;
1345 case 2:
1346 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1347 break;
1348 case 4:
1349 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1350 break;
1351 case 8:
1352 *(uint64_t *)(mr->ram_block->host + addr) = data;
1353 break;
1354 }
1355 }
1356
1357 static const MemoryRegionOps ram_device_mem_ops = {
1358 .read = memory_region_ram_device_read,
1359 .write = memory_region_ram_device_write,
1360 .endianness = DEVICE_HOST_ENDIAN,
1361 .valid = {
1362 .min_access_size = 1,
1363 .max_access_size = 8,
1364 .unaligned = true,
1365 },
1366 .impl = {
1367 .min_access_size = 1,
1368 .max_access_size = 8,
1369 .unaligned = true,
1370 },
1371 };
1372
1373 bool memory_region_access_valid(MemoryRegion *mr,
1374 hwaddr addr,
1375 unsigned size,
1376 bool is_write,
1377 MemTxAttrs attrs)
1378 {
1379 if (mr->ops->valid.accepts
1380 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1381 qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
1382 "0x%" HWADDR_PRIX ", size %u, "
1383 "region '%s', reason: rejected\n",
1384 addr, size, memory_region_name(mr));
1385 return false;
1386 }
1387
1388 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1389 qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
1390 "0x%" HWADDR_PRIX ", size %u, "
1391 "region '%s', reason: unaligned\n",
1392 addr, size, memory_region_name(mr));
1393 return false;
1394 }
1395
1396 /* Treat zero as compatibility all valid */
1397 if (!mr->ops->valid.max_access_size) {
1398 return true;
1399 }
1400
1401 if (size > mr->ops->valid.max_access_size
1402 || size < mr->ops->valid.min_access_size) {
1403 qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
1404 "0x%" HWADDR_PRIX ", size %u, "
1405 "region '%s', reason: invalid size "
1406 "(min:%u max:%u)\n",
1407 addr, size, memory_region_name(mr),
1408 mr->ops->valid.min_access_size,
1409 mr->ops->valid.max_access_size);
1410 return false;
1411 }
1412 return true;
1413 }
1414
1415 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1416 hwaddr addr,
1417 uint64_t *pval,
1418 unsigned size,
1419 MemTxAttrs attrs)
1420 {
1421 *pval = 0;
1422
1423 if (mr->ops->read) {
1424 return access_with_adjusted_size(addr, pval, size,
1425 mr->ops->impl.min_access_size,
1426 mr->ops->impl.max_access_size,
1427 memory_region_read_accessor,
1428 mr, attrs);
1429 } else {
1430 return access_with_adjusted_size(addr, pval, size,
1431 mr->ops->impl.min_access_size,
1432 mr->ops->impl.max_access_size,
1433 memory_region_read_with_attrs_accessor,
1434 mr, attrs);
1435 }
1436 }
1437
1438 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1439 hwaddr addr,
1440 uint64_t *pval,
1441 MemOp op,
1442 MemTxAttrs attrs)
1443 {
1444 unsigned size = memop_size(op);
1445 MemTxResult r;
1446
1447 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1448 *pval = unassigned_mem_read(mr, addr, size);
1449 return MEMTX_DECODE_ERROR;
1450 }
1451
1452 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1453 adjust_endianness(mr, pval, op);
1454 return r;
1455 }
1456
1457 /* Return true if an eventfd was signalled */
1458 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1459 hwaddr addr,
1460 uint64_t data,
1461 unsigned size,
1462 MemTxAttrs attrs)
1463 {
1464 MemoryRegionIoeventfd ioeventfd = {
1465 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1466 .data = data,
1467 };
1468 unsigned i;
1469
1470 for (i = 0; i < mr->ioeventfd_nb; i++) {
1471 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1472 ioeventfd.e = mr->ioeventfds[i].e;
1473
1474 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1475 event_notifier_set(ioeventfd.e);
1476 return true;
1477 }
1478 }
1479
1480 return false;
1481 }
1482
1483 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1484 hwaddr addr,
1485 uint64_t data,
1486 MemOp op,
1487 MemTxAttrs attrs)
1488 {
1489 unsigned size = memop_size(op);
1490
1491 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1492 unassigned_mem_write(mr, addr, data, size);
1493 return MEMTX_DECODE_ERROR;
1494 }
1495
1496 adjust_endianness(mr, &data, op);
1497
1498 if ((!kvm_eventfds_enabled()) &&
1499 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1500 return MEMTX_OK;
1501 }
1502
1503 if (mr->ops->write) {
1504 return access_with_adjusted_size(addr, &data, size,
1505 mr->ops->impl.min_access_size,
1506 mr->ops->impl.max_access_size,
1507 memory_region_write_accessor, mr,
1508 attrs);
1509 } else {
1510 return
1511 access_with_adjusted_size(addr, &data, size,
1512 mr->ops->impl.min_access_size,
1513 mr->ops->impl.max_access_size,
1514 memory_region_write_with_attrs_accessor,
1515 mr, attrs);
1516 }
1517 }
1518
1519 void memory_region_init_io(MemoryRegion *mr,
1520 Object *owner,
1521 const MemoryRegionOps *ops,
1522 void *opaque,
1523 const char *name,
1524 uint64_t size)
1525 {
1526 memory_region_init(mr, owner, name, size);
1527 mr->ops = ops ? ops : &unassigned_mem_ops;
1528 mr->opaque = opaque;
1529 mr->terminates = true;
1530 }
1531
1532 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1533 Object *owner,
1534 const char *name,
1535 uint64_t size,
1536 Error **errp)
1537 {
1538 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1539 }
1540
1541 void memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
1542 Object *owner,
1543 const char *name,
1544 uint64_t size,
1545 uint32_t ram_flags,
1546 Error **errp)
1547 {
1548 Error *err = NULL;
1549 memory_region_init(mr, owner, name, size);
1550 mr->ram = true;
1551 mr->terminates = true;
1552 mr->destructor = memory_region_destructor_ram;
1553 mr->ram_block = qemu_ram_alloc(size, ram_flags, mr, &err);
1554 if (err) {
1555 mr->size = int128_zero();
1556 object_unparent(OBJECT(mr));
1557 error_propagate(errp, err);
1558 }
1559 }
1560
1561 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1562 Object *owner,
1563 const char *name,
1564 uint64_t size,
1565 uint64_t max_size,
1566 void (*resized)(const char*,
1567 uint64_t length,
1568 void *host),
1569 Error **errp)
1570 {
1571 Error *err = NULL;
1572 memory_region_init(mr, owner, name, size);
1573 mr->ram = true;
1574 mr->terminates = true;
1575 mr->destructor = memory_region_destructor_ram;
1576 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1577 mr, &err);
1578 if (err) {
1579 mr->size = int128_zero();
1580 object_unparent(OBJECT(mr));
1581 error_propagate(errp, err);
1582 }
1583 }
1584
1585 #ifdef CONFIG_POSIX
1586 void memory_region_init_ram_from_file(MemoryRegion *mr,
1587 Object *owner,
1588 const char *name,
1589 uint64_t size,
1590 uint64_t align,
1591 uint32_t ram_flags,
1592 const char *path,
1593 bool readonly,
1594 Error **errp)
1595 {
1596 Error *err = NULL;
1597 memory_region_init(mr, owner, name, size);
1598 mr->ram = true;
1599 mr->readonly = readonly;
1600 mr->terminates = true;
1601 mr->destructor = memory_region_destructor_ram;
1602 mr->align = align;
1603 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
1604 readonly, &err);
1605 if (err) {
1606 mr->size = int128_zero();
1607 object_unparent(OBJECT(mr));
1608 error_propagate(errp, err);
1609 }
1610 }
1611
1612 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1613 Object *owner,
1614 const char *name,
1615 uint64_t size,
1616 uint32_t ram_flags,
1617 int fd,
1618 ram_addr_t offset,
1619 Error **errp)
1620 {
1621 Error *err = NULL;
1622 memory_region_init(mr, owner, name, size);
1623 mr->ram = true;
1624 mr->terminates = true;
1625 mr->destructor = memory_region_destructor_ram;
1626 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset,
1627 false, &err);
1628 if (err) {
1629 mr->size = int128_zero();
1630 object_unparent(OBJECT(mr));
1631 error_propagate(errp, err);
1632 }
1633 }
1634 #endif
1635
1636 void memory_region_init_ram_ptr(MemoryRegion *mr,
1637 Object *owner,
1638 const char *name,
1639 uint64_t size,
1640 void *ptr)
1641 {
1642 memory_region_init(mr, owner, name, size);
1643 mr->ram = true;
1644 mr->terminates = true;
1645 mr->destructor = memory_region_destructor_ram;
1646
1647 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1648 assert(ptr != NULL);
1649 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1650 }
1651
1652 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1653 Object *owner,
1654 const char *name,
1655 uint64_t size,
1656 void *ptr)
1657 {
1658 memory_region_init(mr, owner, name, size);
1659 mr->ram = true;
1660 mr->terminates = true;
1661 mr->ram_device = true;
1662 mr->ops = &ram_device_mem_ops;
1663 mr->opaque = mr;
1664 mr->destructor = memory_region_destructor_ram;
1665
1666 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1667 assert(ptr != NULL);
1668 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1669 }
1670
1671 void memory_region_init_alias(MemoryRegion *mr,
1672 Object *owner,
1673 const char *name,
1674 MemoryRegion *orig,
1675 hwaddr offset,
1676 uint64_t size)
1677 {
1678 memory_region_init(mr, owner, name, size);
1679 mr->alias = orig;
1680 mr->alias_offset = offset;
1681 }
1682
1683 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1684 Object *owner,
1685 const char *name,
1686 uint64_t size,
1687 Error **errp)
1688 {
1689 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1690 mr->readonly = true;
1691 }
1692
1693 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1694 Object *owner,
1695 const MemoryRegionOps *ops,
1696 void *opaque,
1697 const char *name,
1698 uint64_t size,
1699 Error **errp)
1700 {
1701 Error *err = NULL;
1702 assert(ops);
1703 memory_region_init(mr, owner, name, size);
1704 mr->ops = ops;
1705 mr->opaque = opaque;
1706 mr->terminates = true;
1707 mr->rom_device = true;
1708 mr->destructor = memory_region_destructor_ram;
1709 mr->ram_block = qemu_ram_alloc(size, 0, mr, &err);
1710 if (err) {
1711 mr->size = int128_zero();
1712 object_unparent(OBJECT(mr));
1713 error_propagate(errp, err);
1714 }
1715 }
1716
1717 void memory_region_init_iommu(void *_iommu_mr,
1718 size_t instance_size,
1719 const char *mrtypename,
1720 Object *owner,
1721 const char *name,
1722 uint64_t size)
1723 {
1724 struct IOMMUMemoryRegion *iommu_mr;
1725 struct MemoryRegion *mr;
1726
1727 object_initialize(_iommu_mr, instance_size, mrtypename);
1728 mr = MEMORY_REGION(_iommu_mr);
1729 memory_region_do_init(mr, owner, name, size);
1730 iommu_mr = IOMMU_MEMORY_REGION(mr);
1731 mr->terminates = true; /* then re-forwards */
1732 QLIST_INIT(&iommu_mr->iommu_notify);
1733 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1734 }
1735
1736 static void memory_region_finalize(Object *obj)
1737 {
1738 MemoryRegion *mr = MEMORY_REGION(obj);
1739
1740 assert(!mr->container);
1741
1742 /* We know the region is not visible in any address space (it
1743 * does not have a container and cannot be a root either because
1744 * it has no references, so we can blindly clear mr->enabled.
1745 * memory_region_set_enabled instead could trigger a transaction
1746 * and cause an infinite loop.
1747 */
1748 mr->enabled = false;
1749 memory_region_transaction_begin();
1750 while (!QTAILQ_EMPTY(&mr->subregions)) {
1751 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1752 memory_region_del_subregion(mr, subregion);
1753 }
1754 memory_region_transaction_commit();
1755
1756 mr->destructor(mr);
1757 memory_region_clear_coalescing(mr);
1758 g_free((char *)mr->name);
1759 g_free(mr->ioeventfds);
1760 }
1761
1762 Object *memory_region_owner(MemoryRegion *mr)
1763 {
1764 Object *obj = OBJECT(mr);
1765 return obj->parent;
1766 }
1767
1768 void memory_region_ref(MemoryRegion *mr)
1769 {
1770 /* MMIO callbacks most likely will access data that belongs
1771 * to the owner, hence the need to ref/unref the owner whenever
1772 * the memory region is in use.
1773 *
1774 * The memory region is a child of its owner. As long as the
1775 * owner doesn't call unparent itself on the memory region,
1776 * ref-ing the owner will also keep the memory region alive.
1777 * Memory regions without an owner are supposed to never go away;
1778 * we do not ref/unref them because it slows down DMA sensibly.
1779 */
1780 if (mr && mr->owner) {
1781 object_ref(mr->owner);
1782 }
1783 }
1784
1785 void memory_region_unref(MemoryRegion *mr)
1786 {
1787 if (mr && mr->owner) {
1788 object_unref(mr->owner);
1789 }
1790 }
1791
1792 uint64_t memory_region_size(MemoryRegion *mr)
1793 {
1794 if (int128_eq(mr->size, int128_2_64())) {
1795 return UINT64_MAX;
1796 }
1797 return int128_get64(mr->size);
1798 }
1799
1800 const char *memory_region_name(const MemoryRegion *mr)
1801 {
1802 if (!mr->name) {
1803 ((MemoryRegion *)mr)->name =
1804 g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1805 }
1806 return mr->name;
1807 }
1808
1809 bool memory_region_is_ram_device(MemoryRegion *mr)
1810 {
1811 return mr->ram_device;
1812 }
1813
1814 bool memory_region_is_protected(MemoryRegion *mr)
1815 {
1816 return mr->ram && (mr->ram_block->flags & RAM_PROTECTED);
1817 }
1818
1819 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1820 {
1821 uint8_t mask = mr->dirty_log_mask;
1822 RAMBlock *rb = mr->ram_block;
1823
1824 if (global_dirty_log && ((rb && qemu_ram_is_migratable(rb)) ||
1825 memory_region_is_iommu(mr))) {
1826 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1827 }
1828
1829 if (tcg_enabled() && rb) {
1830 /* TCG only cares about dirty memory logging for RAM, not IOMMU. */
1831 mask |= (1 << DIRTY_MEMORY_CODE);
1832 }
1833 return mask;
1834 }
1835
1836 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1837 {
1838 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1839 }
1840
1841 static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1842 Error **errp)
1843 {
1844 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1845 IOMMUNotifier *iommu_notifier;
1846 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1847 int ret = 0;
1848
1849 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1850 flags |= iommu_notifier->notifier_flags;
1851 }
1852
1853 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1854 ret = imrc->notify_flag_changed(iommu_mr,
1855 iommu_mr->iommu_notify_flags,
1856 flags, errp);
1857 }
1858
1859 if (!ret) {
1860 iommu_mr->iommu_notify_flags = flags;
1861 }
1862 return ret;
1863 }
1864
1865 int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
1866 uint64_t page_size_mask,
1867 Error **errp)
1868 {
1869 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1870 int ret = 0;
1871
1872 if (imrc->iommu_set_page_size_mask) {
1873 ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
1874 }
1875 return ret;
1876 }
1877
1878 int memory_region_register_iommu_notifier(MemoryRegion *mr,
1879 IOMMUNotifier *n, Error **errp)
1880 {
1881 IOMMUMemoryRegion *iommu_mr;
1882 int ret;
1883
1884 if (mr->alias) {
1885 return memory_region_register_iommu_notifier(mr->alias, n, errp);
1886 }
1887
1888 /* We need to register for at least one bitfield */
1889 iommu_mr = IOMMU_MEMORY_REGION(mr);
1890 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1891 assert(n->start <= n->end);
1892 assert(n->iommu_idx >= 0 &&
1893 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1894
1895 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1896 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1897 if (ret) {
1898 QLIST_REMOVE(n, node);
1899 }
1900 return ret;
1901 }
1902
1903 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1904 {
1905 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1906
1907 if (imrc->get_min_page_size) {
1908 return imrc->get_min_page_size(iommu_mr);
1909 }
1910 return TARGET_PAGE_SIZE;
1911 }
1912
1913 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1914 {
1915 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1916 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1917 hwaddr addr, granularity;
1918 IOMMUTLBEntry iotlb;
1919
1920 /* If the IOMMU has its own replay callback, override */
1921 if (imrc->replay) {
1922 imrc->replay(iommu_mr, n);
1923 return;
1924 }
1925
1926 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1927
1928 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1929 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1930 if (iotlb.perm != IOMMU_NONE) {
1931 n->notify(n, &iotlb);
1932 }
1933
1934 /* if (2^64 - MR size) < granularity, it's possible to get an
1935 * infinite loop here. This should catch such a wraparound */
1936 if ((addr + granularity) < addr) {
1937 break;
1938 }
1939 }
1940 }
1941
1942 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1943 IOMMUNotifier *n)
1944 {
1945 IOMMUMemoryRegion *iommu_mr;
1946
1947 if (mr->alias) {
1948 memory_region_unregister_iommu_notifier(mr->alias, n);
1949 return;
1950 }
1951 QLIST_REMOVE(n, node);
1952 iommu_mr = IOMMU_MEMORY_REGION(mr);
1953 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
1954 }
1955
1956 void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
1957 IOMMUTLBEvent *event)
1958 {
1959 IOMMUTLBEntry *entry = &event->entry;
1960 hwaddr entry_end = entry->iova + entry->addr_mask;
1961 IOMMUTLBEntry tmp = *entry;
1962
1963 if (event->type == IOMMU_NOTIFIER_UNMAP) {
1964 assert(entry->perm == IOMMU_NONE);
1965 }
1966
1967 /*
1968 * Skip the notification if the notification does not overlap
1969 * with registered range.
1970 */
1971 if (notifier->start > entry_end || notifier->end < entry->iova) {
1972 return;
1973 }
1974
1975 if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
1976 /* Crop (iova, addr_mask) to range */
1977 tmp.iova = MAX(tmp.iova, notifier->start);
1978 tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
1979 } else {
1980 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
1981 }
1982
1983 if (event->type & notifier->notifier_flags) {
1984 notifier->notify(notifier, &tmp);
1985 }
1986 }
1987
1988 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1989 int iommu_idx,
1990 IOMMUTLBEvent event)
1991 {
1992 IOMMUNotifier *iommu_notifier;
1993
1994 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1995
1996 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1997 if (iommu_notifier->iommu_idx == iommu_idx) {
1998 memory_region_notify_iommu_one(iommu_notifier, &event);
1999 }
2000 }
2001 }
2002
2003 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2004 enum IOMMUMemoryRegionAttr attr,
2005 void *data)
2006 {
2007 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2008
2009 if (!imrc->get_attr) {
2010 return -EINVAL;
2011 }
2012
2013 return imrc->get_attr(iommu_mr, attr, data);
2014 }
2015
2016 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2017 MemTxAttrs attrs)
2018 {
2019 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2020
2021 if (!imrc->attrs_to_index) {
2022 return 0;
2023 }
2024
2025 return imrc->attrs_to_index(iommu_mr, attrs);
2026 }
2027
2028 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2029 {
2030 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2031
2032 if (!imrc->num_indexes) {
2033 return 1;
2034 }
2035
2036 return imrc->num_indexes(iommu_mr);
2037 }
2038
2039 RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr)
2040 {
2041 if (!memory_region_is_mapped(mr) || !memory_region_is_ram(mr)) {
2042 return NULL;
2043 }
2044 return mr->rdm;
2045 }
2046
2047 void memory_region_set_ram_discard_manager(MemoryRegion *mr,
2048 RamDiscardManager *rdm)
2049 {
2050 g_assert(memory_region_is_ram(mr) && !memory_region_is_mapped(mr));
2051 g_assert(!rdm || !mr->rdm);
2052 mr->rdm = rdm;
2053 }
2054
2055 uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm,
2056 const MemoryRegion *mr)
2057 {
2058 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2059
2060 g_assert(rdmc->get_min_granularity);
2061 return rdmc->get_min_granularity(rdm, mr);
2062 }
2063
2064 bool ram_discard_manager_is_populated(const RamDiscardManager *rdm,
2065 const MemoryRegionSection *section)
2066 {
2067 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2068
2069 g_assert(rdmc->is_populated);
2070 return rdmc->is_populated(rdm, section);
2071 }
2072
2073 int ram_discard_manager_replay_populated(const RamDiscardManager *rdm,
2074 MemoryRegionSection *section,
2075 ReplayRamPopulate replay_fn,
2076 void *opaque)
2077 {
2078 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2079
2080 g_assert(rdmc->replay_populated);
2081 return rdmc->replay_populated(rdm, section, replay_fn, opaque);
2082 }
2083
2084 void ram_discard_manager_register_listener(RamDiscardManager *rdm,
2085 RamDiscardListener *rdl,
2086 MemoryRegionSection *section)
2087 {
2088 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2089
2090 g_assert(rdmc->register_listener);
2091 rdmc->register_listener(rdm, rdl, section);
2092 }
2093
2094 void ram_discard_manager_unregister_listener(RamDiscardManager *rdm,
2095 RamDiscardListener *rdl)
2096 {
2097 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2098
2099 g_assert(rdmc->unregister_listener);
2100 rdmc->unregister_listener(rdm, rdl);
2101 }
2102
2103 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2104 {
2105 uint8_t mask = 1 << client;
2106 uint8_t old_logging;
2107
2108 assert(client == DIRTY_MEMORY_VGA);
2109 old_logging = mr->vga_logging_count;
2110 mr->vga_logging_count += log ? 1 : -1;
2111 if (!!old_logging == !!mr->vga_logging_count) {
2112 return;
2113 }
2114
2115 memory_region_transaction_begin();
2116 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2117 memory_region_update_pending |= mr->enabled;
2118 memory_region_transaction_commit();
2119 }
2120
2121 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2122 hwaddr size)
2123 {
2124 assert(mr->ram_block);
2125 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2126 size,
2127 memory_region_get_dirty_log_mask(mr));
2128 }
2129
2130 /*
2131 * If memory region `mr' is NULL, do global sync. Otherwise, sync
2132 * dirty bitmap for the specified memory region.
2133 */
2134 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
2135 {
2136 MemoryListener *listener;
2137 AddressSpace *as;
2138 FlatView *view;
2139 FlatRange *fr;
2140
2141 /* If the same address space has multiple log_sync listeners, we
2142 * visit that address space's FlatView multiple times. But because
2143 * log_sync listeners are rare, it's still cheaper than walking each
2144 * address space once.
2145 */
2146 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2147 if (listener->log_sync) {
2148 as = listener->address_space;
2149 view = address_space_get_flatview(as);
2150 FOR_EACH_FLAT_RANGE(fr, view) {
2151 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2152 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2153 listener->log_sync(listener, &mrs);
2154 }
2155 }
2156 flatview_unref(view);
2157 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 0);
2158 } else if (listener->log_sync_global) {
2159 /*
2160 * No matter whether MR is specified, what we can do here
2161 * is to do a global sync, because we are not capable to
2162 * sync in a finer granularity.
2163 */
2164 listener->log_sync_global(listener);
2165 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 1);
2166 }
2167 }
2168 }
2169
2170 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2171 hwaddr len)
2172 {
2173 MemoryRegionSection mrs;
2174 MemoryListener *listener;
2175 AddressSpace *as;
2176 FlatView *view;
2177 FlatRange *fr;
2178 hwaddr sec_start, sec_end, sec_size;
2179
2180 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2181 if (!listener->log_clear) {
2182 continue;
2183 }
2184 as = listener->address_space;
2185 view = address_space_get_flatview(as);
2186 FOR_EACH_FLAT_RANGE(fr, view) {
2187 if (!fr->dirty_log_mask || fr->mr != mr) {
2188 /*
2189 * Clear dirty bitmap operation only applies to those
2190 * regions whose dirty logging is at least enabled
2191 */
2192 continue;
2193 }
2194
2195 mrs = section_from_flat_range(fr, view);
2196
2197 sec_start = MAX(mrs.offset_within_region, start);
2198 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2199 sec_end = MIN(sec_end, start + len);
2200
2201 if (sec_start >= sec_end) {
2202 /*
2203 * If this memory region section has no intersection
2204 * with the requested range, skip.
2205 */
2206 continue;
2207 }
2208
2209 /* Valid case; shrink the section if needed */
2210 mrs.offset_within_address_space +=
2211 sec_start - mrs.offset_within_region;
2212 mrs.offset_within_region = sec_start;
2213 sec_size = sec_end - sec_start;
2214 mrs.size = int128_make64(sec_size);
2215 listener->log_clear(listener, &mrs);
2216 }
2217 flatview_unref(view);
2218 }
2219 }
2220
2221 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2222 hwaddr addr,
2223 hwaddr size,
2224 unsigned client)
2225 {
2226 DirtyBitmapSnapshot *snapshot;
2227 assert(mr->ram_block);
2228 memory_region_sync_dirty_bitmap(mr);
2229 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2230 memory_global_after_dirty_log_sync();
2231 return snapshot;
2232 }
2233
2234 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2235 hwaddr addr, hwaddr size)
2236 {
2237 assert(mr->ram_block);
2238 return cpu_physical_memory_snapshot_get_dirty(snap,
2239 memory_region_get_ram_addr(mr) + addr, size);
2240 }
2241
2242 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2243 {
2244 if (mr->readonly != readonly) {
2245 memory_region_transaction_begin();
2246 mr->readonly = readonly;
2247 memory_region_update_pending |= mr->enabled;
2248 memory_region_transaction_commit();
2249 }
2250 }
2251
2252 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2253 {
2254 if (mr->nonvolatile != nonvolatile) {
2255 memory_region_transaction_begin();
2256 mr->nonvolatile = nonvolatile;
2257 memory_region_update_pending |= mr->enabled;
2258 memory_region_transaction_commit();
2259 }
2260 }
2261
2262 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2263 {
2264 if (mr->romd_mode != romd_mode) {
2265 memory_region_transaction_begin();
2266 mr->romd_mode = romd_mode;
2267 memory_region_update_pending |= mr->enabled;
2268 memory_region_transaction_commit();
2269 }
2270 }
2271
2272 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2273 hwaddr size, unsigned client)
2274 {
2275 assert(mr->ram_block);
2276 cpu_physical_memory_test_and_clear_dirty(
2277 memory_region_get_ram_addr(mr) + addr, size, client);
2278 }
2279
2280 int memory_region_get_fd(MemoryRegion *mr)
2281 {
2282 int fd;
2283
2284 RCU_READ_LOCK_GUARD();
2285 while (mr->alias) {
2286 mr = mr->alias;
2287 }
2288 fd = mr->ram_block->fd;
2289
2290 return fd;
2291 }
2292
2293 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2294 {
2295 void *ptr;
2296 uint64_t offset = 0;
2297
2298 RCU_READ_LOCK_GUARD();
2299 while (mr->alias) {
2300 offset += mr->alias_offset;
2301 mr = mr->alias;
2302 }
2303 assert(mr->ram_block);
2304 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2305
2306 return ptr;
2307 }
2308
2309 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2310 {
2311 RAMBlock *block;
2312
2313 block = qemu_ram_block_from_host(ptr, false, offset);
2314 if (!block) {
2315 return NULL;
2316 }
2317
2318 return block->mr;
2319 }
2320
2321 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2322 {
2323 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2324 }
2325
2326 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2327 {
2328 assert(mr->ram_block);
2329
2330 qemu_ram_resize(mr->ram_block, newsize, errp);
2331 }
2332
2333 void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2334 {
2335 if (mr->ram_block) {
2336 qemu_ram_msync(mr->ram_block, addr, size);
2337 }
2338 }
2339
2340 void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2341 {
2342 /*
2343 * Might be extended case needed to cover
2344 * different types of memory regions
2345 */
2346 if (mr->dirty_log_mask) {
2347 memory_region_msync(mr, addr, size);
2348 }
2349 }
2350
2351 /*
2352 * Call proper memory listeners about the change on the newly
2353 * added/removed CoalescedMemoryRange.
2354 */
2355 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2356 CoalescedMemoryRange *cmr,
2357 bool add)
2358 {
2359 AddressSpace *as;
2360 FlatView *view;
2361 FlatRange *fr;
2362
2363 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2364 view = address_space_get_flatview(as);
2365 FOR_EACH_FLAT_RANGE(fr, view) {
2366 if (fr->mr == mr) {
2367 flat_range_coalesced_io_notify(fr, as, cmr, add);
2368 }
2369 }
2370 flatview_unref(view);
2371 }
2372 }
2373
2374 void memory_region_set_coalescing(MemoryRegion *mr)
2375 {
2376 memory_region_clear_coalescing(mr);
2377 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2378 }
2379
2380 void memory_region_add_coalescing(MemoryRegion *mr,
2381 hwaddr offset,
2382 uint64_t size)
2383 {
2384 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2385
2386 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2387 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2388 memory_region_update_coalesced_range(mr, cmr, true);
2389 memory_region_set_flush_coalesced(mr);
2390 }
2391
2392 void memory_region_clear_coalescing(MemoryRegion *mr)
2393 {
2394 CoalescedMemoryRange *cmr;
2395
2396 if (QTAILQ_EMPTY(&mr->coalesced)) {
2397 return;
2398 }
2399
2400 qemu_flush_coalesced_mmio_buffer();
2401 mr->flush_coalesced_mmio = false;
2402
2403 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2404 cmr = QTAILQ_FIRST(&mr->coalesced);
2405 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2406 memory_region_update_coalesced_range(mr, cmr, false);
2407 g_free(cmr);
2408 }
2409 }
2410
2411 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2412 {
2413 mr->flush_coalesced_mmio = true;
2414 }
2415
2416 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2417 {
2418 qemu_flush_coalesced_mmio_buffer();
2419 if (QTAILQ_EMPTY(&mr->coalesced)) {
2420 mr->flush_coalesced_mmio = false;
2421 }
2422 }
2423
2424 static bool userspace_eventfd_warning;
2425
2426 void memory_region_add_eventfd(MemoryRegion *mr,
2427 hwaddr addr,
2428 unsigned size,
2429 bool match_data,
2430 uint64_t data,
2431 EventNotifier *e)
2432 {
2433 MemoryRegionIoeventfd mrfd = {
2434 .addr.start = int128_make64(addr),
2435 .addr.size = int128_make64(size),
2436 .match_data = match_data,
2437 .data = data,
2438 .e = e,
2439 };
2440 unsigned i;
2441
2442 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2443 userspace_eventfd_warning))) {
2444 userspace_eventfd_warning = true;
2445 error_report("Using eventfd without MMIO binding in KVM. "
2446 "Suboptimal performance expected");
2447 }
2448
2449 if (size) {
2450 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2451 }
2452 memory_region_transaction_begin();
2453 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2454 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2455 break;
2456 }
2457 }
2458 ++mr->ioeventfd_nb;
2459 mr->ioeventfds = g_realloc(mr->ioeventfds,
2460 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2461 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2462 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2463 mr->ioeventfds[i] = mrfd;
2464 ioeventfd_update_pending |= mr->enabled;
2465 memory_region_transaction_commit();
2466 }
2467
2468 void memory_region_del_eventfd(MemoryRegion *mr,
2469 hwaddr addr,
2470 unsigned size,
2471 bool match_data,
2472 uint64_t data,
2473 EventNotifier *e)
2474 {
2475 MemoryRegionIoeventfd mrfd = {
2476 .addr.start = int128_make64(addr),
2477 .addr.size = int128_make64(size),
2478 .match_data = match_data,
2479 .data = data,
2480 .e = e,
2481 };
2482 unsigned i;
2483
2484 if (size) {
2485 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2486 }
2487 memory_region_transaction_begin();
2488 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2489 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2490 break;
2491 }
2492 }
2493 assert(i != mr->ioeventfd_nb);
2494 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2495 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2496 --mr->ioeventfd_nb;
2497 mr->ioeventfds = g_realloc(mr->ioeventfds,
2498 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2499 ioeventfd_update_pending |= mr->enabled;
2500 memory_region_transaction_commit();
2501 }
2502
2503 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2504 {
2505 MemoryRegion *mr = subregion->container;
2506 MemoryRegion *other;
2507
2508 memory_region_transaction_begin();
2509
2510 memory_region_ref(subregion);
2511 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2512 if (subregion->priority >= other->priority) {
2513 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2514 goto done;
2515 }
2516 }
2517 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2518 done:
2519 memory_region_update_pending |= mr->enabled && subregion->enabled;
2520 memory_region_transaction_commit();
2521 }
2522
2523 static void memory_region_add_subregion_common(MemoryRegion *mr,
2524 hwaddr offset,
2525 MemoryRegion *subregion)
2526 {
2527 assert(!subregion->container);
2528 subregion->container = mr;
2529 subregion->addr = offset;
2530 memory_region_update_container_subregions(subregion);
2531 }
2532
2533 void memory_region_add_subregion(MemoryRegion *mr,
2534 hwaddr offset,
2535 MemoryRegion *subregion)
2536 {
2537 subregion->priority = 0;
2538 memory_region_add_subregion_common(mr, offset, subregion);
2539 }
2540
2541 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2542 hwaddr offset,
2543 MemoryRegion *subregion,
2544 int priority)
2545 {
2546 subregion->priority = priority;
2547 memory_region_add_subregion_common(mr, offset, subregion);
2548 }
2549
2550 void memory_region_del_subregion(MemoryRegion *mr,
2551 MemoryRegion *subregion)
2552 {
2553 memory_region_transaction_begin();
2554 assert(subregion->container == mr);
2555 subregion->container = NULL;
2556 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2557 memory_region_unref(subregion);
2558 memory_region_update_pending |= mr->enabled && subregion->enabled;
2559 memory_region_transaction_commit();
2560 }
2561
2562 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2563 {
2564 if (enabled == mr->enabled) {
2565 return;
2566 }
2567 memory_region_transaction_begin();
2568 mr->enabled = enabled;
2569 memory_region_update_pending = true;
2570 memory_region_transaction_commit();
2571 }
2572
2573 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2574 {
2575 Int128 s = int128_make64(size);
2576
2577 if (size == UINT64_MAX) {
2578 s = int128_2_64();
2579 }
2580 if (int128_eq(s, mr->size)) {
2581 return;
2582 }
2583 memory_region_transaction_begin();
2584 mr->size = s;
2585 memory_region_update_pending = true;
2586 memory_region_transaction_commit();
2587 }
2588
2589 static void memory_region_readd_subregion(MemoryRegion *mr)
2590 {
2591 MemoryRegion *container = mr->container;
2592
2593 if (container) {
2594 memory_region_transaction_begin();
2595 memory_region_ref(mr);
2596 memory_region_del_subregion(container, mr);
2597 mr->container = container;
2598 memory_region_update_container_subregions(mr);
2599 memory_region_unref(mr);
2600 memory_region_transaction_commit();
2601 }
2602 }
2603
2604 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2605 {
2606 if (addr != mr->addr) {
2607 mr->addr = addr;
2608 memory_region_readd_subregion(mr);
2609 }
2610 }
2611
2612 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2613 {
2614 assert(mr->alias);
2615
2616 if (offset == mr->alias_offset) {
2617 return;
2618 }
2619
2620 memory_region_transaction_begin();
2621 mr->alias_offset = offset;
2622 memory_region_update_pending |= mr->enabled;
2623 memory_region_transaction_commit();
2624 }
2625
2626 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2627 {
2628 return mr->align;
2629 }
2630
2631 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2632 {
2633 const AddrRange *addr = addr_;
2634 const FlatRange *fr = fr_;
2635
2636 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2637 return -1;
2638 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2639 return 1;
2640 }
2641 return 0;
2642 }
2643
2644 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2645 {
2646 return bsearch(&addr, view->ranges, view->nr,
2647 sizeof(FlatRange), cmp_flatrange_addr);
2648 }
2649
2650 bool memory_region_is_mapped(MemoryRegion *mr)
2651 {
2652 return mr->container ? true : false;
2653 }
2654
2655 /* Same as memory_region_find, but it does not add a reference to the
2656 * returned region. It must be called from an RCU critical section.
2657 */
2658 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2659 hwaddr addr, uint64_t size)
2660 {
2661 MemoryRegionSection ret = { .mr = NULL };
2662 MemoryRegion *root;
2663 AddressSpace *as;
2664 AddrRange range;
2665 FlatView *view;
2666 FlatRange *fr;
2667
2668 addr += mr->addr;
2669 for (root = mr; root->container; ) {
2670 root = root->container;
2671 addr += root->addr;
2672 }
2673
2674 as = memory_region_to_address_space(root);
2675 if (!as) {
2676 return ret;
2677 }
2678 range = addrrange_make(int128_make64(addr), int128_make64(size));
2679
2680 view = address_space_to_flatview(as);
2681 fr = flatview_lookup(view, range);
2682 if (!fr) {
2683 return ret;
2684 }
2685
2686 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2687 --fr;
2688 }
2689
2690 ret.mr = fr->mr;
2691 ret.fv = view;
2692 range = addrrange_intersection(range, fr->addr);
2693 ret.offset_within_region = fr->offset_in_region;
2694 ret.offset_within_region += int128_get64(int128_sub(range.start,
2695 fr->addr.start));
2696 ret.size = range.size;
2697 ret.offset_within_address_space = int128_get64(range.start);
2698 ret.readonly = fr->readonly;
2699 ret.nonvolatile = fr->nonvolatile;
2700 return ret;
2701 }
2702
2703 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2704 hwaddr addr, uint64_t size)
2705 {
2706 MemoryRegionSection ret;
2707 RCU_READ_LOCK_GUARD();
2708 ret = memory_region_find_rcu(mr, addr, size);
2709 if (ret.mr) {
2710 memory_region_ref(ret.mr);
2711 }
2712 return ret;
2713 }
2714
2715 MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s)
2716 {
2717 MemoryRegionSection *tmp = g_new(MemoryRegionSection, 1);
2718
2719 *tmp = *s;
2720 if (tmp->mr) {
2721 memory_region_ref(tmp->mr);
2722 }
2723 if (tmp->fv) {
2724 bool ret = flatview_ref(tmp->fv);
2725
2726 g_assert(ret);
2727 }
2728 return tmp;
2729 }
2730
2731 void memory_region_section_free_copy(MemoryRegionSection *s)
2732 {
2733 if (s->fv) {
2734 flatview_unref(s->fv);
2735 }
2736 if (s->mr) {
2737 memory_region_unref(s->mr);
2738 }
2739 g_free(s);
2740 }
2741
2742 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2743 {
2744 MemoryRegion *mr;
2745
2746 RCU_READ_LOCK_GUARD();
2747 mr = memory_region_find_rcu(container, addr, 1).mr;
2748 return mr && mr != container;
2749 }
2750
2751 void memory_global_dirty_log_sync(void)
2752 {
2753 memory_region_sync_dirty_bitmap(NULL);
2754 }
2755
2756 void memory_global_after_dirty_log_sync(void)
2757 {
2758 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2759 }
2760
2761 static VMChangeStateEntry *vmstate_change;
2762
2763 void memory_global_dirty_log_start(void)
2764 {
2765 if (vmstate_change) {
2766 qemu_del_vm_change_state_handler(vmstate_change);
2767 vmstate_change = NULL;
2768 }
2769
2770 global_dirty_log = true;
2771
2772 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2773
2774 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2775 memory_region_transaction_begin();
2776 memory_region_update_pending = true;
2777 memory_region_transaction_commit();
2778 }
2779
2780 static void memory_global_dirty_log_do_stop(void)
2781 {
2782 global_dirty_log = false;
2783
2784 /* Refresh DIRTY_MEMORY_MIGRATION bit. */
2785 memory_region_transaction_begin();
2786 memory_region_update_pending = true;
2787 memory_region_transaction_commit();
2788
2789 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2790 }
2791
2792 static void memory_vm_change_state_handler(void *opaque, bool running,
2793 RunState state)
2794 {
2795 if (running) {
2796 memory_global_dirty_log_do_stop();
2797
2798 if (vmstate_change) {
2799 qemu_del_vm_change_state_handler(vmstate_change);
2800 vmstate_change = NULL;
2801 }
2802 }
2803 }
2804
2805 void memory_global_dirty_log_stop(void)
2806 {
2807 if (!runstate_is_running()) {
2808 if (vmstate_change) {
2809 return;
2810 }
2811 vmstate_change = qemu_add_vm_change_state_handler(
2812 memory_vm_change_state_handler, NULL);
2813 return;
2814 }
2815
2816 memory_global_dirty_log_do_stop();
2817 }
2818
2819 static void listener_add_address_space(MemoryListener *listener,
2820 AddressSpace *as)
2821 {
2822 FlatView *view;
2823 FlatRange *fr;
2824
2825 if (listener->begin) {
2826 listener->begin(listener);
2827 }
2828 if (global_dirty_log) {
2829 if (listener->log_global_start) {
2830 listener->log_global_start(listener);
2831 }
2832 }
2833
2834 view = address_space_get_flatview(as);
2835 FOR_EACH_FLAT_RANGE(fr, view) {
2836 MemoryRegionSection section = section_from_flat_range(fr, view);
2837
2838 if (listener->region_add) {
2839 listener->region_add(listener, &section);
2840 }
2841 if (fr->dirty_log_mask && listener->log_start) {
2842 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2843 }
2844 }
2845 if (listener->commit) {
2846 listener->commit(listener);
2847 }
2848 flatview_unref(view);
2849 }
2850
2851 static void listener_del_address_space(MemoryListener *listener,
2852 AddressSpace *as)
2853 {
2854 FlatView *view;
2855 FlatRange *fr;
2856
2857 if (listener->begin) {
2858 listener->begin(listener);
2859 }
2860 view = address_space_get_flatview(as);
2861 FOR_EACH_FLAT_RANGE(fr, view) {
2862 MemoryRegionSection section = section_from_flat_range(fr, view);
2863
2864 if (fr->dirty_log_mask && listener->log_stop) {
2865 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2866 }
2867 if (listener->region_del) {
2868 listener->region_del(listener, &section);
2869 }
2870 }
2871 if (listener->commit) {
2872 listener->commit(listener);
2873 }
2874 flatview_unref(view);
2875 }
2876
2877 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2878 {
2879 MemoryListener *other = NULL;
2880
2881 /* Only one of them can be defined for a listener */
2882 assert(!(listener->log_sync && listener->log_sync_global));
2883
2884 listener->address_space = as;
2885 if (QTAILQ_EMPTY(&memory_listeners)
2886 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
2887 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2888 } else {
2889 QTAILQ_FOREACH(other, &memory_listeners, link) {
2890 if (listener->priority < other->priority) {
2891 break;
2892 }
2893 }
2894 QTAILQ_INSERT_BEFORE(other, listener, link);
2895 }
2896
2897 if (QTAILQ_EMPTY(&as->listeners)
2898 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
2899 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2900 } else {
2901 QTAILQ_FOREACH(other, &as->listeners, link_as) {
2902 if (listener->priority < other->priority) {
2903 break;
2904 }
2905 }
2906 QTAILQ_INSERT_BEFORE(other, listener, link_as);
2907 }
2908
2909 listener_add_address_space(listener, as);
2910 }
2911
2912 void memory_listener_unregister(MemoryListener *listener)
2913 {
2914 if (!listener->address_space) {
2915 return;
2916 }
2917
2918 listener_del_address_space(listener, listener->address_space);
2919 QTAILQ_REMOVE(&memory_listeners, listener, link);
2920 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2921 listener->address_space = NULL;
2922 }
2923
2924 void address_space_remove_listeners(AddressSpace *as)
2925 {
2926 while (!QTAILQ_EMPTY(&as->listeners)) {
2927 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
2928 }
2929 }
2930
2931 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2932 {
2933 memory_region_ref(root);
2934 as->root = root;
2935 as->current_map = NULL;
2936 as->ioeventfd_nb = 0;
2937 as->ioeventfds = NULL;
2938 QTAILQ_INIT(&as->listeners);
2939 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2940 as->name = g_strdup(name ? name : "anonymous");
2941 address_space_update_topology(as);
2942 address_space_update_ioeventfds(as);
2943 }
2944
2945 static void do_address_space_destroy(AddressSpace *as)
2946 {
2947 assert(QTAILQ_EMPTY(&as->listeners));
2948
2949 flatview_unref(as->current_map);
2950 g_free(as->name);
2951 g_free(as->ioeventfds);
2952 memory_region_unref(as->root);
2953 }
2954
2955 void address_space_destroy(AddressSpace *as)
2956 {
2957 MemoryRegion *root = as->root;
2958
2959 /* Flush out anything from MemoryListeners listening in on this */
2960 memory_region_transaction_begin();
2961 as->root = NULL;
2962 memory_region_transaction_commit();
2963 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2964
2965 /* At this point, as->dispatch and as->current_map are dummy
2966 * entries that the guest should never use. Wait for the old
2967 * values to expire before freeing the data.
2968 */
2969 as->root = root;
2970 call_rcu(as, do_address_space_destroy, rcu);
2971 }
2972
2973 static const char *memory_region_type(MemoryRegion *mr)
2974 {
2975 if (mr->alias) {
2976 return memory_region_type(mr->alias);
2977 }
2978 if (memory_region_is_ram_device(mr)) {
2979 return "ramd";
2980 } else if (memory_region_is_romd(mr)) {
2981 return "romd";
2982 } else if (memory_region_is_rom(mr)) {
2983 return "rom";
2984 } else if (memory_region_is_ram(mr)) {
2985 return "ram";
2986 } else {
2987 return "i/o";
2988 }
2989 }
2990
2991 typedef struct MemoryRegionList MemoryRegionList;
2992
2993 struct MemoryRegionList {
2994 const MemoryRegion *mr;
2995 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2996 };
2997
2998 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
2999
3000 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3001 int128_sub((size), int128_one())) : 0)
3002 #define MTREE_INDENT " "
3003
3004 static void mtree_expand_owner(const char *label, Object *obj)
3005 {
3006 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
3007
3008 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
3009 if (dev && dev->id) {
3010 qemu_printf(" id=%s", dev->id);
3011 } else {
3012 char *canonical_path = object_get_canonical_path(obj);
3013 if (canonical_path) {
3014 qemu_printf(" path=%s", canonical_path);
3015 g_free(canonical_path);
3016 } else {
3017 qemu_printf(" type=%s", object_get_typename(obj));
3018 }
3019 }
3020 qemu_printf("}");
3021 }
3022
3023 static void mtree_print_mr_owner(const MemoryRegion *mr)
3024 {
3025 Object *owner = mr->owner;
3026 Object *parent = memory_region_owner((MemoryRegion *)mr);
3027
3028 if (!owner && !parent) {
3029 qemu_printf(" orphan");
3030 return;
3031 }
3032 if (owner) {
3033 mtree_expand_owner("owner", owner);
3034 }
3035 if (parent && parent != owner) {
3036 mtree_expand_owner("parent", parent);
3037 }
3038 }
3039
3040 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
3041 hwaddr base,
3042 MemoryRegionListHead *alias_print_queue,
3043 bool owner, bool display_disabled)
3044 {
3045 MemoryRegionList *new_ml, *ml, *next_ml;
3046 MemoryRegionListHead submr_print_queue;
3047 const MemoryRegion *submr;
3048 unsigned int i;
3049 hwaddr cur_start, cur_end;
3050
3051 if (!mr) {
3052 return;
3053 }
3054
3055 cur_start = base + mr->addr;
3056 cur_end = cur_start + MR_SIZE(mr->size);
3057
3058 /*
3059 * Try to detect overflow of memory region. This should never
3060 * happen normally. When it happens, we dump something to warn the
3061 * user who is observing this.
3062 */
3063 if (cur_start < base || cur_end < cur_start) {
3064 qemu_printf("[DETECTED OVERFLOW!] ");
3065 }
3066
3067 if (mr->alias) {
3068 MemoryRegionList *ml;
3069 bool found = false;
3070
3071 /* check if the alias is already in the queue */
3072 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
3073 if (ml->mr == mr->alias) {
3074 found = true;
3075 }
3076 }
3077
3078 if (!found) {
3079 ml = g_new(MemoryRegionList, 1);
3080 ml->mr = mr->alias;
3081 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
3082 }
3083 if (mr->enabled || display_disabled) {
3084 for (i = 0; i < level; i++) {
3085 qemu_printf(MTREE_INDENT);
3086 }
3087 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
3088 " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
3089 "-" TARGET_FMT_plx "%s",
3090 cur_start, cur_end,
3091 mr->priority,
3092 mr->nonvolatile ? "nv-" : "",
3093 memory_region_type((MemoryRegion *)mr),
3094 memory_region_name(mr),
3095 memory_region_name(mr->alias),
3096 mr->alias_offset,
3097 mr->alias_offset + MR_SIZE(mr->size),
3098 mr->enabled ? "" : " [disabled]");
3099 if (owner) {
3100 mtree_print_mr_owner(mr);
3101 }
3102 qemu_printf("\n");
3103 }
3104 } else {
3105 if (mr->enabled || display_disabled) {
3106 for (i = 0; i < level; i++) {
3107 qemu_printf(MTREE_INDENT);
3108 }
3109 qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
3110 " (prio %d, %s%s): %s%s",
3111 cur_start, cur_end,
3112 mr->priority,
3113 mr->nonvolatile ? "nv-" : "",
3114 memory_region_type((MemoryRegion *)mr),
3115 memory_region_name(mr),
3116 mr->enabled ? "" : " [disabled]");
3117 if (owner) {
3118 mtree_print_mr_owner(mr);
3119 }
3120 qemu_printf("\n");
3121 }
3122 }
3123
3124 QTAILQ_INIT(&submr_print_queue);
3125
3126 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
3127 new_ml = g_new(MemoryRegionList, 1);
3128 new_ml->mr = submr;
3129 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3130 if (new_ml->mr->addr < ml->mr->addr ||
3131 (new_ml->mr->addr == ml->mr->addr &&
3132 new_ml->mr->priority > ml->mr->priority)) {
3133 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
3134 new_ml = NULL;
3135 break;
3136 }
3137 }
3138 if (new_ml) {
3139 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3140 }
3141 }
3142
3143 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3144 mtree_print_mr(ml->mr, level + 1, cur_start,
3145 alias_print_queue, owner, display_disabled);
3146 }
3147
3148 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3149 g_free(ml);
3150 }
3151 }
3152
3153 struct FlatViewInfo {
3154 int counter;
3155 bool dispatch_tree;
3156 bool owner;
3157 AccelClass *ac;
3158 };
3159
3160 static void mtree_print_flatview(gpointer key, gpointer value,
3161 gpointer user_data)
3162 {
3163 FlatView *view = key;
3164 GArray *fv_address_spaces = value;
3165 struct FlatViewInfo *fvi = user_data;
3166 FlatRange *range = &view->ranges[0];
3167 MemoryRegion *mr;
3168 int n = view->nr;
3169 int i;
3170 AddressSpace *as;
3171
3172 qemu_printf("FlatView #%d\n", fvi->counter);
3173 ++fvi->counter;
3174
3175 for (i = 0; i < fv_address_spaces->len; ++i) {
3176 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3177 qemu_printf(" AS \"%s\", root: %s",
3178 as->name, memory_region_name(as->root));
3179 if (as->root->alias) {
3180 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3181 }
3182 qemu_printf("\n");
3183 }
3184
3185 qemu_printf(" Root memory region: %s\n",
3186 view->root ? memory_region_name(view->root) : "(none)");
3187
3188 if (n <= 0) {
3189 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3190 return;
3191 }
3192
3193 while (n--) {
3194 mr = range->mr;
3195 if (range->offset_in_region) {
3196 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3197 " (prio %d, %s%s): %s @" TARGET_FMT_plx,
3198 int128_get64(range->addr.start),
3199 int128_get64(range->addr.start)
3200 + MR_SIZE(range->addr.size),
3201 mr->priority,
3202 range->nonvolatile ? "nv-" : "",
3203 range->readonly ? "rom" : memory_region_type(mr),
3204 memory_region_name(mr),
3205 range->offset_in_region);
3206 } else {
3207 qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3208 " (prio %d, %s%s): %s",
3209 int128_get64(range->addr.start),
3210 int128_get64(range->addr.start)
3211 + MR_SIZE(range->addr.size),
3212 mr->priority,
3213 range->nonvolatile ? "nv-" : "",
3214 range->readonly ? "rom" : memory_region_type(mr),
3215 memory_region_name(mr));
3216 }
3217 if (fvi->owner) {
3218 mtree_print_mr_owner(mr);
3219 }
3220
3221 if (fvi->ac) {
3222 for (i = 0; i < fv_address_spaces->len; ++i) {
3223 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3224 if (fvi->ac->has_memory(current_machine, as,
3225 int128_get64(range->addr.start),
3226 MR_SIZE(range->addr.size) + 1)) {
3227 qemu_printf(" %s", fvi->ac->name);
3228 }
3229 }
3230 }
3231 qemu_printf("\n");
3232 range++;
3233 }
3234
3235 #if !defined(CONFIG_USER_ONLY)
3236 if (fvi->dispatch_tree && view->root) {
3237 mtree_print_dispatch(view->dispatch, view->root);
3238 }
3239 #endif
3240
3241 qemu_printf("\n");
3242 }
3243
3244 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3245 gpointer user_data)
3246 {
3247 FlatView *view = key;
3248 GArray *fv_address_spaces = value;
3249
3250 g_array_unref(fv_address_spaces);
3251 flatview_unref(view);
3252
3253 return true;
3254 }
3255
3256 void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3257 {
3258 MemoryRegionListHead ml_head;
3259 MemoryRegionList *ml, *ml2;
3260 AddressSpace *as;
3261
3262 if (flatview) {
3263 FlatView *view;
3264 struct FlatViewInfo fvi = {
3265 .counter = 0,
3266 .dispatch_tree = dispatch_tree,
3267 .owner = owner,
3268 };
3269 GArray *fv_address_spaces;
3270 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3271 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3272
3273 if (ac->has_memory) {
3274 fvi.ac = ac;
3275 }
3276
3277 /* Gather all FVs in one table */
3278 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3279 view = address_space_get_flatview(as);
3280
3281 fv_address_spaces = g_hash_table_lookup(views, view);
3282 if (!fv_address_spaces) {
3283 fv_address_spaces = g_array_new(false, false, sizeof(as));
3284 g_hash_table_insert(views, view, fv_address_spaces);
3285 }
3286
3287 g_array_append_val(fv_address_spaces, as);
3288 }
3289
3290 /* Print */
3291 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3292
3293 /* Free */
3294 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3295 g_hash_table_unref(views);
3296
3297 return;
3298 }
3299
3300 QTAILQ_INIT(&ml_head);
3301
3302 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3303 qemu_printf("address-space: %s\n", as->name);
3304 mtree_print_mr(as->root, 1, 0, &ml_head, owner, disabled);
3305 qemu_printf("\n");
3306 }
3307
3308 /* print aliased regions */
3309 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3310 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3311 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3312 qemu_printf("\n");
3313 }
3314
3315 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3316 g_free(ml);
3317 }
3318 }
3319
3320 void memory_region_init_ram(MemoryRegion *mr,
3321 Object *owner,
3322 const char *name,
3323 uint64_t size,
3324 Error **errp)
3325 {
3326 DeviceState *owner_dev;
3327 Error *err = NULL;
3328
3329 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3330 if (err) {
3331 error_propagate(errp, err);
3332 return;
3333 }
3334 /* This will assert if owner is neither NULL nor a DeviceState.
3335 * We only want the owner here for the purposes of defining a
3336 * unique name for migration. TODO: Ideally we should implement
3337 * a naming scheme for Objects which are not DeviceStates, in
3338 * which case we can relax this restriction.
3339 */
3340 owner_dev = DEVICE(owner);
3341 vmstate_register_ram(mr, owner_dev);
3342 }
3343
3344 void memory_region_init_rom(MemoryRegion *mr,
3345 Object *owner,
3346 const char *name,
3347 uint64_t size,
3348 Error **errp)
3349 {
3350 DeviceState *owner_dev;
3351 Error *err = NULL;
3352
3353 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3354 if (err) {
3355 error_propagate(errp, err);
3356 return;
3357 }
3358 /* This will assert if owner is neither NULL nor a DeviceState.
3359 * We only want the owner here for the purposes of defining a
3360 * unique name for migration. TODO: Ideally we should implement
3361 * a naming scheme for Objects which are not DeviceStates, in
3362 * which case we can relax this restriction.
3363 */
3364 owner_dev = DEVICE(owner);
3365 vmstate_register_ram(mr, owner_dev);
3366 }
3367
3368 void memory_region_init_rom_device(MemoryRegion *mr,
3369 Object *owner,
3370 const MemoryRegionOps *ops,
3371 void *opaque,
3372 const char *name,
3373 uint64_t size,
3374 Error **errp)
3375 {
3376 DeviceState *owner_dev;
3377 Error *err = NULL;
3378
3379 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3380 name, size, &err);
3381 if (err) {
3382 error_propagate(errp, err);
3383 return;
3384 }
3385 /* This will assert if owner is neither NULL nor a DeviceState.
3386 * We only want the owner here for the purposes of defining a
3387 * unique name for migration. TODO: Ideally we should implement
3388 * a naming scheme for Objects which are not DeviceStates, in
3389 * which case we can relax this restriction.
3390 */
3391 owner_dev = DEVICE(owner);
3392 vmstate_register_ram(mr, owner_dev);
3393 }
3394
3395 /*
3396 * Support softmmu builds with CONFIG_FUZZ using a weak symbol and a stub for
3397 * the fuzz_dma_read_cb callback
3398 */
3399 #ifdef CONFIG_FUZZ
3400 void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3401 size_t len,
3402 MemoryRegion *mr)
3403 {
3404 }
3405 #endif
3406
3407 static const TypeInfo memory_region_info = {
3408 .parent = TYPE_OBJECT,
3409 .name = TYPE_MEMORY_REGION,
3410 .class_size = sizeof(MemoryRegionClass),
3411 .instance_size = sizeof(MemoryRegion),
3412 .instance_init = memory_region_initfn,
3413 .instance_finalize = memory_region_finalize,
3414 };
3415
3416 static const TypeInfo iommu_memory_region_info = {
3417 .parent = TYPE_MEMORY_REGION,
3418 .name = TYPE_IOMMU_MEMORY_REGION,
3419 .class_size = sizeof(IOMMUMemoryRegionClass),
3420 .instance_size = sizeof(IOMMUMemoryRegion),
3421 .instance_init = iommu_memory_region_initfn,
3422 .abstract = true,
3423 };
3424
3425 static const TypeInfo ram_discard_manager_info = {
3426 .parent = TYPE_INTERFACE,
3427 .name = TYPE_RAM_DISCARD_MANAGER,
3428 .class_size = sizeof(RamDiscardManagerClass),
3429 };
3430
3431 static void memory_register_types(void)
3432 {
3433 type_register_static(&memory_region_info);
3434 type_register_static(&iommu_memory_region_info);
3435 type_register_static(&ram_discard_manager_info);
3436 }
3437
3438 type_init(memory_register_types)
Random patches