2 * QEMU ATI SVGA emulation
5 * Copyright (c) 2019 BALATON Zoltan
7 * This work is licensed under the GNU GPL license version 2 or later.
10 #include "qemu/osdep.h"
14 #include "ui/pixel_ops.h"
15 #include "ui/console.h"
19 * This is 2D _acceleration_ and supposed to be fast. Therefore, don't try to
20 * reinvent the wheel (unlikely to get better with a naive implementation than
21 * existing libraries) and avoid (poorly) reimplementing gfx primitives.
22 * That is unnecessary and would become a performance problem. Instead, try to
23 * map to and reuse existing optimised facilities (e.g. pixman) wherever
27 static int ati_bpp_from_datatype(ATIVGAState
*s
)
29 switch (s
->regs
.dp_datatype
& 0xf) {
40 qemu_log_mask(LOG_UNIMP
, "Unknown dst datatype %d\n",
41 s
->regs
.dp_datatype
& 0xf);
46 #define DEFAULT_CNTL (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL)
48 void ati_2d_blt(ATIVGAState
*s
)
50 /* FIXME it is probably more complex than this and may need to be */
51 /* rewritten but for now as a start just to get some output: */
52 DisplaySurface
*ds
= qemu_console_surface(s
->vga
.con
);
53 DPRINTF("%p %u ds: %p %d %d rop: %x\n", s
->vga
.vram_ptr
,
54 s
->vga
.vbe_start_addr
, surface_data(ds
), surface_stride(ds
),
55 surface_bits_per_pixel(ds
),
56 (s
->regs
.dp_mix
& GMC_ROP3_MASK
) >> 16);
57 unsigned dst_x
= (s
->regs
.dp_cntl
& DST_X_LEFT_TO_RIGHT
?
58 s
->regs
.dst_x
: s
->regs
.dst_x
+ 1 - s
->regs
.dst_width
);
59 unsigned dst_y
= (s
->regs
.dp_cntl
& DST_Y_TOP_TO_BOTTOM
?
60 s
->regs
.dst_y
: s
->regs
.dst_y
+ 1 - s
->regs
.dst_height
);
61 int bpp
= ati_bpp_from_datatype(s
);
63 qemu_log_mask(LOG_GUEST_ERROR
, "Invalid bpp\n");
66 int dst_stride
= DEFAULT_CNTL
? s
->regs
.dst_pitch
: s
->regs
.default_pitch
;
68 qemu_log_mask(LOG_GUEST_ERROR
, "Zero dest pitch\n");
71 uint8_t *dst_bits
= s
->vga
.vram_ptr
+ (DEFAULT_CNTL
?
72 s
->regs
.dst_offset
: s
->regs
.default_offset
);
74 if (s
->dev_id
== PCI_DEVICE_ID_ATI_RAGE128_PF
) {
75 dst_bits
+= s
->regs
.crtc_offset
& 0x07ffffff;
78 uint8_t *end
= s
->vga
.vram_ptr
+ s
->vga
.vram_size
;
79 if (dst_x
> 0x3fff || dst_y
> 0x3fff || dst_bits
>= end
81 + (dst_y
+ s
->regs
.dst_height
) * dst_stride
>= end
) {
82 qemu_log_mask(LOG_UNIMP
, "blt outside vram not implemented\n");
85 DPRINTF("%d %d %d, %d %d %d, (%d,%d) -> (%d,%d) %dx%d %c %c\n",
86 s
->regs
.src_offset
, s
->regs
.dst_offset
, s
->regs
.default_offset
,
87 s
->regs
.src_pitch
, s
->regs
.dst_pitch
, s
->regs
.default_pitch
,
88 s
->regs
.src_x
, s
->regs
.src_y
, dst_x
, dst_y
,
89 s
->regs
.dst_width
, s
->regs
.dst_height
,
90 (s
->regs
.dp_cntl
& DST_X_LEFT_TO_RIGHT
? '>' : '<'),
91 (s
->regs
.dp_cntl
& DST_Y_TOP_TO_BOTTOM
? 'v' : '^'));
92 switch (s
->regs
.dp_mix
& GMC_ROP3_MASK
) {
95 unsigned src_x
= (s
->regs
.dp_cntl
& DST_X_LEFT_TO_RIGHT
?
96 s
->regs
.src_x
: s
->regs
.src_x
+ 1 - s
->regs
.dst_width
);
97 unsigned src_y
= (s
->regs
.dp_cntl
& DST_Y_TOP_TO_BOTTOM
?
98 s
->regs
.src_y
: s
->regs
.src_y
+ 1 - s
->regs
.dst_height
);
99 int src_stride
= DEFAULT_CNTL
?
100 s
->regs
.src_pitch
: s
->regs
.default_pitch
;
102 qemu_log_mask(LOG_GUEST_ERROR
, "Zero source pitch\n");
105 uint8_t *src_bits
= s
->vga
.vram_ptr
+ (DEFAULT_CNTL
?
106 s
->regs
.src_offset
: s
->regs
.default_offset
);
108 if (s
->dev_id
== PCI_DEVICE_ID_ATI_RAGE128_PF
) {
109 src_bits
+= s
->regs
.crtc_offset
& 0x07ffffff;
112 if (src_x
> 0x3fff || src_y
> 0x3fff || src_bits
>= end
114 + (src_y
+ s
->regs
.dst_height
) * src_stride
>= end
) {
115 qemu_log_mask(LOG_UNIMP
, "blt outside vram not implemented\n");
119 src_stride
/= sizeof(uint32_t);
120 dst_stride
/= sizeof(uint32_t);
121 DPRINTF("pixman_blt(%p, %p, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d)\n",
122 src_bits
, dst_bits
, src_stride
, dst_stride
, bpp
, bpp
,
123 src_x
, src_y
, dst_x
, dst_y
,
124 s
->regs
.dst_width
, s
->regs
.dst_height
);
125 if (s
->regs
.dp_cntl
& DST_X_LEFT_TO_RIGHT
&&
126 s
->regs
.dp_cntl
& DST_Y_TOP_TO_BOTTOM
) {
127 pixman_blt((uint32_t *)src_bits
, (uint32_t *)dst_bits
,
128 src_stride
, dst_stride
, bpp
, bpp
,
129 src_x
, src_y
, dst_x
, dst_y
,
130 s
->regs
.dst_width
, s
->regs
.dst_height
);
132 /* FIXME: We only really need a temporary if src and dst overlap */
133 int llb
= s
->regs
.dst_width
* (bpp
/ 8);
134 int tmp_stride
= DIV_ROUND_UP(llb
, sizeof(uint32_t));
135 uint32_t *tmp
= g_malloc(tmp_stride
* sizeof(uint32_t) *
137 pixman_blt((uint32_t *)src_bits
, tmp
,
138 src_stride
, tmp_stride
, bpp
, bpp
,
140 s
->regs
.dst_width
, s
->regs
.dst_height
);
141 pixman_blt(tmp
, (uint32_t *)dst_bits
,
142 tmp_stride
, dst_stride
, bpp
, bpp
,
144 s
->regs
.dst_width
, s
->regs
.dst_height
);
147 if (dst_bits
>= s
->vga
.vram_ptr
+ s
->vga
.vbe_start_addr
&&
148 dst_bits
< s
->vga
.vram_ptr
+ s
->vga
.vbe_start_addr
+
149 s
->vga
.vbe_regs
[VBE_DISPI_INDEX_YRES
] * s
->vga
.vbe_line_offset
) {
150 memory_region_set_dirty(&s
->vga
.vram
, s
->vga
.vbe_start_addr
+
152 dst_y
* surface_stride(ds
),
153 s
->regs
.dst_height
* surface_stride(ds
));
155 s
->regs
.dst_x
= (s
->regs
.dp_cntl
& DST_X_LEFT_TO_RIGHT
?
156 dst_x
+ s
->regs
.dst_width
: dst_x
);
157 s
->regs
.dst_y
= (s
->regs
.dp_cntl
& DST_Y_TOP_TO_BOTTOM
?
158 dst_y
+ s
->regs
.dst_height
: dst_y
);
167 switch (s
->regs
.dp_mix
& GMC_ROP3_MASK
) {
169 filler
= s
->regs
.dp_brush_frgd_clr
;
172 filler
= 0xffUL
<< 24 | rgb_to_pixel32(s
->vga
.palette
[0],
173 s
->vga
.palette
[1], s
->vga
.palette
[2]);
176 filler
= 0xffUL
<< 24 | rgb_to_pixel32(s
->vga
.palette
[3],
177 s
->vga
.palette
[4], s
->vga
.palette
[5]);
181 dst_stride
/= sizeof(uint32_t);
182 DPRINTF("pixman_fill(%p, %d, %d, %d, %d, %d, %d, %x)\n",
183 dst_bits
, dst_stride
, bpp
,
185 s
->regs
.dst_width
, s
->regs
.dst_height
,
187 pixman_fill((uint32_t *)dst_bits
, dst_stride
, bpp
,
189 s
->regs
.dst_width
, s
->regs
.dst_height
,
191 if (dst_bits
>= s
->vga
.vram_ptr
+ s
->vga
.vbe_start_addr
&&
192 dst_bits
< s
->vga
.vram_ptr
+ s
->vga
.vbe_start_addr
+
193 s
->vga
.vbe_regs
[VBE_DISPI_INDEX_YRES
] * s
->vga
.vbe_line_offset
) {
194 memory_region_set_dirty(&s
->vga
.vram
, s
->vga
.vbe_start_addr
+
196 dst_y
* surface_stride(ds
),
197 s
->regs
.dst_height
* surface_stride(ds
));
199 s
->regs
.dst_y
= (s
->regs
.dp_cntl
& DST_Y_TOP_TO_BOTTOM
?
200 dst_y
+ s
->regs
.dst_height
: dst_y
);
204 qemu_log_mask(LOG_UNIMP
, "Unimplemented ati_2d blt op %x\n",
205 (s
->regs
.dp_mix
& GMC_ROP3_MASK
) >> 16);