hw/arm/exynos4_boards.c

   1 /*
   2  *  Samsung exynos4 SoC based boards emulation
   3  *
   4  *  Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
   5  *    Maksim Kozlov <m.kozlov@samsung.com>
   6  *    Evgeny Voevodin <e.voevodin@samsung.com>
   7  *    Igor Mitsyanko  <i.mitsyanko@samsung.com>
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License as published by the
  11  *  Free Software Foundation; either version 2 of the License, or
  12  *  (at your option) any later version.
  13  *
  14  *  This program is distributed in the hope that it will be useful, but WITHOUT
  15  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16  *  FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  17  *  for more details.
  18  *
  19  *  You should have received a copy of the GNU General Public License along
  20  *  with this program; if not, see <http://www.gnu.org/licenses/>.
  21  *
  22  */
  23
  24 #include "qemu/osdep.h"
  25 #include "qemu/units.h"
  26 #include "qapi/error.h"
  27 #include "qemu/error-report.h"
  28 #include "hw/sysbus.h"
  29 #include "net/net.h"
  30 #include "hw/arm/boot.h"
  31 #include "exec/address-spaces.h"
  32 #include "hw/arm/exynos4210.h"
  33 #include "hw/net/lan9118.h"
  34 #include "hw/qdev-properties.h"
  35 #include "hw/boards.h"
  36 #include "hw/irq.h"
  37 #include "target/arm/cpu-qom.h"
  38
  39 #define SMDK_LAN9118_BASE_ADDR      0x05000000
  40
  41 typedef enum Exynos4BoardType {
  42     EXYNOS4_BOARD_NURI,
  43     EXYNOS4_BOARD_SMDKC210,
  44     EXYNOS4_NUM_OF_BOARDS
  45 } Exynos4BoardType;
  46
  47 typedef struct Exynos4BoardState {
  48     Exynos4210State soc;
  49     MemoryRegion dram0_mem;
  50     MemoryRegion dram1_mem;
  51 } Exynos4BoardState;
  52
  53 static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = {
  54     [EXYNOS4_BOARD_NURI]     = 0xD33,
  55     [EXYNOS4_BOARD_SMDKC210] = 0xB16,
  56 };
  57
  58 static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
  59     [EXYNOS4_BOARD_NURI]     = EXYNOS4210_SECOND_CPU_BOOTREG,
  60     [EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG,
  61 };
  62
  63 static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
  64     [EXYNOS4_BOARD_NURI]     = 1 * GiB,
  65     [EXYNOS4_BOARD_SMDKC210] = 1 * GiB,
  66 };
  67
  68 static struct arm_boot_info exynos4_board_binfo = {
  69     .loader_start     = EXYNOS4210_BASE_BOOT_ADDR,
  70     .smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR,
  71     .write_secondary_boot = exynos4210_write_secondary,
  72 };
  73
  74 static void lan9215_init(uint32_t base, qemu_irq irq)
  75 {
  76     DeviceState *dev;
  77     SysBusDevice *s;
  78
  79     /* This should be a 9215 but the 9118 is close enough */
  80     dev = qemu_create_nic_device(TYPE_LAN9118, true, NULL);
  81     if (dev) {
  82         qdev_prop_set_uint32(dev, "mode_16bit", 1);
  83         s = SYS_BUS_DEVICE(dev);
  84         sysbus_realize_and_unref(s, &error_fatal);
  85         sysbus_mmio_map(s, 0, base);
  86         sysbus_connect_irq(s, 0, irq);
  87     }
  88 }
  89
  90 static void exynos4_boards_init_ram(Exynos4BoardState *s,
  91                                     MemoryRegion *system_mem,
  92                                     unsigned long ram_size)
  93 {
  94     unsigned long mem_size = ram_size;
  95
  96     if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) {
  97         memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1",
  98                                mem_size - EXYNOS4210_DRAM_MAX_SIZE,
  99                                &error_fatal);
 100         memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR,
 101                                     &s->dram1_mem);
 102         mem_size = EXYNOS4210_DRAM_MAX_SIZE;
 103     }
 104
 105     memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size,
 106                            &error_fatal);
 107     memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
 108                                 &s->dram0_mem);
 109 }
 110
 111 static Exynos4BoardState *
 112 exynos4_boards_init_common(MachineState *machine,
 113                            Exynos4BoardType board_type)
 114 {
 115     Exynos4BoardState *s = g_new(Exynos4BoardState, 1);
 116
 117     exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type];
 118     exynos4_board_binfo.board_id = exynos4_board_id[board_type];
 119     exynos4_board_binfo.smp_bootreg_addr =
 120             exynos4_board_smp_bootreg_addr[board_type];
 121     exynos4_board_binfo.gic_cpu_if_addr =
 122             EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
 123
 124     exynos4_boards_init_ram(s, get_system_memory(),
 125                             exynos4_board_ram_size[board_type]);
 126
 127     object_initialize_child(OBJECT(machine), "soc", &s->soc,
 128                             TYPE_EXYNOS4210_SOC);
 129     sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
 130
 131     return s;
 132 }
 133
 134 static void nuri_init(MachineState *machine)
 135 {
 136     Exynos4BoardState *s = exynos4_boards_init_common(machine,
 137                                                       EXYNOS4_BOARD_NURI);
 138
 139     arm_load_kernel(s->soc.cpu[0], machine, &exynos4_board_binfo);
 140 }
 141
 142 static void smdkc210_init(MachineState *machine)
 143 {
 144     Exynos4BoardState *s = exynos4_boards_init_common(machine,
 145                                                       EXYNOS4_BOARD_SMDKC210);
 146
 147     lan9215_init(SMDK_LAN9118_BASE_ADDR,
 148             qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)]));
 149     arm_load_kernel(s->soc.cpu[0], machine, &exynos4_board_binfo);
 150 }
 151
 152 static const char * const valid_cpu_types[] = {
 153     ARM_CPU_TYPE_NAME("cortex-a9"),
 154     NULL
 155 };
 156
 157 static void nuri_class_init(ObjectClass *oc, void *data)
 158 {
 159     MachineClass *mc = MACHINE_CLASS(oc);
 160
 161     mc->desc = "Samsung NURI board (Exynos4210)";
 162     mc->init = nuri_init;
 163     mc->valid_cpu_types = valid_cpu_types;
 164     mc->max_cpus = EXYNOS4210_NCPUS;
 165     mc->min_cpus = EXYNOS4210_NCPUS;
 166     mc->default_cpus = EXYNOS4210_NCPUS;
 167     mc->ignore_memory_transaction_failures = true;
 168 }
 169
 170 static const TypeInfo nuri_type = {
 171     .name = MACHINE_TYPE_NAME("nuri"),
 172     .parent = TYPE_MACHINE,
 173     .class_init = nuri_class_init,
 174 };
 175
 176 static void smdkc210_class_init(ObjectClass *oc, void *data)
 177 {
 178     MachineClass *mc = MACHINE_CLASS(oc);
 179
 180     mc->desc = "Samsung SMDKC210 board (Exynos4210)";
 181     mc->init = smdkc210_init;
 182     mc->valid_cpu_types = valid_cpu_types;
 183     mc->max_cpus = EXYNOS4210_NCPUS;
 184     mc->min_cpus = EXYNOS4210_NCPUS;
 185     mc->default_cpus = EXYNOS4210_NCPUS;
 186     mc->ignore_memory_transaction_failures = true;
 187 }
 188
 189 static const TypeInfo smdkc210_type = {
 190     .name = MACHINE_TYPE_NAME("smdkc210"),
 191     .parent = TYPE_MACHINE,
 192     .class_init = smdkc210_class_init,
 193 };
 194
 195 static void exynos4_machines_init(void)
 196 {
 197     type_register_static(&nuri_type);
 198     type_register_static(&smdkc210_type);
 199 }
 200
 201 type_init(exynos4_machines_init)