2 * emulator main execution loop
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
22 #include "disas/disas.h"
23 #include "exec/exec-all.h"
25 #include "qemu/atomic.h"
26 #include "sysemu/qtest.h"
27 #include "qemu/timer.h"
28 #include "exec/address-spaces.h"
30 #include "exec/tb-hash.h"
32 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
33 #include "hw/i386/apic.h"
35 #include "sysemu/replay.h"
37 /* -icount align implementation. */
39 typedef struct SyncClocks
{
41 int64_t last_cpu_icount
;
42 int64_t realtime_clock
;
45 #if !defined(CONFIG_USER_ONLY)
46 /* Allow the guest to have a max 3ms advance.
47 * The difference between the 2 clocks could therefore
50 #define VM_CLOCK_ADVANCE 3000000
51 #define THRESHOLD_REDUCE 1.5
52 #define MAX_DELAY_PRINT_RATE 2000000000LL
53 #define MAX_NB_PRINTS 100
55 static void align_clocks(SyncClocks
*sc
, const CPUState
*cpu
)
59 if (!icount_align_option
) {
63 cpu_icount
= cpu
->icount_extra
+ cpu
->icount_decr
.u16
.low
;
64 sc
->diff_clk
+= cpu_icount_to_ns(sc
->last_cpu_icount
- cpu_icount
);
65 sc
->last_cpu_icount
= cpu_icount
;
67 if (sc
->diff_clk
> VM_CLOCK_ADVANCE
) {
69 struct timespec sleep_delay
, rem_delay
;
70 sleep_delay
.tv_sec
= sc
->diff_clk
/ 1000000000LL;
71 sleep_delay
.tv_nsec
= sc
->diff_clk
% 1000000000LL;
72 if (nanosleep(&sleep_delay
, &rem_delay
) < 0) {
73 sc
->diff_clk
= rem_delay
.tv_sec
* 1000000000LL + rem_delay
.tv_nsec
;
78 Sleep(sc
->diff_clk
/ SCALE_MS
);
84 static void print_delay(const SyncClocks
*sc
)
86 static float threshold_delay
;
87 static int64_t last_realtime_clock
;
90 if (icount_align_option
&&
91 sc
->realtime_clock
- last_realtime_clock
>= MAX_DELAY_PRINT_RATE
&&
92 nb_prints
< MAX_NB_PRINTS
) {
93 if ((-sc
->diff_clk
/ (float)1000000000LL > threshold_delay
) ||
94 (-sc
->diff_clk
/ (float)1000000000LL <
95 (threshold_delay
- THRESHOLD_REDUCE
))) {
96 threshold_delay
= (-sc
->diff_clk
/ 1000000000LL) + 1;
97 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
101 last_realtime_clock
= sc
->realtime_clock
;
106 static void init_delay_params(SyncClocks
*sc
,
109 if (!icount_align_option
) {
112 sc
->realtime_clock
= qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT
);
113 sc
->diff_clk
= qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
) - sc
->realtime_clock
;
114 sc
->last_cpu_icount
= cpu
->icount_extra
+ cpu
->icount_decr
.u16
.low
;
115 if (sc
->diff_clk
< max_delay
) {
116 max_delay
= sc
->diff_clk
;
118 if (sc
->diff_clk
> max_advance
) {
119 max_advance
= sc
->diff_clk
;
122 /* Print every 2s max if the guest is late. We limit the number
123 of printed messages to NB_PRINT_MAX(currently 100) */
127 static void align_clocks(SyncClocks
*sc
, const CPUState
*cpu
)
131 static void init_delay_params(SyncClocks
*sc
, const CPUState
*cpu
)
134 #endif /* CONFIG USER ONLY */
136 /* Execute a TB, and fix up the CPU state afterwards if necessary */
137 static inline tcg_target_ulong
cpu_tb_exec(CPUState
*cpu
, TranslationBlock
*itb
)
139 CPUArchState
*env
= cpu
->env_ptr
;
141 TranslationBlock
*last_tb
;
143 uint8_t *tb_ptr
= itb
->tc_ptr
;
145 qemu_log_mask_and_addr(CPU_LOG_EXEC
, itb
->pc
,
146 "Trace %p [%d: " TARGET_FMT_lx
"] %s\n",
147 itb
->tc_ptr
, cpu
->cpu_index
, itb
->pc
,
148 lookup_symbol(itb
->pc
));
150 #if defined(DEBUG_DISAS)
151 if (qemu_loglevel_mask(CPU_LOG_TB_CPU
)
152 && qemu_log_in_addr_range(itb
->pc
)) {
153 #if defined(TARGET_I386)
154 log_cpu_state(cpu
, CPU_DUMP_CCOP
);
156 log_cpu_state(cpu
, 0);
159 #endif /* DEBUG_DISAS */
161 cpu
->can_do_io
= !use_icount
;
162 ret
= tcg_qemu_tb_exec(env
, tb_ptr
);
164 last_tb
= (TranslationBlock
*)(ret
& ~TB_EXIT_MASK
);
165 tb_exit
= ret
& TB_EXIT_MASK
;
166 trace_exec_tb_exit(last_tb
, tb_exit
);
168 if (tb_exit
> TB_EXIT_IDX1
) {
169 /* We didn't start executing this TB (eg because the instruction
170 * counter hit zero); we must restore the guest PC to the address
171 * of the start of the TB.
173 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
174 qemu_log_mask_and_addr(CPU_LOG_EXEC
, last_tb
->pc
,
175 "Stopped execution of TB chain before %p ["
176 TARGET_FMT_lx
"] %s\n",
177 last_tb
->tc_ptr
, last_tb
->pc
,
178 lookup_symbol(last_tb
->pc
));
179 if (cc
->synchronize_from_tb
) {
180 cc
->synchronize_from_tb(cpu
, last_tb
);
183 cc
->set_pc(cpu
, last_tb
->pc
);
186 if (tb_exit
== TB_EXIT_REQUESTED
) {
187 /* We were asked to stop executing TBs (probably a pending
188 * interrupt. We've now stopped, so clear the flag.
190 atomic_set(&cpu
->tcg_exit_req
, 0);
195 #ifndef CONFIG_USER_ONLY
196 /* Execute the code without caching the generated code. An interpreter
197 could be used if available. */
198 static void cpu_exec_nocache(CPUState
*cpu
, int max_cycles
,
199 TranslationBlock
*orig_tb
, bool ignore_icount
)
201 TranslationBlock
*tb
;
203 /* Should never happen.
204 We only end up here when an existing TB is too long. */
205 if (max_cycles
> CF_COUNT_MASK
)
206 max_cycles
= CF_COUNT_MASK
;
209 tb
= tb_gen_code(cpu
, orig_tb
->pc
, orig_tb
->cs_base
, orig_tb
->flags
,
210 max_cycles
| CF_NOCACHE
211 | (ignore_icount
? CF_IGNORE_ICOUNT
: 0));
212 tb
->orig_tb
= orig_tb
;
215 /* execute the generated code */
216 trace_exec_tb_nocache(tb
, tb
->pc
);
217 cpu_tb_exec(cpu
, tb
);
220 tb_phys_invalidate(tb
, -1);
226 static void cpu_exec_step(CPUState
*cpu
)
228 CPUArchState
*env
= (CPUArchState
*)cpu
->env_ptr
;
229 TranslationBlock
*tb
;
230 target_ulong cs_base
, pc
;
233 cpu_get_tb_cpu_state(env
, &pc
, &cs_base
, &flags
);
234 tb
= tb_gen_code(cpu
, pc
, cs_base
, flags
,
235 1 | CF_NOCACHE
| CF_IGNORE_ICOUNT
);
237 /* execute the generated code */
238 trace_exec_tb_nocache(tb
, pc
);
239 cpu_tb_exec(cpu
, tb
);
240 tb_phys_invalidate(tb
, -1);
244 void cpu_exec_step_atomic(CPUState
*cpu
)
248 /* Since we got here, we know that parallel_cpus must be true. */
249 parallel_cpus
= false;
251 parallel_cpus
= true;
258 target_ulong cs_base
;
260 tb_page_addr_t phys_page1
;
264 static bool tb_cmp(const void *p
, const void *d
)
266 const TranslationBlock
*tb
= p
;
267 const struct tb_desc
*desc
= d
;
269 if (tb
->pc
== desc
->pc
&&
270 tb
->page_addr
[0] == desc
->phys_page1
&&
271 tb
->cs_base
== desc
->cs_base
&&
272 tb
->flags
== desc
->flags
&&
273 !atomic_read(&tb
->invalid
)) {
274 /* check next page if needed */
275 if (tb
->page_addr
[1] == -1) {
278 tb_page_addr_t phys_page2
;
279 target_ulong virt_page2
;
281 virt_page2
= (desc
->pc
& TARGET_PAGE_MASK
) + TARGET_PAGE_SIZE
;
282 phys_page2
= get_page_addr_code(desc
->env
, virt_page2
);
283 if (tb
->page_addr
[1] == phys_page2
) {
291 static TranslationBlock
*tb_htable_lookup(CPUState
*cpu
,
293 target_ulong cs_base
,
296 tb_page_addr_t phys_pc
;
300 desc
.env
= (CPUArchState
*)cpu
->env_ptr
;
301 desc
.cs_base
= cs_base
;
304 phys_pc
= get_page_addr_code(desc
.env
, pc
);
305 desc
.phys_page1
= phys_pc
& TARGET_PAGE_MASK
;
306 h
= tb_hash_func(phys_pc
, pc
, flags
);
307 return qht_lookup(&tcg_ctx
.tb_ctx
.htable
, tb_cmp
, &desc
, h
);
310 static inline TranslationBlock
*tb_find(CPUState
*cpu
,
311 TranslationBlock
*last_tb
,
314 CPUArchState
*env
= (CPUArchState
*)cpu
->env_ptr
;
315 TranslationBlock
*tb
;
316 target_ulong cs_base
, pc
;
318 bool have_tb_lock
= false;
320 /* we record a subset of the CPU state. It will
321 always be the same before a given translated block
323 cpu_get_tb_cpu_state(env
, &pc
, &cs_base
, &flags
);
324 tb
= atomic_rcu_read(&cpu
->tb_jmp_cache
[tb_jmp_cache_hash_func(pc
)]);
325 if (unlikely(!tb
|| tb
->pc
!= pc
|| tb
->cs_base
!= cs_base
||
326 tb
->flags
!= flags
)) {
327 tb
= tb_htable_lookup(cpu
, pc
, cs_base
, flags
);
330 /* mmap_lock is needed by tb_gen_code, and mmap_lock must be
331 * taken outside tb_lock. As system emulation is currently
332 * single threaded the locks are NOPs.
338 /* There's a chance that our desired tb has been translated while
339 * taking the locks so we check again inside the lock.
341 tb
= tb_htable_lookup(cpu
, pc
, cs_base
, flags
);
343 /* if no translated code available, then translate it now */
344 tb
= tb_gen_code(cpu
, pc
, cs_base
, flags
, 0);
350 /* We add the TB in the virtual pc hash table for the fast lookup */
351 atomic_set(&cpu
->tb_jmp_cache
[tb_jmp_cache_hash_func(pc
)], tb
);
353 #ifndef CONFIG_USER_ONLY
354 /* We don't take care of direct jumps when address mapping changes in
355 * system emulation. So it's not safe to make a direct jump to a TB
356 * spanning two pages because the mapping for the second page can change.
358 if (tb
->page_addr
[1] != -1) {
362 /* See if we can patch the calling TB. */
363 if (last_tb
&& !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN
)) {
369 tb_add_jump(last_tb
, tb_exit
, tb
);
378 static inline bool cpu_handle_halt(CPUState
*cpu
)
381 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
382 if ((cpu
->interrupt_request
& CPU_INTERRUPT_POLL
)
383 && replay_interrupt()) {
384 X86CPU
*x86_cpu
= X86_CPU(cpu
);
385 apic_poll_irq(x86_cpu
->apic_state
);
386 cpu_reset_interrupt(cpu
, CPU_INTERRUPT_POLL
);
389 if (!cpu_has_work(cpu
)) {
400 static inline void cpu_handle_debug_exception(CPUState
*cpu
)
402 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
405 if (!cpu
->watchpoint_hit
) {
406 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
407 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
411 cc
->debug_excp_handler(cpu
);
414 static inline bool cpu_handle_exception(CPUState
*cpu
, int *ret
)
416 if (cpu
->exception_index
>= 0) {
417 if (cpu
->exception_index
>= EXCP_INTERRUPT
) {
418 /* exit request from the cpu execution loop */
419 *ret
= cpu
->exception_index
;
420 if (*ret
== EXCP_DEBUG
) {
421 cpu_handle_debug_exception(cpu
);
423 cpu
->exception_index
= -1;
426 #if defined(CONFIG_USER_ONLY)
427 /* if user mode only, we simulate a fake exception
428 which will be handled outside the cpu execution
430 #if defined(TARGET_I386)
431 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
432 cc
->do_interrupt(cpu
);
434 *ret
= cpu
->exception_index
;
435 cpu
->exception_index
= -1;
438 if (replay_exception()) {
439 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
440 cc
->do_interrupt(cpu
);
441 cpu
->exception_index
= -1;
442 } else if (!replay_has_interrupt()) {
443 /* give a chance to iothread in replay mode */
444 *ret
= EXCP_INTERRUPT
;
449 #ifndef CONFIG_USER_ONLY
450 } else if (replay_has_exception()
451 && cpu
->icount_decr
.u16
.low
+ cpu
->icount_extra
== 0) {
452 /* try to cause an exception pending in the log */
453 cpu_exec_nocache(cpu
, 1, tb_find(cpu
, NULL
, 0), true);
462 static inline void cpu_handle_interrupt(CPUState
*cpu
,
463 TranslationBlock
**last_tb
)
465 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
466 int interrupt_request
= cpu
->interrupt_request
;
468 if (unlikely(interrupt_request
)) {
469 if (unlikely(cpu
->singlestep_enabled
& SSTEP_NOIRQ
)) {
470 /* Mask out external interrupts for this step. */
471 interrupt_request
&= ~CPU_INTERRUPT_SSTEP_MASK
;
473 if (interrupt_request
& CPU_INTERRUPT_DEBUG
) {
474 cpu
->interrupt_request
&= ~CPU_INTERRUPT_DEBUG
;
475 cpu
->exception_index
= EXCP_DEBUG
;
478 if (replay_mode
== REPLAY_MODE_PLAY
&& !replay_has_interrupt()) {
480 } else if (interrupt_request
& CPU_INTERRUPT_HALT
) {
482 cpu
->interrupt_request
&= ~CPU_INTERRUPT_HALT
;
484 cpu
->exception_index
= EXCP_HLT
;
487 #if defined(TARGET_I386)
488 else if (interrupt_request
& CPU_INTERRUPT_INIT
) {
489 X86CPU
*x86_cpu
= X86_CPU(cpu
);
490 CPUArchState
*env
= &x86_cpu
->env
;
492 cpu_svm_check_intercept_param(env
, SVM_EXIT_INIT
, 0);
493 do_cpu_init(x86_cpu
);
494 cpu
->exception_index
= EXCP_HALTED
;
498 else if (interrupt_request
& CPU_INTERRUPT_RESET
) {
504 /* The target hook has 3 exit conditions:
505 False when the interrupt isn't processed,
506 True when it is, and we should restart on a new TB,
507 and via longjmp via cpu_loop_exit. */
510 if (cc
->cpu_exec_interrupt(cpu
, interrupt_request
)) {
513 /* The target hook may have updated the 'cpu->interrupt_request';
514 * reload the 'interrupt_request' value */
515 interrupt_request
= cpu
->interrupt_request
;
517 if (interrupt_request
& CPU_INTERRUPT_EXITTB
) {
518 cpu
->interrupt_request
&= ~CPU_INTERRUPT_EXITTB
;
519 /* ensure that no TB jump will be modified as
520 the program flow was changed */
524 if (unlikely(atomic_read(&cpu
->exit_request
) || replay_has_interrupt())) {
525 atomic_set(&cpu
->exit_request
, 0);
526 cpu
->exception_index
= EXCP_INTERRUPT
;
531 static inline void cpu_loop_exec_tb(CPUState
*cpu
, TranslationBlock
*tb
,
532 TranslationBlock
**last_tb
, int *tb_exit
,
537 if (unlikely(atomic_read(&cpu
->exit_request
))) {
541 trace_exec_tb(tb
, tb
->pc
);
542 ret
= cpu_tb_exec(cpu
, tb
);
543 *last_tb
= (TranslationBlock
*)(ret
& ~TB_EXIT_MASK
);
544 *tb_exit
= ret
& TB_EXIT_MASK
;
546 case TB_EXIT_REQUESTED
:
547 /* Something asked us to stop executing
548 * chained TBs; just continue round the main
549 * loop. Whatever requested the exit will also
550 * have set something else (eg exit_request or
551 * interrupt_request) which we will handle
552 * next time around the loop. But we need to
553 * ensure the tcg_exit_req read in generated code
554 * comes before the next read of cpu->exit_request
555 * or cpu->interrupt_request.
560 case TB_EXIT_ICOUNT_EXPIRED
:
562 /* Instruction counter expired. */
563 #ifdef CONFIG_USER_ONLY
566 int insns_left
= cpu
->icount_decr
.u32
;
567 if (cpu
->icount_extra
&& insns_left
>= 0) {
568 /* Refill decrementer and continue execution. */
569 cpu
->icount_extra
+= insns_left
;
570 insns_left
= MIN(0xffff, cpu
->icount_extra
);
571 cpu
->icount_extra
-= insns_left
;
572 cpu
->icount_decr
.u16
.low
= insns_left
;
574 if (insns_left
> 0) {
575 /* Execute remaining instructions. */
576 cpu_exec_nocache(cpu
, insns_left
, *last_tb
, false);
577 align_clocks(sc
, cpu
);
579 cpu
->exception_index
= EXCP_INTERRUPT
;
591 /* main execution loop */
593 int cpu_exec(CPUState
*cpu
)
595 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
599 /* replay_interrupt may need current_cpu */
602 if (cpu_handle_halt(cpu
)) {
606 atomic_mb_set(&tcg_current_cpu
, cpu
);
609 if (unlikely(atomic_mb_read(&exit_request
))) {
610 cpu
->exit_request
= 1;
613 cc
->cpu_exec_enter(cpu
);
615 /* Calculate difference between guest clock and host clock.
616 * This delay includes the delay of the last cycle, so
617 * what we have to do is sleep until it is 0. As for the
618 * advance/delay we gain here, we try to fix it next time.
620 init_delay_params(&sc
, cpu
);
623 /* prepare setjmp context for exception handling */
624 if (sigsetjmp(cpu
->jmp_env
, 0) == 0) {
625 TranslationBlock
*tb
, *last_tb
= NULL
;
628 /* if an exception is pending, we execute it here */
629 if (cpu_handle_exception(cpu
, &ret
)) {
634 cpu_handle_interrupt(cpu
, &last_tb
);
635 tb
= tb_find(cpu
, last_tb
, tb_exit
);
636 cpu_loop_exec_tb(cpu
, tb
, &last_tb
, &tb_exit
, &sc
);
637 /* Try to align the host and virtual clocks
638 if the guest is in advance */
639 align_clocks(&sc
, cpu
);
642 #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
643 /* Some compilers wrongly smash all local variables after
644 * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
645 * Reload essential local variables here for those compilers.
646 * Newer versions of gcc would complain about this code (-Wclobbered). */
648 cc
= CPU_GET_CLASS(cpu
);
649 #else /* buggy compiler */
650 /* Assert that the compiler does not smash local variables. */
651 g_assert(cpu
== current_cpu
);
652 g_assert(cc
== CPU_GET_CLASS(cpu
));
653 #endif /* buggy compiler */
659 cc
->cpu_exec_exit(cpu
);
662 /* fail safe : never use current_cpu outside cpu_exec() */
665 /* Does not need atomic_mb_set because a spurious wakeup is okay. */
666 atomic_set(&tcg_current_cpu
, NULL
);