4 * Copyright Red Hat, Inc. 2013-2014
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
10 * This work is licensed under the terms of the GNU GPL, version 2.
11 * See the COPYING file in the top-level directory.
14 #ifndef HW_VIRTIO_GPU_H
15 #define HW_VIRTIO_GPU_H
17 #include "qemu/queue.h"
18 #include "ui/qemu-pixman.h"
19 #include "ui/console.h"
20 #include "hw/virtio/virtio.h"
22 #include "sysemu/vhost-user-backend.h"
24 #include "standard-headers/linux/virtio_gpu.h"
25 #include "qom/object.h"
27 #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base"
28 OBJECT_DECLARE_TYPE(VirtIOGPUBase
, VirtIOGPUBaseClass
,
31 #define TYPE_VIRTIO_GPU "virtio-gpu-device"
32 OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPU
, VIRTIO_GPU
)
34 #define TYPE_VIRTIO_GPU_GL "virtio-gpu-gl-device"
35 OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPUGL
, VIRTIO_GPU_GL
)
37 #define TYPE_VHOST_USER_GPU "vhost-user-gpu"
38 OBJECT_DECLARE_SIMPLE_TYPE(VhostUserGPU
, VHOST_USER_GPU
)
40 #define VIRTIO_ID_GPU 16
42 struct virtio_gpu_simple_resource
{
50 uint32_t scanout_bitmask
;
51 pixman_image_t
*image
;
53 QTAILQ_ENTRY(virtio_gpu_simple_resource
) next
;
56 struct virtio_gpu_scanout
{
59 uint32_t width
, height
;
63 struct virtio_gpu_update_cursor cursor
;
64 QEMUCursor
*current_cursor
;
67 struct virtio_gpu_requested_state
{
68 uint16_t width_mm
, height_mm
;
69 uint32_t width
, height
;
73 enum virtio_gpu_base_conf_flags
{
74 VIRTIO_GPU_FLAG_VIRGL_ENABLED
= 1,
75 VIRTIO_GPU_FLAG_STATS_ENABLED
,
76 VIRTIO_GPU_FLAG_EDID_ENABLED
,
77 VIRTIO_GPU_FLAG_DMABUF_ENABLED
,
80 #define virtio_gpu_virgl_enabled(_cfg) \
81 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))
82 #define virtio_gpu_stats_enabled(_cfg) \
83 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))
84 #define virtio_gpu_edid_enabled(_cfg) \
85 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED))
86 #define virtio_gpu_dmabuf_enabled(_cfg) \
87 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED))
89 struct virtio_gpu_base_conf
{
96 struct virtio_gpu_ctrl_command
{
97 VirtQueueElement elem
;
99 struct virtio_gpu_ctrl_hdr cmd_hdr
;
102 QTAILQ_ENTRY(virtio_gpu_ctrl_command
) next
;
105 struct VirtIOGPUBase
{
106 VirtIODevice parent_obj
;
108 Error
*migration_blocker
;
110 struct virtio_gpu_base_conf conf
;
111 struct virtio_gpu_config virtio_config
;
112 const GraphicHwOps
*hw_ops
;
114 bool use_virgl_renderer
;
115 int renderer_blocked
;
118 struct virtio_gpu_scanout scanout
[VIRTIO_GPU_MAX_SCANOUTS
];
120 int enabled_output_bitmask
;
121 struct virtio_gpu_requested_state req_state
[VIRTIO_GPU_MAX_SCANOUTS
];
124 struct VirtIOGPUBaseClass
{
125 VirtioDeviceClass parent
;
127 void (*gl_flushed
)(VirtIOGPUBase
*g
);
130 #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \
131 DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \
132 DEFINE_PROP_BIT("edid", _state, _conf.flags, \
133 VIRTIO_GPU_FLAG_EDID_ENABLED, true), \
134 DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1024), \
135 DEFINE_PROP_UINT32("yres", _state, _conf.yres, 768)
138 VirtIOGPUBase parent_obj
;
140 uint64_t conf_max_hostmem
;
143 VirtQueue
*cursor_vq
;
148 QTAILQ_HEAD(, virtio_gpu_simple_resource
) reslist
;
149 QTAILQ_HEAD(, virtio_gpu_ctrl_command
) cmdq
;
150 QTAILQ_HEAD(, virtio_gpu_ctrl_command
) fenceq
;
154 bool processing_cmdq
;
155 bool renderer_inited
;
157 QEMUTimer
*fence_poll
;
158 QEMUTimer
*print_stats
;
162 uint32_t max_inflight
;
170 struct VirtIOGPU parent_obj
;
173 struct VhostUserGPU
{
174 VirtIOGPUBase parent_obj
;
176 VhostUserBackend
*vhost
;
177 int vhost_gpu_fd
; /* closed by the chardev */
178 CharBackend vhost_chr
;
179 QemuDmaBuf dmabuf
[VIRTIO_GPU_MAX_SCANOUTS
];
180 bool backend_blocked
;
183 #define VIRTIO_GPU_FILL_CMD(out) do { \
185 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \
186 &out, sizeof(out)); \
187 if (s != sizeof(out)) { \
188 qemu_log_mask(LOG_GUEST_ERROR, \
189 "%s: command size incorrect %zu vs %zu\n", \
190 __func__, s, sizeof(out)); \
195 /* virtio-gpu-base.c */
196 bool virtio_gpu_base_device_realize(DeviceState
*qdev
,
197 VirtIOHandleOutput ctrl_cb
,
198 VirtIOHandleOutput cursor_cb
,
200 void virtio_gpu_base_reset(VirtIOGPUBase
*g
);
201 void virtio_gpu_base_fill_display_info(VirtIOGPUBase
*g
,
202 struct virtio_gpu_resp_display_info
*dpy_info
);
205 void virtio_gpu_ctrl_response(VirtIOGPU
*g
,
206 struct virtio_gpu_ctrl_command
*cmd
,
207 struct virtio_gpu_ctrl_hdr
*resp
,
209 void virtio_gpu_ctrl_response_nodata(VirtIOGPU
*g
,
210 struct virtio_gpu_ctrl_command
*cmd
,
211 enum virtio_gpu_ctrl_type type
);
212 void virtio_gpu_get_display_info(VirtIOGPU
*g
,
213 struct virtio_gpu_ctrl_command
*cmd
);
214 void virtio_gpu_get_edid(VirtIOGPU
*g
,
215 struct virtio_gpu_ctrl_command
*cmd
);
216 int virtio_gpu_create_mapping_iov(VirtIOGPU
*g
,
217 struct virtio_gpu_resource_attach_backing
*ab
,
218 struct virtio_gpu_ctrl_command
*cmd
,
219 uint64_t **addr
, struct iovec
**iov
,
221 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU
*g
,
222 struct iovec
*iov
, uint32_t count
);
223 void virtio_gpu_process_cmdq(VirtIOGPU
*g
);
224 void virtio_gpu_device_realize(DeviceState
*qdev
, Error
**errp
);
226 /* virtio-gpu-3d.c */
227 void virtio_gpu_virgl_process_cmd(VirtIOGPU
*g
,
228 struct virtio_gpu_ctrl_command
*cmd
);
229 void virtio_gpu_virgl_fence_poll(VirtIOGPU
*g
);
230 void virtio_gpu_virgl_reset(VirtIOGPU
*g
);
231 int virtio_gpu_virgl_init(VirtIOGPU
*g
);
232 int virtio_gpu_virgl_get_num_capsets(VirtIOGPU
*g
);