4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
23 #include "disas/disas.h"
24 #include "exec/exec-all.h"
26 #if defined(CONFIG_USER_ONLY)
28 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
29 #include <sys/param.h>
30 #if __FreeBSD_version >= 700104
31 #define HAVE_KINFO_GETVMMAP
32 #define sigqueue sigqueue_freebsd /* avoid redefinition */
34 #include <machine/profile.h>
43 #include "exec/ram_addr.h"
46 #include "exec/cputlb.h"
47 #include "exec/translate-all.h"
48 #include "exec/translator.h"
49 #include "exec/tb-flush.h"
50 #include "qemu/bitmap.h"
51 #include "qemu/qemu-print.h"
52 #include "qemu/main-loop.h"
53 #include "qemu/cacheinfo.h"
54 #include "qemu/timer.h"
56 #include "sysemu/cpus.h"
57 #include "sysemu/cpu-timers.h"
58 #include "sysemu/tcg.h"
59 #include "qapi/error.h"
60 #include "hw/core/tcg-cpu-ops.h"
61 #include "tb-jmp-cache.h"
63 #include "tb-context.h"
64 #include "internal-common.h"
65 #include "internal-target.h"
67 #include "tcg/insn-start-words.h"
72 * Encode VAL as a signed leb128 sequence at P.
73 * Return P incremented past the encoded value.
75 static uint8_t *encode_sleb128(uint8_t *p
, int64_t val
)
82 more
= !((val
== 0 && (byte
& 0x40) == 0)
83 || (val
== -1 && (byte
& 0x40) != 0));
94 * Decode a signed leb128 sequence at *PP; increment *PP past the
95 * decoded value. Return the decoded value.
97 static int64_t decode_sleb128(const uint8_t **pp
)
99 const uint8_t *p
= *pp
;
105 val
|= (int64_t)(byte
& 0x7f) << shift
;
107 } while (byte
& 0x80);
108 if (shift
< TARGET_LONG_BITS
&& (byte
& 0x40)) {
109 val
|= -(int64_t)1 << shift
;
116 /* Encode the data collected about the instructions while compiling TB.
117 Place the data at BLOCK, and return the number of bytes consumed.
119 The logical table consists of TARGET_INSN_START_WORDS target_ulong's,
120 which come from the target's insn_start data, followed by a uintptr_t
121 which comes from the host pc of the end of the code implementing the insn.
123 Each line of the table is encoded as sleb128 deltas from the previous
124 line. The seed for the first line is { tb->pc, 0..., tb->tc.ptr }.
125 That is, the first column is seeded with the guest pc, the last column
126 with the host pc, and the middle columns with zeros. */
128 static int encode_search(TranslationBlock
*tb
, uint8_t *block
)
130 uint8_t *highwater
= tcg_ctx
->code_gen_highwater
;
131 uint64_t *insn_data
= tcg_ctx
->gen_insn_data
;
132 uint16_t *insn_end_off
= tcg_ctx
->gen_insn_end_off
;
136 for (i
= 0, n
= tb
->icount
; i
< n
; ++i
) {
139 for (j
= 0; j
< TARGET_INSN_START_WORDS
; ++j
) {
141 prev
= (!(tb_cflags(tb
) & CF_PCREL
) && j
== 0 ? tb
->pc
: 0);
143 prev
= insn_data
[(i
- 1) * TARGET_INSN_START_WORDS
+ j
];
145 curr
= insn_data
[i
* TARGET_INSN_START_WORDS
+ j
];
146 p
= encode_sleb128(p
, curr
- prev
);
148 prev
= (i
== 0 ? 0 : insn_end_off
[i
- 1]);
149 curr
= insn_end_off
[i
];
150 p
= encode_sleb128(p
, curr
- prev
);
152 /* Test for (pending) buffer overflow. The assumption is that any
153 one row beginning below the high water mark cannot overrun
154 the buffer completely. Thus we can test for overflow after
155 encoding a row without having to check during encoding. */
156 if (unlikely(p
> highwater
)) {
164 static int cpu_unwind_data_from_tb(TranslationBlock
*tb
, uintptr_t host_pc
,
167 uintptr_t iter_pc
= (uintptr_t)tb
->tc
.ptr
;
168 const uint8_t *p
= tb
->tc
.ptr
+ tb
->tc
.size
;
169 int i
, j
, num_insns
= tb
->icount
;
171 host_pc
-= GETPC_ADJ
;
173 if (host_pc
< iter_pc
) {
177 memset(data
, 0, sizeof(uint64_t) * TARGET_INSN_START_WORDS
);
178 if (!(tb_cflags(tb
) & CF_PCREL
)) {
183 * Reconstruct the stored insn data while looking for the point
184 * at which the end of the insn exceeds host_pc.
186 for (i
= 0; i
< num_insns
; ++i
) {
187 for (j
= 0; j
< TARGET_INSN_START_WORDS
; ++j
) {
188 data
[j
] += decode_sleb128(&p
);
190 iter_pc
+= decode_sleb128(&p
);
191 if (iter_pc
> host_pc
) {
192 return num_insns
- i
;
199 * The cpu state corresponding to 'host_pc' is restored in
200 * preparation for exiting the TB.
202 void cpu_restore_state_from_tb(CPUState
*cpu
, TranslationBlock
*tb
,
205 uint64_t data
[TARGET_INSN_START_WORDS
];
206 int insns_left
= cpu_unwind_data_from_tb(tb
, host_pc
, data
);
208 if (insns_left
< 0) {
212 if (tb_cflags(tb
) & CF_USE_ICOUNT
) {
213 assert(icount_enabled());
215 * Reset the cycle counter to the start of the block and
216 * shift if to the number of actually executed instructions.
218 cpu
->neg
.icount_decr
.u16
.low
+= insns_left
;
221 cpu
->cc
->tcg_ops
->restore_state_to_opc(cpu
, tb
, data
);
224 bool cpu_restore_state(CPUState
*cpu
, uintptr_t host_pc
)
227 * The host_pc has to be in the rx region of the code buffer.
228 * If it is not we will not be able to resolve it here.
229 * The two cases where host_pc will not be correct are:
231 * - fault during translation (instruction fetch)
232 * - fault from helper (not using GETPC() macro)
234 * Either way we need return early as we can't resolve it here.
236 if (in_code_gen_buffer((const void *)(host_pc
- tcg_splitwx_diff
))) {
237 TranslationBlock
*tb
= tcg_tb_lookup(host_pc
);
239 cpu_restore_state_from_tb(cpu
, tb
, host_pc
);
246 bool cpu_unwind_state_data(CPUState
*cpu
, uintptr_t host_pc
, uint64_t *data
)
248 if (in_code_gen_buffer((const void *)(host_pc
- tcg_splitwx_diff
))) {
249 TranslationBlock
*tb
= tcg_tb_lookup(host_pc
);
251 return cpu_unwind_data_from_tb(tb
, host_pc
, data
) >= 0;
260 page_table_config_init();
264 * Isolate the portion of code gen which can setjmp/longjmp.
265 * Return the size of the generated code, or negative on error.
267 static int setjmp_gen_code(CPUArchState
*env
, TranslationBlock
*tb
,
268 vaddr pc
, void *host_pc
,
269 int *max_insns
, int64_t *ti
)
271 int ret
= sigsetjmp(tcg_ctx
->jmp_trans
, 0);
272 if (unlikely(ret
!= 0)) {
276 tcg_func_start(tcg_ctx
);
278 tcg_ctx
->cpu
= env_cpu(env
);
279 gen_intermediate_code(env_cpu(env
), tb
, max_insns
, pc
, host_pc
);
280 assert(tb
->size
!= 0);
282 *max_insns
= tb
->icount
;
284 return tcg_gen_code(tcg_ctx
, tb
, pc
);
287 /* Called with mmap_lock held for user mode emulation. */
288 TranslationBlock
*tb_gen_code(CPUState
*cpu
,
289 vaddr pc
, uint64_t cs_base
,
290 uint32_t flags
, int cflags
)
292 CPUArchState
*env
= cpu_env(cpu
);
293 TranslationBlock
*tb
, *existing_tb
;
294 tb_page_addr_t phys_pc
, phys_p2
;
295 tcg_insn_unit
*gen_code_buf
;
296 int gen_code_size
, search_size
, max_insns
;
300 assert_memory_lock();
301 qemu_thread_jit_write();
303 phys_pc
= get_page_addr_code_hostp(env
, pc
, &host_pc
);
306 /* Generate a one-shot TB with 1 insn in it */
307 cflags
= (cflags
& ~CF_COUNT_MASK
) | 1;
310 max_insns
= cflags
& CF_COUNT_MASK
;
311 if (max_insns
== 0) {
312 max_insns
= TCG_MAX_INSNS
;
314 QEMU_BUILD_BUG_ON(CF_COUNT_MASK
+ 1 != TCG_MAX_INSNS
);
317 assert_no_pages_locked();
318 tb
= tcg_tb_alloc(tcg_ctx
);
320 /* flush must be done */
323 /* Make the execution loop process the flush as soon as possible. */
324 cpu
->exception_index
= EXCP_INTERRUPT
;
328 gen_code_buf
= tcg_ctx
->code_gen_ptr
;
329 tb
->tc
.ptr
= tcg_splitwx_to_rx(gen_code_buf
);
330 if (!(cflags
& CF_PCREL
)) {
333 tb
->cs_base
= cs_base
;
336 tb_set_page_addr0(tb
, phys_pc
);
337 tb_set_page_addr1(tb
, -1);
339 tb_lock_page0(phys_pc
);
342 tcg_ctx
->gen_tb
= tb
;
343 tcg_ctx
->addr_type
= TARGET_LONG_BITS
== 32 ? TCG_TYPE_I32
: TCG_TYPE_I64
;
344 #ifdef CONFIG_SOFTMMU
345 tcg_ctx
->page_bits
= TARGET_PAGE_BITS
;
346 tcg_ctx
->page_mask
= TARGET_PAGE_MASK
;
347 tcg_ctx
->tlb_dyn_max_bits
= CPU_TLB_DYN_MAX_BITS
;
349 tcg_ctx
->insn_start_words
= TARGET_INSN_START_WORDS
;
350 #ifdef TCG_GUEST_DEFAULT_MO
351 tcg_ctx
->guest_mo
= TCG_GUEST_DEFAULT_MO
;
353 tcg_ctx
->guest_mo
= TCG_MO_ALL
;
357 trace_translate_block(tb
, pc
, tb
->tc
.ptr
);
359 gen_code_size
= setjmp_gen_code(env
, tb
, pc
, host_pc
, &max_insns
, &ti
);
360 if (unlikely(gen_code_size
< 0)) {
361 switch (gen_code_size
) {
364 * Overflow of code_gen_buffer, or the current slice of it.
366 * TODO: We don't need to re-do gen_intermediate_code, nor
367 * should we re-do the tcg optimization currently hidden
368 * inside tcg_gen_code. All that should be required is to
369 * flush the TBs, allocate a new TB, re-initialize it per
370 * above, and re-do the actual code generation.
372 qemu_log_mask(CPU_LOG_TB_OP
| CPU_LOG_TB_OP_OPT
,
373 "Restarting code generation for "
374 "code_gen_buffer overflow\n");
376 tcg_ctx
->gen_tb
= NULL
;
377 goto buffer_overflow
;
381 * The code generated for the TranslationBlock is too large.
382 * The maximum size allowed by the unwind info is 64k.
383 * There may be stricter constraints from relocations
384 * in the tcg backend.
386 * Try again with half as many insns as we attempted this time.
387 * If a single insn overflows, there's a bug somewhere...
389 assert(max_insns
> 1);
391 qemu_log_mask(CPU_LOG_TB_OP
| CPU_LOG_TB_OP_OPT
,
392 "Restarting code generation with "
393 "smaller translation block (max %d insns)\n",
397 * The half-sized TB may not cross pages.
398 * TODO: Fix all targets that cross pages except with
399 * the first insn, at which point this can't be reached.
401 phys_p2
= tb_page_addr1(tb
);
402 if (unlikely(phys_p2
!= -1)) {
403 tb_unlock_page1(phys_pc
, phys_p2
);
404 tb_set_page_addr1(tb
, -1);
406 goto restart_translate
;
410 * We had a page lock ordering problem. In order to avoid
411 * deadlock we had to drop the lock on page0, which means
412 * that everything we translated so far is compromised.
413 * Restart with locks held on both pages.
415 qemu_log_mask(CPU_LOG_TB_OP
| CPU_LOG_TB_OP_OPT
,
416 "Restarting code generation with re-locked pages");
417 goto restart_translate
;
420 g_assert_not_reached();
423 tcg_ctx
->gen_tb
= NULL
;
425 search_size
= encode_search(tb
, (void *)gen_code_buf
+ gen_code_size
);
426 if (unlikely(search_size
< 0)) {
428 goto buffer_overflow
;
430 tb
->tc
.size
= gen_code_size
;
433 * For CF_PCREL, attribute all executions of the generated code
434 * to its first mapping.
436 perf_report_code(pc
, tb
, tcg_splitwx_to_rx(gen_code_buf
));
438 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM
) &&
439 qemu_log_in_addr_range(pc
)) {
440 FILE *logfile
= qemu_log_trylock();
442 int code_size
, data_size
;
443 const tcg_target_ulong
*rx_data_gen_ptr
;
447 if (tcg_ctx
->data_gen_ptr
) {
448 rx_data_gen_ptr
= tcg_splitwx_to_rx(tcg_ctx
->data_gen_ptr
);
449 code_size
= (const void *)rx_data_gen_ptr
- tb
->tc
.ptr
;
450 data_size
= gen_code_size
- code_size
;
453 code_size
= gen_code_size
;
457 /* Dump header and the first instruction */
458 fprintf(logfile
, "OUT: [size=%d]\n", gen_code_size
);
460 " -- guest addr 0x%016" PRIx64
" + tb prologue\n",
461 tcg_ctx
->gen_insn_data
[insn
* TARGET_INSN_START_WORDS
]);
462 chunk_start
= tcg_ctx
->gen_insn_end_off
[insn
];
463 disas(logfile
, tb
->tc
.ptr
, chunk_start
);
466 * Dump each instruction chunk, wrapping up empty chunks into
467 * the next instruction. The whole array is offset so the
468 * first entry is the beginning of the 2nd instruction.
470 while (insn
< tb
->icount
) {
471 size_t chunk_end
= tcg_ctx
->gen_insn_end_off
[insn
];
472 if (chunk_end
> chunk_start
) {
473 fprintf(logfile
, " -- guest addr 0x%016" PRIx64
"\n",
474 tcg_ctx
->gen_insn_data
[insn
* TARGET_INSN_START_WORDS
]);
475 disas(logfile
, tb
->tc
.ptr
+ chunk_start
,
476 chunk_end
- chunk_start
);
477 chunk_start
= chunk_end
;
482 if (chunk_start
< code_size
) {
483 fprintf(logfile
, " -- tb slow paths + alignment\n");
484 disas(logfile
, tb
->tc
.ptr
+ chunk_start
,
485 code_size
- chunk_start
);
488 /* Finally dump any data we may have after the block */
491 fprintf(logfile
, " data: [size=%d]\n", data_size
);
492 for (i
= 0; i
< data_size
/ sizeof(tcg_target_ulong
); i
++) {
493 if (sizeof(tcg_target_ulong
) == 8) {
495 "0x%08" PRIxPTR
": .quad 0x%016" TCG_PRIlx
"\n",
496 (uintptr_t)&rx_data_gen_ptr
[i
], rx_data_gen_ptr
[i
]);
497 } else if (sizeof(tcg_target_ulong
) == 4) {
499 "0x%08" PRIxPTR
": .long 0x%08" TCG_PRIlx
"\n",
500 (uintptr_t)&rx_data_gen_ptr
[i
], rx_data_gen_ptr
[i
]);
502 qemu_build_not_reached();
506 fprintf(logfile
, "\n");
507 qemu_log_unlock(logfile
);
511 qatomic_set(&tcg_ctx
->code_gen_ptr
, (void *)
512 ROUND_UP((uintptr_t)gen_code_buf
+ gen_code_size
+ search_size
,
516 qemu_spin_init(&tb
->jmp_lock
);
517 tb
->jmp_list_head
= (uintptr_t)NULL
;
518 tb
->jmp_list_next
[0] = (uintptr_t)NULL
;
519 tb
->jmp_list_next
[1] = (uintptr_t)NULL
;
520 tb
->jmp_dest
[0] = (uintptr_t)NULL
;
521 tb
->jmp_dest
[1] = (uintptr_t)NULL
;
523 /* init original jump addresses which have been set during tcg_gen_code() */
524 if (tb
->jmp_reset_offset
[0] != TB_JMP_OFFSET_INVALID
) {
525 tb_reset_jump(tb
, 0);
527 if (tb
->jmp_reset_offset
[1] != TB_JMP_OFFSET_INVALID
) {
528 tb_reset_jump(tb
, 1);
532 * If the TB is not associated with a physical RAM page then it must be
533 * a temporary one-insn TB, and we have nothing left to do. Return early
534 * before attempting to link to other TBs or add to the lookup table.
536 if (tb_page_addr0(tb
) == -1) {
537 assert_no_pages_locked();
542 * Insert TB into the corresponding region tree before publishing it
543 * through QHT. Otherwise rewinding happened in the TB might fail to
544 * lookup itself using host PC.
549 * No explicit memory barrier is required -- tb_link_page() makes the
550 * TB visible in a consistent state.
552 existing_tb
= tb_link_page(tb
);
553 assert_no_pages_locked();
555 /* if the TB already exists, discard what we just translated */
556 if (unlikely(existing_tb
!= tb
)) {
557 uintptr_t orig_aligned
= (uintptr_t)gen_code_buf
;
559 orig_aligned
-= ROUND_UP(sizeof(*tb
), qemu_icache_linesize
);
560 qatomic_set(&tcg_ctx
->code_gen_ptr
, (void *)orig_aligned
);
567 /* user-mode: call with mmap_lock held */
568 void tb_check_watchpoint(CPUState
*cpu
, uintptr_t retaddr
)
570 TranslationBlock
*tb
;
572 assert_memory_lock();
574 tb
= tcg_tb_lookup(retaddr
);
576 /* We can use retranslation to find the PC. */
577 cpu_restore_state_from_tb(cpu
, tb
, retaddr
);
578 tb_phys_invalidate(tb
, -1);
580 /* The exception probably happened in a helper. The CPU state should
581 have been saved before calling it. Fetch the PC from there. */
582 CPUArchState
*env
= cpu_env(cpu
);
588 cpu_get_tb_cpu_state(env
, &pc
, &cs_base
, &flags
);
589 addr
= get_page_addr_code(env
, pc
);
591 tb_invalidate_phys_range(addr
, addr
);
596 #ifndef CONFIG_USER_ONLY
598 * In deterministic execution mode, instructions doing device I/Os
599 * must be at the end of the TB.
601 * Called by softmmu_template.h, with iothread mutex not held.
603 void cpu_io_recompile(CPUState
*cpu
, uintptr_t retaddr
)
605 TranslationBlock
*tb
;
609 tb
= tcg_tb_lookup(retaddr
);
611 cpu_abort(cpu
, "cpu_io_recompile: could not find TB for pc=%p",
614 cpu_restore_state_from_tb(cpu
, tb
, retaddr
);
617 * Some guests must re-execute the branch when re-executing a delay
618 * slot instruction. When this is the case, adjust icount and N
619 * to account for the re-execution of the branch.
622 cc
= CPU_GET_CLASS(cpu
);
623 if (cc
->tcg_ops
->io_recompile_replay_branch
&&
624 cc
->tcg_ops
->io_recompile_replay_branch(cpu
, tb
)) {
625 cpu
->neg
.icount_decr
.u16
.low
++;
630 * Exit the loop and potentially generate a new TB executing the
631 * just the I/O insns. We also limit instrumentation to memory
632 * operations only (which execute after completion) so we don't
633 * double instrument the instruction.
635 cpu
->cflags_next_tb
= curr_cflags(cpu
) | CF_MEMI_ONLY
| n
;
637 if (qemu_loglevel_mask(CPU_LOG_EXEC
)) {
638 vaddr pc
= log_pc(cpu
, tb
);
639 if (qemu_log_in_addr_range(pc
)) {
640 qemu_log("cpu_io_recompile: rewound execution of TB to %016"
641 VADDR_PRIx
"\n", pc
);
645 cpu_loop_exit_noexc(cpu
);
648 #else /* CONFIG_USER_ONLY */
650 void cpu_interrupt(CPUState
*cpu
, int mask
)
652 g_assert(bql_locked());
653 cpu
->interrupt_request
|= mask
;
654 qatomic_set(&cpu
->neg
.icount_decr
.u16
.high
, -1);
657 #endif /* CONFIG_USER_ONLY */
660 * Called by generic code at e.g. cpu reset after cpu creation,
661 * therefore we must be prepared to allocate the jump cache.
663 void tcg_flush_jmp_cache(CPUState
*cpu
)
665 CPUJumpCache
*jc
= cpu
->tb_jmp_cache
;
667 /* During early initialization, the cache may not yet be allocated. */
668 if (unlikely(jc
== NULL
)) {
672 for (int i
= 0; i
< TB_JMP_CACHE_SIZE
; i
++) {
673 qatomic_set(&jc
->array
[i
].tb
, NULL
);