spapr_drc: abort if object_property_add_child() fails
[qemu/kevin.git] / qom / cpu.c
blob9201fd98078ad3bf56256102e987aad200368b82
1 /*
2 * QEMU CPU model
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "qemu-common.h"
24 #include "qom/cpu.h"
25 #include "sysemu/hw_accel.h"
26 #include "qemu/notify.h"
27 #include "qemu/log.h"
28 #include "exec/log.h"
29 #include "exec/cpu-common.h"
30 #include "qemu/error-report.h"
31 #include "sysemu/sysemu.h"
32 #include "hw/qdev-properties.h"
33 #include "trace-root.h"
35 CPUInterruptHandler cpu_interrupt_handler;
37 bool cpu_exists(int64_t id)
39 CPUState *cpu;
41 CPU_FOREACH(cpu) {
42 CPUClass *cc = CPU_GET_CLASS(cpu);
44 if (cc->get_arch_id(cpu) == id) {
45 return true;
48 return false;
51 CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
53 char *str, *name, *featurestr;
54 CPUState *cpu = NULL;
55 ObjectClass *oc;
56 CPUClass *cc;
57 Error *err = NULL;
59 str = g_strdup(cpu_model);
60 name = strtok(str, ",");
62 oc = cpu_class_by_name(typename, name);
63 if (oc == NULL) {
64 g_free(str);
65 return NULL;
68 cc = CPU_CLASS(oc);
69 featurestr = strtok(NULL, ",");
70 /* TODO: all callers of cpu_generic_init() need to be converted to
71 * call parse_features() only once, before calling cpu_generic_init().
73 cc->parse_features(object_class_get_name(oc), featurestr, &err);
74 g_free(str);
75 if (err != NULL) {
76 goto out;
79 cpu = CPU(object_new(object_class_get_name(oc)));
80 object_property_set_bool(OBJECT(cpu), true, "realized", &err);
82 out:
83 if (err != NULL) {
84 error_report_err(err);
85 object_unref(OBJECT(cpu));
86 return NULL;
89 return cpu;
92 void *cpu_alloc_env(CPUState *cpu)
94 CPUClass *cc = CPU_GET_CLASS(cpu);
96 return cc->alloc_env ? cc->alloc_env(cpu) : NULL;
99 void cpu_get_env(CPUState *cpu, void *env)
101 CPUClass *cc = CPU_GET_CLASS(cpu);
103 if (cc->get_env) {
104 cc->get_env(cpu, env);
108 void cpu_set_env(CPUState *cpu, void *env)
110 CPUClass *cc = CPU_GET_CLASS(cpu);
112 if (cc->set_env) {
113 cc->set_env(cpu, env);
117 void cpu_free_env(CPUState *cpu, void *env)
119 CPUClass *cc = CPU_GET_CLASS(cpu);
121 if (cc->free_env) {
122 cc->free_env(cpu, env);
126 bool cpu_paging_enabled(const CPUState *cpu)
128 CPUClass *cc = CPU_GET_CLASS(cpu);
130 return cc->get_paging_enabled(cpu);
133 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
135 return false;
138 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
139 Error **errp)
141 CPUClass *cc = CPU_GET_CLASS(cpu);
143 cc->get_memory_mapping(cpu, list, errp);
146 static void cpu_common_get_memory_mapping(CPUState *cpu,
147 MemoryMappingList *list,
148 Error **errp)
150 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
153 /* Resetting the IRQ comes from across the code base so we take the
154 * BQL here if we need to. cpu_interrupt assumes it is held.*/
155 void cpu_reset_interrupt(CPUState *cpu, int mask)
157 bool need_lock = !qemu_mutex_iothread_locked();
159 if (need_lock) {
160 qemu_mutex_lock_iothread();
162 cpu->interrupt_request &= ~mask;
163 if (need_lock) {
164 qemu_mutex_unlock_iothread();
168 void cpu_exit(CPUState *cpu)
170 atomic_set(&cpu->exit_request, 1);
171 /* Ensure cpu_exec will see the exit request after TCG has exited. */
172 smp_wmb();
173 atomic_set(&cpu->icount_decr.u16.high, -1);
176 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
177 void *opaque)
179 CPUClass *cc = CPU_GET_CLASS(cpu);
181 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
184 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
185 CPUState *cpu, void *opaque)
187 return 0;
190 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
191 int cpuid, void *opaque)
193 CPUClass *cc = CPU_GET_CLASS(cpu);
195 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
198 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
199 CPUState *cpu, int cpuid,
200 void *opaque)
202 return -1;
205 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
206 void *opaque)
208 CPUClass *cc = CPU_GET_CLASS(cpu);
210 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
213 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
214 CPUState *cpu, void *opaque)
216 return 0;
219 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
220 int cpuid, void *opaque)
222 CPUClass *cc = CPU_GET_CLASS(cpu);
224 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
227 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
228 CPUState *cpu, int cpuid,
229 void *opaque)
231 return -1;
235 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
237 return 0;
240 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
242 return 0;
245 static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
247 /* If no extra check is required, QEMU watchpoint match can be considered
248 * as an architectural match.
250 return true;
253 bool target_words_bigendian(void);
254 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
256 return target_words_bigendian();
259 static void cpu_common_noop(CPUState *cpu)
263 static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
265 return false;
268 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu)
270 CPUClass *cc = CPU_GET_CLASS(cpu);
271 GuestPanicInformation *res = NULL;
273 if (cc->get_crash_info) {
274 res = cc->get_crash_info(cpu);
276 return res;
279 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
280 int flags)
282 CPUClass *cc = CPU_GET_CLASS(cpu);
284 if (cc->dump_state) {
285 cpu_synchronize_state(cpu);
286 cc->dump_state(cpu, f, cpu_fprintf, flags);
290 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
291 int flags)
293 CPUClass *cc = CPU_GET_CLASS(cpu);
295 if (cc->dump_statistics) {
296 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
300 void cpu_reset(CPUState *cpu)
302 CPUClass *klass = CPU_GET_CLASS(cpu);
304 if (klass->reset != NULL) {
305 (*klass->reset)(cpu);
308 trace_guest_cpu_reset(cpu);
311 static void cpu_common_reset(CPUState *cpu)
313 CPUClass *cc = CPU_GET_CLASS(cpu);
315 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
316 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
317 log_cpu_state(cpu, cc->reset_dump_flags);
320 cpu->interrupt_request = 0;
321 cpu->halted = 0;
322 cpu->mem_io_pc = 0;
323 cpu->mem_io_vaddr = 0;
324 cpu->icount_extra = 0;
325 cpu->icount_decr.u32 = 0;
326 cpu->can_do_io = 1;
327 cpu->exception_index = -1;
328 cpu->crash_occurred = false;
330 if (tcg_enabled()) {
331 cpu_tb_jmp_cache_clear(cpu);
333 tcg_flush_softmmu_tlb(cpu);
337 static bool cpu_common_has_work(CPUState *cs)
339 return false;
342 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
344 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
346 return cc->class_by_name(cpu_model);
349 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
351 return NULL;
354 static void cpu_common_parse_features(const char *typename, char *features,
355 Error **errp)
357 char *featurestr; /* Single "key=value" string being parsed */
358 char *val;
359 static bool cpu_globals_initialized;
361 /* TODO: all callers of ->parse_features() need to be changed to
362 * call it only once, so we can remove this check (or change it
363 * to assert(!cpu_globals_initialized).
364 * Current callers of ->parse_features() are:
365 * - cpu_generic_init()
367 if (cpu_globals_initialized) {
368 return;
370 cpu_globals_initialized = true;
372 featurestr = features ? strtok(features, ",") : NULL;
374 while (featurestr) {
375 val = strchr(featurestr, '=');
376 if (val) {
377 GlobalProperty *prop = g_new0(typeof(*prop), 1);
378 *val = 0;
379 val++;
380 prop->driver = typename;
381 prop->property = g_strdup(featurestr);
382 prop->value = g_strdup(val);
383 prop->errp = &error_fatal;
384 qdev_prop_register_global(prop);
385 } else {
386 error_setg(errp, "Expected key=value format, found %s.",
387 featurestr);
388 return;
390 featurestr = strtok(NULL, ",");
394 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
396 CPUState *cpu = CPU(dev);
398 if (dev->hotplugged) {
399 cpu_synchronize_post_init(cpu);
400 cpu_resume(cpu);
403 /* NOTE: latest generic point where the cpu is fully realized */
404 trace_init_vcpu(cpu);
407 static void cpu_common_unrealizefn(DeviceState *dev, Error **errp)
409 CPUState *cpu = CPU(dev);
410 /* NOTE: latest generic point before the cpu is fully unrealized */
411 trace_fini_vcpu(cpu);
412 cpu_exec_unrealizefn(cpu);
415 static void cpu_common_initfn(Object *obj)
417 CPUState *cpu = CPU(obj);
418 CPUClass *cc = CPU_GET_CLASS(obj);
420 cpu->cpu_index = UNASSIGNED_CPU_INDEX;
421 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
422 /* *-user doesn't have configurable SMP topology */
423 /* the default value is changed by qemu_init_vcpu() for softmmu */
424 cpu->nr_cores = 1;
425 cpu->nr_threads = 1;
427 qemu_mutex_init(&cpu->work_mutex);
428 QTAILQ_INIT(&cpu->breakpoints);
429 QTAILQ_INIT(&cpu->watchpoints);
431 cpu_exec_initfn(cpu);
434 static void cpu_common_finalize(Object *obj)
438 static int64_t cpu_common_get_arch_id(CPUState *cpu)
440 return cpu->cpu_index;
443 static vaddr cpu_adjust_watchpoint_address(CPUState *cpu, vaddr addr, int len)
445 return addr;
448 static void generic_handle_interrupt(CPUState *cpu, int mask)
450 cpu->interrupt_request |= mask;
452 if (!qemu_cpu_is_self(cpu)) {
453 qemu_cpu_kick(cpu);
457 CPUInterruptHandler cpu_interrupt_handler = generic_handle_interrupt;
459 static void cpu_class_init(ObjectClass *klass, void *data)
461 DeviceClass *dc = DEVICE_CLASS(klass);
462 CPUClass *k = CPU_CLASS(klass);
464 k->class_by_name = cpu_common_class_by_name;
465 k->parse_features = cpu_common_parse_features;
466 k->reset = cpu_common_reset;
467 k->get_arch_id = cpu_common_get_arch_id;
468 k->has_work = cpu_common_has_work;
469 k->get_paging_enabled = cpu_common_get_paging_enabled;
470 k->get_memory_mapping = cpu_common_get_memory_mapping;
471 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
472 k->write_elf32_note = cpu_common_write_elf32_note;
473 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
474 k->write_elf64_note = cpu_common_write_elf64_note;
475 k->gdb_read_register = cpu_common_gdb_read_register;
476 k->gdb_write_register = cpu_common_gdb_write_register;
477 k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
478 k->debug_excp_handler = cpu_common_noop;
479 k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
480 k->cpu_exec_enter = cpu_common_noop;
481 k->cpu_exec_exit = cpu_common_noop;
482 k->cpu_exec_interrupt = cpu_common_exec_interrupt;
483 k->adjust_watchpoint_address = cpu_adjust_watchpoint_address;
484 set_bit(DEVICE_CATEGORY_CPU, dc->categories);
485 dc->realize = cpu_common_realizefn;
486 dc->unrealize = cpu_common_unrealizefn;
487 dc->props = cpu_common_props;
489 * Reason: CPUs still need special care by board code: wiring up
490 * IRQs, adding reset handlers, halting non-first CPUs, ...
492 dc->user_creatable = false;
495 static const TypeInfo cpu_type_info = {
496 .name = TYPE_CPU,
497 .parent = TYPE_DEVICE,
498 .instance_size = sizeof(CPUState),
499 .instance_init = cpu_common_initfn,
500 .instance_finalize = cpu_common_finalize,
501 .abstract = true,
502 .class_size = sizeof(CPUClass),
503 .class_init = cpu_class_init,
506 static void cpu_register_types(void)
508 type_register_static(&cpu_type_info);
511 type_init(cpu_register_types)