?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
hw: Simplify accesses to the CPUState::'start-powered-off' property
[qemu/kevin.git] / system / memory.c
blob798b6c0a171b71db8acb9aea503ea21ac26a07fe
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qemu/log.h"
18 #include "qapi/error.h"
19 #include "exec/memory.h"
20 #include "qapi/visitor.h"
21 #include "qemu/bitops.h"
22 #include "qemu/error-report.h"
23 #include "qemu/main-loop.h"
24 #include "qemu/qemu-print.h"
25 #include "qom/object.h"
26 #include "trace.h"
27
28 #include "exec/memory-internal.h"
29 #include "exec/ram_addr.h"
30 #include "sysemu/kvm.h"
31 #include "sysemu/runstate.h"
32 #include "sysemu/tcg.h"
33 #include "qemu/accel.h"
34 #include "hw/boards.h"
35 #include "migration/vmstate.h"
36 #include "exec/address-spaces.h"
37
38 //#define DEBUG_UNASSIGNED
39
40 static unsigned memory_region_transaction_depth;
41 static bool memory_region_update_pending;
42 static bool ioeventfd_update_pending;
43 unsigned int global_dirty_tracking;
44
45 static QTAILQ_HEAD(, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static GHashTable *flat_views;
52
53 typedef struct AddrRange AddrRange;
54
55 /*
56 * Note that signed integers are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 default: \
126 abort(); \
127 } \
128 } while (0)
129
130 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
131 do { \
132 MemoryListener *_listener; \
133 \
134 switch (_direction) { \
135 case Forward: \
136 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
137 if (_listener->_callback) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
143 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
144 if (_listener->_callback) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
154 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
156 do { \
157 MemoryRegionSection mrs = section_from_flat_range(fr, \
158 address_space_to_flatview(as)); \
159 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
160 } while(0)
161
162 struct CoalescedMemoryRange {
163 AddrRange addr;
164 QTAILQ_ENTRY(CoalescedMemoryRange) link;
165 };
166
167 struct MemoryRegionIoeventfd {
168 AddrRange addr;
169 bool match_data;
170 uint64_t data;
171 EventNotifier *e;
172 };
173
174 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
175 MemoryRegionIoeventfd *b)
176 {
177 if (int128_lt(a->addr.start, b->addr.start)) {
178 return true;
179 } else if (int128_gt(a->addr.start, b->addr.start)) {
180 return false;
181 } else if (int128_lt(a->addr.size, b->addr.size)) {
182 return true;
183 } else if (int128_gt(a->addr.size, b->addr.size)) {
184 return false;
185 } else if (a->match_data < b->match_data) {
186 return true;
187 } else if (a->match_data > b->match_data) {
188 return false;
189 } else if (a->match_data) {
190 if (a->data < b->data) {
191 return true;
192 } else if (a->data > b->data) {
193 return false;
194 }
195 }
196 if (a->e < b->e) {
197 return true;
198 } else if (a->e > b->e) {
199 return false;
200 }
201 return false;
202 }
203
204 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
205 MemoryRegionIoeventfd *b)
206 {
207 if (int128_eq(a->addr.start, b->addr.start) &&
208 (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
209 (int128_eq(a->addr.size, b->addr.size) &&
210 (a->match_data == b->match_data) &&
211 ((a->match_data && (a->data == b->data)) || !a->match_data) &&
212 (a->e == b->e))))
213 return true;
214
215 return false;
216 }
217
218 /* Range of memory in the global map. Addresses are absolute. */
219 struct FlatRange {
220 MemoryRegion *mr;
221 hwaddr offset_in_region;
222 AddrRange addr;
223 uint8_t dirty_log_mask;
224 bool romd_mode;
225 bool readonly;
226 bool nonvolatile;
227 bool unmergeable;
228 };
229
230 #define FOR_EACH_FLAT_RANGE(var, view) \
231 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
232
233 static inline MemoryRegionSection
234 section_from_flat_range(FlatRange *fr, FlatView *fv)
235 {
236 return (MemoryRegionSection) {
237 .mr = fr->mr,
238 .fv = fv,
239 .offset_within_region = fr->offset_in_region,
240 .size = fr->addr.size,
241 .offset_within_address_space = int128_get64(fr->addr.start),
242 .readonly = fr->readonly,
243 .nonvolatile = fr->nonvolatile,
244 .unmergeable = fr->unmergeable,
245 };
246 }
247
248 static bool flatrange_equal(FlatRange *a, FlatRange *b)
249 {
250 return a->mr == b->mr
251 && addrrange_equal(a->addr, b->addr)
252 && a->offset_in_region == b->offset_in_region
253 && a->romd_mode == b->romd_mode
254 && a->readonly == b->readonly
255 && a->nonvolatile == b->nonvolatile
256 && a->unmergeable == b->unmergeable;
257 }
258
259 static FlatView *flatview_new(MemoryRegion *mr_root)
260 {
261 FlatView *view;
262
263 view = g_new0(FlatView, 1);
264 view->ref = 1;
265 view->root = mr_root;
266 memory_region_ref(mr_root);
267 trace_flatview_new(view, mr_root);
268
269 return view;
270 }
271
272 /* Insert a range into a given position. Caller is responsible for maintaining
273 * sorting order.
274 */
275 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
276 {
277 if (view->nr == view->nr_allocated) {
278 view->nr_allocated = MAX(2 * view->nr, 10);
279 view->ranges = g_realloc(view->ranges,
280 view->nr_allocated * sizeof(*view->ranges));
281 }
282 memmove(view->ranges + pos + 1, view->ranges + pos,
283 (view->nr - pos) * sizeof(FlatRange));
284 view->ranges[pos] = *range;
285 memory_region_ref(range->mr);
286 ++view->nr;
287 }
288
289 static void flatview_destroy(FlatView *view)
290 {
291 int i;
292
293 trace_flatview_destroy(view, view->root);
294 if (view->dispatch) {
295 address_space_dispatch_free(view->dispatch);
296 }
297 for (i = 0; i < view->nr; i++) {
298 memory_region_unref(view->ranges[i].mr);
299 }
300 g_free(view->ranges);
301 memory_region_unref(view->root);
302 g_free(view);
303 }
304
305 static bool flatview_ref(FlatView *view)
306 {
307 return qatomic_fetch_inc_nonzero(&view->ref) > 0;
308 }
309
310 void flatview_unref(FlatView *view)
311 {
312 if (qatomic_fetch_dec(&view->ref) == 1) {
313 trace_flatview_destroy_rcu(view, view->root);
314 assert(view->root);
315 call_rcu(view, flatview_destroy, rcu);
316 }
317 }
318
319 static bool can_merge(FlatRange *r1, FlatRange *r2)
320 {
321 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
322 && r1->mr == r2->mr
323 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
324 r1->addr.size),
325 int128_make64(r2->offset_in_region))
326 && r1->dirty_log_mask == r2->dirty_log_mask
327 && r1->romd_mode == r2->romd_mode
328 && r1->readonly == r2->readonly
329 && r1->nonvolatile == r2->nonvolatile
330 && !r1->unmergeable && !r2->unmergeable;
331 }
332
333 /* Attempt to simplify a view by merging adjacent ranges */
334 static void flatview_simplify(FlatView *view)
335 {
336 unsigned i, j, k;
337
338 i = 0;
339 while (i < view->nr) {
340 j = i + 1;
341 while (j < view->nr
342 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
343 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
344 ++j;
345 }
346 ++i;
347 for (k = i; k < j; k++) {
348 memory_region_unref(view->ranges[k].mr);
349 }
350 memmove(&view->ranges[i], &view->ranges[j],
351 (view->nr - j) * sizeof(view->ranges[j]));
352 view->nr -= j - i;
353 }
354 }
355
356 static bool memory_region_big_endian(MemoryRegion *mr)
357 {
358 #if TARGET_BIG_ENDIAN
359 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
360 #else
361 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
362 #endif
363 }
364
365 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
366 {
367 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
368 switch (op & MO_SIZE) {
369 case MO_8:
370 break;
371 case MO_16:
372 *data = bswap16(*data);
373 break;
374 case MO_32:
375 *data = bswap32(*data);
376 break;
377 case MO_64:
378 *data = bswap64(*data);
379 break;
380 default:
381 g_assert_not_reached();
382 }
383 }
384 }
385
386 static inline void memory_region_shift_read_access(uint64_t *value,
387 signed shift,
388 uint64_t mask,
389 uint64_t tmp)
390 {
391 if (shift >= 0) {
392 *value |= (tmp & mask) << shift;
393 } else {
394 *value |= (tmp & mask) >> -shift;
395 }
396 }
397
398 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
399 signed shift,
400 uint64_t mask)
401 {
402 uint64_t tmp;
403
404 if (shift >= 0) {
405 tmp = (*value >> shift) & mask;
406 } else {
407 tmp = (*value << -shift) & mask;
408 }
409
410 return tmp;
411 }
412
413 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
414 {
415 MemoryRegion *root;
416 hwaddr abs_addr = offset;
417
418 abs_addr += mr->addr;
419 for (root = mr; root->container; ) {
420 root = root->container;
421 abs_addr += root->addr;
422 }
423
424 return abs_addr;
425 }
426
427 static int get_cpu_index(void)
428 {
429 if (current_cpu) {
430 return current_cpu->cpu_index;
431 }
432 return -1;
433 }
434
435 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
436 hwaddr addr,
437 uint64_t *value,
438 unsigned size,
439 signed shift,
440 uint64_t mask,
441 MemTxAttrs attrs)
442 {
443 uint64_t tmp;
444
445 tmp = mr->ops->read(mr->opaque, addr, size);
446 if (mr->subpage) {
447 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
448 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
449 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
450 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
451 memory_region_name(mr));
452 }
453 memory_region_shift_read_access(value, shift, mask, tmp);
454 return MEMTX_OK;
455 }
456
457 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
458 hwaddr addr,
459 uint64_t *value,
460 unsigned size,
461 signed shift,
462 uint64_t mask,
463 MemTxAttrs attrs)
464 {
465 uint64_t tmp = 0;
466 MemTxResult r;
467
468 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
469 if (mr->subpage) {
470 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
471 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
472 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
473 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
474 memory_region_name(mr));
475 }
476 memory_region_shift_read_access(value, shift, mask, tmp);
477 return r;
478 }
479
480 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
481 hwaddr addr,
482 uint64_t *value,
483 unsigned size,
484 signed shift,
485 uint64_t mask,
486 MemTxAttrs attrs)
487 {
488 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
489
490 if (mr->subpage) {
491 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
492 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
493 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
494 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
495 memory_region_name(mr));
496 }
497 mr->ops->write(mr->opaque, addr, tmp, size);
498 return MEMTX_OK;
499 }
500
501 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
502 hwaddr addr,
503 uint64_t *value,
504 unsigned size,
505 signed shift,
506 uint64_t mask,
507 MemTxAttrs attrs)
508 {
509 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
510
511 if (mr->subpage) {
512 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
513 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
514 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
515 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
516 memory_region_name(mr));
517 }
518 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
519 }
520
521 static MemTxResult access_with_adjusted_size(hwaddr addr,
522 uint64_t *value,
523 unsigned size,
524 unsigned access_size_min,
525 unsigned access_size_max,
526 MemTxResult (*access_fn)
527 (MemoryRegion *mr,
528 hwaddr addr,
529 uint64_t *value,
530 unsigned size,
531 signed shift,
532 uint64_t mask,
533 MemTxAttrs attrs),
534 MemoryRegion *mr,
535 MemTxAttrs attrs)
536 {
537 uint64_t access_mask;
538 unsigned access_size;
539 unsigned i;
540 MemTxResult r = MEMTX_OK;
541 bool reentrancy_guard_applied = false;
542
543 if (!access_size_min) {
544 access_size_min = 1;
545 }
546 if (!access_size_max) {
547 access_size_max = 4;
548 }
549
550 /* Do not allow more than one simultaneous access to a device's IO Regions */
551 if (mr->dev && !mr->disable_reentrancy_guard &&
552 !mr->ram_device && !mr->ram && !mr->rom_device && !mr->readonly) {
553 if (mr->dev->mem_reentrancy_guard.engaged_in_io) {
554 warn_report_once("Blocked re-entrant IO on MemoryRegion: "
555 "%s at addr: 0x%" HWADDR_PRIX,
556 memory_region_name(mr), addr);
557 return MEMTX_ACCESS_ERROR;
558 }
559 mr->dev->mem_reentrancy_guard.engaged_in_io = true;
560 reentrancy_guard_applied = true;
561 }
562
563 /* FIXME: support unaligned access? */
564 access_size = MAX(MIN(size, access_size_max), access_size_min);
565 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
566 if (memory_region_big_endian(mr)) {
567 for (i = 0; i < size; i += access_size) {
568 r |= access_fn(mr, addr + i, value, access_size,
569 (size - access_size - i) * 8, access_mask, attrs);
570 }
571 } else {
572 for (i = 0; i < size; i += access_size) {
573 r |= access_fn(mr, addr + i, value, access_size, i * 8,
574 access_mask, attrs);
575 }
576 }
577 if (mr->dev && reentrancy_guard_applied) {
578 mr->dev->mem_reentrancy_guard.engaged_in_io = false;
579 }
580 return r;
581 }
582
583 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
584 {
585 AddressSpace *as;
586
587 while (mr->container) {
588 mr = mr->container;
589 }
590 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
591 if (mr == as->root) {
592 return as;
593 }
594 }
595 return NULL;
596 }
597
598 /* Render a memory region into the global view. Ranges in @view obscure
599 * ranges in @mr.
600 */
601 static void render_memory_region(FlatView *view,
602 MemoryRegion *mr,
603 Int128 base,
604 AddrRange clip,
605 bool readonly,
606 bool nonvolatile,
607 bool unmergeable)
608 {
609 MemoryRegion *subregion;
610 unsigned i;
611 hwaddr offset_in_region;
612 Int128 remain;
613 Int128 now;
614 FlatRange fr;
615 AddrRange tmp;
616
617 if (!mr->enabled) {
618 return;
619 }
620
621 int128_addto(&base, int128_make64(mr->addr));
622 readonly |= mr->readonly;
623 nonvolatile |= mr->nonvolatile;
624 unmergeable |= mr->unmergeable;
625
626 tmp = addrrange_make(base, mr->size);
627
628 if (!addrrange_intersects(tmp, clip)) {
629 return;
630 }
631
632 clip = addrrange_intersection(tmp, clip);
633
634 if (mr->alias) {
635 int128_subfrom(&base, int128_make64(mr->alias->addr));
636 int128_subfrom(&base, int128_make64(mr->alias_offset));
637 render_memory_region(view, mr->alias, base, clip,
638 readonly, nonvolatile, unmergeable);
639 return;
640 }
641
642 /* Render subregions in priority order. */
643 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
644 render_memory_region(view, subregion, base, clip,
645 readonly, nonvolatile, unmergeable);
646 }
647
648 if (!mr->terminates) {
649 return;
650 }
651
652 offset_in_region = int128_get64(int128_sub(clip.start, base));
653 base = clip.start;
654 remain = clip.size;
655
656 fr.mr = mr;
657 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
658 fr.romd_mode = mr->romd_mode;
659 fr.readonly = readonly;
660 fr.nonvolatile = nonvolatile;
661 fr.unmergeable = unmergeable;
662
663 /* Render the region itself into any gaps left by the current view. */
664 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
665 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
666 continue;
667 }
668 if (int128_lt(base, view->ranges[i].addr.start)) {
669 now = int128_min(remain,
670 int128_sub(view->ranges[i].addr.start, base));
671 fr.offset_in_region = offset_in_region;
672 fr.addr = addrrange_make(base, now);
673 flatview_insert(view, i, &fr);
674 ++i;
675 int128_addto(&base, now);
676 offset_in_region += int128_get64(now);
677 int128_subfrom(&remain, now);
678 }
679 now = int128_sub(int128_min(int128_add(base, remain),
680 addrrange_end(view->ranges[i].addr)),
681 base);
682 int128_addto(&base, now);
683 offset_in_region += int128_get64(now);
684 int128_subfrom(&remain, now);
685 }
686 if (int128_nz(remain)) {
687 fr.offset_in_region = offset_in_region;
688 fr.addr = addrrange_make(base, remain);
689 flatview_insert(view, i, &fr);
690 }
691 }
692
693 void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
694 {
695 FlatRange *fr;
696
697 assert(fv);
698 assert(cb);
699
700 FOR_EACH_FLAT_RANGE(fr, fv) {
701 if (cb(fr->addr.start, fr->addr.size, fr->mr,
702 fr->offset_in_region, opaque)) {
703 break;
704 }
705 }
706 }
707
708 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
709 {
710 while (mr->enabled) {
711 if (mr->alias) {
712 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
713 /* The alias is included in its entirety. Use it as
714 * the "real" root, so that we can share more FlatViews.
715 */
716 mr = mr->alias;
717 continue;
718 }
719 } else if (!mr->terminates) {
720 unsigned int found = 0;
721 MemoryRegion *child, *next = NULL;
722 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
723 if (child->enabled) {
724 if (++found > 1) {
725 next = NULL;
726 break;
727 }
728 if (!child->addr && int128_ge(mr->size, child->size)) {
729 /* A child is included in its entirety. If it's the only
730 * enabled one, use it in the hope of finding an alias down the
731 * way. This will also let us share FlatViews.
732 */
733 next = child;
734 }
735 }
736 }
737 if (found == 0) {
738 return NULL;
739 }
740 if (next) {
741 mr = next;
742 continue;
743 }
744 }
745
746 return mr;
747 }
748
749 return NULL;
750 }
751
752 /* Render a memory topology into a list of disjoint absolute ranges. */
753 static FlatView *generate_memory_topology(MemoryRegion *mr)
754 {
755 int i;
756 FlatView *view;
757
758 view = flatview_new(mr);
759
760 if (mr) {
761 render_memory_region(view, mr, int128_zero(),
762 addrrange_make(int128_zero(), int128_2_64()),
763 false, false, false);
764 }
765 flatview_simplify(view);
766
767 view->dispatch = address_space_dispatch_new(view);
768 for (i = 0; i < view->nr; i++) {
769 MemoryRegionSection mrs =
770 section_from_flat_range(&view->ranges[i], view);
771 flatview_add_to_dispatch(view, &mrs);
772 }
773 address_space_dispatch_compact(view->dispatch);
774 g_hash_table_replace(flat_views, mr, view);
775
776 return view;
777 }
778
779 static void address_space_add_del_ioeventfds(AddressSpace *as,
780 MemoryRegionIoeventfd *fds_new,
781 unsigned fds_new_nb,
782 MemoryRegionIoeventfd *fds_old,
783 unsigned fds_old_nb)
784 {
785 unsigned iold, inew;
786 MemoryRegionIoeventfd *fd;
787 MemoryRegionSection section;
788
789 /* Generate a symmetric difference of the old and new fd sets, adding
790 * and deleting as necessary.
791 */
792
793 iold = inew = 0;
794 while (iold < fds_old_nb || inew < fds_new_nb) {
795 if (iold < fds_old_nb
796 && (inew == fds_new_nb
797 || memory_region_ioeventfd_before(&fds_old[iold],
798 &fds_new[inew]))) {
799 fd = &fds_old[iold];
800 section = (MemoryRegionSection) {
801 .fv = address_space_to_flatview(as),
802 .offset_within_address_space = int128_get64(fd->addr.start),
803 .size = fd->addr.size,
804 };
805 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
806 fd->match_data, fd->data, fd->e);
807 ++iold;
808 } else if (inew < fds_new_nb
809 && (iold == fds_old_nb
810 || memory_region_ioeventfd_before(&fds_new[inew],
811 &fds_old[iold]))) {
812 fd = &fds_new[inew];
813 section = (MemoryRegionSection) {
814 .fv = address_space_to_flatview(as),
815 .offset_within_address_space = int128_get64(fd->addr.start),
816 .size = fd->addr.size,
817 };
818 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
819 fd->match_data, fd->data, fd->e);
820 ++inew;
821 } else {
822 ++iold;
823 ++inew;
824 }
825 }
826 }
827
828 FlatView *address_space_get_flatview(AddressSpace *as)
829 {
830 FlatView *view;
831
832 RCU_READ_LOCK_GUARD();
833 do {
834 view = address_space_to_flatview(as);
835 /* If somebody has replaced as->current_map concurrently,
836 * flatview_ref returns false.
837 */
838 } while (!flatview_ref(view));
839 return view;
840 }
841
842 static void address_space_update_ioeventfds(AddressSpace *as)
843 {
844 FlatView *view;
845 FlatRange *fr;
846 unsigned ioeventfd_nb = 0;
847 unsigned ioeventfd_max;
848 MemoryRegionIoeventfd *ioeventfds;
849 AddrRange tmp;
850 unsigned i;
851
852 if (!as->ioeventfd_notifiers) {
853 return;
854 }
855
856 /*
857 * It is likely that the number of ioeventfds hasn't changed much, so use
858 * the previous size as the starting value, with some headroom to avoid
859 * gratuitous reallocations.
860 */
861 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
862 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
863
864 view = address_space_get_flatview(as);
865 FOR_EACH_FLAT_RANGE(fr, view) {
866 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
867 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
868 int128_sub(fr->addr.start,
869 int128_make64(fr->offset_in_region)));
870 if (addrrange_intersects(fr->addr, tmp)) {
871 ++ioeventfd_nb;
872 if (ioeventfd_nb > ioeventfd_max) {
873 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
874 ioeventfds = g_realloc(ioeventfds,
875 ioeventfd_max * sizeof(*ioeventfds));
876 }
877 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
878 ioeventfds[ioeventfd_nb-1].addr = tmp;
879 }
880 }
881 }
882
883 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
884 as->ioeventfds, as->ioeventfd_nb);
885
886 g_free(as->ioeventfds);
887 as->ioeventfds = ioeventfds;
888 as->ioeventfd_nb = ioeventfd_nb;
889 flatview_unref(view);
890 }
891
892 /*
893 * Notify the memory listeners about the coalesced IO change events of
894 * range `cmr'. Only the part that has intersection of the specified
895 * FlatRange will be sent.
896 */
897 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
898 CoalescedMemoryRange *cmr, bool add)
899 {
900 AddrRange tmp;
901
902 tmp = addrrange_shift(cmr->addr,
903 int128_sub(fr->addr.start,
904 int128_make64(fr->offset_in_region)));
905 if (!addrrange_intersects(tmp, fr->addr)) {
906 return;
907 }
908 tmp = addrrange_intersection(tmp, fr->addr);
909
910 if (add) {
911 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
912 int128_get64(tmp.start),
913 int128_get64(tmp.size));
914 } else {
915 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
916 int128_get64(tmp.start),
917 int128_get64(tmp.size));
918 }
919 }
920
921 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
922 {
923 CoalescedMemoryRange *cmr;
924
925 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
926 flat_range_coalesced_io_notify(fr, as, cmr, false);
927 }
928 }
929
930 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
931 {
932 MemoryRegion *mr = fr->mr;
933 CoalescedMemoryRange *cmr;
934
935 if (QTAILQ_EMPTY(&mr->coalesced)) {
936 return;
937 }
938
939 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
940 flat_range_coalesced_io_notify(fr, as, cmr, true);
941 }
942 }
943
944 static void address_space_update_topology_pass(AddressSpace *as,
945 const FlatView *old_view,
946 const FlatView *new_view,
947 bool adding)
948 {
949 unsigned iold, inew;
950 FlatRange *frold, *frnew;
951
952 /* Generate a symmetric difference of the old and new memory maps.
953 * Kill ranges in the old map, and instantiate ranges in the new map.
954 */
955 iold = inew = 0;
956 while (iold < old_view->nr || inew < new_view->nr) {
957 if (iold < old_view->nr) {
958 frold = &old_view->ranges[iold];
959 } else {
960 frold = NULL;
961 }
962 if (inew < new_view->nr) {
963 frnew = &new_view->ranges[inew];
964 } else {
965 frnew = NULL;
966 }
967
968 if (frold
969 && (!frnew
970 || int128_lt(frold->addr.start, frnew->addr.start)
971 || (int128_eq(frold->addr.start, frnew->addr.start)
972 && !flatrange_equal(frold, frnew)))) {
973 /* In old but not in new, or in both but attributes changed. */
974
975 if (!adding) {
976 flat_range_coalesced_io_del(frold, as);
977 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
978 }
979
980 ++iold;
981 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
982 /* In both and unchanged (except logging may have changed) */
983
984 if (adding) {
985 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
986 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
987 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
988 frold->dirty_log_mask,
989 frnew->dirty_log_mask);
990 }
991 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
992 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
993 frold->dirty_log_mask,
994 frnew->dirty_log_mask);
995 }
996 }
997
998 ++iold;
999 ++inew;
1000 } else {
1001 /* In new */
1002
1003 if (adding) {
1004 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
1005 flat_range_coalesced_io_add(frnew, as);
1006 }
1007
1008 ++inew;
1009 }
1010 }
1011 }
1012
1013 static void flatviews_init(void)
1014 {
1015 static FlatView *empty_view;
1016
1017 if (flat_views) {
1018 return;
1019 }
1020
1021 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
1022 (GDestroyNotify) flatview_unref);
1023 if (!empty_view) {
1024 empty_view = generate_memory_topology(NULL);
1025 /* We keep it alive forever in the global variable. */
1026 flatview_ref(empty_view);
1027 } else {
1028 g_hash_table_replace(flat_views, NULL, empty_view);
1029 flatview_ref(empty_view);
1030 }
1031 }
1032
1033 static void flatviews_reset(void)
1034 {
1035 AddressSpace *as;
1036
1037 if (flat_views) {
1038 g_hash_table_unref(flat_views);
1039 flat_views = NULL;
1040 }
1041 flatviews_init();
1042
1043 /* Render unique FVs */
1044 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1045 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1046
1047 if (g_hash_table_lookup(flat_views, physmr)) {
1048 continue;
1049 }
1050
1051 generate_memory_topology(physmr);
1052 }
1053 }
1054
1055 static void address_space_set_flatview(AddressSpace *as)
1056 {
1057 FlatView *old_view = address_space_to_flatview(as);
1058 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1059 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1060
1061 assert(new_view);
1062
1063 if (old_view == new_view) {
1064 return;
1065 }
1066
1067 if (old_view) {
1068 flatview_ref(old_view);
1069 }
1070
1071 flatview_ref(new_view);
1072
1073 if (!QTAILQ_EMPTY(&as->listeners)) {
1074 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1075
1076 if (!old_view2) {
1077 old_view2 = &tmpview;
1078 }
1079 address_space_update_topology_pass(as, old_view2, new_view, false);
1080 address_space_update_topology_pass(as, old_view2, new_view, true);
1081 }
1082
1083 /* Writes are protected by the BQL. */
1084 qatomic_rcu_set(&as->current_map, new_view);
1085 if (old_view) {
1086 flatview_unref(old_view);
1087 }
1088
1089 /* Note that all the old MemoryRegions are still alive up to this
1090 * point. This relieves most MemoryListeners from the need to
1091 * ref/unref the MemoryRegions they get---unless they use them
1092 * outside the iothread mutex, in which case precise reference
1093 * counting is necessary.
1094 */
1095 if (old_view) {
1096 flatview_unref(old_view);
1097 }
1098 }
1099
1100 static void address_space_update_topology(AddressSpace *as)
1101 {
1102 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1103
1104 flatviews_init();
1105 if (!g_hash_table_lookup(flat_views, physmr)) {
1106 generate_memory_topology(physmr);
1107 }
1108 address_space_set_flatview(as);
1109 }
1110
1111 void memory_region_transaction_begin(void)
1112 {
1113 qemu_flush_coalesced_mmio_buffer();
1114 ++memory_region_transaction_depth;
1115 }
1116
1117 void memory_region_transaction_commit(void)
1118 {
1119 AddressSpace *as;
1120
1121 assert(memory_region_transaction_depth);
1122 assert(qemu_mutex_iothread_locked());
1123
1124 --memory_region_transaction_depth;
1125 if (!memory_region_transaction_depth) {
1126 if (memory_region_update_pending) {
1127 flatviews_reset();
1128
1129 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1130
1131 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1132 address_space_set_flatview(as);
1133 address_space_update_ioeventfds(as);
1134 }
1135 memory_region_update_pending = false;
1136 ioeventfd_update_pending = false;
1137 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1138 } else if (ioeventfd_update_pending) {
1139 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1140 address_space_update_ioeventfds(as);
1141 }
1142 ioeventfd_update_pending = false;
1143 }
1144 }
1145 }
1146
1147 static void memory_region_destructor_none(MemoryRegion *mr)
1148 {
1149 }
1150
1151 static void memory_region_destructor_ram(MemoryRegion *mr)
1152 {
1153 qemu_ram_free(mr->ram_block);
1154 }
1155
1156 static bool memory_region_need_escape(char c)
1157 {
1158 return c == '/' || c == '[' || c == '\\' || c == ']';
1159 }
1160
1161 static char *memory_region_escape_name(const char *name)
1162 {
1163 const char *p;
1164 char *escaped, *q;
1165 uint8_t c;
1166 size_t bytes = 0;
1167
1168 for (p = name; *p; p++) {
1169 bytes += memory_region_need_escape(*p) ? 4 : 1;
1170 }
1171 if (bytes == p - name) {
1172 return g_memdup(name, bytes + 1);
1173 }
1174
1175 escaped = g_malloc(bytes + 1);
1176 for (p = name, q = escaped; *p; p++) {
1177 c = *p;
1178 if (unlikely(memory_region_need_escape(c))) {
1179 *q++ = '\\';
1180 *q++ = 'x';
1181 *q++ = "0123456789abcdef"[c >> 4];
1182 c = "0123456789abcdef"[c & 15];
1183 }
1184 *q++ = c;
1185 }
1186 *q = 0;
1187 return escaped;
1188 }
1189
1190 static void memory_region_do_init(MemoryRegion *mr,
1191 Object *owner,
1192 const char *name,
1193 uint64_t size)
1194 {
1195 mr->size = int128_make64(size);
1196 if (size == UINT64_MAX) {
1197 mr->size = int128_2_64();
1198 }
1199 mr->name = g_strdup(name);
1200 mr->owner = owner;
1201 mr->dev = (DeviceState *) object_dynamic_cast(mr->owner, TYPE_DEVICE);
1202 mr->ram_block = NULL;
1203
1204 if (name) {
1205 char *escaped_name = memory_region_escape_name(name);
1206 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1207
1208 if (!owner) {
1209 owner = container_get(qdev_get_machine(), "/unattached");
1210 }
1211
1212 object_property_add_child(owner, name_array, OBJECT(mr));
1213 object_unref(OBJECT(mr));
1214 g_free(name_array);
1215 g_free(escaped_name);
1216 }
1217 }
1218
1219 void memory_region_init(MemoryRegion *mr,
1220 Object *owner,
1221 const char *name,
1222 uint64_t size)
1223 {
1224 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1225 memory_region_do_init(mr, owner, name, size);
1226 }
1227
1228 static void memory_region_get_container(Object *obj, Visitor *v,
1229 const char *name, void *opaque,
1230 Error **errp)
1231 {
1232 MemoryRegion *mr = MEMORY_REGION(obj);
1233 char *path = (char *)"";
1234
1235 if (mr->container) {
1236 path = object_get_canonical_path(OBJECT(mr->container));
1237 }
1238 visit_type_str(v, name, &path, errp);
1239 if (mr->container) {
1240 g_free(path);
1241 }
1242 }
1243
1244 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1245 const char *part)
1246 {
1247 MemoryRegion *mr = MEMORY_REGION(obj);
1248
1249 return OBJECT(mr->container);
1250 }
1251
1252 static void memory_region_get_priority(Object *obj, Visitor *v,
1253 const char *name, void *opaque,
1254 Error **errp)
1255 {
1256 MemoryRegion *mr = MEMORY_REGION(obj);
1257 int32_t value = mr->priority;
1258
1259 visit_type_int32(v, name, &value, errp);
1260 }
1261
1262 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1263 void *opaque, Error **errp)
1264 {
1265 MemoryRegion *mr = MEMORY_REGION(obj);
1266 uint64_t value = memory_region_size(mr);
1267
1268 visit_type_uint64(v, name, &value, errp);
1269 }
1270
1271 static void memory_region_initfn(Object *obj)
1272 {
1273 MemoryRegion *mr = MEMORY_REGION(obj);
1274 ObjectProperty *op;
1275
1276 mr->ops = &unassigned_mem_ops;
1277 mr->enabled = true;
1278 mr->romd_mode = true;
1279 mr->destructor = memory_region_destructor_none;
1280 QTAILQ_INIT(&mr->subregions);
1281 QTAILQ_INIT(&mr->coalesced);
1282
1283 op = object_property_add(OBJECT(mr), "container",
1284 "link<" TYPE_MEMORY_REGION ">",
1285 memory_region_get_container,
1286 NULL, /* memory_region_set_container */
1287 NULL, NULL);
1288 op->resolve = memory_region_resolve_container;
1289
1290 object_property_add_uint64_ptr(OBJECT(mr), "addr",
1291 &mr->addr, OBJ_PROP_FLAG_READ);
1292 object_property_add(OBJECT(mr), "priority", "uint32",
1293 memory_region_get_priority,
1294 NULL, /* memory_region_set_priority */
1295 NULL, NULL);
1296 object_property_add(OBJECT(mr), "size", "uint64",
1297 memory_region_get_size,
1298 NULL, /* memory_region_set_size, */
1299 NULL, NULL);
1300 }
1301
1302 static void iommu_memory_region_initfn(Object *obj)
1303 {
1304 MemoryRegion *mr = MEMORY_REGION(obj);
1305
1306 mr->is_iommu = true;
1307 }
1308
1309 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1310 unsigned size)
1311 {
1312 #ifdef DEBUG_UNASSIGNED
1313 printf("Unassigned mem read " HWADDR_FMT_plx "\n", addr);
1314 #endif
1315 return 0;
1316 }
1317
1318 static void unassigned_mem_write(void *opaque, hwaddr addr,
1319 uint64_t val, unsigned size)
1320 {
1321 #ifdef DEBUG_UNASSIGNED
1322 printf("Unassigned mem write " HWADDR_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1323 #endif
1324 }
1325
1326 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1327 unsigned size, bool is_write,
1328 MemTxAttrs attrs)
1329 {
1330 return false;
1331 }
1332
1333 const MemoryRegionOps unassigned_mem_ops = {
1334 .valid.accepts = unassigned_mem_accepts,
1335 .endianness = DEVICE_NATIVE_ENDIAN,
1336 };
1337
1338 static uint64_t memory_region_ram_device_read(void *opaque,
1339 hwaddr addr, unsigned size)
1340 {
1341 MemoryRegion *mr = opaque;
1342 uint64_t data = ldn_he_p(mr->ram_block->host + addr, size);
1343
1344 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1345
1346 return data;
1347 }
1348
1349 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1350 uint64_t data, unsigned size)
1351 {
1352 MemoryRegion *mr = opaque;
1353
1354 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1355
1356 stn_he_p(mr->ram_block->host + addr, size, data);
1357 }
1358
1359 static const MemoryRegionOps ram_device_mem_ops = {
1360 .read = memory_region_ram_device_read,
1361 .write = memory_region_ram_device_write,
1362 .endianness = DEVICE_HOST_ENDIAN,
1363 .valid = {
1364 .min_access_size = 1,
1365 .max_access_size = 8,
1366 .unaligned = true,
1367 },
1368 .impl = {
1369 .min_access_size = 1,
1370 .max_access_size = 8,
1371 .unaligned = true,
1372 },
1373 };
1374
1375 bool memory_region_access_valid(MemoryRegion *mr,
1376 hwaddr addr,
1377 unsigned size,
1378 bool is_write,
1379 MemTxAttrs attrs)
1380 {
1381 if (mr->ops->valid.accepts
1382 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1383 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1384 ", size %u, region '%s', reason: rejected\n",
1385 is_write ? "write" : "read",
1386 addr, size, memory_region_name(mr));
1387 return false;
1388 }
1389
1390 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1391 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1392 ", size %u, region '%s', reason: unaligned\n",
1393 is_write ? "write" : "read",
1394 addr, size, memory_region_name(mr));
1395 return false;
1396 }
1397
1398 /* Treat zero as compatibility all valid */
1399 if (!mr->ops->valid.max_access_size) {
1400 return true;
1401 }
1402
1403 if (size > mr->ops->valid.max_access_size
1404 || size < mr->ops->valid.min_access_size) {
1405 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1406 ", size %u, region '%s', reason: invalid size "
1407 "(min:%u max:%u)\n",
1408 is_write ? "write" : "read",
1409 addr, size, memory_region_name(mr),
1410 mr->ops->valid.min_access_size,
1411 mr->ops->valid.max_access_size);
1412 return false;
1413 }
1414 return true;
1415 }
1416
1417 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1418 hwaddr addr,
1419 uint64_t *pval,
1420 unsigned size,
1421 MemTxAttrs attrs)
1422 {
1423 *pval = 0;
1424
1425 if (mr->ops->read) {
1426 return access_with_adjusted_size(addr, pval, size,
1427 mr->ops->impl.min_access_size,
1428 mr->ops->impl.max_access_size,
1429 memory_region_read_accessor,
1430 mr, attrs);
1431 } else {
1432 return access_with_adjusted_size(addr, pval, size,
1433 mr->ops->impl.min_access_size,
1434 mr->ops->impl.max_access_size,
1435 memory_region_read_with_attrs_accessor,
1436 mr, attrs);
1437 }
1438 }
1439
1440 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1441 hwaddr addr,
1442 uint64_t *pval,
1443 MemOp op,
1444 MemTxAttrs attrs)
1445 {
1446 unsigned size = memop_size(op);
1447 MemTxResult r;
1448
1449 if (mr->alias) {
1450 return memory_region_dispatch_read(mr->alias,
1451 mr->alias_offset + addr,
1452 pval, op, attrs);
1453 }
1454 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1455 *pval = unassigned_mem_read(mr, addr, size);
1456 return MEMTX_DECODE_ERROR;
1457 }
1458
1459 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1460 adjust_endianness(mr, pval, op);
1461 return r;
1462 }
1463
1464 /* Return true if an eventfd was signalled */
1465 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1466 hwaddr addr,
1467 uint64_t data,
1468 unsigned size,
1469 MemTxAttrs attrs)
1470 {
1471 MemoryRegionIoeventfd ioeventfd = {
1472 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1473 .data = data,
1474 };
1475 unsigned i;
1476
1477 for (i = 0; i < mr->ioeventfd_nb; i++) {
1478 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1479 ioeventfd.e = mr->ioeventfds[i].e;
1480
1481 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1482 event_notifier_set(ioeventfd.e);
1483 return true;
1484 }
1485 }
1486
1487 return false;
1488 }
1489
1490 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1491 hwaddr addr,
1492 uint64_t data,
1493 MemOp op,
1494 MemTxAttrs attrs)
1495 {
1496 unsigned size = memop_size(op);
1497
1498 if (mr->alias) {
1499 return memory_region_dispatch_write(mr->alias,
1500 mr->alias_offset + addr,
1501 data, op, attrs);
1502 }
1503 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1504 unassigned_mem_write(mr, addr, data, size);
1505 return MEMTX_DECODE_ERROR;
1506 }
1507
1508 adjust_endianness(mr, &data, op);
1509
1510 /*
1511 * FIXME: it's not clear why under KVM the write would be processed
1512 * directly, instead of going through eventfd. This probably should
1513 * test "tcg_enabled() || qtest_enabled()", or should just go away.
1514 */
1515 if (!kvm_enabled() &&
1516 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1517 return MEMTX_OK;
1518 }
1519
1520 if (mr->ops->write) {
1521 return access_with_adjusted_size(addr, &data, size,
1522 mr->ops->impl.min_access_size,
1523 mr->ops->impl.max_access_size,
1524 memory_region_write_accessor, mr,
1525 attrs);
1526 } else {
1527 return
1528 access_with_adjusted_size(addr, &data, size,
1529 mr->ops->impl.min_access_size,
1530 mr->ops->impl.max_access_size,
1531 memory_region_write_with_attrs_accessor,
1532 mr, attrs);
1533 }
1534 }
1535
1536 void memory_region_init_io(MemoryRegion *mr,
1537 Object *owner,
1538 const MemoryRegionOps *ops,
1539 void *opaque,
1540 const char *name,
1541 uint64_t size)
1542 {
1543 memory_region_init(mr, owner, name, size);
1544 mr->ops = ops ? ops : &unassigned_mem_ops;
1545 mr->opaque = opaque;
1546 mr->terminates = true;
1547 }
1548
1549 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1550 Object *owner,
1551 const char *name,
1552 uint64_t size,
1553 Error **errp)
1554 {
1555 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1556 }
1557
1558 void memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
1559 Object *owner,
1560 const char *name,
1561 uint64_t size,
1562 uint32_t ram_flags,
1563 Error **errp)
1564 {
1565 Error *err = NULL;
1566 memory_region_init(mr, owner, name, size);
1567 mr->ram = true;
1568 mr->terminates = true;
1569 mr->destructor = memory_region_destructor_ram;
1570 mr->ram_block = qemu_ram_alloc(size, ram_flags, mr, &err);
1571 if (err) {
1572 mr->size = int128_zero();
1573 object_unparent(OBJECT(mr));
1574 error_propagate(errp, err);
1575 }
1576 }
1577
1578 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1579 Object *owner,
1580 const char *name,
1581 uint64_t size,
1582 uint64_t max_size,
1583 void (*resized)(const char*,
1584 uint64_t length,
1585 void *host),
1586 Error **errp)
1587 {
1588 Error *err = NULL;
1589 memory_region_init(mr, owner, name, size);
1590 mr->ram = true;
1591 mr->terminates = true;
1592 mr->destructor = memory_region_destructor_ram;
1593 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1594 mr, &err);
1595 if (err) {
1596 mr->size = int128_zero();
1597 object_unparent(OBJECT(mr));
1598 error_propagate(errp, err);
1599 }
1600 }
1601
1602 #ifdef CONFIG_POSIX
1603 void memory_region_init_ram_from_file(MemoryRegion *mr,
1604 Object *owner,
1605 const char *name,
1606 uint64_t size,
1607 uint64_t align,
1608 uint32_t ram_flags,
1609 const char *path,
1610 ram_addr_t offset,
1611 Error **errp)
1612 {
1613 Error *err = NULL;
1614 memory_region_init(mr, owner, name, size);
1615 mr->ram = true;
1616 mr->readonly = !!(ram_flags & RAM_READONLY);
1617 mr->terminates = true;
1618 mr->destructor = memory_region_destructor_ram;
1619 mr->align = align;
1620 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
1621 offset, &err);
1622 if (err) {
1623 mr->size = int128_zero();
1624 object_unparent(OBJECT(mr));
1625 error_propagate(errp, err);
1626 }
1627 }
1628
1629 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1630 Object *owner,
1631 const char *name,
1632 uint64_t size,
1633 uint32_t ram_flags,
1634 int fd,
1635 ram_addr_t offset,
1636 Error **errp)
1637 {
1638 Error *err = NULL;
1639 memory_region_init(mr, owner, name, size);
1640 mr->ram = true;
1641 mr->readonly = !!(ram_flags & RAM_READONLY);
1642 mr->terminates = true;
1643 mr->destructor = memory_region_destructor_ram;
1644 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset,
1645 &err);
1646 if (err) {
1647 mr->size = int128_zero();
1648 object_unparent(OBJECT(mr));
1649 error_propagate(errp, err);
1650 }
1651 }
1652 #endif
1653
1654 void memory_region_init_ram_ptr(MemoryRegion *mr,
1655 Object *owner,
1656 const char *name,
1657 uint64_t size,
1658 void *ptr)
1659 {
1660 memory_region_init(mr, owner, name, size);
1661 mr->ram = true;
1662 mr->terminates = true;
1663 mr->destructor = memory_region_destructor_ram;
1664
1665 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1666 assert(ptr != NULL);
1667 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1668 }
1669
1670 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1671 Object *owner,
1672 const char *name,
1673 uint64_t size,
1674 void *ptr)
1675 {
1676 memory_region_init(mr, owner, name, size);
1677 mr->ram = true;
1678 mr->terminates = true;
1679 mr->ram_device = true;
1680 mr->ops = &ram_device_mem_ops;
1681 mr->opaque = mr;
1682 mr->destructor = memory_region_destructor_ram;
1683
1684 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1685 assert(ptr != NULL);
1686 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1687 }
1688
1689 void memory_region_init_alias(MemoryRegion *mr,
1690 Object *owner,
1691 const char *name,
1692 MemoryRegion *orig,
1693 hwaddr offset,
1694 uint64_t size)
1695 {
1696 memory_region_init(mr, owner, name, size);
1697 mr->alias = orig;
1698 mr->alias_offset = offset;
1699 }
1700
1701 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1702 Object *owner,
1703 const char *name,
1704 uint64_t size,
1705 Error **errp)
1706 {
1707 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1708 mr->readonly = true;
1709 }
1710
1711 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1712 Object *owner,
1713 const MemoryRegionOps *ops,
1714 void *opaque,
1715 const char *name,
1716 uint64_t size,
1717 Error **errp)
1718 {
1719 Error *err = NULL;
1720 assert(ops);
1721 memory_region_init(mr, owner, name, size);
1722 mr->ops = ops;
1723 mr->opaque = opaque;
1724 mr->terminates = true;
1725 mr->rom_device = true;
1726 mr->destructor = memory_region_destructor_ram;
1727 mr->ram_block = qemu_ram_alloc(size, 0, mr, &err);
1728 if (err) {
1729 mr->size = int128_zero();
1730 object_unparent(OBJECT(mr));
1731 error_propagate(errp, err);
1732 }
1733 }
1734
1735 void memory_region_init_iommu(void *_iommu_mr,
1736 size_t instance_size,
1737 const char *mrtypename,
1738 Object *owner,
1739 const char *name,
1740 uint64_t size)
1741 {
1742 struct IOMMUMemoryRegion *iommu_mr;
1743 struct MemoryRegion *mr;
1744
1745 object_initialize(_iommu_mr, instance_size, mrtypename);
1746 mr = MEMORY_REGION(_iommu_mr);
1747 memory_region_do_init(mr, owner, name, size);
1748 iommu_mr = IOMMU_MEMORY_REGION(mr);
1749 mr->terminates = true; /* then re-forwards */
1750 QLIST_INIT(&iommu_mr->iommu_notify);
1751 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1752 }
1753
1754 static void memory_region_finalize(Object *obj)
1755 {
1756 MemoryRegion *mr = MEMORY_REGION(obj);
1757
1758 assert(!mr->container);
1759
1760 /* We know the region is not visible in any address space (it
1761 * does not have a container and cannot be a root either because
1762 * it has no references, so we can blindly clear mr->enabled.
1763 * memory_region_set_enabled instead could trigger a transaction
1764 * and cause an infinite loop.
1765 */
1766 mr->enabled = false;
1767 memory_region_transaction_begin();
1768 while (!QTAILQ_EMPTY(&mr->subregions)) {
1769 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1770 memory_region_del_subregion(mr, subregion);
1771 }
1772 memory_region_transaction_commit();
1773
1774 mr->destructor(mr);
1775 memory_region_clear_coalescing(mr);
1776 g_free((char *)mr->name);
1777 g_free(mr->ioeventfds);
1778 }
1779
1780 Object *memory_region_owner(MemoryRegion *mr)
1781 {
1782 Object *obj = OBJECT(mr);
1783 return obj->parent;
1784 }
1785
1786 void memory_region_ref(MemoryRegion *mr)
1787 {
1788 /* MMIO callbacks most likely will access data that belongs
1789 * to the owner, hence the need to ref/unref the owner whenever
1790 * the memory region is in use.
1791 *
1792 * The memory region is a child of its owner. As long as the
1793 * owner doesn't call unparent itself on the memory region,
1794 * ref-ing the owner will also keep the memory region alive.
1795 * Memory regions without an owner are supposed to never go away;
1796 * we do not ref/unref them because it slows down DMA sensibly.
1797 */
1798 if (mr && mr->owner) {
1799 object_ref(mr->owner);
1800 }
1801 }
1802
1803 void memory_region_unref(MemoryRegion *mr)
1804 {
1805 if (mr && mr->owner) {
1806 object_unref(mr->owner);
1807 }
1808 }
1809
1810 uint64_t memory_region_size(MemoryRegion *mr)
1811 {
1812 if (int128_eq(mr->size, int128_2_64())) {
1813 return UINT64_MAX;
1814 }
1815 return int128_get64(mr->size);
1816 }
1817
1818 const char *memory_region_name(const MemoryRegion *mr)
1819 {
1820 if (!mr->name) {
1821 ((MemoryRegion *)mr)->name =
1822 g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1823 }
1824 return mr->name;
1825 }
1826
1827 bool memory_region_is_ram_device(MemoryRegion *mr)
1828 {
1829 return mr->ram_device;
1830 }
1831
1832 bool memory_region_is_protected(MemoryRegion *mr)
1833 {
1834 return mr->ram && (mr->ram_block->flags & RAM_PROTECTED);
1835 }
1836
1837 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1838 {
1839 uint8_t mask = mr->dirty_log_mask;
1840 RAMBlock *rb = mr->ram_block;
1841
1842 if (global_dirty_tracking && ((rb && qemu_ram_is_migratable(rb)) ||
1843 memory_region_is_iommu(mr))) {
1844 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1845 }
1846
1847 if (tcg_enabled() && rb) {
1848 /* TCG only cares about dirty memory logging for RAM, not IOMMU. */
1849 mask |= (1 << DIRTY_MEMORY_CODE);
1850 }
1851 return mask;
1852 }
1853
1854 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1855 {
1856 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1857 }
1858
1859 static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1860 Error **errp)
1861 {
1862 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1863 IOMMUNotifier *iommu_notifier;
1864 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1865 int ret = 0;
1866
1867 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1868 flags |= iommu_notifier->notifier_flags;
1869 }
1870
1871 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1872 ret = imrc->notify_flag_changed(iommu_mr,
1873 iommu_mr->iommu_notify_flags,
1874 flags, errp);
1875 }
1876
1877 if (!ret) {
1878 iommu_mr->iommu_notify_flags = flags;
1879 }
1880 return ret;
1881 }
1882
1883 int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
1884 uint64_t page_size_mask,
1885 Error **errp)
1886 {
1887 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1888 int ret = 0;
1889
1890 if (imrc->iommu_set_page_size_mask) {
1891 ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
1892 }
1893 return ret;
1894 }
1895
1896 int memory_region_iommu_set_iova_ranges(IOMMUMemoryRegion *iommu_mr,
1897 GList *iova_ranges,
1898 Error **errp)
1899 {
1900 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1901 int ret = 0;
1902
1903 if (imrc->iommu_set_iova_ranges) {
1904 ret = imrc->iommu_set_iova_ranges(iommu_mr, iova_ranges, errp);
1905 }
1906 return ret;
1907 }
1908
1909 int memory_region_register_iommu_notifier(MemoryRegion *mr,
1910 IOMMUNotifier *n, Error **errp)
1911 {
1912 IOMMUMemoryRegion *iommu_mr;
1913 int ret;
1914
1915 if (mr->alias) {
1916 return memory_region_register_iommu_notifier(mr->alias, n, errp);
1917 }
1918
1919 /* We need to register for at least one bitfield */
1920 iommu_mr = IOMMU_MEMORY_REGION(mr);
1921 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1922 assert(n->start <= n->end);
1923 assert(n->iommu_idx >= 0 &&
1924 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1925
1926 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1927 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1928 if (ret) {
1929 QLIST_REMOVE(n, node);
1930 }
1931 return ret;
1932 }
1933
1934 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1935 {
1936 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1937
1938 if (imrc->get_min_page_size) {
1939 return imrc->get_min_page_size(iommu_mr);
1940 }
1941 return TARGET_PAGE_SIZE;
1942 }
1943
1944 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1945 {
1946 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1947 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1948 hwaddr addr, granularity;
1949 IOMMUTLBEntry iotlb;
1950
1951 /* If the IOMMU has its own replay callback, override */
1952 if (imrc->replay) {
1953 imrc->replay(iommu_mr, n);
1954 return;
1955 }
1956
1957 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1958
1959 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1960 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1961 if (iotlb.perm != IOMMU_NONE) {
1962 n->notify(n, &iotlb);
1963 }
1964
1965 /* if (2^64 - MR size) < granularity, it's possible to get an
1966 * infinite loop here. This should catch such a wraparound */
1967 if ((addr + granularity) < addr) {
1968 break;
1969 }
1970 }
1971 }
1972
1973 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1974 IOMMUNotifier *n)
1975 {
1976 IOMMUMemoryRegion *iommu_mr;
1977
1978 if (mr->alias) {
1979 memory_region_unregister_iommu_notifier(mr->alias, n);
1980 return;
1981 }
1982 QLIST_REMOVE(n, node);
1983 iommu_mr = IOMMU_MEMORY_REGION(mr);
1984 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
1985 }
1986
1987 void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
1988 IOMMUTLBEvent *event)
1989 {
1990 IOMMUTLBEntry *entry = &event->entry;
1991 hwaddr entry_end = entry->iova + entry->addr_mask;
1992 IOMMUTLBEntry tmp = *entry;
1993
1994 if (event->type == IOMMU_NOTIFIER_UNMAP) {
1995 assert(entry->perm == IOMMU_NONE);
1996 }
1997
1998 /*
1999 * Skip the notification if the notification does not overlap
2000 * with registered range.
2001 */
2002 if (notifier->start > entry_end || notifier->end < entry->iova) {
2003 return;
2004 }
2005
2006 if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
2007 /* Crop (iova, addr_mask) to range */
2008 tmp.iova = MAX(tmp.iova, notifier->start);
2009 tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
2010 } else {
2011 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
2012 }
2013
2014 if (event->type & notifier->notifier_flags) {
2015 notifier->notify(notifier, &tmp);
2016 }
2017 }
2018
2019 void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *notifier)
2020 {
2021 IOMMUTLBEvent event;
2022
2023 event.type = IOMMU_NOTIFIER_UNMAP;
2024 event.entry.target_as = &address_space_memory;
2025 event.entry.iova = notifier->start;
2026 event.entry.perm = IOMMU_NONE;
2027 event.entry.addr_mask = notifier->end - notifier->start;
2028
2029 memory_region_notify_iommu_one(notifier, &event);
2030 }
2031
2032 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
2033 int iommu_idx,
2034 IOMMUTLBEvent event)
2035 {
2036 IOMMUNotifier *iommu_notifier;
2037
2038 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
2039
2040 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
2041 if (iommu_notifier->iommu_idx == iommu_idx) {
2042 memory_region_notify_iommu_one(iommu_notifier, &event);
2043 }
2044 }
2045 }
2046
2047 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2048 enum IOMMUMemoryRegionAttr attr,
2049 void *data)
2050 {
2051 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2052
2053 if (!imrc->get_attr) {
2054 return -EINVAL;
2055 }
2056
2057 return imrc->get_attr(iommu_mr, attr, data);
2058 }
2059
2060 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2061 MemTxAttrs attrs)
2062 {
2063 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2064
2065 if (!imrc->attrs_to_index) {
2066 return 0;
2067 }
2068
2069 return imrc->attrs_to_index(iommu_mr, attrs);
2070 }
2071
2072 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2073 {
2074 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2075
2076 if (!imrc->num_indexes) {
2077 return 1;
2078 }
2079
2080 return imrc->num_indexes(iommu_mr);
2081 }
2082
2083 RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr)
2084 {
2085 if (!memory_region_is_ram(mr)) {
2086 return NULL;
2087 }
2088 return mr->rdm;
2089 }
2090
2091 void memory_region_set_ram_discard_manager(MemoryRegion *mr,
2092 RamDiscardManager *rdm)
2093 {
2094 g_assert(memory_region_is_ram(mr));
2095 g_assert(!rdm || !mr->rdm);
2096 mr->rdm = rdm;
2097 }
2098
2099 uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm,
2100 const MemoryRegion *mr)
2101 {
2102 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2103
2104 g_assert(rdmc->get_min_granularity);
2105 return rdmc->get_min_granularity(rdm, mr);
2106 }
2107
2108 bool ram_discard_manager_is_populated(const RamDiscardManager *rdm,
2109 const MemoryRegionSection *section)
2110 {
2111 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2112
2113 g_assert(rdmc->is_populated);
2114 return rdmc->is_populated(rdm, section);
2115 }
2116
2117 int ram_discard_manager_replay_populated(const RamDiscardManager *rdm,
2118 MemoryRegionSection *section,
2119 ReplayRamPopulate replay_fn,
2120 void *opaque)
2121 {
2122 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2123
2124 g_assert(rdmc->replay_populated);
2125 return rdmc->replay_populated(rdm, section, replay_fn, opaque);
2126 }
2127
2128 void ram_discard_manager_replay_discarded(const RamDiscardManager *rdm,
2129 MemoryRegionSection *section,
2130 ReplayRamDiscard replay_fn,
2131 void *opaque)
2132 {
2133 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2134
2135 g_assert(rdmc->replay_discarded);
2136 rdmc->replay_discarded(rdm, section, replay_fn, opaque);
2137 }
2138
2139 void ram_discard_manager_register_listener(RamDiscardManager *rdm,
2140 RamDiscardListener *rdl,
2141 MemoryRegionSection *section)
2142 {
2143 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2144
2145 g_assert(rdmc->register_listener);
2146 rdmc->register_listener(rdm, rdl, section);
2147 }
2148
2149 void ram_discard_manager_unregister_listener(RamDiscardManager *rdm,
2150 RamDiscardListener *rdl)
2151 {
2152 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2153
2154 g_assert(rdmc->unregister_listener);
2155 rdmc->unregister_listener(rdm, rdl);
2156 }
2157
2158 /* Called with rcu_read_lock held. */
2159 bool memory_get_xlat_addr(IOMMUTLBEntry *iotlb, void **vaddr,
2160 ram_addr_t *ram_addr, bool *read_only,
2161 bool *mr_has_discard_manager)
2162 {
2163 MemoryRegion *mr;
2164 hwaddr xlat;
2165 hwaddr len = iotlb->addr_mask + 1;
2166 bool writable = iotlb->perm & IOMMU_WO;
2167
2168 if (mr_has_discard_manager) {
2169 *mr_has_discard_manager = false;
2170 }
2171 /*
2172 * The IOMMU TLB entry we have just covers translation through
2173 * this IOMMU to its immediate target. We need to translate
2174 * it the rest of the way through to memory.
2175 */
2176 mr = address_space_translate(&address_space_memory, iotlb->translated_addr,
2177 &xlat, &len, writable, MEMTXATTRS_UNSPECIFIED);
2178 if (!memory_region_is_ram(mr)) {
2179 error_report("iommu map to non memory area %" HWADDR_PRIx "", xlat);
2180 return false;
2181 } else if (memory_region_has_ram_discard_manager(mr)) {
2182 RamDiscardManager *rdm = memory_region_get_ram_discard_manager(mr);
2183 MemoryRegionSection tmp = {
2184 .mr = mr,
2185 .offset_within_region = xlat,
2186 .size = int128_make64(len),
2187 };
2188 if (mr_has_discard_manager) {
2189 *mr_has_discard_manager = true;
2190 }
2191 /*
2192 * Malicious VMs can map memory into the IOMMU, which is expected
2193 * to remain discarded. vfio will pin all pages, populating memory.
2194 * Disallow that. vmstate priorities make sure any RamDiscardManager
2195 * were already restored before IOMMUs are restored.
2196 */
2197 if (!ram_discard_manager_is_populated(rdm, &tmp)) {
2198 error_report("iommu map to discarded memory (e.g., unplugged via"
2199 " virtio-mem): %" HWADDR_PRIx "",
2200 iotlb->translated_addr);
2201 return false;
2202 }
2203 }
2204
2205 /*
2206 * Translation truncates length to the IOMMU page size,
2207 * check that it did not truncate too much.
2208 */
2209 if (len & iotlb->addr_mask) {
2210 error_report("iommu has granularity incompatible with target AS");
2211 return false;
2212 }
2213
2214 if (vaddr) {
2215 *vaddr = memory_region_get_ram_ptr(mr) + xlat;
2216 }
2217
2218 if (ram_addr) {
2219 *ram_addr = memory_region_get_ram_addr(mr) + xlat;
2220 }
2221
2222 if (read_only) {
2223 *read_only = !writable || mr->readonly;
2224 }
2225
2226 return true;
2227 }
2228
2229 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2230 {
2231 uint8_t mask = 1 << client;
2232 uint8_t old_logging;
2233
2234 assert(client == DIRTY_MEMORY_VGA);
2235 old_logging = mr->vga_logging_count;
2236 mr->vga_logging_count += log ? 1 : -1;
2237 if (!!old_logging == !!mr->vga_logging_count) {
2238 return;
2239 }
2240
2241 memory_region_transaction_begin();
2242 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2243 memory_region_update_pending |= mr->enabled;
2244 memory_region_transaction_commit();
2245 }
2246
2247 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2248 hwaddr size)
2249 {
2250 assert(mr->ram_block);
2251 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2252 size,
2253 memory_region_get_dirty_log_mask(mr));
2254 }
2255
2256 /*
2257 * If memory region `mr' is NULL, do global sync. Otherwise, sync
2258 * dirty bitmap for the specified memory region.
2259 */
2260 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr, bool last_stage)
2261 {
2262 MemoryListener *listener;
2263 AddressSpace *as;
2264 FlatView *view;
2265 FlatRange *fr;
2266
2267 /* If the same address space has multiple log_sync listeners, we
2268 * visit that address space's FlatView multiple times. But because
2269 * log_sync listeners are rare, it's still cheaper than walking each
2270 * address space once.
2271 */
2272 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2273 if (listener->log_sync) {
2274 as = listener->address_space;
2275 view = address_space_get_flatview(as);
2276 FOR_EACH_FLAT_RANGE(fr, view) {
2277 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2278 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2279 listener->log_sync(listener, &mrs);
2280 }
2281 }
2282 flatview_unref(view);
2283 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 0);
2284 } else if (listener->log_sync_global) {
2285 /*
2286 * No matter whether MR is specified, what we can do here
2287 * is to do a global sync, because we are not capable to
2288 * sync in a finer granularity.
2289 */
2290 listener->log_sync_global(listener, last_stage);
2291 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 1);
2292 }
2293 }
2294 }
2295
2296 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2297 hwaddr len)
2298 {
2299 MemoryRegionSection mrs;
2300 MemoryListener *listener;
2301 AddressSpace *as;
2302 FlatView *view;
2303 FlatRange *fr;
2304 hwaddr sec_start, sec_end, sec_size;
2305
2306 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2307 if (!listener->log_clear) {
2308 continue;
2309 }
2310 as = listener->address_space;
2311 view = address_space_get_flatview(as);
2312 FOR_EACH_FLAT_RANGE(fr, view) {
2313 if (!fr->dirty_log_mask || fr->mr != mr) {
2314 /*
2315 * Clear dirty bitmap operation only applies to those
2316 * regions whose dirty logging is at least enabled
2317 */
2318 continue;
2319 }
2320
2321 mrs = section_from_flat_range(fr, view);
2322
2323 sec_start = MAX(mrs.offset_within_region, start);
2324 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2325 sec_end = MIN(sec_end, start + len);
2326
2327 if (sec_start >= sec_end) {
2328 /*
2329 * If this memory region section has no intersection
2330 * with the requested range, skip.
2331 */
2332 continue;
2333 }
2334
2335 /* Valid case; shrink the section if needed */
2336 mrs.offset_within_address_space +=
2337 sec_start - mrs.offset_within_region;
2338 mrs.offset_within_region = sec_start;
2339 sec_size = sec_end - sec_start;
2340 mrs.size = int128_make64(sec_size);
2341 listener->log_clear(listener, &mrs);
2342 }
2343 flatview_unref(view);
2344 }
2345 }
2346
2347 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2348 hwaddr addr,
2349 hwaddr size,
2350 unsigned client)
2351 {
2352 DirtyBitmapSnapshot *snapshot;
2353 assert(mr->ram_block);
2354 memory_region_sync_dirty_bitmap(mr, false);
2355 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2356 memory_global_after_dirty_log_sync();
2357 return snapshot;
2358 }
2359
2360 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2361 hwaddr addr, hwaddr size)
2362 {
2363 assert(mr->ram_block);
2364 return cpu_physical_memory_snapshot_get_dirty(snap,
2365 memory_region_get_ram_addr(mr) + addr, size);
2366 }
2367
2368 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2369 {
2370 if (mr->readonly != readonly) {
2371 memory_region_transaction_begin();
2372 mr->readonly = readonly;
2373 memory_region_update_pending |= mr->enabled;
2374 memory_region_transaction_commit();
2375 }
2376 }
2377
2378 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2379 {
2380 if (mr->nonvolatile != nonvolatile) {
2381 memory_region_transaction_begin();
2382 mr->nonvolatile = nonvolatile;
2383 memory_region_update_pending |= mr->enabled;
2384 memory_region_transaction_commit();
2385 }
2386 }
2387
2388 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2389 {
2390 if (mr->romd_mode != romd_mode) {
2391 memory_region_transaction_begin();
2392 mr->romd_mode = romd_mode;
2393 memory_region_update_pending |= mr->enabled;
2394 memory_region_transaction_commit();
2395 }
2396 }
2397
2398 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2399 hwaddr size, unsigned client)
2400 {
2401 assert(mr->ram_block);
2402 cpu_physical_memory_test_and_clear_dirty(
2403 memory_region_get_ram_addr(mr) + addr, size, client);
2404 }
2405
2406 int memory_region_get_fd(MemoryRegion *mr)
2407 {
2408 RCU_READ_LOCK_GUARD();
2409 while (mr->alias) {
2410 mr = mr->alias;
2411 }
2412 return mr->ram_block->fd;
2413 }
2414
2415 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2416 {
2417 uint64_t offset = 0;
2418
2419 RCU_READ_LOCK_GUARD();
2420 while (mr->alias) {
2421 offset += mr->alias_offset;
2422 mr = mr->alias;
2423 }
2424 assert(mr->ram_block);
2425 return qemu_map_ram_ptr(mr->ram_block, offset);
2426 }
2427
2428 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2429 {
2430 RAMBlock *block;
2431
2432 block = qemu_ram_block_from_host(ptr, false, offset);
2433 if (!block) {
2434 return NULL;
2435 }
2436
2437 return block->mr;
2438 }
2439
2440 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2441 {
2442 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2443 }
2444
2445 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2446 {
2447 assert(mr->ram_block);
2448
2449 qemu_ram_resize(mr->ram_block, newsize, errp);
2450 }
2451
2452 void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2453 {
2454 if (mr->ram_block) {
2455 qemu_ram_msync(mr->ram_block, addr, size);
2456 }
2457 }
2458
2459 void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2460 {
2461 /*
2462 * Might be extended case needed to cover
2463 * different types of memory regions
2464 */
2465 if (mr->dirty_log_mask) {
2466 memory_region_msync(mr, addr, size);
2467 }
2468 }
2469
2470 /*
2471 * Call proper memory listeners about the change on the newly
2472 * added/removed CoalescedMemoryRange.
2473 */
2474 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2475 CoalescedMemoryRange *cmr,
2476 bool add)
2477 {
2478 AddressSpace *as;
2479 FlatView *view;
2480 FlatRange *fr;
2481
2482 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2483 view = address_space_get_flatview(as);
2484 FOR_EACH_FLAT_RANGE(fr, view) {
2485 if (fr->mr == mr) {
2486 flat_range_coalesced_io_notify(fr, as, cmr, add);
2487 }
2488 }
2489 flatview_unref(view);
2490 }
2491 }
2492
2493 void memory_region_set_coalescing(MemoryRegion *mr)
2494 {
2495 memory_region_clear_coalescing(mr);
2496 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2497 }
2498
2499 void memory_region_add_coalescing(MemoryRegion *mr,
2500 hwaddr offset,
2501 uint64_t size)
2502 {
2503 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2504
2505 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2506 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2507 memory_region_update_coalesced_range(mr, cmr, true);
2508 memory_region_set_flush_coalesced(mr);
2509 }
2510
2511 void memory_region_clear_coalescing(MemoryRegion *mr)
2512 {
2513 CoalescedMemoryRange *cmr;
2514
2515 if (QTAILQ_EMPTY(&mr->coalesced)) {
2516 return;
2517 }
2518
2519 qemu_flush_coalesced_mmio_buffer();
2520 mr->flush_coalesced_mmio = false;
2521
2522 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2523 cmr = QTAILQ_FIRST(&mr->coalesced);
2524 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2525 memory_region_update_coalesced_range(mr, cmr, false);
2526 g_free(cmr);
2527 }
2528 }
2529
2530 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2531 {
2532 mr->flush_coalesced_mmio = true;
2533 }
2534
2535 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2536 {
2537 qemu_flush_coalesced_mmio_buffer();
2538 if (QTAILQ_EMPTY(&mr->coalesced)) {
2539 mr->flush_coalesced_mmio = false;
2540 }
2541 }
2542
2543 void memory_region_add_eventfd(MemoryRegion *mr,
2544 hwaddr addr,
2545 unsigned size,
2546 bool match_data,
2547 uint64_t data,
2548 EventNotifier *e)
2549 {
2550 MemoryRegionIoeventfd mrfd = {
2551 .addr.start = int128_make64(addr),
2552 .addr.size = int128_make64(size),
2553 .match_data = match_data,
2554 .data = data,
2555 .e = e,
2556 };
2557 unsigned i;
2558
2559 if (size) {
2560 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2561 }
2562 memory_region_transaction_begin();
2563 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2564 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2565 break;
2566 }
2567 }
2568 ++mr->ioeventfd_nb;
2569 mr->ioeventfds = g_realloc(mr->ioeventfds,
2570 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2571 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2572 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2573 mr->ioeventfds[i] = mrfd;
2574 ioeventfd_update_pending |= mr->enabled;
2575 memory_region_transaction_commit();
2576 }
2577
2578 void memory_region_del_eventfd(MemoryRegion *mr,
2579 hwaddr addr,
2580 unsigned size,
2581 bool match_data,
2582 uint64_t data,
2583 EventNotifier *e)
2584 {
2585 MemoryRegionIoeventfd mrfd = {
2586 .addr.start = int128_make64(addr),
2587 .addr.size = int128_make64(size),
2588 .match_data = match_data,
2589 .data = data,
2590 .e = e,
2591 };
2592 unsigned i;
2593
2594 if (size) {
2595 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2596 }
2597 memory_region_transaction_begin();
2598 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2599 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2600 break;
2601 }
2602 }
2603 assert(i != mr->ioeventfd_nb);
2604 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2605 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2606 --mr->ioeventfd_nb;
2607 mr->ioeventfds = g_realloc(mr->ioeventfds,
2608 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2609 ioeventfd_update_pending |= mr->enabled;
2610 memory_region_transaction_commit();
2611 }
2612
2613 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2614 {
2615 MemoryRegion *mr = subregion->container;
2616 MemoryRegion *other;
2617
2618 memory_region_transaction_begin();
2619
2620 memory_region_ref(subregion);
2621 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2622 if (subregion->priority >= other->priority) {
2623 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2624 goto done;
2625 }
2626 }
2627 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2628 done:
2629 memory_region_update_pending |= mr->enabled && subregion->enabled;
2630 memory_region_transaction_commit();
2631 }
2632
2633 static void memory_region_add_subregion_common(MemoryRegion *mr,
2634 hwaddr offset,
2635 MemoryRegion *subregion)
2636 {
2637 MemoryRegion *alias;
2638
2639 assert(!subregion->container);
2640 subregion->container = mr;
2641 for (alias = subregion->alias; alias; alias = alias->alias) {
2642 alias->mapped_via_alias++;
2643 }
2644 subregion->addr = offset;
2645 memory_region_update_container_subregions(subregion);
2646 }
2647
2648 void memory_region_add_subregion(MemoryRegion *mr,
2649 hwaddr offset,
2650 MemoryRegion *subregion)
2651 {
2652 subregion->priority = 0;
2653 memory_region_add_subregion_common(mr, offset, subregion);
2654 }
2655
2656 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2657 hwaddr offset,
2658 MemoryRegion *subregion,
2659 int priority)
2660 {
2661 subregion->priority = priority;
2662 memory_region_add_subregion_common(mr, offset, subregion);
2663 }
2664
2665 void memory_region_del_subregion(MemoryRegion *mr,
2666 MemoryRegion *subregion)
2667 {
2668 MemoryRegion *alias;
2669
2670 memory_region_transaction_begin();
2671 assert(subregion->container == mr);
2672 subregion->container = NULL;
2673 for (alias = subregion->alias; alias; alias = alias->alias) {
2674 alias->mapped_via_alias--;
2675 assert(alias->mapped_via_alias >= 0);
2676 }
2677 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2678 memory_region_unref(subregion);
2679 memory_region_update_pending |= mr->enabled && subregion->enabled;
2680 memory_region_transaction_commit();
2681 }
2682
2683 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2684 {
2685 if (enabled == mr->enabled) {
2686 return;
2687 }
2688 memory_region_transaction_begin();
2689 mr->enabled = enabled;
2690 memory_region_update_pending = true;
2691 memory_region_transaction_commit();
2692 }
2693
2694 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2695 {
2696 Int128 s = int128_make64(size);
2697
2698 if (size == UINT64_MAX) {
2699 s = int128_2_64();
2700 }
2701 if (int128_eq(s, mr->size)) {
2702 return;
2703 }
2704 memory_region_transaction_begin();
2705 mr->size = s;
2706 memory_region_update_pending = true;
2707 memory_region_transaction_commit();
2708 }
2709
2710 static void memory_region_readd_subregion(MemoryRegion *mr)
2711 {
2712 MemoryRegion *container = mr->container;
2713
2714 if (container) {
2715 memory_region_transaction_begin();
2716 memory_region_ref(mr);
2717 memory_region_del_subregion(container, mr);
2718 memory_region_add_subregion_common(container, mr->addr, mr);
2719 memory_region_unref(mr);
2720 memory_region_transaction_commit();
2721 }
2722 }
2723
2724 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2725 {
2726 if (addr != mr->addr) {
2727 mr->addr = addr;
2728 memory_region_readd_subregion(mr);
2729 }
2730 }
2731
2732 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2733 {
2734 assert(mr->alias);
2735
2736 if (offset == mr->alias_offset) {
2737 return;
2738 }
2739
2740 memory_region_transaction_begin();
2741 mr->alias_offset = offset;
2742 memory_region_update_pending |= mr->enabled;
2743 memory_region_transaction_commit();
2744 }
2745
2746 void memory_region_set_unmergeable(MemoryRegion *mr, bool unmergeable)
2747 {
2748 if (unmergeable == mr->unmergeable) {
2749 return;
2750 }
2751
2752 memory_region_transaction_begin();
2753 mr->unmergeable = unmergeable;
2754 memory_region_update_pending |= mr->enabled;
2755 memory_region_transaction_commit();
2756 }
2757
2758 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2759 {
2760 return mr->align;
2761 }
2762
2763 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2764 {
2765 const AddrRange *addr = addr_;
2766 const FlatRange *fr = fr_;
2767
2768 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2769 return -1;
2770 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2771 return 1;
2772 }
2773 return 0;
2774 }
2775
2776 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2777 {
2778 return bsearch(&addr, view->ranges, view->nr,
2779 sizeof(FlatRange), cmp_flatrange_addr);
2780 }
2781
2782 bool memory_region_is_mapped(MemoryRegion *mr)
2783 {
2784 return !!mr->container || mr->mapped_via_alias;
2785 }
2786
2787 /* Same as memory_region_find, but it does not add a reference to the
2788 * returned region. It must be called from an RCU critical section.
2789 */
2790 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2791 hwaddr addr, uint64_t size)
2792 {
2793 MemoryRegionSection ret = { .mr = NULL };
2794 MemoryRegion *root;
2795 AddressSpace *as;
2796 AddrRange range;
2797 FlatView *view;
2798 FlatRange *fr;
2799
2800 addr += mr->addr;
2801 for (root = mr; root->container; ) {
2802 root = root->container;
2803 addr += root->addr;
2804 }
2805
2806 as = memory_region_to_address_space(root);
2807 if (!as) {
2808 return ret;
2809 }
2810 range = addrrange_make(int128_make64(addr), int128_make64(size));
2811
2812 view = address_space_to_flatview(as);
2813 fr = flatview_lookup(view, range);
2814 if (!fr) {
2815 return ret;
2816 }
2817
2818 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2819 --fr;
2820 }
2821
2822 ret.mr = fr->mr;
2823 ret.fv = view;
2824 range = addrrange_intersection(range, fr->addr);
2825 ret.offset_within_region = fr->offset_in_region;
2826 ret.offset_within_region += int128_get64(int128_sub(range.start,
2827 fr->addr.start));
2828 ret.size = range.size;
2829 ret.offset_within_address_space = int128_get64(range.start);
2830 ret.readonly = fr->readonly;
2831 ret.nonvolatile = fr->nonvolatile;
2832 return ret;
2833 }
2834
2835 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2836 hwaddr addr, uint64_t size)
2837 {
2838 MemoryRegionSection ret;
2839 RCU_READ_LOCK_GUARD();
2840 ret = memory_region_find_rcu(mr, addr, size);
2841 if (ret.mr) {
2842 memory_region_ref(ret.mr);
2843 }
2844 return ret;
2845 }
2846
2847 MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s)
2848 {
2849 MemoryRegionSection *tmp = g_new(MemoryRegionSection, 1);
2850
2851 *tmp = *s;
2852 if (tmp->mr) {
2853 memory_region_ref(tmp->mr);
2854 }
2855 if (tmp->fv) {
2856 bool ret = flatview_ref(tmp->fv);
2857
2858 g_assert(ret);
2859 }
2860 return tmp;
2861 }
2862
2863 void memory_region_section_free_copy(MemoryRegionSection *s)
2864 {
2865 if (s->fv) {
2866 flatview_unref(s->fv);
2867 }
2868 if (s->mr) {
2869 memory_region_unref(s->mr);
2870 }
2871 g_free(s);
2872 }
2873
2874 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2875 {
2876 MemoryRegion *mr;
2877
2878 RCU_READ_LOCK_GUARD();
2879 mr = memory_region_find_rcu(container, addr, 1).mr;
2880 return mr && mr != container;
2881 }
2882
2883 void memory_global_dirty_log_sync(bool last_stage)
2884 {
2885 memory_region_sync_dirty_bitmap(NULL, last_stage);
2886 }
2887
2888 void memory_global_after_dirty_log_sync(void)
2889 {
2890 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2891 }
2892
2893 /*
2894 * Dirty track stop flags that are postponed due to VM being stopped. Should
2895 * only be used within vmstate_change hook.
2896 */
2897 static unsigned int postponed_stop_flags;
2898 static VMChangeStateEntry *vmstate_change;
2899 static void memory_global_dirty_log_stop_postponed_run(void);
2900
2901 void memory_global_dirty_log_start(unsigned int flags)
2902 {
2903 unsigned int old_flags;
2904
2905 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2906
2907 if (vmstate_change) {
2908 /* If there is postponed stop(), operate on it first */
2909 postponed_stop_flags &= ~flags;
2910 memory_global_dirty_log_stop_postponed_run();
2911 }
2912
2913 flags &= ~global_dirty_tracking;
2914 if (!flags) {
2915 return;
2916 }
2917
2918 old_flags = global_dirty_tracking;
2919 global_dirty_tracking |= flags;
2920 trace_global_dirty_changed(global_dirty_tracking);
2921
2922 if (!old_flags) {
2923 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2924 memory_region_transaction_begin();
2925 memory_region_update_pending = true;
2926 memory_region_transaction_commit();
2927 }
2928 }
2929
2930 static void memory_global_dirty_log_do_stop(unsigned int flags)
2931 {
2932 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2933 assert((global_dirty_tracking & flags) == flags);
2934 global_dirty_tracking &= ~flags;
2935
2936 trace_global_dirty_changed(global_dirty_tracking);
2937
2938 if (!global_dirty_tracking) {
2939 memory_region_transaction_begin();
2940 memory_region_update_pending = true;
2941 memory_region_transaction_commit();
2942 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2943 }
2944 }
2945
2946 /*
2947 * Execute the postponed dirty log stop operations if there is, then reset
2948 * everything (including the flags and the vmstate change hook).
2949 */
2950 static void memory_global_dirty_log_stop_postponed_run(void)
2951 {
2952 /* This must be called with the vmstate handler registered */
2953 assert(vmstate_change);
2954
2955 /* Note: postponed_stop_flags can be cleared in log start routine */
2956 if (postponed_stop_flags) {
2957 memory_global_dirty_log_do_stop(postponed_stop_flags);
2958 postponed_stop_flags = 0;
2959 }
2960
2961 qemu_del_vm_change_state_handler(vmstate_change);
2962 vmstate_change = NULL;
2963 }
2964
2965 static void memory_vm_change_state_handler(void *opaque, bool running,
2966 RunState state)
2967 {
2968 if (running) {
2969 memory_global_dirty_log_stop_postponed_run();
2970 }
2971 }
2972
2973 void memory_global_dirty_log_stop(unsigned int flags)
2974 {
2975 if (!runstate_is_running()) {
2976 /* Postpone the dirty log stop, e.g., to when VM starts again */
2977 if (vmstate_change) {
2978 /* Batch with previous postponed flags */
2979 postponed_stop_flags |= flags;
2980 } else {
2981 postponed_stop_flags = flags;
2982 vmstate_change = qemu_add_vm_change_state_handler(
2983 memory_vm_change_state_handler, NULL);
2984 }
2985 return;
2986 }
2987
2988 memory_global_dirty_log_do_stop(flags);
2989 }
2990
2991 static void listener_add_address_space(MemoryListener *listener,
2992 AddressSpace *as)
2993 {
2994 FlatView *view;
2995 FlatRange *fr;
2996
2997 if (listener->begin) {
2998 listener->begin(listener);
2999 }
3000 if (global_dirty_tracking) {
3001 if (listener->log_global_start) {
3002 listener->log_global_start(listener);
3003 }
3004 }
3005
3006 view = address_space_get_flatview(as);
3007 FOR_EACH_FLAT_RANGE(fr, view) {
3008 MemoryRegionSection section = section_from_flat_range(fr, view);
3009
3010 if (listener->region_add) {
3011 listener->region_add(listener, &section);
3012 }
3013 if (fr->dirty_log_mask && listener->log_start) {
3014 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
3015 }
3016 }
3017 if (listener->commit) {
3018 listener->commit(listener);
3019 }
3020 flatview_unref(view);
3021 }
3022
3023 static void listener_del_address_space(MemoryListener *listener,
3024 AddressSpace *as)
3025 {
3026 FlatView *view;
3027 FlatRange *fr;
3028
3029 if (listener->begin) {
3030 listener->begin(listener);
3031 }
3032 view = address_space_get_flatview(as);
3033 FOR_EACH_FLAT_RANGE(fr, view) {
3034 MemoryRegionSection section = section_from_flat_range(fr, view);
3035
3036 if (fr->dirty_log_mask && listener->log_stop) {
3037 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
3038 }
3039 if (listener->region_del) {
3040 listener->region_del(listener, &section);
3041 }
3042 }
3043 if (listener->commit) {
3044 listener->commit(listener);
3045 }
3046 flatview_unref(view);
3047 }
3048
3049 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
3050 {
3051 MemoryListener *other = NULL;
3052
3053 /* Only one of them can be defined for a listener */
3054 assert(!(listener->log_sync && listener->log_sync_global));
3055
3056 listener->address_space = as;
3057 if (QTAILQ_EMPTY(&memory_listeners)
3058 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
3059 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
3060 } else {
3061 QTAILQ_FOREACH(other, &memory_listeners, link) {
3062 if (listener->priority < other->priority) {
3063 break;
3064 }
3065 }
3066 QTAILQ_INSERT_BEFORE(other, listener, link);
3067 }
3068
3069 if (QTAILQ_EMPTY(&as->listeners)
3070 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
3071 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
3072 } else {
3073 QTAILQ_FOREACH(other, &as->listeners, link_as) {
3074 if (listener->priority < other->priority) {
3075 break;
3076 }
3077 }
3078 QTAILQ_INSERT_BEFORE(other, listener, link_as);
3079 }
3080
3081 listener_add_address_space(listener, as);
3082
3083 if (listener->eventfd_add || listener->eventfd_del) {
3084 as->ioeventfd_notifiers++;
3085 }
3086 }
3087
3088 void memory_listener_unregister(MemoryListener *listener)
3089 {
3090 if (!listener->address_space) {
3091 return;
3092 }
3093
3094 if (listener->eventfd_add || listener->eventfd_del) {
3095 listener->address_space->ioeventfd_notifiers--;
3096 }
3097
3098 listener_del_address_space(listener, listener->address_space);
3099 QTAILQ_REMOVE(&memory_listeners, listener, link);
3100 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
3101 listener->address_space = NULL;
3102 }
3103
3104 void address_space_remove_listeners(AddressSpace *as)
3105 {
3106 while (!QTAILQ_EMPTY(&as->listeners)) {
3107 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
3108 }
3109 }
3110
3111 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
3112 {
3113 memory_region_ref(root);
3114 as->root = root;
3115 as->current_map = NULL;
3116 as->ioeventfd_nb = 0;
3117 as->ioeventfds = NULL;
3118 QTAILQ_INIT(&as->listeners);
3119 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
3120 as->name = g_strdup(name ? name : "anonymous");
3121 address_space_update_topology(as);
3122 address_space_update_ioeventfds(as);
3123 }
3124
3125 static void do_address_space_destroy(AddressSpace *as)
3126 {
3127 assert(QTAILQ_EMPTY(&as->listeners));
3128
3129 flatview_unref(as->current_map);
3130 g_free(as->name);
3131 g_free(as->ioeventfds);
3132 memory_region_unref(as->root);
3133 }
3134
3135 void address_space_destroy(AddressSpace *as)
3136 {
3137 MemoryRegion *root = as->root;
3138
3139 /* Flush out anything from MemoryListeners listening in on this */
3140 memory_region_transaction_begin();
3141 as->root = NULL;
3142 memory_region_transaction_commit();
3143 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
3144
3145 /* At this point, as->dispatch and as->current_map are dummy
3146 * entries that the guest should never use. Wait for the old
3147 * values to expire before freeing the data.
3148 */
3149 as->root = root;
3150 call_rcu(as, do_address_space_destroy, rcu);
3151 }
3152
3153 static const char *memory_region_type(MemoryRegion *mr)
3154 {
3155 if (mr->alias) {
3156 return memory_region_type(mr->alias);
3157 }
3158 if (memory_region_is_ram_device(mr)) {
3159 return "ramd";
3160 } else if (memory_region_is_romd(mr)) {
3161 return "romd";
3162 } else if (memory_region_is_rom(mr)) {
3163 return "rom";
3164 } else if (memory_region_is_ram(mr)) {
3165 return "ram";
3166 } else {
3167 return "i/o";
3168 }
3169 }
3170
3171 typedef struct MemoryRegionList MemoryRegionList;
3172
3173 struct MemoryRegionList {
3174 const MemoryRegion *mr;
3175 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
3176 };
3177
3178 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
3179
3180 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3181 int128_sub((size), int128_one())) : 0)
3182 #define MTREE_INDENT " "
3183
3184 static void mtree_expand_owner(const char *label, Object *obj)
3185 {
3186 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
3187
3188 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
3189 if (dev && dev->id) {
3190 qemu_printf(" id=%s", dev->id);
3191 } else {
3192 char *canonical_path = object_get_canonical_path(obj);
3193 if (canonical_path) {
3194 qemu_printf(" path=%s", canonical_path);
3195 g_free(canonical_path);
3196 } else {
3197 qemu_printf(" type=%s", object_get_typename(obj));
3198 }
3199 }
3200 qemu_printf("}");
3201 }
3202
3203 static void mtree_print_mr_owner(const MemoryRegion *mr)
3204 {
3205 Object *owner = mr->owner;
3206 Object *parent = memory_region_owner((MemoryRegion *)mr);
3207
3208 if (!owner && !parent) {
3209 qemu_printf(" orphan");
3210 return;
3211 }
3212 if (owner) {
3213 mtree_expand_owner("owner", owner);
3214 }
3215 if (parent && parent != owner) {
3216 mtree_expand_owner("parent", parent);
3217 }
3218 }
3219
3220 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
3221 hwaddr base,
3222 MemoryRegionListHead *alias_print_queue,
3223 bool owner, bool display_disabled)
3224 {
3225 MemoryRegionList *new_ml, *ml, *next_ml;
3226 MemoryRegionListHead submr_print_queue;
3227 const MemoryRegion *submr;
3228 unsigned int i;
3229 hwaddr cur_start, cur_end;
3230
3231 if (!mr) {
3232 return;
3233 }
3234
3235 cur_start = base + mr->addr;
3236 cur_end = cur_start + MR_SIZE(mr->size);
3237
3238 /*
3239 * Try to detect overflow of memory region. This should never
3240 * happen normally. When it happens, we dump something to warn the
3241 * user who is observing this.
3242 */
3243 if (cur_start < base || cur_end < cur_start) {
3244 qemu_printf("[DETECTED OVERFLOW!] ");
3245 }
3246
3247 if (mr->alias) {
3248 bool found = false;
3249
3250 /* check if the alias is already in the queue */
3251 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
3252 if (ml->mr == mr->alias) {
3253 found = true;
3254 }
3255 }
3256
3257 if (!found) {
3258 ml = g_new(MemoryRegionList, 1);
3259 ml->mr = mr->alias;
3260 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
3261 }
3262 if (mr->enabled || display_disabled) {
3263 for (i = 0; i < level; i++) {
3264 qemu_printf(MTREE_INDENT);
3265 }
3266 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3267 " (prio %d, %s%s): alias %s @%s " HWADDR_FMT_plx
3268 "-" HWADDR_FMT_plx "%s",
3269 cur_start, cur_end,
3270 mr->priority,
3271 mr->nonvolatile ? "nv-" : "",
3272 memory_region_type((MemoryRegion *)mr),
3273 memory_region_name(mr),
3274 memory_region_name(mr->alias),
3275 mr->alias_offset,
3276 mr->alias_offset + MR_SIZE(mr->size),
3277 mr->enabled ? "" : " [disabled]");
3278 if (owner) {
3279 mtree_print_mr_owner(mr);
3280 }
3281 qemu_printf("\n");
3282 }
3283 } else {
3284 if (mr->enabled || display_disabled) {
3285 for (i = 0; i < level; i++) {
3286 qemu_printf(MTREE_INDENT);
3287 }
3288 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3289 " (prio %d, %s%s): %s%s",
3290 cur_start, cur_end,
3291 mr->priority,
3292 mr->nonvolatile ? "nv-" : "",
3293 memory_region_type((MemoryRegion *)mr),
3294 memory_region_name(mr),
3295 mr->enabled ? "" : " [disabled]");
3296 if (owner) {
3297 mtree_print_mr_owner(mr);
3298 }
3299 qemu_printf("\n");
3300 }
3301 }
3302
3303 QTAILQ_INIT(&submr_print_queue);
3304
3305 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
3306 new_ml = g_new(MemoryRegionList, 1);
3307 new_ml->mr = submr;
3308 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3309 if (new_ml->mr->addr < ml->mr->addr ||
3310 (new_ml->mr->addr == ml->mr->addr &&
3311 new_ml->mr->priority > ml->mr->priority)) {
3312 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
3313 new_ml = NULL;
3314 break;
3315 }
3316 }
3317 if (new_ml) {
3318 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3319 }
3320 }
3321
3322 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3323 mtree_print_mr(ml->mr, level + 1, cur_start,
3324 alias_print_queue, owner, display_disabled);
3325 }
3326
3327 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3328 g_free(ml);
3329 }
3330 }
3331
3332 struct FlatViewInfo {
3333 int counter;
3334 bool dispatch_tree;
3335 bool owner;
3336 AccelClass *ac;
3337 };
3338
3339 static void mtree_print_flatview(gpointer key, gpointer value,
3340 gpointer user_data)
3341 {
3342 FlatView *view = key;
3343 GArray *fv_address_spaces = value;
3344 struct FlatViewInfo *fvi = user_data;
3345 FlatRange *range = &view->ranges[0];
3346 MemoryRegion *mr;
3347 int n = view->nr;
3348 int i;
3349 AddressSpace *as;
3350
3351 qemu_printf("FlatView #%d\n", fvi->counter);
3352 ++fvi->counter;
3353
3354 for (i = 0; i < fv_address_spaces->len; ++i) {
3355 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3356 qemu_printf(" AS \"%s\", root: %s",
3357 as->name, memory_region_name(as->root));
3358 if (as->root->alias) {
3359 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3360 }
3361 qemu_printf("\n");
3362 }
3363
3364 qemu_printf(" Root memory region: %s\n",
3365 view->root ? memory_region_name(view->root) : "(none)");
3366
3367 if (n <= 0) {
3368 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3369 return;
3370 }
3371
3372 while (n--) {
3373 mr = range->mr;
3374 if (range->offset_in_region) {
3375 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3376 " (prio %d, %s%s): %s @" HWADDR_FMT_plx,
3377 int128_get64(range->addr.start),
3378 int128_get64(range->addr.start)
3379 + MR_SIZE(range->addr.size),
3380 mr->priority,
3381 range->nonvolatile ? "nv-" : "",
3382 range->readonly ? "rom" : memory_region_type(mr),
3383 memory_region_name(mr),
3384 range->offset_in_region);
3385 } else {
3386 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3387 " (prio %d, %s%s): %s",
3388 int128_get64(range->addr.start),
3389 int128_get64(range->addr.start)
3390 + MR_SIZE(range->addr.size),
3391 mr->priority,
3392 range->nonvolatile ? "nv-" : "",
3393 range->readonly ? "rom" : memory_region_type(mr),
3394 memory_region_name(mr));
3395 }
3396 if (fvi->owner) {
3397 mtree_print_mr_owner(mr);
3398 }
3399
3400 if (fvi->ac) {
3401 for (i = 0; i < fv_address_spaces->len; ++i) {
3402 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3403 if (fvi->ac->has_memory(current_machine, as,
3404 int128_get64(range->addr.start),
3405 MR_SIZE(range->addr.size) + 1)) {
3406 qemu_printf(" %s", fvi->ac->name);
3407 }
3408 }
3409 }
3410 qemu_printf("\n");
3411 range++;
3412 }
3413
3414 #if !defined(CONFIG_USER_ONLY)
3415 if (fvi->dispatch_tree && view->root) {
3416 mtree_print_dispatch(view->dispatch, view->root);
3417 }
3418 #endif
3419
3420 qemu_printf("\n");
3421 }
3422
3423 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3424 gpointer user_data)
3425 {
3426 FlatView *view = key;
3427 GArray *fv_address_spaces = value;
3428
3429 g_array_unref(fv_address_spaces);
3430 flatview_unref(view);
3431
3432 return true;
3433 }
3434
3435 static void mtree_info_flatview(bool dispatch_tree, bool owner)
3436 {
3437 struct FlatViewInfo fvi = {
3438 .counter = 0,
3439 .dispatch_tree = dispatch_tree,
3440 .owner = owner,
3441 };
3442 AddressSpace *as;
3443 FlatView *view;
3444 GArray *fv_address_spaces;
3445 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3446 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3447
3448 if (ac->has_memory) {
3449 fvi.ac = ac;
3450 }
3451
3452 /* Gather all FVs in one table */
3453 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3454 view = address_space_get_flatview(as);
3455
3456 fv_address_spaces = g_hash_table_lookup(views, view);
3457 if (!fv_address_spaces) {
3458 fv_address_spaces = g_array_new(false, false, sizeof(as));
3459 g_hash_table_insert(views, view, fv_address_spaces);
3460 }
3461
3462 g_array_append_val(fv_address_spaces, as);
3463 }
3464
3465 /* Print */
3466 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3467
3468 /* Free */
3469 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3470 g_hash_table_unref(views);
3471 }
3472
3473 struct AddressSpaceInfo {
3474 MemoryRegionListHead *ml_head;
3475 bool owner;
3476 bool disabled;
3477 };
3478
3479 /* Returns negative value if a < b; zero if a = b; positive value if a > b. */
3480 static gint address_space_compare_name(gconstpointer a, gconstpointer b)
3481 {
3482 const AddressSpace *as_a = a;
3483 const AddressSpace *as_b = b;
3484
3485 return g_strcmp0(as_a->name, as_b->name);
3486 }
3487
3488 static void mtree_print_as_name(gpointer data, gpointer user_data)
3489 {
3490 AddressSpace *as = data;
3491
3492 qemu_printf("address-space: %s\n", as->name);
3493 }
3494
3495 static void mtree_print_as(gpointer key, gpointer value, gpointer user_data)
3496 {
3497 MemoryRegion *mr = key;
3498 GSList *as_same_root_mr_list = value;
3499 struct AddressSpaceInfo *asi = user_data;
3500
3501 g_slist_foreach(as_same_root_mr_list, mtree_print_as_name, NULL);
3502 mtree_print_mr(mr, 1, 0, asi->ml_head, asi->owner, asi->disabled);
3503 qemu_printf("\n");
3504 }
3505
3506 static gboolean mtree_info_as_free(gpointer key, gpointer value,
3507 gpointer user_data)
3508 {
3509 GSList *as_same_root_mr_list = value;
3510
3511 g_slist_free(as_same_root_mr_list);
3512
3513 return true;
3514 }
3515
3516 static void mtree_info_as(bool dispatch_tree, bool owner, bool disabled)
3517 {
3518 MemoryRegionListHead ml_head;
3519 MemoryRegionList *ml, *ml2;
3520 AddressSpace *as;
3521 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3522 GSList *as_same_root_mr_list;
3523 struct AddressSpaceInfo asi = {
3524 .ml_head = &ml_head,
3525 .owner = owner,
3526 .disabled = disabled,
3527 };
3528
3529 QTAILQ_INIT(&ml_head);
3530
3531 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3532 /* Create hashtable, key=AS root MR, value = list of AS */
3533 as_same_root_mr_list = g_hash_table_lookup(views, as->root);
3534 as_same_root_mr_list = g_slist_insert_sorted(as_same_root_mr_list, as,
3535 address_space_compare_name);
3536 g_hash_table_insert(views, as->root, as_same_root_mr_list);
3537 }
3538
3539 /* print address spaces */
3540 g_hash_table_foreach(views, mtree_print_as, &asi);
3541 g_hash_table_foreach_remove(views, mtree_info_as_free, 0);
3542 g_hash_table_unref(views);
3543
3544 /* print aliased regions */
3545 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3546 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3547 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3548 qemu_printf("\n");
3549 }
3550
3551 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3552 g_free(ml);
3553 }
3554 }
3555
3556 void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3557 {
3558 if (flatview) {
3559 mtree_info_flatview(dispatch_tree, owner);
3560 } else {
3561 mtree_info_as(dispatch_tree, owner, disabled);
3562 }
3563 }
3564
3565 void memory_region_init_ram(MemoryRegion *mr,
3566 Object *owner,
3567 const char *name,
3568 uint64_t size,
3569 Error **errp)
3570 {
3571 DeviceState *owner_dev;
3572 Error *err = NULL;
3573
3574 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3575 if (err) {
3576 error_propagate(errp, err);
3577 return;
3578 }
3579 /* This will assert if owner is neither NULL nor a DeviceState.
3580 * We only want the owner here for the purposes of defining a
3581 * unique name for migration. TODO: Ideally we should implement
3582 * a naming scheme for Objects which are not DeviceStates, in
3583 * which case we can relax this restriction.
3584 */
3585 owner_dev = DEVICE(owner);
3586 vmstate_register_ram(mr, owner_dev);
3587 }
3588
3589 void memory_region_init_rom(MemoryRegion *mr,
3590 Object *owner,
3591 const char *name,
3592 uint64_t size,
3593 Error **errp)
3594 {
3595 DeviceState *owner_dev;
3596 Error *err = NULL;
3597
3598 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3599 if (err) {
3600 error_propagate(errp, err);
3601 return;
3602 }
3603 /* This will assert if owner is neither NULL nor a DeviceState.
3604 * We only want the owner here for the purposes of defining a
3605 * unique name for migration. TODO: Ideally we should implement
3606 * a naming scheme for Objects which are not DeviceStates, in
3607 * which case we can relax this restriction.
3608 */
3609 owner_dev = DEVICE(owner);
3610 vmstate_register_ram(mr, owner_dev);
3611 }
3612
3613 void memory_region_init_rom_device(MemoryRegion *mr,
3614 Object *owner,
3615 const MemoryRegionOps *ops,
3616 void *opaque,
3617 const char *name,
3618 uint64_t size,
3619 Error **errp)
3620 {
3621 DeviceState *owner_dev;
3622 Error *err = NULL;
3623
3624 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3625 name, size, &err);
3626 if (err) {
3627 error_propagate(errp, err);
3628 return;
3629 }
3630 /* This will assert if owner is neither NULL nor a DeviceState.
3631 * We only want the owner here for the purposes of defining a
3632 * unique name for migration. TODO: Ideally we should implement
3633 * a naming scheme for Objects which are not DeviceStates, in
3634 * which case we can relax this restriction.
3635 */
3636 owner_dev = DEVICE(owner);
3637 vmstate_register_ram(mr, owner_dev);
3638 }
3639
3640 /*
3641 * Support system builds with CONFIG_FUZZ using a weak symbol and a stub for
3642 * the fuzz_dma_read_cb callback
3643 */
3644 #ifdef CONFIG_FUZZ
3645 void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3646 size_t len,
3647 MemoryRegion *mr)
3648 {
3649 }
3650 #endif
3651
3652 static const TypeInfo memory_region_info = {
3653 .parent = TYPE_OBJECT,
3654 .name = TYPE_MEMORY_REGION,
3655 .class_size = sizeof(MemoryRegionClass),
3656 .instance_size = sizeof(MemoryRegion),
3657 .instance_init = memory_region_initfn,
3658 .instance_finalize = memory_region_finalize,
3659 };
3660
3661 static const TypeInfo iommu_memory_region_info = {
3662 .parent = TYPE_MEMORY_REGION,
3663 .name = TYPE_IOMMU_MEMORY_REGION,
3664 .class_size = sizeof(IOMMUMemoryRegionClass),
3665 .instance_size = sizeof(IOMMUMemoryRegion),
3666 .instance_init = iommu_memory_region_initfn,
3667 .abstract = true,
3668 };
3669
3670 static const TypeInfo ram_discard_manager_info = {
3671 .parent = TYPE_INTERFACE,
3672 .name = TYPE_RAM_DISCARD_MANAGER,
3673 .class_size = sizeof(RamDiscardManagerClass),
3674 };
3675
3676 static void memory_register_types(void)
3677 {
3678 type_register_static(&memory_region_info);
3679 type_register_static(&iommu_memory_region_info);
3680 type_register_static(&ram_discard_manager_info);
3681 }
3682
3683 type_init(memory_register_types)
Random patches