4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #include "pixel_ops.h"
30 #include "qemu-timer.h"
33 //#define DEBUG_VGA_MEM
34 //#define DEBUG_VGA_REG
36 //#define DEBUG_BOCHS_VBE
38 /* force some bits to zero */
39 const uint8_t sr_mask
[8] = {
50 const uint8_t gr_mask
[16] = {
69 #define cbswap_32(__x) \
71 (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \
72 (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \
73 (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \
74 (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) ))
76 #ifdef HOST_WORDS_BIGENDIAN
77 #define PAT(x) cbswap_32(x)
82 #ifdef HOST_WORDS_BIGENDIAN
88 #ifdef HOST_WORDS_BIGENDIAN
89 #define GET_PLANE(data, p) (((data) >> (24 - (p) * 8)) & 0xff)
91 #define GET_PLANE(data, p) (((data) >> ((p) * 8)) & 0xff)
94 static const uint32_t mask16
[16] = {
115 #ifdef HOST_WORDS_BIGENDIAN
118 #define PAT(x) cbswap_32(x)
121 static const uint32_t dmask16
[16] = {
140 static const uint32_t dmask4
[4] = {
147 static uint32_t expand4
[256];
148 static uint16_t expand2
[256];
149 static uint8_t expand4to8
[16];
151 typedef VGACommonState VGAState
;
153 static void vga_screen_dump(void *opaque
, const char *filename
);
154 static char *screen_dump_filename
;
155 static DisplayChangeListener
*screen_dump_dcl
;
157 static void vga_dumb_update_retrace_info(VGAState
*s
)
162 static void vga_precise_update_retrace_info(VGAState
*s
)
165 int hretr_start_char
;
166 int hretr_skew_chars
;
170 int vretr_start_line
;
173 int div2
, sldiv2
, dots
;
176 const int clk_hz
[] = {25175000, 28322000, 25175000, 25175000};
177 int64_t chars_per_sec
;
178 struct vga_precise_retrace
*r
= &s
->retrace_info
.precise
;
180 htotal_chars
= s
->cr
[0x00] + 5;
181 hretr_start_char
= s
->cr
[0x04];
182 hretr_skew_chars
= (s
->cr
[0x05] >> 5) & 3;
183 hretr_end_char
= s
->cr
[0x05] & 0x1f;
185 vtotal_lines
= (s
->cr
[0x06]
186 | (((s
->cr
[0x07] & 1) | ((s
->cr
[0x07] >> 4) & 2)) << 8)) + 2
188 vretr_start_line
= s
->cr
[0x10]
189 | ((((s
->cr
[0x07] >> 2) & 1) | ((s
->cr
[0x07] >> 6) & 2)) << 8)
191 vretr_end_line
= s
->cr
[0x11] & 0xf;
194 div2
= (s
->cr
[0x17] >> 2) & 1;
195 sldiv2
= (s
->cr
[0x17] >> 3) & 1;
197 clocking_mode
= (s
->sr
[0x01] >> 3) & 1;
198 clock_sel
= (s
->msr
>> 2) & 3;
199 dots
= (s
->msr
& 1) ? 8 : 9;
201 chars_per_sec
= clk_hz
[clock_sel
] / dots
;
203 htotal_chars
<<= clocking_mode
;
205 r
->total_chars
= vtotal_lines
* htotal_chars
;
207 r
->ticks_per_char
= ticks_per_sec
/ (r
->total_chars
* r
->freq
);
209 r
->ticks_per_char
= ticks_per_sec
/ chars_per_sec
;
212 r
->vstart
= vretr_start_line
;
213 r
->vend
= r
->vstart
+ vretr_end_line
+ 1;
215 r
->hstart
= hretr_start_char
+ hretr_skew_chars
;
216 r
->hend
= r
->hstart
+ hretr_end_char
+ 1;
217 r
->htotal
= htotal_chars
;
229 "div2 = %d sldiv2 = %d\n"
230 "clocking_mode = %d\n"
231 "clock_sel = %d %d\n"
233 "ticks/char = %lld\n"
235 (double) ticks_per_sec
/ (r
->ticks_per_char
* r
->total_chars
),
253 static uint8_t vga_precise_retrace(VGAState
*s
)
255 struct vga_precise_retrace
*r
= &s
->retrace_info
.precise
;
256 uint8_t val
= s
->st01
& ~(ST01_V_RETRACE
| ST01_DISP_ENABLE
);
258 if (r
->total_chars
) {
259 int cur_line
, cur_line_char
, cur_char
;
262 cur_tick
= qemu_get_clock(vm_clock
);
264 cur_char
= (cur_tick
/ r
->ticks_per_char
) % r
->total_chars
;
265 cur_line
= cur_char
/ r
->htotal
;
267 if (cur_line
>= r
->vstart
&& cur_line
<= r
->vend
) {
268 val
|= ST01_V_RETRACE
| ST01_DISP_ENABLE
;
270 cur_line_char
= cur_char
% r
->htotal
;
271 if (cur_line_char
>= r
->hstart
&& cur_line_char
<= r
->hend
) {
272 val
|= ST01_DISP_ENABLE
;
278 return s
->st01
^ (ST01_V_RETRACE
| ST01_DISP_ENABLE
);
282 static uint8_t vga_dumb_retrace(VGAState
*s
)
284 return s
->st01
^ (ST01_V_RETRACE
| ST01_DISP_ENABLE
);
287 int vga_ioport_invalid(VGACommonState
*s
, uint32_t addr
)
289 if (s
->msr
& MSR_COLOR_EMULATION
) {
291 return (addr
>= 0x3b0 && addr
<= 0x3bf);
294 return (addr
>= 0x3d0 && addr
<= 0x3df);
298 uint32_t vga_ioport_read(void *opaque
, uint32_t addr
)
300 VGACommonState
*s
= opaque
;
303 if (vga_ioport_invalid(s
, addr
)) {
308 if (s
->ar_flip_flop
== 0) {
315 index
= s
->ar_index
& 0x1f;
328 val
= s
->sr
[s
->sr_index
];
330 printf("vga: read SR%x = 0x%02x\n", s
->sr_index
, val
);
337 val
= s
->dac_write_index
;
340 val
= s
->palette
[s
->dac_read_index
* 3 + s
->dac_sub_index
];
341 if (++s
->dac_sub_index
== 3) {
342 s
->dac_sub_index
= 0;
356 val
= s
->gr
[s
->gr_index
];
358 printf("vga: read GR%x = 0x%02x\n", s
->gr_index
, val
);
367 val
= s
->cr
[s
->cr_index
];
369 printf("vga: read CR%x = 0x%02x\n", s
->cr_index
, val
);
374 /* just toggle to fool polling */
375 val
= s
->st01
= s
->retrace(s
);
383 #if defined(DEBUG_VGA)
384 printf("VGA: read addr=0x%04x data=0x%02x\n", addr
, val
);
389 void vga_ioport_write(void *opaque
, uint32_t addr
, uint32_t val
)
391 VGACommonState
*s
= opaque
;
394 /* check port range access depending on color/monochrome mode */
395 if (vga_ioport_invalid(s
, addr
)) {
399 printf("VGA: write addr=0x%04x data=0x%02x\n", addr
, val
);
404 if (s
->ar_flip_flop
== 0) {
408 index
= s
->ar_index
& 0x1f;
411 s
->ar
[index
] = val
& 0x3f;
414 s
->ar
[index
] = val
& ~0x10;
420 s
->ar
[index
] = val
& ~0xc0;
423 s
->ar
[index
] = val
& ~0xf0;
426 s
->ar
[index
] = val
& ~0xf0;
432 s
->ar_flip_flop
^= 1;
435 s
->msr
= val
& ~0x10;
436 s
->update_retrace_info(s
);
439 s
->sr_index
= val
& 7;
443 printf("vga: write SR%x = 0x%02x\n", s
->sr_index
, val
);
445 s
->sr
[s
->sr_index
] = val
& sr_mask
[s
->sr_index
];
446 if (s
->sr_index
== 1) s
->update_retrace_info(s
);
449 s
->dac_read_index
= val
;
450 s
->dac_sub_index
= 0;
454 s
->dac_write_index
= val
;
455 s
->dac_sub_index
= 0;
459 s
->dac_cache
[s
->dac_sub_index
] = val
;
460 if (++s
->dac_sub_index
== 3) {
461 memcpy(&s
->palette
[s
->dac_write_index
* 3], s
->dac_cache
, 3);
462 s
->dac_sub_index
= 0;
463 s
->dac_write_index
++;
467 s
->gr_index
= val
& 0x0f;
471 printf("vga: write GR%x = 0x%02x\n", s
->gr_index
, val
);
473 s
->gr
[s
->gr_index
] = val
& gr_mask
[s
->gr_index
];
482 printf("vga: write CR%x = 0x%02x\n", s
->cr_index
, val
);
484 /* handle CR0-7 protection */
485 if ((s
->cr
[0x11] & 0x80) && s
->cr_index
<= 7) {
486 /* can always write bit 4 of CR7 */
487 if (s
->cr_index
== 7)
488 s
->cr
[7] = (s
->cr
[7] & ~0x10) | (val
& 0x10);
491 switch(s
->cr_index
) {
492 case 0x01: /* horizontal display end */
497 case 0x12: /* vertical display end */
498 s
->cr
[s
->cr_index
] = val
;
501 s
->cr
[s
->cr_index
] = val
;
505 switch(s
->cr_index
) {
513 s
->update_retrace_info(s
);
524 #ifdef CONFIG_BOCHS_VBE
525 static uint32_t vbe_ioport_read_index(void *opaque
, uint32_t addr
)
527 VGAState
*s
= opaque
;
533 static uint32_t vbe_ioport_read_data(void *opaque
, uint32_t addr
)
535 VGAState
*s
= opaque
;
538 if (s
->vbe_index
<= VBE_DISPI_INDEX_NB
) {
539 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_GETCAPS
) {
540 switch(s
->vbe_index
) {
541 /* XXX: do not hardcode ? */
542 case VBE_DISPI_INDEX_XRES
:
543 val
= VBE_DISPI_MAX_XRES
;
545 case VBE_DISPI_INDEX_YRES
:
546 val
= VBE_DISPI_MAX_YRES
;
548 case VBE_DISPI_INDEX_BPP
:
549 val
= VBE_DISPI_MAX_BPP
;
552 val
= s
->vbe_regs
[s
->vbe_index
];
556 val
= s
->vbe_regs
[s
->vbe_index
];
561 #ifdef DEBUG_BOCHS_VBE
562 printf("VBE: read index=0x%x val=0x%x\n", s
->vbe_index
, val
);
567 static void vbe_ioport_write_index(void *opaque
, uint32_t addr
, uint32_t val
)
569 VGAState
*s
= opaque
;
573 static void vbe_ioport_write_data(void *opaque
, uint32_t addr
, uint32_t val
)
575 VGAState
*s
= opaque
;
577 if (s
->vbe_index
<= VBE_DISPI_INDEX_NB
) {
578 #ifdef DEBUG_BOCHS_VBE
579 printf("VBE: write index=0x%x val=0x%x\n", s
->vbe_index
, val
);
581 switch(s
->vbe_index
) {
582 case VBE_DISPI_INDEX_ID
:
583 if (val
== VBE_DISPI_ID0
||
584 val
== VBE_DISPI_ID1
||
585 val
== VBE_DISPI_ID2
||
586 val
== VBE_DISPI_ID3
||
587 val
== VBE_DISPI_ID4
) {
588 s
->vbe_regs
[s
->vbe_index
] = val
;
591 case VBE_DISPI_INDEX_XRES
:
592 if ((val
<= VBE_DISPI_MAX_XRES
) && ((val
& 7) == 0)) {
593 s
->vbe_regs
[s
->vbe_index
] = val
;
596 case VBE_DISPI_INDEX_YRES
:
597 if (val
<= VBE_DISPI_MAX_YRES
) {
598 s
->vbe_regs
[s
->vbe_index
] = val
;
601 case VBE_DISPI_INDEX_BPP
:
604 if (val
== 4 || val
== 8 || val
== 15 ||
605 val
== 16 || val
== 24 || val
== 32) {
606 s
->vbe_regs
[s
->vbe_index
] = val
;
609 case VBE_DISPI_INDEX_BANK
:
610 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4) {
611 val
&= (s
->vbe_bank_mask
>> 2);
613 val
&= s
->vbe_bank_mask
;
615 s
->vbe_regs
[s
->vbe_index
] = val
;
616 s
->bank_offset
= (val
<< 16);
618 case VBE_DISPI_INDEX_ENABLE
:
619 if ((val
& VBE_DISPI_ENABLED
) &&
620 !(s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
)) {
621 int h
, shift_control
;
623 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_WIDTH
] =
624 s
->vbe_regs
[VBE_DISPI_INDEX_XRES
];
625 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_HEIGHT
] =
626 s
->vbe_regs
[VBE_DISPI_INDEX_YRES
];
627 s
->vbe_regs
[VBE_DISPI_INDEX_X_OFFSET
] = 0;
628 s
->vbe_regs
[VBE_DISPI_INDEX_Y_OFFSET
] = 0;
630 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
631 s
->vbe_line_offset
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] >> 1;
633 s
->vbe_line_offset
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] *
634 ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
635 s
->vbe_start_addr
= 0;
637 /* clear the screen (should be done in BIOS) */
638 if (!(val
& VBE_DISPI_NOCLEARMEM
)) {
639 memset(s
->vram_ptr
, 0,
640 s
->vbe_regs
[VBE_DISPI_INDEX_YRES
] * s
->vbe_line_offset
);
643 /* we initialize the VGA graphic mode (should be done
645 s
->gr
[0x06] = (s
->gr
[0x06] & ~0x0c) | 0x05; /* graphic mode + memory map 1 */
646 s
->cr
[0x17] |= 3; /* no CGA modes */
647 s
->cr
[0x13] = s
->vbe_line_offset
>> 3;
649 s
->cr
[0x01] = (s
->vbe_regs
[VBE_DISPI_INDEX_XRES
] >> 3) - 1;
650 /* height (only meaningful if < 1024) */
651 h
= s
->vbe_regs
[VBE_DISPI_INDEX_YRES
] - 1;
653 s
->cr
[0x07] = (s
->cr
[0x07] & ~0x42) |
654 ((h
>> 7) & 0x02) | ((h
>> 3) & 0x40);
655 /* line compare to 1023 */
660 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4) {
662 s
->sr
[0x01] &= ~8; /* no double line */
665 s
->sr
[4] |= 0x08; /* set chain 4 mode */
666 s
->sr
[2] |= 0x0f; /* activate all planes */
668 s
->gr
[0x05] = (s
->gr
[0x05] & ~0x60) | (shift_control
<< 5);
669 s
->cr
[0x09] &= ~0x9f; /* no double scan */
671 /* XXX: the bios should do that */
674 s
->dac_8bit
= (val
& VBE_DISPI_8BIT_DAC
) > 0;
675 s
->vbe_regs
[s
->vbe_index
] = val
;
677 case VBE_DISPI_INDEX_VIRT_WIDTH
:
679 int w
, h
, line_offset
;
681 if (val
< s
->vbe_regs
[VBE_DISPI_INDEX_XRES
])
684 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
685 line_offset
= w
>> 1;
687 line_offset
= w
* ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
688 h
= s
->vram_size
/ line_offset
;
689 /* XXX: support weird bochs semantics ? */
690 if (h
< s
->vbe_regs
[VBE_DISPI_INDEX_YRES
])
692 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_WIDTH
] = w
;
693 s
->vbe_regs
[VBE_DISPI_INDEX_VIRT_HEIGHT
] = h
;
694 s
->vbe_line_offset
= line_offset
;
697 case VBE_DISPI_INDEX_X_OFFSET
:
698 case VBE_DISPI_INDEX_Y_OFFSET
:
701 s
->vbe_regs
[s
->vbe_index
] = val
;
702 s
->vbe_start_addr
= s
->vbe_line_offset
* s
->vbe_regs
[VBE_DISPI_INDEX_Y_OFFSET
];
703 x
= s
->vbe_regs
[VBE_DISPI_INDEX_X_OFFSET
];
704 if (s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] == 4)
705 s
->vbe_start_addr
+= x
>> 1;
707 s
->vbe_start_addr
+= x
* ((s
->vbe_regs
[VBE_DISPI_INDEX_BPP
] + 7) >> 3);
708 s
->vbe_start_addr
>>= 2;
718 /* called for accesses between 0xa0000 and 0xc0000 */
719 uint32_t vga_mem_readb(void *opaque
, target_phys_addr_t addr
)
721 VGAState
*s
= opaque
;
722 int memory_map_mode
, plane
;
725 /* convert to VGA memory offset */
726 memory_map_mode
= (s
->gr
[6] >> 2) & 3;
728 switch(memory_map_mode
) {
734 addr
+= s
->bank_offset
;
749 if (s
->sr
[4] & 0x08) {
750 /* chain 4 mode : simplest access */
751 ret
= s
->vram_ptr
[addr
];
752 } else if (s
->gr
[5] & 0x10) {
753 /* odd/even mode (aka text mode mapping) */
754 plane
= (s
->gr
[4] & 2) | (addr
& 1);
755 ret
= s
->vram_ptr
[((addr
& ~1) << 1) | plane
];
757 /* standard VGA latched access */
758 s
->latch
= ((uint32_t *)s
->vram_ptr
)[addr
];
760 if (!(s
->gr
[5] & 0x08)) {
763 ret
= GET_PLANE(s
->latch
, plane
);
766 ret
= (s
->latch
^ mask16
[s
->gr
[2]]) & mask16
[s
->gr
[7]];
775 static uint32_t vga_mem_readw(void *opaque
, target_phys_addr_t addr
)
778 #ifdef TARGET_WORDS_BIGENDIAN
779 v
= vga_mem_readb(opaque
, addr
) << 8;
780 v
|= vga_mem_readb(opaque
, addr
+ 1);
782 v
= vga_mem_readb(opaque
, addr
);
783 v
|= vga_mem_readb(opaque
, addr
+ 1) << 8;
788 static uint32_t vga_mem_readl(void *opaque
, target_phys_addr_t addr
)
791 #ifdef TARGET_WORDS_BIGENDIAN
792 v
= vga_mem_readb(opaque
, addr
) << 24;
793 v
|= vga_mem_readb(opaque
, addr
+ 1) << 16;
794 v
|= vga_mem_readb(opaque
, addr
+ 2) << 8;
795 v
|= vga_mem_readb(opaque
, addr
+ 3);
797 v
= vga_mem_readb(opaque
, addr
);
798 v
|= vga_mem_readb(opaque
, addr
+ 1) << 8;
799 v
|= vga_mem_readb(opaque
, addr
+ 2) << 16;
800 v
|= vga_mem_readb(opaque
, addr
+ 3) << 24;
805 /* called for accesses between 0xa0000 and 0xc0000 */
806 void vga_mem_writeb(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
808 VGAState
*s
= opaque
;
809 int memory_map_mode
, plane
, write_mode
, b
, func_select
, mask
;
810 uint32_t write_mask
, bit_mask
, set_mask
;
813 printf("vga: [0x" TARGET_FMT_plx
"] = 0x%02x\n", addr
, val
);
815 /* convert to VGA memory offset */
816 memory_map_mode
= (s
->gr
[6] >> 2) & 3;
818 switch(memory_map_mode
) {
824 addr
+= s
->bank_offset
;
839 if (s
->sr
[4] & 0x08) {
840 /* chain 4 mode : simplest access */
843 if (s
->sr
[2] & mask
) {
844 s
->vram_ptr
[addr
] = val
;
846 printf("vga: chain4: [0x" TARGET_FMT_plx
"]\n", addr
);
848 s
->plane_updated
|= mask
; /* only used to detect font change */
849 cpu_physical_memory_set_dirty(s
->vram_offset
+ addr
);
851 } else if (s
->gr
[5] & 0x10) {
852 /* odd/even mode (aka text mode mapping) */
853 plane
= (s
->gr
[4] & 2) | (addr
& 1);
855 if (s
->sr
[2] & mask
) {
856 addr
= ((addr
& ~1) << 1) | plane
;
857 s
->vram_ptr
[addr
] = val
;
859 printf("vga: odd/even: [0x" TARGET_FMT_plx
"]\n", addr
);
861 s
->plane_updated
|= mask
; /* only used to detect font change */
862 cpu_physical_memory_set_dirty(s
->vram_offset
+ addr
);
865 /* standard VGA latched access */
866 write_mode
= s
->gr
[5] & 3;
872 val
= ((val
>> b
) | (val
<< (8 - b
))) & 0xff;
876 /* apply set/reset mask */
877 set_mask
= mask16
[s
->gr
[1]];
878 val
= (val
& ~set_mask
) | (mask16
[s
->gr
[0]] & set_mask
);
885 val
= mask16
[val
& 0x0f];
891 val
= (val
>> b
) | (val
<< (8 - b
));
893 bit_mask
= s
->gr
[8] & val
;
894 val
= mask16
[s
->gr
[0]];
898 /* apply logical operation */
899 func_select
= s
->gr
[3] >> 3;
900 switch(func_select
) {
920 bit_mask
|= bit_mask
<< 8;
921 bit_mask
|= bit_mask
<< 16;
922 val
= (val
& bit_mask
) | (s
->latch
& ~bit_mask
);
925 /* mask data according to sr[2] */
927 s
->plane_updated
|= mask
; /* only used to detect font change */
928 write_mask
= mask16
[mask
];
929 ((uint32_t *)s
->vram_ptr
)[addr
] =
930 (((uint32_t *)s
->vram_ptr
)[addr
] & ~write_mask
) |
933 printf("vga: latch: [0x" TARGET_FMT_plx
"] mask=0x%08x val=0x%08x\n",
934 addr
* 4, write_mask
, val
);
936 cpu_physical_memory_set_dirty(s
->vram_offset
+ (addr
<< 2));
940 static void vga_mem_writew(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
942 #ifdef TARGET_WORDS_BIGENDIAN
943 vga_mem_writeb(opaque
, addr
, (val
>> 8) & 0xff);
944 vga_mem_writeb(opaque
, addr
+ 1, val
& 0xff);
946 vga_mem_writeb(opaque
, addr
, val
& 0xff);
947 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 8) & 0xff);
951 static void vga_mem_writel(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
953 #ifdef TARGET_WORDS_BIGENDIAN
954 vga_mem_writeb(opaque
, addr
, (val
>> 24) & 0xff);
955 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 16) & 0xff);
956 vga_mem_writeb(opaque
, addr
+ 2, (val
>> 8) & 0xff);
957 vga_mem_writeb(opaque
, addr
+ 3, val
& 0xff);
959 vga_mem_writeb(opaque
, addr
, val
& 0xff);
960 vga_mem_writeb(opaque
, addr
+ 1, (val
>> 8) & 0xff);
961 vga_mem_writeb(opaque
, addr
+ 2, (val
>> 16) & 0xff);
962 vga_mem_writeb(opaque
, addr
+ 3, (val
>> 24) & 0xff);
966 typedef void vga_draw_glyph8_func(uint8_t *d
, int linesize
,
967 const uint8_t *font_ptr
, int h
,
968 uint32_t fgcol
, uint32_t bgcol
);
969 typedef void vga_draw_glyph9_func(uint8_t *d
, int linesize
,
970 const uint8_t *font_ptr
, int h
,
971 uint32_t fgcol
, uint32_t bgcol
, int dup9
);
972 typedef void vga_draw_line_func(VGAState
*s1
, uint8_t *d
,
973 const uint8_t *s
, int width
);
976 #include "vga_template.h"
979 #include "vga_template.h"
983 #include "vga_template.h"
986 #include "vga_template.h"
990 #include "vga_template.h"
993 #include "vga_template.h"
997 #include "vga_template.h"
999 static unsigned int rgb_to_pixel8_dup(unsigned int r
, unsigned int g
, unsigned b
)
1002 col
= rgb_to_pixel8(r
, g
, b
);
1008 static unsigned int rgb_to_pixel15_dup(unsigned int r
, unsigned int g
, unsigned b
)
1011 col
= rgb_to_pixel15(r
, g
, b
);
1016 static unsigned int rgb_to_pixel15bgr_dup(unsigned int r
, unsigned int g
,
1020 col
= rgb_to_pixel15bgr(r
, g
, b
);
1025 static unsigned int rgb_to_pixel16_dup(unsigned int r
, unsigned int g
, unsigned b
)
1028 col
= rgb_to_pixel16(r
, g
, b
);
1033 static unsigned int rgb_to_pixel16bgr_dup(unsigned int r
, unsigned int g
,
1037 col
= rgb_to_pixel16bgr(r
, g
, b
);
1042 static unsigned int rgb_to_pixel32_dup(unsigned int r
, unsigned int g
, unsigned b
)
1045 col
= rgb_to_pixel32(r
, g
, b
);
1049 static unsigned int rgb_to_pixel32bgr_dup(unsigned int r
, unsigned int g
, unsigned b
)
1052 col
= rgb_to_pixel32bgr(r
, g
, b
);
1056 /* return true if the palette was modified */
1057 static int update_palette16(VGAState
*s
)
1060 uint32_t v
, col
, *palette
;
1063 palette
= s
->last_palette
;
1064 for(i
= 0; i
< 16; i
++) {
1066 if (s
->ar
[0x10] & 0x80)
1067 v
= ((s
->ar
[0x14] & 0xf) << 4) | (v
& 0xf);
1069 v
= ((s
->ar
[0x14] & 0xc) << 4) | (v
& 0x3f);
1071 col
= s
->rgb_to_pixel(c6_to_8(s
->palette
[v
]),
1072 c6_to_8(s
->palette
[v
+ 1]),
1073 c6_to_8(s
->palette
[v
+ 2]));
1074 if (col
!= palette
[i
]) {
1082 /* return true if the palette was modified */
1083 static int update_palette256(VGAState
*s
)
1086 uint32_t v
, col
, *palette
;
1089 palette
= s
->last_palette
;
1091 for(i
= 0; i
< 256; i
++) {
1093 col
= s
->rgb_to_pixel(s
->palette
[v
],
1097 col
= s
->rgb_to_pixel(c6_to_8(s
->palette
[v
]),
1098 c6_to_8(s
->palette
[v
+ 1]),
1099 c6_to_8(s
->palette
[v
+ 2]));
1101 if (col
!= palette
[i
]) {
1110 static void vga_get_offsets(VGAState
*s
,
1111 uint32_t *pline_offset
,
1112 uint32_t *pstart_addr
,
1113 uint32_t *pline_compare
)
1115 uint32_t start_addr
, line_offset
, line_compare
;
1116 #ifdef CONFIG_BOCHS_VBE
1117 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1118 line_offset
= s
->vbe_line_offset
;
1119 start_addr
= s
->vbe_start_addr
;
1120 line_compare
= 65535;
1124 /* compute line_offset in bytes */
1125 line_offset
= s
->cr
[0x13];
1128 /* starting address */
1129 start_addr
= s
->cr
[0x0d] | (s
->cr
[0x0c] << 8);
1132 line_compare
= s
->cr
[0x18] |
1133 ((s
->cr
[0x07] & 0x10) << 4) |
1134 ((s
->cr
[0x09] & 0x40) << 3);
1136 *pline_offset
= line_offset
;
1137 *pstart_addr
= start_addr
;
1138 *pline_compare
= line_compare
;
1141 /* update start_addr and line_offset. Return TRUE if modified */
1142 static int update_basic_params(VGAState
*s
)
1145 uint32_t start_addr
, line_offset
, line_compare
;
1149 s
->get_offsets(s
, &line_offset
, &start_addr
, &line_compare
);
1151 if (line_offset
!= s
->line_offset
||
1152 start_addr
!= s
->start_addr
||
1153 line_compare
!= s
->line_compare
) {
1154 s
->line_offset
= line_offset
;
1155 s
->start_addr
= start_addr
;
1156 s
->line_compare
= line_compare
;
1164 static inline int get_depth_index(DisplayState
*s
)
1166 switch(ds_get_bits_per_pixel(s
)) {
1175 if (is_surface_bgr(s
->surface
))
1182 static vga_draw_glyph8_func
*vga_draw_glyph8_table
[NB_DEPTHS
] = {
1192 static vga_draw_glyph8_func
*vga_draw_glyph16_table
[NB_DEPTHS
] = {
1194 vga_draw_glyph16_16
,
1195 vga_draw_glyph16_16
,
1196 vga_draw_glyph16_32
,
1197 vga_draw_glyph16_32
,
1198 vga_draw_glyph16_16
,
1199 vga_draw_glyph16_16
,
1202 static vga_draw_glyph9_func
*vga_draw_glyph9_table
[NB_DEPTHS
] = {
1212 static const uint8_t cursor_glyph
[32 * 4] = {
1213 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1214 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1215 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1216 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1217 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1218 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1219 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1220 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1221 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1222 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1223 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1224 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1225 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1226 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1227 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1228 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1231 static void vga_get_text_resolution(VGAState
*s
, int *pwidth
, int *pheight
,
1232 int *pcwidth
, int *pcheight
)
1234 int width
, cwidth
, height
, cheight
;
1236 /* total width & height */
1237 cheight
= (s
->cr
[9] & 0x1f) + 1;
1239 if (!(s
->sr
[1] & 0x01))
1241 if (s
->sr
[1] & 0x08)
1242 cwidth
= 16; /* NOTE: no 18 pixel wide */
1243 width
= (s
->cr
[0x01] + 1);
1244 if (s
->cr
[0x06] == 100) {
1245 /* ugly hack for CGA 160x100x16 - explain me the logic */
1248 height
= s
->cr
[0x12] |
1249 ((s
->cr
[0x07] & 0x02) << 7) |
1250 ((s
->cr
[0x07] & 0x40) << 3);
1251 height
= (height
+ 1) / cheight
;
1257 *pcheight
= cheight
;
1260 typedef unsigned int rgb_to_pixel_dup_func(unsigned int r
, unsigned int g
, unsigned b
);
1262 static rgb_to_pixel_dup_func
*rgb_to_pixel_dup_table
[NB_DEPTHS
] = {
1267 rgb_to_pixel32bgr_dup
,
1268 rgb_to_pixel15bgr_dup
,
1269 rgb_to_pixel16bgr_dup
,
1280 static void vga_draw_text(VGAState
*s
, int full_update
)
1282 int cx
, cy
, cheight
, cw
, ch
, cattr
, height
, width
, ch_attr
;
1283 int cx_min
, cx_max
, linesize
, x_incr
;
1284 uint32_t offset
, fgcol
, bgcol
, v
, cursor_offset
;
1285 uint8_t *d1
, *d
, *src
, *s1
, *dest
, *cursor_ptr
;
1286 const uint8_t *font_ptr
, *font_base
[2];
1287 int dup9
, line_offset
, depth_index
;
1289 uint32_t *ch_attr_ptr
;
1290 vga_draw_glyph8_func
*vga_draw_glyph8
;
1291 vga_draw_glyph9_func
*vga_draw_glyph9
;
1293 /* compute font data address (in plane 2) */
1295 offset
= (((v
>> 4) & 1) | ((v
<< 1) & 6)) * 8192 * 4 + 2;
1296 if (offset
!= s
->font_offsets
[0]) {
1297 s
->font_offsets
[0] = offset
;
1300 font_base
[0] = s
->vram_ptr
+ offset
;
1302 offset
= (((v
>> 5) & 1) | ((v
>> 1) & 6)) * 8192 * 4 + 2;
1303 font_base
[1] = s
->vram_ptr
+ offset
;
1304 if (offset
!= s
->font_offsets
[1]) {
1305 s
->font_offsets
[1] = offset
;
1308 if (s
->plane_updated
& (1 << 2)) {
1309 /* if the plane 2 was modified since the last display, it
1310 indicates the font may have been modified */
1311 s
->plane_updated
= 0;
1314 full_update
|= update_basic_params(s
);
1316 line_offset
= s
->line_offset
;
1317 s1
= s
->vram_ptr
+ (s
->start_addr
* 4);
1319 vga_get_text_resolution(s
, &width
, &height
, &cw
, &cheight
);
1320 x_incr
= cw
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1321 if ((height
* width
) > CH_ATTR_SIZE
) {
1322 /* better than nothing: exit if transient size is too big */
1326 if (width
!= s
->last_width
|| height
!= s
->last_height
||
1327 cw
!= s
->last_cw
|| cheight
!= s
->last_ch
|| s
->last_depth
) {
1328 s
->last_scr_width
= width
* cw
;
1329 s
->last_scr_height
= height
* cheight
;
1330 qemu_console_resize(s
->ds
, s
->last_scr_width
, s
->last_scr_height
);
1332 s
->last_width
= width
;
1333 s
->last_height
= height
;
1334 s
->last_ch
= cheight
;
1339 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1340 full_update
|= update_palette16(s
);
1341 palette
= s
->last_palette
;
1342 x_incr
= cw
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1344 cursor_offset
= ((s
->cr
[0x0e] << 8) | s
->cr
[0x0f]) - s
->start_addr
;
1345 if (cursor_offset
!= s
->cursor_offset
||
1346 s
->cr
[0xa] != s
->cursor_start
||
1347 s
->cr
[0xb] != s
->cursor_end
) {
1348 /* if the cursor position changed, we update the old and new
1350 if (s
->cursor_offset
< CH_ATTR_SIZE
)
1351 s
->last_ch_attr
[s
->cursor_offset
] = -1;
1352 if (cursor_offset
< CH_ATTR_SIZE
)
1353 s
->last_ch_attr
[cursor_offset
] = -1;
1354 s
->cursor_offset
= cursor_offset
;
1355 s
->cursor_start
= s
->cr
[0xa];
1356 s
->cursor_end
= s
->cr
[0xb];
1358 cursor_ptr
= s
->vram_ptr
+ (s
->start_addr
+ cursor_offset
) * 4;
1360 depth_index
= get_depth_index(s
->ds
);
1362 vga_draw_glyph8
= vga_draw_glyph16_table
[depth_index
];
1364 vga_draw_glyph8
= vga_draw_glyph8_table
[depth_index
];
1365 vga_draw_glyph9
= vga_draw_glyph9_table
[depth_index
];
1367 dest
= ds_get_data(s
->ds
);
1368 linesize
= ds_get_linesize(s
->ds
);
1369 ch_attr_ptr
= s
->last_ch_attr
;
1370 for(cy
= 0; cy
< height
; cy
++) {
1375 for(cx
= 0; cx
< width
; cx
++) {
1376 ch_attr
= *(uint16_t *)src
;
1377 if (full_update
|| ch_attr
!= *ch_attr_ptr
) {
1382 *ch_attr_ptr
= ch_attr
;
1383 #ifdef HOST_WORDS_BIGENDIAN
1385 cattr
= ch_attr
& 0xff;
1387 ch
= ch_attr
& 0xff;
1388 cattr
= ch_attr
>> 8;
1390 font_ptr
= font_base
[(cattr
>> 3) & 1];
1391 font_ptr
+= 32 * 4 * ch
;
1392 bgcol
= palette
[cattr
>> 4];
1393 fgcol
= palette
[cattr
& 0x0f];
1395 vga_draw_glyph8(d1
, linesize
,
1396 font_ptr
, cheight
, fgcol
, bgcol
);
1399 if (ch
>= 0xb0 && ch
<= 0xdf && (s
->ar
[0x10] & 0x04))
1401 vga_draw_glyph9(d1
, linesize
,
1402 font_ptr
, cheight
, fgcol
, bgcol
, dup9
);
1404 if (src
== cursor_ptr
&&
1405 !(s
->cr
[0x0a] & 0x20)) {
1406 int line_start
, line_last
, h
;
1407 /* draw the cursor */
1408 line_start
= s
->cr
[0x0a] & 0x1f;
1409 line_last
= s
->cr
[0x0b] & 0x1f;
1410 /* XXX: check that */
1411 if (line_last
> cheight
- 1)
1412 line_last
= cheight
- 1;
1413 if (line_last
>= line_start
&& line_start
< cheight
) {
1414 h
= line_last
- line_start
+ 1;
1415 d
= d1
+ linesize
* line_start
;
1417 vga_draw_glyph8(d
, linesize
,
1418 cursor_glyph
, h
, fgcol
, bgcol
);
1420 vga_draw_glyph9(d
, linesize
,
1421 cursor_glyph
, h
, fgcol
, bgcol
, 1);
1431 dpy_update(s
->ds
, cx_min
* cw
, cy
* cheight
,
1432 (cx_max
- cx_min
+ 1) * cw
, cheight
);
1434 dest
+= linesize
* cheight
;
1453 static vga_draw_line_func
*vga_draw_line_table
[NB_DEPTHS
* VGA_DRAW_LINE_NB
] = {
1463 vga_draw_line2d2_16
,
1464 vga_draw_line2d2_16
,
1465 vga_draw_line2d2_32
,
1466 vga_draw_line2d2_32
,
1467 vga_draw_line2d2_16
,
1468 vga_draw_line2d2_16
,
1479 vga_draw_line4d2_16
,
1480 vga_draw_line4d2_16
,
1481 vga_draw_line4d2_32
,
1482 vga_draw_line4d2_32
,
1483 vga_draw_line4d2_16
,
1484 vga_draw_line4d2_16
,
1487 vga_draw_line8d2_16
,
1488 vga_draw_line8d2_16
,
1489 vga_draw_line8d2_32
,
1490 vga_draw_line8d2_32
,
1491 vga_draw_line8d2_16
,
1492 vga_draw_line8d2_16
,
1506 vga_draw_line15_32bgr
,
1507 vga_draw_line15_15bgr
,
1508 vga_draw_line15_16bgr
,
1514 vga_draw_line16_32bgr
,
1515 vga_draw_line16_15bgr
,
1516 vga_draw_line16_16bgr
,
1522 vga_draw_line24_32bgr
,
1523 vga_draw_line24_15bgr
,
1524 vga_draw_line24_16bgr
,
1530 vga_draw_line32_32bgr
,
1531 vga_draw_line32_15bgr
,
1532 vga_draw_line32_16bgr
,
1535 static int vga_get_bpp(VGAState
*s
)
1538 #ifdef CONFIG_BOCHS_VBE
1539 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1540 ret
= s
->vbe_regs
[VBE_DISPI_INDEX_BPP
];
1549 static void vga_get_resolution(VGAState
*s
, int *pwidth
, int *pheight
)
1553 #ifdef CONFIG_BOCHS_VBE
1554 if (s
->vbe_regs
[VBE_DISPI_INDEX_ENABLE
] & VBE_DISPI_ENABLED
) {
1555 width
= s
->vbe_regs
[VBE_DISPI_INDEX_XRES
];
1556 height
= s
->vbe_regs
[VBE_DISPI_INDEX_YRES
];
1560 width
= (s
->cr
[0x01] + 1) * 8;
1561 height
= s
->cr
[0x12] |
1562 ((s
->cr
[0x07] & 0x02) << 7) |
1563 ((s
->cr
[0x07] & 0x40) << 3);
1564 height
= (height
+ 1);
1570 void vga_invalidate_scanlines(VGAState
*s
, int y1
, int y2
)
1573 if (y1
>= VGA_MAX_HEIGHT
)
1575 if (y2
>= VGA_MAX_HEIGHT
)
1576 y2
= VGA_MAX_HEIGHT
;
1577 for(y
= y1
; y
< y2
; y
++) {
1578 s
->invalidated_y_table
[y
>> 5] |= 1 << (y
& 0x1f);
1582 static void vga_sync_dirty_bitmap(VGAState
*s
)
1585 cpu_physical_sync_dirty_bitmap(s
->map_addr
, s
->map_end
);
1587 if (s
->lfb_vram_mapped
) {
1588 cpu_physical_sync_dirty_bitmap(isa_mem_base
+ 0xa0000, 0xa8000);
1589 cpu_physical_sync_dirty_bitmap(isa_mem_base
+ 0xa8000, 0xb0000);
1596 static void vga_draw_graphic(VGAState
*s
, int full_update
)
1598 int y1
, y
, update
, linesize
, y_start
, double_scan
, mask
, depth
;
1599 int width
, height
, shift_control
, line_offset
, bwidth
, bits
;
1600 ram_addr_t page0
, page1
, page_min
, page_max
;
1601 int disp_width
, multi_scan
, multi_run
;
1603 uint32_t v
, addr1
, addr
;
1604 vga_draw_line_func
*vga_draw_line
;
1606 full_update
|= update_basic_params(s
);
1609 vga_sync_dirty_bitmap(s
);
1611 s
->get_resolution(s
, &width
, &height
);
1614 shift_control
= (s
->gr
[0x05] >> 5) & 3;
1615 double_scan
= (s
->cr
[0x09] >> 7);
1616 if (shift_control
!= 1) {
1617 multi_scan
= (((s
->cr
[0x09] & 0x1f) + 1) << double_scan
) - 1;
1619 /* in CGA modes, multi_scan is ignored */
1620 /* XXX: is it correct ? */
1621 multi_scan
= double_scan
;
1623 multi_run
= multi_scan
;
1624 if (shift_control
!= s
->shift_control
||
1625 double_scan
!= s
->double_scan
) {
1627 s
->shift_control
= shift_control
;
1628 s
->double_scan
= double_scan
;
1631 if (shift_control
== 0) {
1632 if (s
->sr
[0x01] & 8) {
1635 } else if (shift_control
== 1) {
1636 if (s
->sr
[0x01] & 8) {
1641 depth
= s
->get_bpp(s
);
1642 if (s
->line_offset
!= s
->last_line_offset
||
1643 disp_width
!= s
->last_width
||
1644 height
!= s
->last_height
||
1645 s
->last_depth
!= depth
) {
1646 #if defined(HOST_WORDS_BIGENDIAN) == defined(TARGET_WORDS_BIGENDIAN)
1647 if (depth
== 16 || depth
== 32) {
1651 qemu_free_displaysurface(s
->ds
);
1652 s
->ds
->surface
= qemu_create_displaysurface_from(disp_width
, height
, depth
,
1654 s
->vram_ptr
+ (s
->start_addr
* 4));
1655 #if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
1656 s
->ds
->surface
->pf
= qemu_different_endianness_pixelformat(depth
);
1660 qemu_console_resize(s
->ds
, disp_width
, height
);
1662 s
->last_scr_width
= disp_width
;
1663 s
->last_scr_height
= height
;
1664 s
->last_width
= disp_width
;
1665 s
->last_height
= height
;
1666 s
->last_line_offset
= s
->line_offset
;
1667 s
->last_depth
= depth
;
1669 } else if (is_buffer_shared(s
->ds
->surface
) &&
1670 (full_update
|| s
->ds
->surface
->data
!= s
->vram_ptr
+ (s
->start_addr
* 4))) {
1671 s
->ds
->surface
->data
= s
->vram_ptr
+ (s
->start_addr
* 4);
1676 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1678 if (shift_control
== 0) {
1679 full_update
|= update_palette16(s
);
1680 if (s
->sr
[0x01] & 8) {
1681 v
= VGA_DRAW_LINE4D2
;
1686 } else if (shift_control
== 1) {
1687 full_update
|= update_palette16(s
);
1688 if (s
->sr
[0x01] & 8) {
1689 v
= VGA_DRAW_LINE2D2
;
1695 switch(s
->get_bpp(s
)) {
1698 full_update
|= update_palette256(s
);
1699 v
= VGA_DRAW_LINE8D2
;
1703 full_update
|= update_palette256(s
);
1708 v
= VGA_DRAW_LINE15
;
1712 v
= VGA_DRAW_LINE16
;
1716 v
= VGA_DRAW_LINE24
;
1720 v
= VGA_DRAW_LINE32
;
1725 vga_draw_line
= vga_draw_line_table
[v
* NB_DEPTHS
+ get_depth_index(s
->ds
)];
1727 if (!is_buffer_shared(s
->ds
->surface
) && s
->cursor_invalidate
)
1728 s
->cursor_invalidate(s
);
1730 line_offset
= s
->line_offset
;
1732 printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n",
1733 width
, height
, v
, line_offset
, s
->cr
[9], s
->cr
[0x17], s
->line_compare
, s
->sr
[0x01]);
1735 addr1
= (s
->start_addr
* 4);
1736 bwidth
= (width
* bits
+ 7) / 8;
1740 d
= ds_get_data(s
->ds
);
1741 linesize
= ds_get_linesize(s
->ds
);
1743 for(y
= 0; y
< height
; y
++) {
1745 if (!(s
->cr
[0x17] & 1)) {
1747 /* CGA compatibility handling */
1748 shift
= 14 + ((s
->cr
[0x17] >> 6) & 1);
1749 addr
= (addr
& ~(1 << shift
)) | ((y1
& 1) << shift
);
1751 if (!(s
->cr
[0x17] & 2)) {
1752 addr
= (addr
& ~0x8000) | ((y1
& 2) << 14);
1754 page0
= s
->vram_offset
+ (addr
& TARGET_PAGE_MASK
);
1755 page1
= s
->vram_offset
+ ((addr
+ bwidth
- 1) & TARGET_PAGE_MASK
);
1756 update
= full_update
|
1757 cpu_physical_memory_get_dirty(page0
, VGA_DIRTY_FLAG
) |
1758 cpu_physical_memory_get_dirty(page1
, VGA_DIRTY_FLAG
);
1759 if ((page1
- page0
) > TARGET_PAGE_SIZE
) {
1760 /* if wide line, can use another page */
1761 update
|= cpu_physical_memory_get_dirty(page0
+ TARGET_PAGE_SIZE
,
1764 /* explicit invalidation for the hardware cursor */
1765 update
|= (s
->invalidated_y_table
[y
>> 5] >> (y
& 0x1f)) & 1;
1769 if (page0
< page_min
)
1771 if (page1
> page_max
)
1773 if (!(is_buffer_shared(s
->ds
->surface
))) {
1774 vga_draw_line(s
, d
, s
->vram_ptr
+ addr
, width
);
1775 if (s
->cursor_draw_line
)
1776 s
->cursor_draw_line(s
, d
, y
);
1780 /* flush to display */
1781 dpy_update(s
->ds
, 0, y_start
,
1782 disp_width
, y
- y_start
);
1787 mask
= (s
->cr
[0x17] & 3) ^ 3;
1788 if ((y1
& mask
) == mask
)
1789 addr1
+= line_offset
;
1791 multi_run
= multi_scan
;
1795 /* line compare acts on the displayed lines */
1796 if (y
== s
->line_compare
)
1801 /* flush to display */
1802 dpy_update(s
->ds
, 0, y_start
,
1803 disp_width
, y
- y_start
);
1805 /* reset modified pages */
1806 if (page_max
>= page_min
) {
1807 cpu_physical_memory_reset_dirty(page_min
, page_max
+ TARGET_PAGE_SIZE
,
1810 memset(s
->invalidated_y_table
, 0, ((height
+ 31) >> 5) * 4);
1813 static void vga_draw_blank(VGAState
*s
, int full_update
)
1820 if (s
->last_scr_width
<= 0 || s
->last_scr_height
<= 0)
1824 rgb_to_pixel_dup_table
[get_depth_index(s
->ds
)];
1825 if (ds_get_bits_per_pixel(s
->ds
) == 8)
1826 val
= s
->rgb_to_pixel(0, 0, 0);
1829 w
= s
->last_scr_width
* ((ds_get_bits_per_pixel(s
->ds
) + 7) >> 3);
1830 d
= ds_get_data(s
->ds
);
1831 for(i
= 0; i
< s
->last_scr_height
; i
++) {
1833 d
+= ds_get_linesize(s
->ds
);
1835 dpy_update(s
->ds
, 0, 0,
1836 s
->last_scr_width
, s
->last_scr_height
);
1839 #define GMODE_TEXT 0
1840 #define GMODE_GRAPH 1
1841 #define GMODE_BLANK 2
1843 static void vga_update_display(void *opaque
)
1845 VGAState
*s
= opaque
;
1846 int full_update
, graphic_mode
;
1848 if (ds_get_bits_per_pixel(s
->ds
) == 0) {
1851 full_update
= s
->full_update
;
1853 if (!(s
->ar_index
& 0x20)) {
1854 graphic_mode
= GMODE_BLANK
;
1856 graphic_mode
= s
->gr
[6] & 1;
1858 if (graphic_mode
!= s
->graphic_mode
) {
1859 s
->graphic_mode
= graphic_mode
;
1862 switch(graphic_mode
) {
1864 vga_draw_text(s
, full_update
);
1867 vga_draw_graphic(s
, full_update
);
1871 vga_draw_blank(s
, full_update
);
1877 /* force a full display refresh */
1878 static void vga_invalidate_display(void *opaque
)
1880 VGAState
*s
= opaque
;
1885 void vga_common_reset(VGACommonState
*s
)
1891 s
->lfb_vram_mapped
= 0;
1895 memset(s
->sr
, '\0', sizeof(s
->sr
));
1897 memset(s
->gr
, '\0', sizeof(s
->gr
));
1899 memset(s
->ar
, '\0', sizeof(s
->ar
));
1900 s
->ar_flip_flop
= 0;
1902 memset(s
->cr
, '\0', sizeof(s
->cr
));
1908 s
->dac_sub_index
= 0;
1909 s
->dac_read_index
= 0;
1910 s
->dac_write_index
= 0;
1911 memset(s
->dac_cache
, '\0', sizeof(s
->dac_cache
));
1913 memset(s
->palette
, '\0', sizeof(s
->palette
));
1915 #ifdef CONFIG_BOCHS_VBE
1917 memset(s
->vbe_regs
, '\0', sizeof(s
->vbe_regs
));
1918 s
->vbe_regs
[VBE_DISPI_INDEX_ID
] = VBE_DISPI_ID0
;
1919 s
->vbe_start_addr
= 0;
1920 s
->vbe_line_offset
= 0;
1921 s
->vbe_bank_mask
= (s
->vram_size
>> 16) - 1;
1923 memset(s
->font_offsets
, '\0', sizeof(s
->font_offsets
));
1924 s
->graphic_mode
= -1; /* force full update */
1925 s
->shift_control
= 0;
1928 s
->line_compare
= 0;
1930 s
->plane_updated
= 0;
1935 s
->last_scr_width
= 0;
1936 s
->last_scr_height
= 0;
1937 s
->cursor_start
= 0;
1939 s
->cursor_offset
= 0;
1940 memset(s
->invalidated_y_table
, '\0', sizeof(s
->invalidated_y_table
));
1941 memset(s
->last_palette
, '\0', sizeof(s
->last_palette
));
1942 memset(s
->last_ch_attr
, '\0', sizeof(s
->last_ch_attr
));
1943 switch (vga_retrace_method
) {
1944 case VGA_RETRACE_DUMB
:
1946 case VGA_RETRACE_PRECISE
:
1947 memset(&s
->retrace_info
, 0, sizeof (s
->retrace_info
));
1952 static void vga_reset(void *opaque
)
1954 VGAState
*s
= opaque
;
1955 vga_common_reset(s
);
1958 #define TEXTMODE_X(x) ((x) % width)
1959 #define TEXTMODE_Y(x) ((x) / width)
1960 #define VMEM2CHTYPE(v) ((v & 0xff0007ff) | \
1961 ((v & 0x00000800) << 10) | ((v & 0x00007000) >> 1))
1962 /* relay text rendering to the display driver
1963 * instead of doing a full vga_update_display() */
1964 static void vga_update_text(void *opaque
, console_ch_t
*chardata
)
1966 VGAState
*s
= opaque
;
1967 int graphic_mode
, i
, cursor_offset
, cursor_visible
;
1968 int cw
, cheight
, width
, height
, size
, c_min
, c_max
;
1970 console_ch_t
*dst
, val
;
1971 char msg_buffer
[80];
1972 int full_update
= 0;
1974 if (!(s
->ar_index
& 0x20)) {
1975 graphic_mode
= GMODE_BLANK
;
1977 graphic_mode
= s
->gr
[6] & 1;
1979 if (graphic_mode
!= s
->graphic_mode
) {
1980 s
->graphic_mode
= graphic_mode
;
1983 if (s
->last_width
== -1) {
1988 switch (graphic_mode
) {
1990 /* TODO: update palette */
1991 full_update
|= update_basic_params(s
);
1993 /* total width & height */
1994 cheight
= (s
->cr
[9] & 0x1f) + 1;
1996 if (!(s
->sr
[1] & 0x01))
1998 if (s
->sr
[1] & 0x08)
1999 cw
= 16; /* NOTE: no 18 pixel wide */
2000 width
= (s
->cr
[0x01] + 1);
2001 if (s
->cr
[0x06] == 100) {
2002 /* ugly hack for CGA 160x100x16 - explain me the logic */
2005 height
= s
->cr
[0x12] |
2006 ((s
->cr
[0x07] & 0x02) << 7) |
2007 ((s
->cr
[0x07] & 0x40) << 3);
2008 height
= (height
+ 1) / cheight
;
2011 size
= (height
* width
);
2012 if (size
> CH_ATTR_SIZE
) {
2016 snprintf(msg_buffer
, sizeof(msg_buffer
), "%i x %i Text mode",
2021 if (width
!= s
->last_width
|| height
!= s
->last_height
||
2022 cw
!= s
->last_cw
|| cheight
!= s
->last_ch
) {
2023 s
->last_scr_width
= width
* cw
;
2024 s
->last_scr_height
= height
* cheight
;
2025 s
->ds
->surface
->width
= width
;
2026 s
->ds
->surface
->height
= height
;
2028 s
->last_width
= width
;
2029 s
->last_height
= height
;
2030 s
->last_ch
= cheight
;
2035 /* Update "hardware" cursor */
2036 cursor_offset
= ((s
->cr
[0x0e] << 8) | s
->cr
[0x0f]) - s
->start_addr
;
2037 if (cursor_offset
!= s
->cursor_offset
||
2038 s
->cr
[0xa] != s
->cursor_start
||
2039 s
->cr
[0xb] != s
->cursor_end
|| full_update
) {
2040 cursor_visible
= !(s
->cr
[0xa] & 0x20);
2041 if (cursor_visible
&& cursor_offset
< size
&& cursor_offset
>= 0)
2043 TEXTMODE_X(cursor_offset
),
2044 TEXTMODE_Y(cursor_offset
));
2046 dpy_cursor(s
->ds
, -1, -1);
2047 s
->cursor_offset
= cursor_offset
;
2048 s
->cursor_start
= s
->cr
[0xa];
2049 s
->cursor_end
= s
->cr
[0xb];
2052 src
= (uint32_t *) s
->vram_ptr
+ s
->start_addr
;
2056 for (i
= 0; i
< size
; src
++, dst
++, i
++)
2057 console_write_ch(dst
, VMEM2CHTYPE(*src
));
2059 dpy_update(s
->ds
, 0, 0, width
, height
);
2063 for (i
= 0; i
< size
; src
++, dst
++, i
++) {
2064 console_write_ch(&val
, VMEM2CHTYPE(*src
));
2072 for (; i
< size
; src
++, dst
++, i
++) {
2073 console_write_ch(&val
, VMEM2CHTYPE(*src
));
2080 if (c_min
<= c_max
) {
2081 i
= TEXTMODE_Y(c_min
);
2082 dpy_update(s
->ds
, 0, i
, width
, TEXTMODE_Y(c_max
) - i
+ 1);
2091 s
->get_resolution(s
, &width
, &height
);
2092 snprintf(msg_buffer
, sizeof(msg_buffer
), "%i x %i Graphic mode",
2100 snprintf(msg_buffer
, sizeof(msg_buffer
), "VGA Blank mode");
2104 /* Display a message */
2106 s
->last_height
= height
= 3;
2107 dpy_cursor(s
->ds
, -1, -1);
2108 s
->ds
->surface
->width
= s
->last_width
;
2109 s
->ds
->surface
->height
= height
;
2112 for (dst
= chardata
, i
= 0; i
< s
->last_width
* height
; i
++)
2113 console_write_ch(dst
++, ' ');
2115 size
= strlen(msg_buffer
);
2116 width
= (s
->last_width
- size
) / 2;
2117 dst
= chardata
+ s
->last_width
+ width
;
2118 for (i
= 0; i
< size
; i
++)
2119 console_write_ch(dst
++, 0x00200100 | msg_buffer
[i
]);
2121 dpy_update(s
->ds
, 0, 0, s
->last_width
, height
);
2124 CPUReadMemoryFunc
* const vga_mem_read
[3] = {
2130 CPUWriteMemoryFunc
* const vga_mem_write
[3] = {
2136 void vga_common_save(QEMUFile
*f
, void *opaque
)
2138 VGACommonState
*s
= opaque
;
2141 qemu_put_be32s(f
, &s
->latch
);
2142 qemu_put_8s(f
, &s
->sr_index
);
2143 qemu_put_buffer(f
, s
->sr
, 8);
2144 qemu_put_8s(f
, &s
->gr_index
);
2145 qemu_put_buffer(f
, s
->gr
, 16);
2146 qemu_put_8s(f
, &s
->ar_index
);
2147 qemu_put_buffer(f
, s
->ar
, 21);
2148 qemu_put_be32(f
, s
->ar_flip_flop
);
2149 qemu_put_8s(f
, &s
->cr_index
);
2150 qemu_put_buffer(f
, s
->cr
, 256);
2151 qemu_put_8s(f
, &s
->msr
);
2152 qemu_put_8s(f
, &s
->fcr
);
2153 qemu_put_byte(f
, s
->st00
);
2154 qemu_put_8s(f
, &s
->st01
);
2156 qemu_put_8s(f
, &s
->dac_state
);
2157 qemu_put_8s(f
, &s
->dac_sub_index
);
2158 qemu_put_8s(f
, &s
->dac_read_index
);
2159 qemu_put_8s(f
, &s
->dac_write_index
);
2160 qemu_put_buffer(f
, s
->dac_cache
, 3);
2161 qemu_put_buffer(f
, s
->palette
, 768);
2163 qemu_put_be32(f
, s
->bank_offset
);
2164 #ifdef CONFIG_BOCHS_VBE
2165 qemu_put_byte(f
, 1);
2166 qemu_put_be16s(f
, &s
->vbe_index
);
2167 for(i
= 0; i
< VBE_DISPI_INDEX_NB
; i
++)
2168 qemu_put_be16s(f
, &s
->vbe_regs
[i
]);
2169 qemu_put_be32s(f
, &s
->vbe_start_addr
);
2170 qemu_put_be32s(f
, &s
->vbe_line_offset
);
2171 qemu_put_be32s(f
, &s
->vbe_bank_mask
);
2173 qemu_put_byte(f
, 0);
2177 int vga_common_load(QEMUFile
*f
, void *opaque
, int version_id
)
2179 VGACommonState
*s
= opaque
;
2185 qemu_get_be32s(f
, &s
->latch
);
2186 qemu_get_8s(f
, &s
->sr_index
);
2187 qemu_get_buffer(f
, s
->sr
, 8);
2188 qemu_get_8s(f
, &s
->gr_index
);
2189 qemu_get_buffer(f
, s
->gr
, 16);
2190 qemu_get_8s(f
, &s
->ar_index
);
2191 qemu_get_buffer(f
, s
->ar
, 21);
2192 s
->ar_flip_flop
=qemu_get_be32(f
);
2193 qemu_get_8s(f
, &s
->cr_index
);
2194 qemu_get_buffer(f
, s
->cr
, 256);
2195 qemu_get_8s(f
, &s
->msr
);
2196 qemu_get_8s(f
, &s
->fcr
);
2197 qemu_get_8s(f
, &s
->st00
);
2198 qemu_get_8s(f
, &s
->st01
);
2200 qemu_get_8s(f
, &s
->dac_state
);
2201 qemu_get_8s(f
, &s
->dac_sub_index
);
2202 qemu_get_8s(f
, &s
->dac_read_index
);
2203 qemu_get_8s(f
, &s
->dac_write_index
);
2204 qemu_get_buffer(f
, s
->dac_cache
, 3);
2205 qemu_get_buffer(f
, s
->palette
, 768);
2207 s
->bank_offset
=qemu_get_be32(f
);
2208 is_vbe
= qemu_get_byte(f
);
2209 #ifdef CONFIG_BOCHS_VBE
2212 qemu_get_be16s(f
, &s
->vbe_index
);
2213 for(i
= 0; i
< VBE_DISPI_INDEX_NB
; i
++)
2214 qemu_get_be16s(f
, &s
->vbe_regs
[i
]);
2215 qemu_get_be32s(f
, &s
->vbe_start_addr
);
2216 qemu_get_be32s(f
, &s
->vbe_line_offset
);
2217 qemu_get_be32s(f
, &s
->vbe_bank_mask
);
2224 s
->graphic_mode
= -1;
2228 void vga_common_init(VGACommonState
*s
, int vga_ram_size
)
2232 for(i
= 0;i
< 256; i
++) {
2234 for(j
= 0; j
< 8; j
++) {
2235 v
|= ((i
>> j
) & 1) << (j
* 4);
2240 for(j
= 0; j
< 4; j
++) {
2241 v
|= ((i
>> (2 * j
)) & 3) << (j
* 4);
2245 for(i
= 0; i
< 16; i
++) {
2247 for(j
= 0; j
< 4; j
++) {
2250 v
|= b
<< (2 * j
+ 1);
2255 s
->vram_offset
= qemu_ram_alloc(vga_ram_size
);
2256 s
->vram_ptr
= qemu_get_ram_ptr(s
->vram_offset
);
2257 s
->vram_size
= vga_ram_size
;
2258 s
->get_bpp
= vga_get_bpp
;
2259 s
->get_offsets
= vga_get_offsets
;
2260 s
->get_resolution
= vga_get_resolution
;
2261 s
->update
= vga_update_display
;
2262 s
->invalidate
= vga_invalidate_display
;
2263 s
->screen_dump
= vga_screen_dump
;
2264 s
->text_update
= vga_update_text
;
2265 switch (vga_retrace_method
) {
2266 case VGA_RETRACE_DUMB
:
2267 s
->retrace
= vga_dumb_retrace
;
2268 s
->update_retrace_info
= vga_dumb_update_retrace_info
;
2271 case VGA_RETRACE_PRECISE
:
2272 s
->retrace
= vga_precise_retrace
;
2273 s
->update_retrace_info
= vga_precise_update_retrace_info
;
2279 /* used by both ISA and PCI */
2280 void vga_init(VGAState
*s
)
2284 qemu_register_reset(vga_reset
, s
);
2286 register_ioport_write(0x3c0, 16, 1, vga_ioport_write
, s
);
2288 register_ioport_write(0x3b4, 2, 1, vga_ioport_write
, s
);
2289 register_ioport_write(0x3d4, 2, 1, vga_ioport_write
, s
);
2290 register_ioport_write(0x3ba, 1, 1, vga_ioport_write
, s
);
2291 register_ioport_write(0x3da, 1, 1, vga_ioport_write
, s
);
2293 register_ioport_read(0x3c0, 16, 1, vga_ioport_read
, s
);
2295 register_ioport_read(0x3b4, 2, 1, vga_ioport_read
, s
);
2296 register_ioport_read(0x3d4, 2, 1, vga_ioport_read
, s
);
2297 register_ioport_read(0x3ba, 1, 1, vga_ioport_read
, s
);
2298 register_ioport_read(0x3da, 1, 1, vga_ioport_read
, s
);
2301 #ifdef CONFIG_BOCHS_VBE
2302 #if defined (TARGET_I386)
2303 register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index
, s
);
2304 register_ioport_read(0x1cf, 1, 2, vbe_ioport_read_data
, s
);
2306 register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index
, s
);
2307 register_ioport_write(0x1cf, 1, 2, vbe_ioport_write_data
, s
);
2309 /* old Bochs IO ports */
2310 register_ioport_read(0xff80, 1, 2, vbe_ioport_read_index
, s
);
2311 register_ioport_read(0xff81, 1, 2, vbe_ioport_read_data
, s
);
2313 register_ioport_write(0xff80, 1, 2, vbe_ioport_write_index
, s
);
2314 register_ioport_write(0xff81, 1, 2, vbe_ioport_write_data
, s
);
2316 register_ioport_read(0x1ce, 1, 2, vbe_ioport_read_index
, s
);
2317 register_ioport_read(0x1d0, 1, 2, vbe_ioport_read_data
, s
);
2319 register_ioport_write(0x1ce, 1, 2, vbe_ioport_write_index
, s
);
2320 register_ioport_write(0x1d0, 1, 2, vbe_ioport_write_data
, s
);
2322 #endif /* CONFIG_BOCHS_VBE */
2324 vga_io_memory
= cpu_register_io_memory(vga_mem_read
, vga_mem_write
, s
);
2325 cpu_register_physical_memory(isa_mem_base
+ 0x000a0000, 0x20000,
2327 qemu_register_coalesced_mmio(isa_mem_base
+ 0x000a0000, 0x20000);
2330 /********************************************************/
2331 /* vga screen dump */
2333 static void vga_save_dpy_update(DisplayState
*ds
,
2334 int x
, int y
, int w
, int h
)
2336 if (screen_dump_filename
) {
2337 ppm_save(screen_dump_filename
, ds
->surface
);
2338 screen_dump_filename
= NULL
;
2342 static void vga_save_dpy_resize(DisplayState
*s
)
2346 static void vga_save_dpy_refresh(DisplayState
*s
)
2350 int ppm_save(const char *filename
, struct DisplaySurface
*ds
)
2358 f
= fopen(filename
, "wb");
2361 fprintf(f
, "P6\n%d %d\n%d\n",
2362 ds
->width
, ds
->height
, 255);
2364 for(y
= 0; y
< ds
->height
; y
++) {
2366 for(x
= 0; x
< ds
->width
; x
++) {
2367 if (ds
->pf
.bits_per_pixel
== 32)
2370 v
= (uint32_t) (*(uint16_t *)d
);
2371 r
= ((v
>> ds
->pf
.rshift
) & ds
->pf
.rmax
) * 256 /
2373 g
= ((v
>> ds
->pf
.gshift
) & ds
->pf
.gmax
) * 256 /
2375 b
= ((v
>> ds
->pf
.bshift
) & ds
->pf
.bmax
) * 256 /
2380 d
+= ds
->pf
.bytes_per_pixel
;
2388 static DisplayChangeListener
* vga_screen_dump_init(DisplayState
*ds
)
2390 DisplayChangeListener
*dcl
;
2392 dcl
= qemu_mallocz(sizeof(DisplayChangeListener
));
2393 dcl
->dpy_update
= vga_save_dpy_update
;
2394 dcl
->dpy_resize
= vga_save_dpy_resize
;
2395 dcl
->dpy_refresh
= vga_save_dpy_refresh
;
2396 register_displaychangelistener(ds
, dcl
);
2400 /* save the vga display in a PPM image even if no display is
2402 static void vga_screen_dump(void *opaque
, const char *filename
)
2404 VGAState
*s
= opaque
;
2406 if (!screen_dump_dcl
)
2407 screen_dump_dcl
= vga_screen_dump_init(s
->ds
);
2409 screen_dump_filename
= (char *)filename
;
2410 vga_invalidate_display(s
);