2 * QEMU Firmware configuration device emulation
4 * Copyright (c) 2008 Gleb Natapov
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
27 #include "sysemu/sysemu.h"
28 #include "sysemu/dma.h"
29 #include "hw/boards.h"
30 #include "hw/nvram/fw_cfg.h"
31 #include "hw/sysbus.h"
33 #include "qemu/error-report.h"
34 #include "qemu/option.h"
35 #include "qemu/config-file.h"
36 #include "qemu/cutils.h"
37 #include "qapi/error.h"
39 #define FW_CFG_FILE_SLOTS_DFLT 0x20
41 /* FW_CFG_VERSION bits */
42 #define FW_CFG_VERSION 0x01
43 #define FW_CFG_VERSION_DMA 0x02
45 /* FW_CFG_DMA_CONTROL bits */
46 #define FW_CFG_DMA_CTL_ERROR 0x01
47 #define FW_CFG_DMA_CTL_READ 0x02
48 #define FW_CFG_DMA_CTL_SKIP 0x04
49 #define FW_CFG_DMA_CTL_SELECT 0x08
50 #define FW_CFG_DMA_CTL_WRITE 0x10
52 #define FW_CFG_DMA_SIGNATURE 0x51454d5520434647ULL /* "QEMU CFG" */
58 void *callback_opaque
;
59 FWCfgCallback select_cb
;
60 FWCfgWriteCallback write_cb
;
66 * @key: The uint16 selector key.
68 * Returns: The stringified name if the selector refers to a well-known
69 * numerically defined item, or NULL on key lookup failure.
71 static const char *key_name(uint16_t key
)
73 static const char *fw_cfg_wellknown_keys
[FW_CFG_FILE_FIRST
] = {
74 [FW_CFG_SIGNATURE
] = "signature",
76 [FW_CFG_UUID
] = "uuid",
77 [FW_CFG_RAM_SIZE
] = "ram_size",
78 [FW_CFG_NOGRAPHIC
] = "nographic",
79 [FW_CFG_NB_CPUS
] = "nb_cpus",
80 [FW_CFG_MACHINE_ID
] = "machine_id",
81 [FW_CFG_KERNEL_ADDR
] = "kernel_addr",
82 [FW_CFG_KERNEL_SIZE
] = "kernel_size",
83 [FW_CFG_KERNEL_CMDLINE
] = "kernel_cmdline",
84 [FW_CFG_INITRD_ADDR
] = "initrd_addr",
85 [FW_CFG_INITRD_SIZE
] = "initdr_size",
86 [FW_CFG_BOOT_DEVICE
] = "boot_device",
87 [FW_CFG_NUMA
] = "numa",
88 [FW_CFG_BOOT_MENU
] = "boot_menu",
89 [FW_CFG_MAX_CPUS
] = "max_cpus",
90 [FW_CFG_KERNEL_ENTRY
] = "kernel_entry",
91 [FW_CFG_KERNEL_DATA
] = "kernel_data",
92 [FW_CFG_INITRD_DATA
] = "initrd_data",
93 [FW_CFG_CMDLINE_ADDR
] = "cmdline_addr",
94 [FW_CFG_CMDLINE_SIZE
] = "cmdline_size",
95 [FW_CFG_CMDLINE_DATA
] = "cmdline_data",
96 [FW_CFG_SETUP_ADDR
] = "setup_addr",
97 [FW_CFG_SETUP_SIZE
] = "setup_size",
98 [FW_CFG_SETUP_DATA
] = "setup_data",
99 [FW_CFG_FILE_DIR
] = "file_dir",
102 if (key
& FW_CFG_ARCH_LOCAL
) {
105 if (key
< FW_CFG_FILE_FIRST
) {
106 return fw_cfg_wellknown_keys
[key
];
112 static inline const char *trace_key_name(uint16_t key
)
114 const char *name
= key_name(key
);
116 return name
? name
: "unknown";
122 static char *read_splashfile(char *filename
, gsize
*file_sizep
,
128 unsigned int filehead
;
131 if (!g_file_get_contents(filename
, &content
, file_sizep
, &err
)) {
132 error_report("failed to read splash file '%s': %s",
133 filename
, err
->message
);
138 /* check file size */
139 if (*file_sizep
< 30) {
144 filehead
= lduw_le_p(content
);
145 if (filehead
== 0xd8ff) {
146 file_type
= JPG_FILE
;
147 } else if (filehead
== 0x4d42) {
148 file_type
= BMP_FILE
;
154 if (file_type
== BMP_FILE
) {
155 bmp_bpp
= lduw_le_p(&content
[28]);
162 *file_typep
= file_type
;
167 error_report("splash file '%s' format not recognized; must be JPEG "
168 "or 24 bit BMP", filename
);
173 static void fw_cfg_bootsplash(FWCfgState
*s
)
175 const char *boot_splash_filename
= NULL
;
176 const char *boot_splash_time
= NULL
;
177 char *filename
, *file_data
;
181 /* get user configuration */
182 QemuOptsList
*plist
= qemu_find_opts("boot-opts");
183 QemuOpts
*opts
= QTAILQ_FIRST(&plist
->head
);
184 boot_splash_filename
= qemu_opt_get(opts
, "splash");
185 boot_splash_time
= qemu_opt_get(opts
, "splash-time");
187 /* insert splash time if user configurated */
188 if (boot_splash_time
) {
189 int64_t bst_val
= qemu_opt_get_number(opts
, "splash-time", -1);
192 /* validate the input */
193 if (bst_val
< 0 || bst_val
> 0xffff) {
194 error_report("splash-time is invalid,"
195 "it should be a value between 0 and 65535");
198 /* use little endian format */
199 bst_le16
= cpu_to_le16(bst_val
);
200 fw_cfg_add_file(s
, "etc/boot-menu-wait",
201 g_memdup(&bst_le16
, sizeof bst_le16
), sizeof bst_le16
);
204 /* insert splash file if user configurated */
205 if (boot_splash_filename
) {
206 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, boot_splash_filename
);
207 if (filename
== NULL
) {
208 error_report("failed to find file '%s'", boot_splash_filename
);
212 /* loading file data */
213 file_data
= read_splashfile(filename
, &file_size
, &file_type
);
214 if (file_data
== NULL
) {
218 g_free(boot_splash_filedata
);
219 boot_splash_filedata
= (uint8_t *)file_data
;
222 if (file_type
== JPG_FILE
) {
223 fw_cfg_add_file(s
, "bootsplash.jpg",
224 boot_splash_filedata
, file_size
);
226 fw_cfg_add_file(s
, "bootsplash.bmp",
227 boot_splash_filedata
, file_size
);
233 static void fw_cfg_reboot(FWCfgState
*s
)
235 const char *reboot_timeout
= NULL
;
238 /* get user configuration */
239 QemuOptsList
*plist
= qemu_find_opts("boot-opts");
240 QemuOpts
*opts
= QTAILQ_FIRST(&plist
->head
);
241 reboot_timeout
= qemu_opt_get(opts
, "reboot-timeout");
243 if (reboot_timeout
) {
244 rt_val
= qemu_opt_get_number(opts
, "reboot-timeout", -1);
245 /* validate the input */
246 if (rt_val
< 0 || rt_val
> 0xffff) {
247 error_report("reboot timeout is invalid,"
248 "it should be a value between 0 and 65535");
253 fw_cfg_add_file(s
, "etc/boot-fail-wait", g_memdup(&rt_val
, 4), 4);
256 static void fw_cfg_write(FWCfgState
*s
, uint8_t value
)
258 /* nothing, write support removed in QEMU v2.4+ */
261 static inline uint16_t fw_cfg_file_slots(const FWCfgState
*s
)
263 return s
->file_slots
;
266 /* Note: this function returns an exclusive limit. */
267 static inline uint32_t fw_cfg_max_entry(const FWCfgState
*s
)
269 return FW_CFG_FILE_FIRST
+ fw_cfg_file_slots(s
);
272 static int fw_cfg_select(FWCfgState
*s
, uint16_t key
)
278 if ((key
& FW_CFG_ENTRY_MASK
) >= fw_cfg_max_entry(s
)) {
279 s
->cur_entry
= FW_CFG_INVALID
;
284 /* entry successfully selected, now run callback if present */
285 arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
286 e
= &s
->entries
[arch
][key
& FW_CFG_ENTRY_MASK
];
288 e
->select_cb(e
->callback_opaque
);
292 trace_fw_cfg_select(s
, key
, trace_key_name(key
), ret
);
296 static uint64_t fw_cfg_data_read(void *opaque
, hwaddr addr
, unsigned size
)
298 FWCfgState
*s
= opaque
;
299 int arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
300 FWCfgEntry
*e
= (s
->cur_entry
== FW_CFG_INVALID
) ? NULL
:
301 &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
304 assert(size
> 0 && size
<= sizeof(value
));
305 if (s
->cur_entry
!= FW_CFG_INVALID
&& e
->data
&& s
->cur_offset
< e
->len
) {
306 /* The least significant 'size' bytes of the return value are
307 * expected to contain a string preserving portion of the item
308 * data, padded with zeros on the right in case we run out early.
309 * In technical terms, we're composing the host-endian representation
310 * of the big endian interpretation of the fw_cfg string.
313 value
= (value
<< 8) | e
->data
[s
->cur_offset
++];
314 } while (--size
&& s
->cur_offset
< e
->len
);
315 /* If size is still not zero, we *did* run out early, so continue
316 * left-shifting, to add the appropriate number of padding zeros
322 trace_fw_cfg_read(s
, value
);
326 static void fw_cfg_data_mem_write(void *opaque
, hwaddr addr
,
327 uint64_t value
, unsigned size
)
329 FWCfgState
*s
= opaque
;
333 fw_cfg_write(s
, value
>> (8 * --i
));
337 static void fw_cfg_dma_transfer(FWCfgState
*s
)
343 int read
= 0, write
= 0;
346 /* Reset the address before the next access */
347 dma_addr
= s
->dma_addr
;
350 if (dma_memory_read(s
->dma_as
, dma_addr
, &dma
, sizeof(dma
))) {
351 stl_be_dma(s
->dma_as
, dma_addr
+ offsetof(FWCfgDmaAccess
, control
),
352 FW_CFG_DMA_CTL_ERROR
);
356 dma
.address
= be64_to_cpu(dma
.address
);
357 dma
.length
= be32_to_cpu(dma
.length
);
358 dma
.control
= be32_to_cpu(dma
.control
);
360 if (dma
.control
& FW_CFG_DMA_CTL_SELECT
) {
361 fw_cfg_select(s
, dma
.control
>> 16);
364 arch
= !!(s
->cur_entry
& FW_CFG_ARCH_LOCAL
);
365 e
= (s
->cur_entry
== FW_CFG_INVALID
) ? NULL
:
366 &s
->entries
[arch
][s
->cur_entry
& FW_CFG_ENTRY_MASK
];
368 if (dma
.control
& FW_CFG_DMA_CTL_READ
) {
371 } else if (dma
.control
& FW_CFG_DMA_CTL_WRITE
) {
374 } else if (dma
.control
& FW_CFG_DMA_CTL_SKIP
) {
383 while (dma
.length
> 0 && !(dma
.control
& FW_CFG_DMA_CTL_ERROR
)) {
384 if (s
->cur_entry
== FW_CFG_INVALID
|| !e
->data
||
385 s
->cur_offset
>= e
->len
) {
388 /* If the access is not a read access, it will be a skip access,
392 if (dma_memory_set(s
->dma_as
, dma
.address
, 0, len
)) {
393 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
397 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
400 if (dma
.length
<= (e
->len
- s
->cur_offset
)) {
403 len
= (e
->len
- s
->cur_offset
);
406 /* If the access is not a read access, it will be a skip access,
410 if (dma_memory_write(s
->dma_as
, dma
.address
,
411 &e
->data
[s
->cur_offset
], len
)) {
412 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
416 if (!e
->allow_write
||
418 dma_memory_read(s
->dma_as
, dma
.address
,
419 &e
->data
[s
->cur_offset
], len
)) {
420 dma
.control
|= FW_CFG_DMA_CTL_ERROR
;
421 } else if (e
->write_cb
) {
422 e
->write_cb(e
->callback_opaque
, s
->cur_offset
, len
);
426 s
->cur_offset
+= len
;
434 stl_be_dma(s
->dma_as
, dma_addr
+ offsetof(FWCfgDmaAccess
, control
),
437 trace_fw_cfg_read(s
, 0);
440 static uint64_t fw_cfg_dma_mem_read(void *opaque
, hwaddr addr
,
443 /* Return a signature value (and handle various read sizes) */
444 return extract64(FW_CFG_DMA_SIGNATURE
, (8 - addr
- size
) * 8, size
* 8);
447 static void fw_cfg_dma_mem_write(void *opaque
, hwaddr addr
,
448 uint64_t value
, unsigned size
)
450 FWCfgState
*s
= opaque
;
454 /* FWCfgDmaAccess high address */
455 s
->dma_addr
= value
<< 32;
456 } else if (addr
== 4) {
457 /* FWCfgDmaAccess low address */
458 s
->dma_addr
|= value
;
459 fw_cfg_dma_transfer(s
);
461 } else if (size
== 8 && addr
== 0) {
463 fw_cfg_dma_transfer(s
);
467 static bool fw_cfg_dma_mem_valid(void *opaque
, hwaddr addr
,
468 unsigned size
, bool is_write
,
471 return !is_write
|| ((size
== 4 && (addr
== 0 || addr
== 4)) ||
472 (size
== 8 && addr
== 0));
475 static bool fw_cfg_data_mem_valid(void *opaque
, hwaddr addr
,
476 unsigned size
, bool is_write
,
482 static uint64_t fw_cfg_ctl_mem_read(void *opaque
, hwaddr addr
, unsigned size
)
487 static void fw_cfg_ctl_mem_write(void *opaque
, hwaddr addr
,
488 uint64_t value
, unsigned size
)
490 fw_cfg_select(opaque
, (uint16_t)value
);
493 static bool fw_cfg_ctl_mem_valid(void *opaque
, hwaddr addr
,
494 unsigned size
, bool is_write
,
497 return is_write
&& size
== 2;
500 static void fw_cfg_comb_write(void *opaque
, hwaddr addr
,
501 uint64_t value
, unsigned size
)
505 fw_cfg_write(opaque
, (uint8_t)value
);
508 fw_cfg_select(opaque
, (uint16_t)value
);
513 static bool fw_cfg_comb_valid(void *opaque
, hwaddr addr
,
514 unsigned size
, bool is_write
,
517 return (size
== 1) || (is_write
&& size
== 2);
520 static const MemoryRegionOps fw_cfg_ctl_mem_ops
= {
521 .read
= fw_cfg_ctl_mem_read
,
522 .write
= fw_cfg_ctl_mem_write
,
523 .endianness
= DEVICE_BIG_ENDIAN
,
524 .valid
.accepts
= fw_cfg_ctl_mem_valid
,
527 static const MemoryRegionOps fw_cfg_data_mem_ops
= {
528 .read
= fw_cfg_data_read
,
529 .write
= fw_cfg_data_mem_write
,
530 .endianness
= DEVICE_BIG_ENDIAN
,
532 .min_access_size
= 1,
533 .max_access_size
= 1,
534 .accepts
= fw_cfg_data_mem_valid
,
538 static const MemoryRegionOps fw_cfg_comb_mem_ops
= {
539 .read
= fw_cfg_data_read
,
540 .write
= fw_cfg_comb_write
,
541 .endianness
= DEVICE_LITTLE_ENDIAN
,
542 .valid
.accepts
= fw_cfg_comb_valid
,
545 static const MemoryRegionOps fw_cfg_dma_mem_ops
= {
546 .read
= fw_cfg_dma_mem_read
,
547 .write
= fw_cfg_dma_mem_write
,
548 .endianness
= DEVICE_BIG_ENDIAN
,
549 .valid
.accepts
= fw_cfg_dma_mem_valid
,
550 .valid
.max_access_size
= 8,
551 .impl
.max_access_size
= 8,
554 static void fw_cfg_reset(DeviceState
*d
)
556 FWCfgState
*s
= FW_CFG(d
);
558 /* we never register a read callback for FW_CFG_SIGNATURE */
559 fw_cfg_select(s
, FW_CFG_SIGNATURE
);
562 /* Save restore 32 bit int as uint16_t
563 This is a Big hack, but it is how the old state did it.
564 Or we broke compatibility in the state, or we can't use struct tm
567 static int get_uint32_as_uint16(QEMUFile
*f
, void *pv
, size_t size
,
568 const VMStateField
*field
)
571 *v
= qemu_get_be16(f
);
575 static int put_unused(QEMUFile
*f
, void *pv
, size_t size
,
576 const VMStateField
*field
, QJSON
*vmdesc
)
578 fprintf(stderr
, "uint32_as_uint16 is only used for backward compatibility.\n");
579 fprintf(stderr
, "This functions shouldn't be called.\n");
584 static const VMStateInfo vmstate_hack_uint32_as_uint16
= {
585 .name
= "int32_as_uint16",
586 .get
= get_uint32_as_uint16
,
590 #define VMSTATE_UINT16_HACK(_f, _s, _t) \
591 VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint32_as_uint16, uint32_t)
594 static bool is_version_1(void *opaque
, int version_id
)
596 return version_id
== 1;
599 bool fw_cfg_dma_enabled(void *opaque
)
601 FWCfgState
*s
= opaque
;
603 return s
->dma_enabled
;
606 static const VMStateDescription vmstate_fw_cfg_dma
= {
607 .name
= "fw_cfg/dma",
608 .needed
= fw_cfg_dma_enabled
,
609 .fields
= (VMStateField
[]) {
610 VMSTATE_UINT64(dma_addr
, FWCfgState
),
611 VMSTATE_END_OF_LIST()
615 static const VMStateDescription vmstate_fw_cfg
= {
618 .minimum_version_id
= 1,
619 .fields
= (VMStateField
[]) {
620 VMSTATE_UINT16(cur_entry
, FWCfgState
),
621 VMSTATE_UINT16_HACK(cur_offset
, FWCfgState
, is_version_1
),
622 VMSTATE_UINT32_V(cur_offset
, FWCfgState
, 2),
623 VMSTATE_END_OF_LIST()
625 .subsections
= (const VMStateDescription
*[]) {
631 static void fw_cfg_add_bytes_callback(FWCfgState
*s
, uint16_t key
,
632 FWCfgCallback select_cb
,
633 FWCfgWriteCallback write_cb
,
634 void *callback_opaque
,
635 void *data
, size_t len
,
638 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
640 key
&= FW_CFG_ENTRY_MASK
;
642 assert(key
< fw_cfg_max_entry(s
) && len
< UINT32_MAX
);
643 assert(s
->entries
[arch
][key
].data
== NULL
); /* avoid key conflict */
645 s
->entries
[arch
][key
].data
= data
;
646 s
->entries
[arch
][key
].len
= (uint32_t)len
;
647 s
->entries
[arch
][key
].select_cb
= select_cb
;
648 s
->entries
[arch
][key
].write_cb
= write_cb
;
649 s
->entries
[arch
][key
].callback_opaque
= callback_opaque
;
650 s
->entries
[arch
][key
].allow_write
= !read_only
;
653 static void *fw_cfg_modify_bytes_read(FWCfgState
*s
, uint16_t key
,
654 void *data
, size_t len
)
657 int arch
= !!(key
& FW_CFG_ARCH_LOCAL
);
659 key
&= FW_CFG_ENTRY_MASK
;
661 assert(key
< fw_cfg_max_entry(s
) && len
< UINT32_MAX
);
663 /* return the old data to the function caller, avoid memory leak */
664 ptr
= s
->entries
[arch
][key
].data
;
665 s
->entries
[arch
][key
].data
= data
;
666 s
->entries
[arch
][key
].len
= len
;
667 s
->entries
[arch
][key
].callback_opaque
= NULL
;
668 s
->entries
[arch
][key
].allow_write
= false;
673 void fw_cfg_add_bytes(FWCfgState
*s
, uint16_t key
, void *data
, size_t len
)
675 trace_fw_cfg_add_bytes(key
, trace_key_name(key
), len
);
676 fw_cfg_add_bytes_callback(s
, key
, NULL
, NULL
, NULL
, data
, len
, true);
679 void fw_cfg_add_string(FWCfgState
*s
, uint16_t key
, const char *value
)
681 size_t sz
= strlen(value
) + 1;
683 trace_fw_cfg_add_string(key
, trace_key_name(key
), value
);
684 fw_cfg_add_bytes(s
, key
, g_memdup(value
, sz
), sz
);
687 void fw_cfg_add_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
691 copy
= g_malloc(sizeof(value
));
692 *copy
= cpu_to_le16(value
);
693 trace_fw_cfg_add_i16(key
, trace_key_name(key
), value
);
694 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
697 void fw_cfg_modify_i16(FWCfgState
*s
, uint16_t key
, uint16_t value
)
699 uint16_t *copy
, *old
;
701 copy
= g_malloc(sizeof(value
));
702 *copy
= cpu_to_le16(value
);
703 old
= fw_cfg_modify_bytes_read(s
, key
, copy
, sizeof(value
));
707 void fw_cfg_add_i32(FWCfgState
*s
, uint16_t key
, uint32_t value
)
711 copy
= g_malloc(sizeof(value
));
712 *copy
= cpu_to_le32(value
);
713 trace_fw_cfg_add_i32(key
, trace_key_name(key
), value
);
714 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
717 void fw_cfg_add_i64(FWCfgState
*s
, uint16_t key
, uint64_t value
)
721 copy
= g_malloc(sizeof(value
));
722 *copy
= cpu_to_le64(value
);
723 trace_fw_cfg_add_i64(key
, trace_key_name(key
), value
);
724 fw_cfg_add_bytes(s
, key
, copy
, sizeof(value
));
727 void fw_cfg_set_order_override(FWCfgState
*s
, int order
)
729 assert(s
->fw_cfg_order_override
== 0);
730 s
->fw_cfg_order_override
= order
;
733 void fw_cfg_reset_order_override(FWCfgState
*s
)
735 assert(s
->fw_cfg_order_override
!= 0);
736 s
->fw_cfg_order_override
= 0;
740 * This is the legacy order list. For legacy systems, files are in
741 * the fw_cfg in the order defined below, by the "order" value. Note
742 * that some entries (VGA ROMs, NIC option ROMS, etc.) go into a
743 * specific area, but there may be more than one and they occur in the
744 * order that the user specifies them on the command line. Those are
745 * handled in a special manner, using the order override above.
747 * For non-legacy, the files are sorted by filename to avoid this kind
748 * of complexity in the future.
750 * This is only for x86, other arches don't implement versioning so
751 * they won't set legacy mode.
757 { "etc/boot-menu-wait", 10 },
758 { "bootsplash.jpg", 11 },
759 { "bootsplash.bmp", 12 },
760 { "etc/boot-fail-wait", 15 },
761 { "etc/smbios/smbios-tables", 20 },
762 { "etc/smbios/smbios-anchor", 30 },
764 { "etc/reserved-memory-end", 50 },
765 { "genroms/kvmvapic.bin", 55 },
766 { "genroms/linuxboot.bin", 60 },
767 { }, /* VGA ROMs from pc_vga_init come here, 70. */
768 { }, /* NIC option ROMs from pc_nic_init come here, 80. */
769 { "etc/system-states", 90 },
770 { }, /* User ROMs come here, 100. */
771 { }, /* Device FW comes here, 110. */
772 { "etc/extra-pci-roots", 120 },
773 { "etc/acpi/tables", 130 },
774 { "etc/table-loader", 140 },
775 { "etc/tpm/log", 150 },
776 { "etc/acpi/rsdp", 160 },
777 { "bootorder", 170 },
779 #define FW_CFG_ORDER_OVERRIDE_LAST 200
782 static int get_fw_cfg_order(FWCfgState
*s
, const char *name
)
786 if (s
->fw_cfg_order_override
> 0) {
787 return s
->fw_cfg_order_override
;
790 for (i
= 0; i
< ARRAY_SIZE(fw_cfg_order
); i
++) {
791 if (fw_cfg_order
[i
].name
== NULL
) {
795 if (strcmp(name
, fw_cfg_order
[i
].name
) == 0) {
796 return fw_cfg_order
[i
].order
;
800 /* Stick unknown stuff at the end. */
801 warn_report("Unknown firmware file in legacy mode: %s", name
);
802 return FW_CFG_ORDER_OVERRIDE_LAST
;
805 void fw_cfg_add_file_callback(FWCfgState
*s
, const char *filename
,
806 FWCfgCallback select_cb
,
807 FWCfgWriteCallback write_cb
,
808 void *callback_opaque
,
809 void *data
, size_t len
, bool read_only
)
813 MachineClass
*mc
= MACHINE_GET_CLASS(qdev_get_machine());
817 dsize
= sizeof(uint32_t) + sizeof(FWCfgFile
) * fw_cfg_file_slots(s
);
818 s
->files
= g_malloc0(dsize
);
819 fw_cfg_add_bytes(s
, FW_CFG_FILE_DIR
, s
->files
, dsize
);
822 count
= be32_to_cpu(s
->files
->count
);
823 assert(count
< fw_cfg_file_slots(s
));
825 /* Find the insertion point. */
826 if (mc
->legacy_fw_cfg_order
) {
828 * Sort by order. For files with the same order, we keep them
829 * in the sequence in which they were added.
831 order
= get_fw_cfg_order(s
, filename
);
833 index
> 0 && order
< s
->entry_order
[index
- 1];
836 /* Sort by file name. */
838 index
> 0 && strcmp(filename
, s
->files
->f
[index
- 1].name
) < 0;
843 * Move all the entries from the index point and after down one
844 * to create a slot for the new entry. Because calculations are
845 * being done with the index, make it so that "i" is the current
846 * index and "i - 1" is the one being copied from, thus the
847 * unusual start and end in the for statement.
849 for (i
= count
; i
> index
; i
--) {
850 s
->files
->f
[i
] = s
->files
->f
[i
- 1];
851 s
->files
->f
[i
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ i
);
852 s
->entries
[0][FW_CFG_FILE_FIRST
+ i
] =
853 s
->entries
[0][FW_CFG_FILE_FIRST
+ i
- 1];
854 s
->entry_order
[i
] = s
->entry_order
[i
- 1];
857 memset(&s
->files
->f
[index
], 0, sizeof(FWCfgFile
));
858 memset(&s
->entries
[0][FW_CFG_FILE_FIRST
+ index
], 0, sizeof(FWCfgEntry
));
860 pstrcpy(s
->files
->f
[index
].name
, sizeof(s
->files
->f
[index
].name
), filename
);
861 for (i
= 0; i
<= count
; i
++) {
863 strcmp(s
->files
->f
[index
].name
, s
->files
->f
[i
].name
) == 0) {
864 error_report("duplicate fw_cfg file name: %s",
865 s
->files
->f
[index
].name
);
870 fw_cfg_add_bytes_callback(s
, FW_CFG_FILE_FIRST
+ index
,
872 callback_opaque
, data
, len
,
875 s
->files
->f
[index
].size
= cpu_to_be32(len
);
876 s
->files
->f
[index
].select
= cpu_to_be16(FW_CFG_FILE_FIRST
+ index
);
877 s
->entry_order
[index
] = order
;
878 trace_fw_cfg_add_file(s
, index
, s
->files
->f
[index
].name
, len
);
880 s
->files
->count
= cpu_to_be32(count
+1);
883 void fw_cfg_add_file(FWCfgState
*s
, const char *filename
,
884 void *data
, size_t len
)
886 fw_cfg_add_file_callback(s
, filename
, NULL
, NULL
, NULL
, data
, len
, true);
889 void *fw_cfg_modify_file(FWCfgState
*s
, const char *filename
,
890 void *data
, size_t len
)
897 index
= be32_to_cpu(s
->files
->count
);
899 for (i
= 0; i
< index
; i
++) {
900 if (strcmp(filename
, s
->files
->f
[i
].name
) == 0) {
901 ptr
= fw_cfg_modify_bytes_read(s
, FW_CFG_FILE_FIRST
+ i
,
903 s
->files
->f
[i
].size
= cpu_to_be32(len
);
908 assert(index
< fw_cfg_file_slots(s
));
911 fw_cfg_add_file_callback(s
, filename
, NULL
, NULL
, NULL
, data
, len
, true);
915 static void fw_cfg_machine_reset(void *opaque
)
919 FWCfgState
*s
= opaque
;
920 char *bootindex
= get_boot_devices_list(&len
);
922 ptr
= fw_cfg_modify_file(s
, "bootorder", (uint8_t *)bootindex
, len
);
926 static void fw_cfg_machine_ready(struct Notifier
*n
, void *data
)
928 FWCfgState
*s
= container_of(n
, FWCfgState
, machine_ready
);
929 qemu_register_reset(fw_cfg_machine_reset
, s
);
934 static void fw_cfg_common_realize(DeviceState
*dev
, Error
**errp
)
936 FWCfgState
*s
= FW_CFG(dev
);
937 MachineState
*machine
= MACHINE(qdev_get_machine());
938 uint32_t version
= FW_CFG_VERSION
;
940 if (!fw_cfg_find()) {
941 error_setg(errp
, "at most one %s device is permitted", TYPE_FW_CFG
);
945 fw_cfg_add_bytes(s
, FW_CFG_SIGNATURE
, (char *)"QEMU", 4);
946 fw_cfg_add_bytes(s
, FW_CFG_UUID
, &qemu_uuid
, 16);
947 fw_cfg_add_i16(s
, FW_CFG_NOGRAPHIC
, (uint16_t)!machine
->enable_graphics
);
948 fw_cfg_add_i16(s
, FW_CFG_BOOT_MENU
, (uint16_t)boot_menu
);
949 fw_cfg_bootsplash(s
);
952 if (s
->dma_enabled
) {
953 version
|= FW_CFG_VERSION_DMA
;
956 fw_cfg_add_i32(s
, FW_CFG_ID
, version
);
958 s
->machine_ready
.notify
= fw_cfg_machine_ready
;
959 qemu_add_machine_init_done_notifier(&s
->machine_ready
);
962 FWCfgState
*fw_cfg_init_io_dma(uint32_t iobase
, uint32_t dma_iobase
,
963 AddressSpace
*dma_as
)
969 bool dma_requested
= dma_iobase
&& dma_as
;
971 dev
= qdev_create(NULL
, TYPE_FW_CFG_IO
);
972 if (!dma_requested
) {
973 qdev_prop_set_bit(dev
, "dma_enabled", false);
976 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
978 qdev_init_nofail(dev
);
980 sbd
= SYS_BUS_DEVICE(dev
);
981 ios
= FW_CFG_IO(dev
);
982 sysbus_add_io(sbd
, iobase
, &ios
->comb_iomem
);
986 if (s
->dma_enabled
) {
987 /* 64 bits for the address field */
990 sysbus_add_io(sbd
, dma_iobase
, &s
->dma_iomem
);
996 FWCfgState
*fw_cfg_init_io(uint32_t iobase
)
998 return fw_cfg_init_io_dma(iobase
, 0, NULL
);
1001 FWCfgState
*fw_cfg_init_mem_wide(hwaddr ctl_addr
,
1002 hwaddr data_addr
, uint32_t data_width
,
1003 hwaddr dma_addr
, AddressSpace
*dma_as
)
1008 bool dma_requested
= dma_addr
&& dma_as
;
1010 dev
= qdev_create(NULL
, TYPE_FW_CFG_MEM
);
1011 qdev_prop_set_uint32(dev
, "data_width", data_width
);
1012 if (!dma_requested
) {
1013 qdev_prop_set_bit(dev
, "dma_enabled", false);
1016 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG
,
1018 qdev_init_nofail(dev
);
1020 sbd
= SYS_BUS_DEVICE(dev
);
1021 sysbus_mmio_map(sbd
, 0, ctl_addr
);
1022 sysbus_mmio_map(sbd
, 1, data_addr
);
1026 if (s
->dma_enabled
) {
1029 sysbus_mmio_map(sbd
, 2, dma_addr
);
1035 FWCfgState
*fw_cfg_init_mem(hwaddr ctl_addr
, hwaddr data_addr
)
1037 return fw_cfg_init_mem_wide(ctl_addr
, data_addr
,
1038 fw_cfg_data_mem_ops
.valid
.max_access_size
,
1043 FWCfgState
*fw_cfg_find(void)
1045 /* Returns NULL unless there is exactly one fw_cfg device */
1046 return FW_CFG(object_resolve_path_type("", TYPE_FW_CFG
, NULL
));
1050 static void fw_cfg_class_init(ObjectClass
*klass
, void *data
)
1052 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1054 dc
->reset
= fw_cfg_reset
;
1055 dc
->vmsd
= &vmstate_fw_cfg
;
1058 static const TypeInfo fw_cfg_info
= {
1059 .name
= TYPE_FW_CFG
,
1060 .parent
= TYPE_SYS_BUS_DEVICE
,
1062 .instance_size
= sizeof(FWCfgState
),
1063 .class_init
= fw_cfg_class_init
,
1066 static void fw_cfg_file_slots_allocate(FWCfgState
*s
, Error
**errp
)
1068 uint16_t file_slots_max
;
1070 if (fw_cfg_file_slots(s
) < FW_CFG_FILE_SLOTS_MIN
) {
1071 error_setg(errp
, "\"file_slots\" must be at least 0x%x",
1072 FW_CFG_FILE_SLOTS_MIN
);
1076 /* (UINT16_MAX & FW_CFG_ENTRY_MASK) is the highest inclusive selector value
1077 * that we permit. The actual (exclusive) value coming from the
1078 * configuration is (FW_CFG_FILE_FIRST + fw_cfg_file_slots(s)). */
1079 file_slots_max
= (UINT16_MAX
& FW_CFG_ENTRY_MASK
) - FW_CFG_FILE_FIRST
+ 1;
1080 if (fw_cfg_file_slots(s
) > file_slots_max
) {
1081 error_setg(errp
, "\"file_slots\" must not exceed 0x%" PRIx16
,
1086 s
->entries
[0] = g_new0(FWCfgEntry
, fw_cfg_max_entry(s
));
1087 s
->entries
[1] = g_new0(FWCfgEntry
, fw_cfg_max_entry(s
));
1088 s
->entry_order
= g_new0(int, fw_cfg_max_entry(s
));
1091 static Property fw_cfg_io_properties
[] = {
1092 DEFINE_PROP_BOOL("dma_enabled", FWCfgIoState
, parent_obj
.dma_enabled
,
1094 DEFINE_PROP_UINT16("x-file-slots", FWCfgIoState
, parent_obj
.file_slots
,
1095 FW_CFG_FILE_SLOTS_DFLT
),
1096 DEFINE_PROP_END_OF_LIST(),
1099 static void fw_cfg_io_realize(DeviceState
*dev
, Error
**errp
)
1101 FWCfgIoState
*s
= FW_CFG_IO(dev
);
1102 Error
*local_err
= NULL
;
1104 fw_cfg_file_slots_allocate(FW_CFG(s
), &local_err
);
1106 error_propagate(errp
, local_err
);
1110 /* when using port i/o, the 8-bit data register ALWAYS overlaps
1111 * with half of the 16-bit control register. Hence, the total size
1112 * of the i/o region used is FW_CFG_CTL_SIZE */
1113 memory_region_init_io(&s
->comb_iomem
, OBJECT(s
), &fw_cfg_comb_mem_ops
,
1114 FW_CFG(s
), "fwcfg", FW_CFG_CTL_SIZE
);
1116 if (FW_CFG(s
)->dma_enabled
) {
1117 memory_region_init_io(&FW_CFG(s
)->dma_iomem
, OBJECT(s
),
1118 &fw_cfg_dma_mem_ops
, FW_CFG(s
), "fwcfg.dma",
1119 sizeof(dma_addr_t
));
1122 fw_cfg_common_realize(dev
, errp
);
1125 static void fw_cfg_io_class_init(ObjectClass
*klass
, void *data
)
1127 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1129 dc
->realize
= fw_cfg_io_realize
;
1130 dc
->props
= fw_cfg_io_properties
;
1133 static const TypeInfo fw_cfg_io_info
= {
1134 .name
= TYPE_FW_CFG_IO
,
1135 .parent
= TYPE_FW_CFG
,
1136 .instance_size
= sizeof(FWCfgIoState
),
1137 .class_init
= fw_cfg_io_class_init
,
1141 static Property fw_cfg_mem_properties
[] = {
1142 DEFINE_PROP_UINT32("data_width", FWCfgMemState
, data_width
, -1),
1143 DEFINE_PROP_BOOL("dma_enabled", FWCfgMemState
, parent_obj
.dma_enabled
,
1145 DEFINE_PROP_UINT16("x-file-slots", FWCfgMemState
, parent_obj
.file_slots
,
1146 FW_CFG_FILE_SLOTS_DFLT
),
1147 DEFINE_PROP_END_OF_LIST(),
1150 static void fw_cfg_mem_realize(DeviceState
*dev
, Error
**errp
)
1152 FWCfgMemState
*s
= FW_CFG_MEM(dev
);
1153 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
1154 const MemoryRegionOps
*data_ops
= &fw_cfg_data_mem_ops
;
1155 Error
*local_err
= NULL
;
1157 fw_cfg_file_slots_allocate(FW_CFG(s
), &local_err
);
1159 error_propagate(errp
, local_err
);
1163 memory_region_init_io(&s
->ctl_iomem
, OBJECT(s
), &fw_cfg_ctl_mem_ops
,
1164 FW_CFG(s
), "fwcfg.ctl", FW_CFG_CTL_SIZE
);
1165 sysbus_init_mmio(sbd
, &s
->ctl_iomem
);
1167 if (s
->data_width
> data_ops
->valid
.max_access_size
) {
1168 s
->wide_data_ops
= *data_ops
;
1170 s
->wide_data_ops
.valid
.max_access_size
= s
->data_width
;
1171 s
->wide_data_ops
.impl
.max_access_size
= s
->data_width
;
1172 data_ops
= &s
->wide_data_ops
;
1174 memory_region_init_io(&s
->data_iomem
, OBJECT(s
), data_ops
, FW_CFG(s
),
1175 "fwcfg.data", data_ops
->valid
.max_access_size
);
1176 sysbus_init_mmio(sbd
, &s
->data_iomem
);
1178 if (FW_CFG(s
)->dma_enabled
) {
1179 memory_region_init_io(&FW_CFG(s
)->dma_iomem
, OBJECT(s
),
1180 &fw_cfg_dma_mem_ops
, FW_CFG(s
), "fwcfg.dma",
1181 sizeof(dma_addr_t
));
1182 sysbus_init_mmio(sbd
, &FW_CFG(s
)->dma_iomem
);
1185 fw_cfg_common_realize(dev
, errp
);
1188 static void fw_cfg_mem_class_init(ObjectClass
*klass
, void *data
)
1190 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1192 dc
->realize
= fw_cfg_mem_realize
;
1193 dc
->props
= fw_cfg_mem_properties
;
1196 static const TypeInfo fw_cfg_mem_info
= {
1197 .name
= TYPE_FW_CFG_MEM
,
1198 .parent
= TYPE_FW_CFG
,
1199 .instance_size
= sizeof(FWCfgMemState
),
1200 .class_init
= fw_cfg_mem_class_init
,
1204 static void fw_cfg_register_types(void)
1206 type_register_static(&fw_cfg_info
);
1207 type_register_static(&fw_cfg_io_info
);
1208 type_register_static(&fw_cfg_mem_info
);
1211 type_init(fw_cfg_register_types
)