tests/data/qobject/qdict.txt: Avoid non-inclusive words
[qemu/kevin.git] / target / hexagon / gdbstub.c
blob54d37e006e036392c1806ae8a9eba885fb2062f4
1 /*
2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 #include "qemu/osdep.h"
19 #include "gdbstub/helpers.h"
20 #include "cpu.h"
21 #include "internal.h"
23 int hexagon_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
25 HexagonCPU *cpu = HEXAGON_CPU(cs);
26 CPUHexagonState *env = &cpu->env;
28 if (n == HEX_REG_P3_0_ALIASED) {
29 uint32_t p3_0 = 0;
30 for (int i = 0; i < NUM_PREGS; i++) {
31 p3_0 = deposit32(p3_0, i * 8, 8, env->pred[i]);
33 return gdb_get_regl(mem_buf, p3_0);
36 if (n < TOTAL_PER_THREAD_REGS) {
37 return gdb_get_regl(mem_buf, env->gpr[n]);
40 g_assert_not_reached();
43 int hexagon_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
45 HexagonCPU *cpu = HEXAGON_CPU(cs);
46 CPUHexagonState *env = &cpu->env;
48 if (n == HEX_REG_P3_0_ALIASED) {
49 uint32_t p3_0 = ldtul_p(mem_buf);
50 for (int i = 0; i < NUM_PREGS; i++) {
51 env->pred[i] = extract32(p3_0, i * 8, 8);
53 return sizeof(target_ulong);
56 if (n < TOTAL_PER_THREAD_REGS) {
57 env->gpr[n] = ldtul_p(mem_buf);
58 return sizeof(target_ulong);
61 g_assert_not_reached();
64 static int gdb_get_vreg(CPUHexagonState *env, GByteArray *mem_buf, int n)
66 int total = 0;
67 int i;
68 for (i = 0; i < ARRAY_SIZE(env->VRegs[n].uw); i++) {
69 total += gdb_get_regl(mem_buf, env->VRegs[n].uw[i]);
71 return total;
74 static int gdb_get_qreg(CPUHexagonState *env, GByteArray *mem_buf, int n)
76 int total = 0;
77 int i;
78 for (i = 0; i < ARRAY_SIZE(env->QRegs[n].uw); i++) {
79 total += gdb_get_regl(mem_buf, env->QRegs[n].uw[i]);
81 return total;
84 int hexagon_hvx_gdb_read_register(CPUHexagonState *env, GByteArray *mem_buf, int n)
86 if (n < NUM_VREGS) {
87 return gdb_get_vreg(env, mem_buf, n);
89 n -= NUM_VREGS;
91 if (n < NUM_QREGS) {
92 return gdb_get_qreg(env, mem_buf, n);
95 g_assert_not_reached();
98 static int gdb_put_vreg(CPUHexagonState *env, uint8_t *mem_buf, int n)
100 int i;
101 for (i = 0; i < ARRAY_SIZE(env->VRegs[n].uw); i++) {
102 env->VRegs[n].uw[i] = ldtul_p(mem_buf);
103 mem_buf += 4;
105 return MAX_VEC_SIZE_BYTES;
108 static int gdb_put_qreg(CPUHexagonState *env, uint8_t *mem_buf, int n)
110 int i;
111 for (i = 0; i < ARRAY_SIZE(env->QRegs[n].uw); i++) {
112 env->QRegs[n].uw[i] = ldtul_p(mem_buf);
113 mem_buf += 4;
115 return MAX_VEC_SIZE_BYTES / 8;
118 int hexagon_hvx_gdb_write_register(CPUHexagonState *env, uint8_t *mem_buf, int n)
120 if (n < NUM_VREGS) {
121 return gdb_put_vreg(env, mem_buf, n);
123 n -= NUM_VREGS;
125 if (n < NUM_QREGS) {
126 return gdb_put_qreg(env, mem_buf, n);
129 g_assert_not_reached();