2 * ARM RealView Baseboard System emulation.
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
12 #include "primecell.h"
19 #include "bitbang_i2c.h"
21 #include "exec-memory.h"
23 #define SMP_BOOT_ADDR 0xe0000000
24 #define SMP_BOOTREG_ADDR 0x10000030
29 bitbang_i2c_interface
*bitbang
;
34 static uint64_t realview_i2c_read(void *opaque
, target_phys_addr_t offset
,
37 RealViewI2CState
*s
= (RealViewI2CState
*)opaque
;
40 return (s
->out
& 1) | (s
->in
<< 1);
42 hw_error("realview_i2c_read: Bad offset 0x%x\n", (int)offset
);
47 static void realview_i2c_write(void *opaque
, target_phys_addr_t offset
,
48 uint64_t value
, unsigned size
)
50 RealViewI2CState
*s
= (RealViewI2CState
*)opaque
;
60 hw_error("realview_i2c_write: Bad offset 0x%x\n", (int)offset
);
62 bitbang_i2c_set(s
->bitbang
, BITBANG_I2C_SCL
, (s
->out
& 1) != 0);
63 s
->in
= bitbang_i2c_set(s
->bitbang
, BITBANG_I2C_SDA
, (s
->out
& 2) != 0);
66 static const MemoryRegionOps realview_i2c_ops
= {
67 .read
= realview_i2c_read
,
68 .write
= realview_i2c_write
,
69 .endianness
= DEVICE_NATIVE_ENDIAN
,
72 static int realview_i2c_init(SysBusDevice
*dev
)
74 RealViewI2CState
*s
= FROM_SYSBUS(RealViewI2CState
, dev
);
77 bus
= i2c_init_bus(&dev
->qdev
, "i2c");
78 s
->bitbang
= bitbang_i2c_init(bus
);
79 memory_region_init_io(&s
->iomem
, &realview_i2c_ops
, s
,
80 "realview-i2c", 0x1000);
81 sysbus_init_mmio(dev
, &s
->iomem
);
85 static void realview_i2c_class_init(ObjectClass
*klass
, void *data
)
87 SysBusDeviceClass
*k
= SYS_BUS_DEVICE_CLASS(klass
);
89 k
->init
= realview_i2c_init
;
92 static TypeInfo realview_i2c_info
= {
93 .name
= "realview_i2c",
94 .parent
= TYPE_SYS_BUS_DEVICE
,
95 .instance_size
= sizeof(RealViewI2CState
),
96 .class_init
= realview_i2c_class_init
,
99 static void realview_register_types(void)
101 type_register_static(&realview_i2c_info
);
106 static struct arm_boot_info realview_binfo
= {
107 .smp_loader_start
= SMP_BOOT_ADDR
,
108 .smp_bootreg_addr
= SMP_BOOTREG_ADDR
,
111 /* The following two lists must be consistent. */
112 enum realview_board_type
{
119 static const int realview_board_id
[] = {
126 static void realview_init(ram_addr_t ram_size
,
127 const char *boot_device
,
128 const char *kernel_filename
, const char *kernel_cmdline
,
129 const char *initrd_filename
, const char *cpu_model
,
130 enum realview_board_type board_type
)
132 CPUState
*env
= NULL
;
133 MemoryRegion
*sysmem
= get_system_memory();
134 MemoryRegion
*ram_lo
= g_new(MemoryRegion
, 1);
135 MemoryRegion
*ram_hi
= g_new(MemoryRegion
, 1);
136 MemoryRegion
*ram_alias
= g_new(MemoryRegion
, 1);
137 MemoryRegion
*ram_hack
= g_new(MemoryRegion
, 1);
138 DeviceState
*dev
, *sysctl
, *gpio2
, *pl041
;
139 SysBusDevice
*busdev
;
151 uint32_t proc_id
= 0;
153 ram_addr_t low_ram_size
;
155 switch (board_type
) {
158 case BOARD_EB_MPCORE
:
169 for (n
= 0; n
< smp_cpus
; n
++) {
170 env
= cpu_init(cpu_model
);
172 fprintf(stderr
, "Unable to find CPU definition\n");
175 irqp
= arm_pic_init_cpu(env
);
176 cpu_irq
[n
] = irqp
[ARM_PIC_CPU_IRQ
];
178 if (arm_feature(env
, ARM_FEATURE_V7
)) {
180 proc_id
= 0x0c000000;
182 proc_id
= 0x0e000000;
184 } else if (arm_feature(env
, ARM_FEATURE_V6K
)) {
185 proc_id
= 0x06000000;
186 } else if (arm_feature(env
, ARM_FEATURE_V6
)) {
187 proc_id
= 0x04000000;
189 proc_id
= 0x02000000;
192 if (is_pb
&& ram_size
> 0x20000000) {
194 low_ram_size
= ram_size
- 0x20000000;
195 ram_size
= 0x20000000;
196 memory_region_init_ram(ram_lo
, "realview.lowmem", low_ram_size
);
197 vmstate_register_ram_global(ram_lo
);
198 memory_region_add_subregion(sysmem
, 0x20000000, ram_lo
);
201 memory_region_init_ram(ram_hi
, "realview.highmem", ram_size
);
202 vmstate_register_ram_global(ram_hi
);
203 low_ram_size
= ram_size
;
204 if (low_ram_size
> 0x10000000)
205 low_ram_size
= 0x10000000;
206 /* SDRAM at address zero. */
207 memory_region_init_alias(ram_alias
, "realview.alias",
208 ram_hi
, 0, low_ram_size
);
209 memory_region_add_subregion(sysmem
, 0, ram_alias
);
211 /* And again at a high address. */
212 memory_region_add_subregion(sysmem
, 0x70000000, ram_hi
);
214 ram_size
= low_ram_size
;
217 sys_id
= is_pb
? 0x01780500 : 0xc1400400;
218 sysctl
= qdev_create(NULL
, "realview_sysctl");
219 qdev_prop_set_uint32(sysctl
, "sys_id", sys_id
);
220 qdev_prop_set_uint32(sysctl
, "proc_id", proc_id
);
221 qdev_init_nofail(sysctl
);
222 sysbus_mmio_map(sysbus_from_qdev(sysctl
), 0, 0x10000000);
225 target_phys_addr_t periphbase
;
226 dev
= qdev_create(NULL
, is_pb
? "a9mpcore_priv": "realview_mpcore");
227 qdev_prop_set_uint32(dev
, "num-cpu", smp_cpus
);
228 qdev_init_nofail(dev
);
229 busdev
= sysbus_from_qdev(dev
);
231 periphbase
= 0x1f000000;
233 periphbase
= 0x10100000;
235 sysbus_mmio_map(busdev
, 0, periphbase
);
236 for (n
= 0; n
< smp_cpus
; n
++) {
237 sysbus_connect_irq(busdev
, n
, cpu_irq
[n
]);
239 sysbus_create_varargs("l2x0", periphbase
+ 0x2000, NULL
);
240 /* Both A9 and 11MPCore put the GIC CPU i/f at base + 0x100 */
241 realview_binfo
.gic_cpu_if_addr
= periphbase
+ 0x100;
243 uint32_t gic_addr
= is_pb
? 0x1e000000 : 0x10040000;
244 /* For now just create the nIRQ GIC, and ignore the others. */
245 dev
= sysbus_create_simple("realview_gic", gic_addr
, cpu_irq
[0]);
247 for (n
= 0; n
< 64; n
++) {
248 pic
[n
] = qdev_get_gpio_in(dev
, n
);
251 pl041
= qdev_create(NULL
, "pl041");
252 qdev_prop_set_uint32(pl041
, "nc_fifo_depth", 512);
253 qdev_init_nofail(pl041
);
254 sysbus_mmio_map(sysbus_from_qdev(pl041
), 0, 0x10004000);
255 sysbus_connect_irq(sysbus_from_qdev(pl041
), 0, pic
[19]);
257 sysbus_create_simple("pl050_keyboard", 0x10006000, pic
[20]);
258 sysbus_create_simple("pl050_mouse", 0x10007000, pic
[21]);
260 sysbus_create_simple("pl011", 0x10009000, pic
[12]);
261 sysbus_create_simple("pl011", 0x1000a000, pic
[13]);
262 sysbus_create_simple("pl011", 0x1000b000, pic
[14]);
263 sysbus_create_simple("pl011", 0x1000c000, pic
[15]);
265 /* DMA controller is optional, apparently. */
266 sysbus_create_simple("pl081", 0x10030000, pic
[24]);
268 sysbus_create_simple("sp804", 0x10011000, pic
[4]);
269 sysbus_create_simple("sp804", 0x10012000, pic
[5]);
271 sysbus_create_simple("pl061", 0x10013000, pic
[6]);
272 sysbus_create_simple("pl061", 0x10014000, pic
[7]);
273 gpio2
= sysbus_create_simple("pl061", 0x10015000, pic
[8]);
275 sysbus_create_simple("pl111", 0x10020000, pic
[23]);
277 dev
= sysbus_create_varargs("pl181", 0x10005000, pic
[17], pic
[18], NULL
);
278 /* Wire up MMC card detect and read-only signals. These have
279 * to go to both the PL061 GPIO and the sysctl register.
280 * Note that the PL181 orders these lines (readonly,inserted)
281 * and the PL061 has them the other way about. Also the card
282 * detect line is inverted.
284 mmc_irq
[0] = qemu_irq_split(
285 qdev_get_gpio_in(sysctl
, ARM_SYSCTL_GPIO_MMC_WPROT
),
286 qdev_get_gpio_in(gpio2
, 1));
287 mmc_irq
[1] = qemu_irq_split(
288 qdev_get_gpio_in(sysctl
, ARM_SYSCTL_GPIO_MMC_CARDIN
),
289 qemu_irq_invert(qdev_get_gpio_in(gpio2
, 0)));
290 qdev_connect_gpio_out(dev
, 0, mmc_irq
[0]);
291 qdev_connect_gpio_out(dev
, 1, mmc_irq
[1]);
293 sysbus_create_simple("pl031", 0x10017000, pic
[10]);
296 dev
= qdev_create(NULL
, "realview_pci");
297 busdev
= sysbus_from_qdev(dev
);
298 qdev_init_nofail(dev
);
299 sysbus_mmio_map(busdev
, 0, 0x61000000); /* PCI self-config */
300 sysbus_mmio_map(busdev
, 1, 0x62000000); /* PCI config */
301 sysbus_mmio_map(busdev
, 2, 0x63000000); /* PCI I/O */
302 sysbus_connect_irq(busdev
, 0, pic
[48]);
303 sysbus_connect_irq(busdev
, 1, pic
[49]);
304 sysbus_connect_irq(busdev
, 2, pic
[50]);
305 sysbus_connect_irq(busdev
, 3, pic
[51]);
306 pci_bus
= (PCIBus
*)qdev_get_child_bus(dev
, "pci");
308 usb_ohci_init_pci(pci_bus
, -1);
310 n
= drive_get_max_bus(IF_SCSI
);
312 pci_create_simple(pci_bus
, -1, "lsi53c895a");
316 for(n
= 0; n
< nb_nics
; n
++) {
319 if (!done_nic
&& (!nd
->model
||
320 strcmp(nd
->model
, is_pb
? "lan9118" : "smc91c111") == 0)) {
322 lan9118_init(nd
, 0x4e000000, pic
[28]);
324 smc91c111_init(nd
, 0x4e000000, pic
[28]);
328 pci_nic_init_nofail(nd
, "rtl8139", NULL
);
332 dev
= sysbus_create_simple("realview_i2c", 0x10002000, NULL
);
333 i2c
= (i2c_bus
*)qdev_get_child_bus(dev
, "i2c");
334 i2c_create_slave(i2c
, "ds1338", 0x68);
336 /* Memory map for RealView Emulation Baseboard: */
337 /* 0x10000000 System registers. */
338 /* 0x10001000 System controller. */
339 /* 0x10002000 Two-Wire Serial Bus. */
340 /* 0x10003000 Reserved. */
341 /* 0x10004000 AACI. */
342 /* 0x10005000 MCI. */
343 /* 0x10006000 KMI0. */
344 /* 0x10007000 KMI1. */
345 /* 0x10008000 Character LCD. (EB) */
346 /* 0x10009000 UART0. */
347 /* 0x1000a000 UART1. */
348 /* 0x1000b000 UART2. */
349 /* 0x1000c000 UART3. */
350 /* 0x1000d000 SSPI. */
351 /* 0x1000e000 SCI. */
352 /* 0x1000f000 Reserved. */
353 /* 0x10010000 Watchdog. */
354 /* 0x10011000 Timer 0+1. */
355 /* 0x10012000 Timer 2+3. */
356 /* 0x10013000 GPIO 0. */
357 /* 0x10014000 GPIO 1. */
358 /* 0x10015000 GPIO 2. */
359 /* 0x10002000 Two-Wire Serial Bus - DVI. (PB) */
360 /* 0x10017000 RTC. */
361 /* 0x10018000 DMC. */
362 /* 0x10019000 PCI controller config. */
363 /* 0x10020000 CLCD. */
364 /* 0x10030000 DMA Controller. */
365 /* 0x10040000 GIC1. (EB) */
366 /* 0x10050000 GIC2. (EB) */
367 /* 0x10060000 GIC3. (EB) */
368 /* 0x10070000 GIC4. (EB) */
369 /* 0x10080000 SMC. */
370 /* 0x1e000000 GIC1. (PB) */
371 /* 0x1e001000 GIC2. (PB) */
372 /* 0x1e002000 GIC3. (PB) */
373 /* 0x1e003000 GIC4. (PB) */
374 /* 0x40000000 NOR flash. */
375 /* 0x44000000 DoC flash. */
376 /* 0x48000000 SRAM. */
377 /* 0x4c000000 Configuration flash. */
378 /* 0x4e000000 Ethernet. */
379 /* 0x4f000000 USB. */
380 /* 0x50000000 PISMO. */
381 /* 0x54000000 PISMO. */
382 /* 0x58000000 PISMO. */
383 /* 0x5c000000 PISMO. */
384 /* 0x60000000 PCI. */
385 /* 0x61000000 PCI Self Config. */
386 /* 0x62000000 PCI Config. */
387 /* 0x63000000 PCI IO. */
388 /* 0x64000000 PCI mem 0. */
389 /* 0x68000000 PCI mem 1. */
390 /* 0x6c000000 PCI mem 2. */
392 /* ??? Hack to map an additional page of ram for the secondary CPU
393 startup code. I guess this works on real hardware because the
394 BootROM happens to be in ROM/flash or in memory that isn't clobbered
395 until after Linux boots the secondary CPUs. */
396 memory_region_init_ram(ram_hack
, "realview.hack", 0x1000);
397 vmstate_register_ram_global(ram_hack
);
398 memory_region_add_subregion(sysmem
, SMP_BOOT_ADDR
, ram_hack
);
400 realview_binfo
.ram_size
= ram_size
;
401 realview_binfo
.kernel_filename
= kernel_filename
;
402 realview_binfo
.kernel_cmdline
= kernel_cmdline
;
403 realview_binfo
.initrd_filename
= initrd_filename
;
404 realview_binfo
.nb_cpus
= smp_cpus
;
405 realview_binfo
.board_id
= realview_board_id
[board_type
];
406 realview_binfo
.loader_start
= (board_type
== BOARD_PB_A8
? 0x70000000 : 0);
407 arm_load_kernel(first_cpu
, &realview_binfo
);
410 static void realview_eb_init(ram_addr_t ram_size
,
411 const char *boot_device
,
412 const char *kernel_filename
, const char *kernel_cmdline
,
413 const char *initrd_filename
, const char *cpu_model
)
416 cpu_model
= "arm926";
418 realview_init(ram_size
, boot_device
, kernel_filename
, kernel_cmdline
,
419 initrd_filename
, cpu_model
, BOARD_EB
);
422 static void realview_eb_mpcore_init(ram_addr_t ram_size
,
423 const char *boot_device
,
424 const char *kernel_filename
, const char *kernel_cmdline
,
425 const char *initrd_filename
, const char *cpu_model
)
428 cpu_model
= "arm11mpcore";
430 realview_init(ram_size
, boot_device
, kernel_filename
, kernel_cmdline
,
431 initrd_filename
, cpu_model
, BOARD_EB_MPCORE
);
434 static void realview_pb_a8_init(ram_addr_t ram_size
,
435 const char *boot_device
,
436 const char *kernel_filename
, const char *kernel_cmdline
,
437 const char *initrd_filename
, const char *cpu_model
)
440 cpu_model
= "cortex-a8";
442 realview_init(ram_size
, boot_device
, kernel_filename
, kernel_cmdline
,
443 initrd_filename
, cpu_model
, BOARD_PB_A8
);
446 static void realview_pbx_a9_init(ram_addr_t ram_size
,
447 const char *boot_device
,
448 const char *kernel_filename
, const char *kernel_cmdline
,
449 const char *initrd_filename
, const char *cpu_model
)
452 cpu_model
= "cortex-a9";
454 realview_init(ram_size
, boot_device
, kernel_filename
, kernel_cmdline
,
455 initrd_filename
, cpu_model
, BOARD_PBX_A9
);
458 static QEMUMachine realview_eb_machine
= {
459 .name
= "realview-eb",
460 .desc
= "ARM RealView Emulation Baseboard (ARM926EJ-S)",
461 .init
= realview_eb_init
,
465 static QEMUMachine realview_eb_mpcore_machine
= {
466 .name
= "realview-eb-mpcore",
467 .desc
= "ARM RealView Emulation Baseboard (ARM11MPCore)",
468 .init
= realview_eb_mpcore_init
,
473 static QEMUMachine realview_pb_a8_machine
= {
474 .name
= "realview-pb-a8",
475 .desc
= "ARM RealView Platform Baseboard for Cortex-A8",
476 .init
= realview_pb_a8_init
,
479 static QEMUMachine realview_pbx_a9_machine
= {
480 .name
= "realview-pbx-a9",
481 .desc
= "ARM RealView Platform Baseboard Explore for Cortex-A9",
482 .init
= realview_pbx_a9_init
,
487 static void realview_machine_init(void)
489 qemu_register_machine(&realview_eb_machine
);
490 qemu_register_machine(&realview_eb_mpcore_machine
);
491 qemu_register_machine(&realview_pb_a8_machine
);
492 qemu_register_machine(&realview_pbx_a9_machine
);
495 machine_init(realview_machine_init
);
496 type_init(realview_register_types
)