2 * QEMU RISCV Hart Array
4 * Copyright (c) 2017 SiFive, Inc.
6 * Holds the state of a heterogenous array of RISC-V harts
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2 or later, as published by the Free Software Foundation.
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program. If not, see <http://www.gnu.org/licenses/>.
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "qemu/module.h"
24 #include "hw/sysbus.h"
25 #include "target/riscv/cpu.h"
26 #include "hw/riscv/riscv_hart.h"
28 static Property riscv_harts_props
[] = {
29 DEFINE_PROP_UINT32("num-harts", RISCVHartArrayState
, num_harts
, 1),
30 DEFINE_PROP_STRING("cpu-type", RISCVHartArrayState
, cpu_type
),
31 DEFINE_PROP_END_OF_LIST(),
34 static void riscv_harts_cpu_reset(void *opaque
)
36 RISCVCPU
*cpu
= opaque
;
40 static void riscv_harts_realize(DeviceState
*dev
, Error
**errp
)
42 RISCVHartArrayState
*s
= RISCV_HART_ARRAY(dev
);
46 s
->harts
= g_new0(RISCVCPU
, s
->num_harts
);
48 for (n
= 0; n
< s
->num_harts
; n
++) {
49 object_initialize_child(OBJECT(s
), "harts[*]", &s
->harts
[n
],
50 sizeof(RISCVCPU
), s
->cpu_type
,
52 s
->harts
[n
].env
.mhartid
= n
;
53 qemu_register_reset(riscv_harts_cpu_reset
, &s
->harts
[n
]);
54 object_property_set_bool(OBJECT(&s
->harts
[n
]), true,
57 error_propagate(errp
, err
);
63 static void riscv_harts_class_init(ObjectClass
*klass
, void *data
)
65 DeviceClass
*dc
= DEVICE_CLASS(klass
);
67 dc
->props
= riscv_harts_props
;
68 dc
->realize
= riscv_harts_realize
;
71 static const TypeInfo riscv_harts_info
= {
72 .name
= TYPE_RISCV_HART_ARRAY
,
73 .parent
= TYPE_SYS_BUS_DEVICE
,
74 .instance_size
= sizeof(RISCVHartArrayState
),
75 .class_init
= riscv_harts_class_init
,
78 static void riscv_harts_register_types(void)
80 type_register_static(&riscv_harts_info
);
83 type_init(riscv_harts_register_types
)