2 * GPIO Controller for a lot of Freescale SoCs
4 * Copyright (C) 2014 Freescale Semiconductor, Inc. All rights reserved.
6 * Author: Alexander Graf, <agraf@suse.de>
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
22 #include "qemu/osdep.h"
23 #include "hw/sysbus.h"
24 #include "qemu/module.h"
26 #define TYPE_MPC8XXX_GPIO "mpc8xxx_gpio"
27 #define MPC8XXX_GPIO(obj) OBJECT_CHECK(MPC8XXXGPIOState, (obj), TYPE_MPC8XXX_GPIO)
29 typedef struct MPC8XXXGPIOState
{
30 SysBusDevice parent_obj
;
44 static const VMStateDescription vmstate_mpc8xxx_gpio
= {
45 .name
= "mpc8xxx_gpio",
47 .minimum_version_id
= 1,
48 .fields
= (VMStateField
[]) {
49 VMSTATE_UINT32(dir
, MPC8XXXGPIOState
),
50 VMSTATE_UINT32(odr
, MPC8XXXGPIOState
),
51 VMSTATE_UINT32(dat
, MPC8XXXGPIOState
),
52 VMSTATE_UINT32(ier
, MPC8XXXGPIOState
),
53 VMSTATE_UINT32(imr
, MPC8XXXGPIOState
),
54 VMSTATE_UINT32(icr
, MPC8XXXGPIOState
),
59 static void mpc8xxx_gpio_update(MPC8XXXGPIOState
*s
)
61 qemu_set_irq(s
->irq
, !!(s
->ier
& s
->imr
));
64 static uint64_t mpc8xxx_gpio_read(void *opaque
, hwaddr offset
,
67 MPC8XXXGPIOState
*s
= (MPC8XXXGPIOState
*)opaque
;
70 /* All registers are 32bit */
75 case 0x0: /* Direction */
77 case 0x4: /* Open Drain */
81 case 0xC: /* Interrupt Event */
83 case 0x10: /* Interrupt Mask */
85 case 0x14: /* Interrupt Control */
92 static void mpc8xxx_write_data(MPC8XXXGPIOState
*s
, uint32_t new_data
)
94 uint32_t old_data
= s
->dat
;
95 uint32_t diff
= old_data
^ new_data
;
98 for (i
= 0; i
< 32; i
++) {
99 uint32_t mask
= 0x80000000 >> i
;
100 if (!(diff
& mask
)) {
106 qemu_set_irq(s
->out
[i
], (new_data
& mask
) != 0);
113 static void mpc8xxx_gpio_write(void *opaque
, hwaddr offset
,
114 uint64_t value
, unsigned size
)
116 MPC8XXXGPIOState
*s
= (MPC8XXXGPIOState
*)opaque
;
119 /* All registers are 32bit */
124 case 0x0: /* Direction */
127 case 0x4: /* Open Drain */
131 mpc8xxx_write_data(s
, value
);
133 case 0xC: /* Interrupt Event */
136 case 0x10: /* Interrupt Mask */
139 case 0x14: /* Interrupt Control */
144 mpc8xxx_gpio_update(s
);
147 static void mpc8xxx_gpio_reset(DeviceState
*dev
)
149 MPC8XXXGPIOState
*s
= MPC8XXX_GPIO(dev
);
159 static void mpc8xxx_gpio_set_irq(void * opaque
, int irq
, int level
)
161 MPC8XXXGPIOState
*s
= (MPC8XXXGPIOState
*)opaque
;
164 mask
= 0x80000000 >> irq
;
165 if ((s
->dir
& mask
) == 0) {
166 uint32_t old_value
= s
->dat
& mask
;
172 if (!(s
->icr
& irq
) || (old_value
&& !level
)) {
176 mpc8xxx_gpio_update(s
);
180 static const MemoryRegionOps mpc8xxx_gpio_ops
= {
181 .read
= mpc8xxx_gpio_read
,
182 .write
= mpc8xxx_gpio_write
,
183 .endianness
= DEVICE_BIG_ENDIAN
,
186 static void mpc8xxx_gpio_initfn(Object
*obj
)
188 DeviceState
*dev
= DEVICE(obj
);
189 MPC8XXXGPIOState
*s
= MPC8XXX_GPIO(obj
);
190 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
192 memory_region_init_io(&s
->iomem
, obj
, &mpc8xxx_gpio_ops
,
193 s
, "mpc8xxx_gpio", 0x1000);
194 sysbus_init_mmio(sbd
, &s
->iomem
);
195 sysbus_init_irq(sbd
, &s
->irq
);
196 qdev_init_gpio_in(dev
, mpc8xxx_gpio_set_irq
, 32);
197 qdev_init_gpio_out(dev
, s
->out
, 32);
200 static void mpc8xxx_gpio_class_init(ObjectClass
*klass
, void *data
)
202 DeviceClass
*dc
= DEVICE_CLASS(klass
);
204 dc
->vmsd
= &vmstate_mpc8xxx_gpio
;
205 dc
->reset
= mpc8xxx_gpio_reset
;
208 static const TypeInfo mpc8xxx_gpio_info
= {
209 .name
= TYPE_MPC8XXX_GPIO
,
210 .parent
= TYPE_SYS_BUS_DEVICE
,
211 .instance_size
= sizeof(MPC8XXXGPIOState
),
212 .instance_init
= mpc8xxx_gpio_initfn
,
213 .class_init
= mpc8xxx_gpio_class_init
,
216 static void mpc8xxx_gpio_register_types(void)
218 type_register_static(&mpc8xxx_gpio_info
);
221 type_init(mpc8xxx_gpio_register_types
)