4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qapi/error.h"
24 #include "qemu/cutils.h"
26 #include "exec/exec-all.h"
27 #include "exec/target_page.h"
29 #include "hw/qdev-core.h"
30 #include "hw/qdev-properties.h"
31 #if !defined(CONFIG_USER_ONLY)
32 #include "hw/boards.h"
33 #include "hw/xen/xen.h"
35 #include "sysemu/kvm.h"
36 #include "sysemu/sysemu.h"
37 #include "sysemu/tcg.h"
38 #include "qemu/timer.h"
39 #include "qemu/config-file.h"
40 #include "qemu/error-report.h"
41 #include "qemu/qemu-print.h"
42 #if defined(CONFIG_USER_ONLY)
44 #else /* !CONFIG_USER_ONLY */
45 #include "exec/memory.h"
46 #include "exec/ioport.h"
47 #include "sysemu/dma.h"
48 #include "sysemu/hostmem.h"
49 #include "sysemu/hw_accel.h"
50 #include "exec/address-spaces.h"
51 #include "sysemu/xen-mapcache.h"
52 #include "trace-root.h"
54 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
55 #include <linux/falloc.h>
59 #include "qemu/rcu_queue.h"
60 #include "qemu/main-loop.h"
61 #include "translate-all.h"
62 #include "sysemu/replay.h"
64 #include "exec/memory-internal.h"
65 #include "exec/ram_addr.h"
68 #include "migration/vmstate.h"
70 #include "qemu/range.h"
72 #include "qemu/mmap-alloc.h"
75 #include "monitor/monitor.h"
77 //#define DEBUG_SUBPAGE
79 #if !defined(CONFIG_USER_ONLY)
80 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
81 * are protected by the ramlist lock.
83 RAMList ram_list
= { .blocks
= QLIST_HEAD_INITIALIZER(ram_list
.blocks
) };
85 static MemoryRegion
*system_memory
;
86 static MemoryRegion
*system_io
;
88 AddressSpace address_space_io
;
89 AddressSpace address_space_memory
;
91 static MemoryRegion io_mem_unassigned
;
94 CPUTailQ cpus
= QTAILQ_HEAD_INITIALIZER(cpus
);
96 /* current CPU in the current thread. It is only valid inside
98 __thread CPUState
*current_cpu
;
99 /* 0 = Do not count executed instructions.
100 1 = Precise instruction counting.
101 2 = Adaptive rate instruction counting. */
104 uintptr_t qemu_host_page_size
;
105 intptr_t qemu_host_page_mask
;
107 #if !defined(CONFIG_USER_ONLY)
109 typedef struct PhysPageEntry PhysPageEntry
;
111 struct PhysPageEntry
{
112 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
114 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
118 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
120 /* Size of the L2 (and L3, etc) page tables. */
121 #define ADDR_SPACE_BITS 64
124 #define P_L2_SIZE (1 << P_L2_BITS)
126 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
128 typedef PhysPageEntry Node
[P_L2_SIZE
];
130 typedef struct PhysPageMap
{
133 unsigned sections_nb
;
134 unsigned sections_nb_alloc
;
136 unsigned nodes_nb_alloc
;
138 MemoryRegionSection
*sections
;
141 struct AddressSpaceDispatch
{
142 MemoryRegionSection
*mru_section
;
143 /* This is a multi-level map on the physical address space.
144 * The bottom level has pointers to MemoryRegionSections.
146 PhysPageEntry phys_map
;
150 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
151 typedef struct subpage_t
{
155 uint16_t sub_section
[];
158 #define PHYS_SECTION_UNASSIGNED 0
160 static void io_mem_init(void);
161 static void memory_map_init(void);
162 static void tcg_log_global_after_sync(MemoryListener
*listener
);
163 static void tcg_commit(MemoryListener
*listener
);
166 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
167 * @cpu: the CPU whose AddressSpace this is
168 * @as: the AddressSpace itself
169 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
170 * @tcg_as_listener: listener for tracking changes to the AddressSpace
172 struct CPUAddressSpace
{
175 struct AddressSpaceDispatch
*memory_dispatch
;
176 MemoryListener tcg_as_listener
;
179 struct DirtyBitmapSnapshot
{
182 unsigned long dirty
[];
187 #if !defined(CONFIG_USER_ONLY)
189 static void phys_map_node_reserve(PhysPageMap
*map
, unsigned nodes
)
191 static unsigned alloc_hint
= 16;
192 if (map
->nodes_nb
+ nodes
> map
->nodes_nb_alloc
) {
193 map
->nodes_nb_alloc
= MAX(alloc_hint
, map
->nodes_nb
+ nodes
);
194 map
->nodes
= g_renew(Node
, map
->nodes
, map
->nodes_nb_alloc
);
195 alloc_hint
= map
->nodes_nb_alloc
;
199 static uint32_t phys_map_node_alloc(PhysPageMap
*map
, bool leaf
)
206 ret
= map
->nodes_nb
++;
208 assert(ret
!= PHYS_MAP_NODE_NIL
);
209 assert(ret
!= map
->nodes_nb_alloc
);
211 e
.skip
= leaf
? 0 : 1;
212 e
.ptr
= leaf
? PHYS_SECTION_UNASSIGNED
: PHYS_MAP_NODE_NIL
;
213 for (i
= 0; i
< P_L2_SIZE
; ++i
) {
214 memcpy(&p
[i
], &e
, sizeof(e
));
219 static void phys_page_set_level(PhysPageMap
*map
, PhysPageEntry
*lp
,
220 hwaddr
*index
, uint64_t *nb
, uint16_t leaf
,
224 hwaddr step
= (hwaddr
)1 << (level
* P_L2_BITS
);
226 if (lp
->skip
&& lp
->ptr
== PHYS_MAP_NODE_NIL
) {
227 lp
->ptr
= phys_map_node_alloc(map
, level
== 0);
229 p
= map
->nodes
[lp
->ptr
];
230 lp
= &p
[(*index
>> (level
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
232 while (*nb
&& lp
< &p
[P_L2_SIZE
]) {
233 if ((*index
& (step
- 1)) == 0 && *nb
>= step
) {
239 phys_page_set_level(map
, lp
, index
, nb
, leaf
, level
- 1);
245 static void phys_page_set(AddressSpaceDispatch
*d
,
246 hwaddr index
, uint64_t nb
,
249 /* Wildly overreserve - it doesn't matter much. */
250 phys_map_node_reserve(&d
->map
, 3 * P_L2_LEVELS
);
252 phys_page_set_level(&d
->map
, &d
->phys_map
, &index
, &nb
, leaf
, P_L2_LEVELS
- 1);
255 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
256 * and update our entry so we can skip it and go directly to the destination.
258 static void phys_page_compact(PhysPageEntry
*lp
, Node
*nodes
)
260 unsigned valid_ptr
= P_L2_SIZE
;
265 if (lp
->ptr
== PHYS_MAP_NODE_NIL
) {
270 for (i
= 0; i
< P_L2_SIZE
; i
++) {
271 if (p
[i
].ptr
== PHYS_MAP_NODE_NIL
) {
278 phys_page_compact(&p
[i
], nodes
);
282 /* We can only compress if there's only one child. */
287 assert(valid_ptr
< P_L2_SIZE
);
289 /* Don't compress if it won't fit in the # of bits we have. */
290 if (P_L2_LEVELS
>= (1 << 6) &&
291 lp
->skip
+ p
[valid_ptr
].skip
>= (1 << 6)) {
295 lp
->ptr
= p
[valid_ptr
].ptr
;
296 if (!p
[valid_ptr
].skip
) {
297 /* If our only child is a leaf, make this a leaf. */
298 /* By design, we should have made this node a leaf to begin with so we
299 * should never reach here.
300 * But since it's so simple to handle this, let's do it just in case we
305 lp
->skip
+= p
[valid_ptr
].skip
;
309 void address_space_dispatch_compact(AddressSpaceDispatch
*d
)
311 if (d
->phys_map
.skip
) {
312 phys_page_compact(&d
->phys_map
, d
->map
.nodes
);
316 static inline bool section_covers_addr(const MemoryRegionSection
*section
,
319 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
320 * the section must cover the entire address space.
322 return int128_gethi(section
->size
) ||
323 range_covers_byte(section
->offset_within_address_space
,
324 int128_getlo(section
->size
), addr
);
327 static MemoryRegionSection
*phys_page_find(AddressSpaceDispatch
*d
, hwaddr addr
)
329 PhysPageEntry lp
= d
->phys_map
, *p
;
330 Node
*nodes
= d
->map
.nodes
;
331 MemoryRegionSection
*sections
= d
->map
.sections
;
332 hwaddr index
= addr
>> TARGET_PAGE_BITS
;
335 for (i
= P_L2_LEVELS
; lp
.skip
&& (i
-= lp
.skip
) >= 0;) {
336 if (lp
.ptr
== PHYS_MAP_NODE_NIL
) {
337 return §ions
[PHYS_SECTION_UNASSIGNED
];
340 lp
= p
[(index
>> (i
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
343 if (section_covers_addr(§ions
[lp
.ptr
], addr
)) {
344 return §ions
[lp
.ptr
];
346 return §ions
[PHYS_SECTION_UNASSIGNED
];
350 /* Called from RCU critical section */
351 static MemoryRegionSection
*address_space_lookup_region(AddressSpaceDispatch
*d
,
353 bool resolve_subpage
)
355 MemoryRegionSection
*section
= atomic_read(&d
->mru_section
);
358 if (!section
|| section
== &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
] ||
359 !section_covers_addr(section
, addr
)) {
360 section
= phys_page_find(d
, addr
);
361 atomic_set(&d
->mru_section
, section
);
363 if (resolve_subpage
&& section
->mr
->subpage
) {
364 subpage
= container_of(section
->mr
, subpage_t
, iomem
);
365 section
= &d
->map
.sections
[subpage
->sub_section
[SUBPAGE_IDX(addr
)]];
370 /* Called from RCU critical section */
371 static MemoryRegionSection
*
372 address_space_translate_internal(AddressSpaceDispatch
*d
, hwaddr addr
, hwaddr
*xlat
,
373 hwaddr
*plen
, bool resolve_subpage
)
375 MemoryRegionSection
*section
;
379 section
= address_space_lookup_region(d
, addr
, resolve_subpage
);
380 /* Compute offset within MemoryRegionSection */
381 addr
-= section
->offset_within_address_space
;
383 /* Compute offset within MemoryRegion */
384 *xlat
= addr
+ section
->offset_within_region
;
388 /* MMIO registers can be expected to perform full-width accesses based only
389 * on their address, without considering adjacent registers that could
390 * decode to completely different MemoryRegions. When such registers
391 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
392 * regions overlap wildly. For this reason we cannot clamp the accesses
395 * If the length is small (as is the case for address_space_ldl/stl),
396 * everything works fine. If the incoming length is large, however,
397 * the caller really has to do the clamping through memory_access_size.
399 if (memory_region_is_ram(mr
)) {
400 diff
= int128_sub(section
->size
, int128_make64(addr
));
401 *plen
= int128_get64(int128_min(diff
, int128_make64(*plen
)));
407 * address_space_translate_iommu - translate an address through an IOMMU
408 * memory region and then through the target address space.
410 * @iommu_mr: the IOMMU memory region that we start the translation from
411 * @addr: the address to be translated through the MMU
412 * @xlat: the translated address offset within the destination memory region.
413 * It cannot be %NULL.
414 * @plen_out: valid read/write length of the translated address. It
416 * @page_mask_out: page mask for the translated address. This
417 * should only be meaningful for IOMMU translated
418 * addresses, since there may be huge pages that this bit
419 * would tell. It can be %NULL if we don't care about it.
420 * @is_write: whether the translation operation is for write
421 * @is_mmio: whether this can be MMIO, set true if it can
422 * @target_as: the address space targeted by the IOMMU
423 * @attrs: transaction attributes
425 * This function is called from RCU critical section. It is the common
426 * part of flatview_do_translate and address_space_translate_cached.
428 static MemoryRegionSection
address_space_translate_iommu(IOMMUMemoryRegion
*iommu_mr
,
431 hwaddr
*page_mask_out
,
434 AddressSpace
**target_as
,
437 MemoryRegionSection
*section
;
438 hwaddr page_mask
= (hwaddr
)-1;
442 IOMMUMemoryRegionClass
*imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
446 if (imrc
->attrs_to_index
) {
447 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
450 iotlb
= imrc
->translate(iommu_mr
, addr
, is_write
?
451 IOMMU_WO
: IOMMU_RO
, iommu_idx
);
453 if (!(iotlb
.perm
& (1 << is_write
))) {
457 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
458 | (addr
& iotlb
.addr_mask
));
459 page_mask
&= iotlb
.addr_mask
;
460 *plen_out
= MIN(*plen_out
, (addr
| iotlb
.addr_mask
) - addr
+ 1);
461 *target_as
= iotlb
.target_as
;
463 section
= address_space_translate_internal(
464 address_space_to_dispatch(iotlb
.target_as
), addr
, xlat
,
467 iommu_mr
= memory_region_get_iommu(section
->mr
);
468 } while (unlikely(iommu_mr
));
471 *page_mask_out
= page_mask
;
476 return (MemoryRegionSection
) { .mr
= &io_mem_unassigned
};
480 * flatview_do_translate - translate an address in FlatView
482 * @fv: the flat view that we want to translate on
483 * @addr: the address to be translated in above address space
484 * @xlat: the translated address offset within memory region. It
486 * @plen_out: valid read/write length of the translated address. It
487 * can be @NULL when we don't care about it.
488 * @page_mask_out: page mask for the translated address. This
489 * should only be meaningful for IOMMU translated
490 * addresses, since there may be huge pages that this bit
491 * would tell. It can be @NULL if we don't care about it.
492 * @is_write: whether the translation operation is for write
493 * @is_mmio: whether this can be MMIO, set true if it can
494 * @target_as: the address space targeted by the IOMMU
495 * @attrs: memory transaction attributes
497 * This function is called from RCU critical section
499 static MemoryRegionSection
flatview_do_translate(FlatView
*fv
,
503 hwaddr
*page_mask_out
,
506 AddressSpace
**target_as
,
509 MemoryRegionSection
*section
;
510 IOMMUMemoryRegion
*iommu_mr
;
511 hwaddr plen
= (hwaddr
)(-1);
517 section
= address_space_translate_internal(
518 flatview_to_dispatch(fv
), addr
, xlat
,
521 iommu_mr
= memory_region_get_iommu(section
->mr
);
522 if (unlikely(iommu_mr
)) {
523 return address_space_translate_iommu(iommu_mr
, xlat
,
524 plen_out
, page_mask_out
,
529 /* Not behind an IOMMU, use default page size. */
530 *page_mask_out
= ~TARGET_PAGE_MASK
;
536 /* Called from RCU critical section */
537 IOMMUTLBEntry
address_space_get_iotlb_entry(AddressSpace
*as
, hwaddr addr
,
538 bool is_write
, MemTxAttrs attrs
)
540 MemoryRegionSection section
;
541 hwaddr xlat
, page_mask
;
544 * This can never be MMIO, and we don't really care about plen,
547 section
= flatview_do_translate(address_space_to_flatview(as
), addr
, &xlat
,
548 NULL
, &page_mask
, is_write
, false, &as
,
551 /* Illegal translation */
552 if (section
.mr
== &io_mem_unassigned
) {
556 /* Convert memory region offset into address space offset */
557 xlat
+= section
.offset_within_address_space
-
558 section
.offset_within_region
;
560 return (IOMMUTLBEntry
) {
562 .iova
= addr
& ~page_mask
,
563 .translated_addr
= xlat
& ~page_mask
,
564 .addr_mask
= page_mask
,
565 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
570 return (IOMMUTLBEntry
) {0};
573 /* Called from RCU critical section */
574 MemoryRegion
*flatview_translate(FlatView
*fv
, hwaddr addr
, hwaddr
*xlat
,
575 hwaddr
*plen
, bool is_write
,
579 MemoryRegionSection section
;
580 AddressSpace
*as
= NULL
;
582 /* This can be MMIO, so setup MMIO bit. */
583 section
= flatview_do_translate(fv
, addr
, xlat
, plen
, NULL
,
584 is_write
, true, &as
, attrs
);
587 if (xen_enabled() && memory_access_is_direct(mr
, is_write
)) {
588 hwaddr page
= ((addr
& TARGET_PAGE_MASK
) + TARGET_PAGE_SIZE
) - addr
;
589 *plen
= MIN(page
, *plen
);
595 typedef struct TCGIOMMUNotifier
{
603 static void tcg_iommu_unmap_notify(IOMMUNotifier
*n
, IOMMUTLBEntry
*iotlb
)
605 TCGIOMMUNotifier
*notifier
= container_of(n
, TCGIOMMUNotifier
, n
);
607 if (!notifier
->active
) {
610 tlb_flush(notifier
->cpu
);
611 notifier
->active
= false;
612 /* We leave the notifier struct on the list to avoid reallocating it later.
613 * Generally the number of IOMMUs a CPU deals with will be small.
614 * In any case we can't unregister the iommu notifier from a notify
619 static void tcg_register_iommu_notifier(CPUState
*cpu
,
620 IOMMUMemoryRegion
*iommu_mr
,
623 /* Make sure this CPU has an IOMMU notifier registered for this
624 * IOMMU/IOMMU index combination, so that we can flush its TLB
625 * when the IOMMU tells us the mappings we've cached have changed.
627 MemoryRegion
*mr
= MEMORY_REGION(iommu_mr
);
628 TCGIOMMUNotifier
*notifier
;
632 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
633 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
634 if (notifier
->mr
== mr
&& notifier
->iommu_idx
== iommu_idx
) {
638 if (i
== cpu
->iommu_notifiers
->len
) {
639 /* Not found, add a new entry at the end of the array */
640 cpu
->iommu_notifiers
= g_array_set_size(cpu
->iommu_notifiers
, i
+ 1);
641 notifier
= g_new0(TCGIOMMUNotifier
, 1);
642 g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
) = notifier
;
645 notifier
->iommu_idx
= iommu_idx
;
647 /* Rather than trying to register interest in the specific part
648 * of the iommu's address space that we've accessed and then
649 * expand it later as subsequent accesses touch more of it, we
650 * just register interest in the whole thing, on the assumption
651 * that iommu reconfiguration will be rare.
653 iommu_notifier_init(¬ifier
->n
,
654 tcg_iommu_unmap_notify
,
655 IOMMU_NOTIFIER_UNMAP
,
659 ret
= memory_region_register_iommu_notifier(notifier
->mr
, ¬ifier
->n
,
662 error_report_err(err
);
667 if (!notifier
->active
) {
668 notifier
->active
= true;
672 static void tcg_iommu_free_notifier_list(CPUState
*cpu
)
674 /* Destroy the CPU's notifier list */
676 TCGIOMMUNotifier
*notifier
;
678 for (i
= 0; i
< cpu
->iommu_notifiers
->len
; i
++) {
679 notifier
= g_array_index(cpu
->iommu_notifiers
, TCGIOMMUNotifier
*, i
);
680 memory_region_unregister_iommu_notifier(notifier
->mr
, ¬ifier
->n
);
683 g_array_free(cpu
->iommu_notifiers
, true);
686 /* Called from RCU critical section */
687 MemoryRegionSection
*
688 address_space_translate_for_iotlb(CPUState
*cpu
, int asidx
, hwaddr addr
,
689 hwaddr
*xlat
, hwaddr
*plen
,
690 MemTxAttrs attrs
, int *prot
)
692 MemoryRegionSection
*section
;
693 IOMMUMemoryRegion
*iommu_mr
;
694 IOMMUMemoryRegionClass
*imrc
;
697 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpu
->cpu_ases
[asidx
].memory_dispatch
);
700 section
= address_space_translate_internal(d
, addr
, &addr
, plen
, false);
702 iommu_mr
= memory_region_get_iommu(section
->mr
);
707 imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
709 iommu_idx
= imrc
->attrs_to_index(iommu_mr
, attrs
);
710 tcg_register_iommu_notifier(cpu
, iommu_mr
, iommu_idx
);
711 /* We need all the permissions, so pass IOMMU_NONE so the IOMMU
712 * doesn't short-cut its translation table walk.
714 iotlb
= imrc
->translate(iommu_mr
, addr
, IOMMU_NONE
, iommu_idx
);
715 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
716 | (addr
& iotlb
.addr_mask
));
717 /* Update the caller's prot bits to remove permissions the IOMMU
718 * is giving us a failure response for. If we get down to no
719 * permissions left at all we can give up now.
721 if (!(iotlb
.perm
& IOMMU_RO
)) {
722 *prot
&= ~(PAGE_READ
| PAGE_EXEC
);
724 if (!(iotlb
.perm
& IOMMU_WO
)) {
725 *prot
&= ~PAGE_WRITE
;
732 d
= flatview_to_dispatch(address_space_to_flatview(iotlb
.target_as
));
735 assert(!memory_region_is_iommu(section
->mr
));
740 return &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
];
744 #if !defined(CONFIG_USER_ONLY)
746 static int cpu_common_post_load(void *opaque
, int version_id
)
748 CPUState
*cpu
= opaque
;
750 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
751 version_id is increased. */
752 cpu
->interrupt_request
&= ~0x01;
755 /* loadvm has just updated the content of RAM, bypassing the
756 * usual mechanisms that ensure we flush TBs for writes to
757 * memory we've translated code from. So we must flush all TBs,
758 * which will now be stale.
765 static int cpu_common_pre_load(void *opaque
)
767 CPUState
*cpu
= opaque
;
769 cpu
->exception_index
= -1;
774 static bool cpu_common_exception_index_needed(void *opaque
)
776 CPUState
*cpu
= opaque
;
778 return tcg_enabled() && cpu
->exception_index
!= -1;
781 static const VMStateDescription vmstate_cpu_common_exception_index
= {
782 .name
= "cpu_common/exception_index",
784 .minimum_version_id
= 1,
785 .needed
= cpu_common_exception_index_needed
,
786 .fields
= (VMStateField
[]) {
787 VMSTATE_INT32(exception_index
, CPUState
),
788 VMSTATE_END_OF_LIST()
792 static bool cpu_common_crash_occurred_needed(void *opaque
)
794 CPUState
*cpu
= opaque
;
796 return cpu
->crash_occurred
;
799 static const VMStateDescription vmstate_cpu_common_crash_occurred
= {
800 .name
= "cpu_common/crash_occurred",
802 .minimum_version_id
= 1,
803 .needed
= cpu_common_crash_occurred_needed
,
804 .fields
= (VMStateField
[]) {
805 VMSTATE_BOOL(crash_occurred
, CPUState
),
806 VMSTATE_END_OF_LIST()
810 const VMStateDescription vmstate_cpu_common
= {
811 .name
= "cpu_common",
813 .minimum_version_id
= 1,
814 .pre_load
= cpu_common_pre_load
,
815 .post_load
= cpu_common_post_load
,
816 .fields
= (VMStateField
[]) {
817 VMSTATE_UINT32(halted
, CPUState
),
818 VMSTATE_UINT32(interrupt_request
, CPUState
),
819 VMSTATE_END_OF_LIST()
821 .subsections
= (const VMStateDescription
*[]) {
822 &vmstate_cpu_common_exception_index
,
823 &vmstate_cpu_common_crash_occurred
,
830 CPUState
*qemu_get_cpu(int index
)
835 if (cpu
->cpu_index
== index
) {
843 #if !defined(CONFIG_USER_ONLY)
844 void cpu_address_space_init(CPUState
*cpu
, int asidx
,
845 const char *prefix
, MemoryRegion
*mr
)
847 CPUAddressSpace
*newas
;
848 AddressSpace
*as
= g_new0(AddressSpace
, 1);
852 as_name
= g_strdup_printf("%s-%d", prefix
, cpu
->cpu_index
);
853 address_space_init(as
, mr
, as_name
);
856 /* Target code should have set num_ases before calling us */
857 assert(asidx
< cpu
->num_ases
);
860 /* address space 0 gets the convenience alias */
864 /* KVM cannot currently support multiple address spaces. */
865 assert(asidx
== 0 || !kvm_enabled());
867 if (!cpu
->cpu_ases
) {
868 cpu
->cpu_ases
= g_new0(CPUAddressSpace
, cpu
->num_ases
);
871 newas
= &cpu
->cpu_ases
[asidx
];
875 newas
->tcg_as_listener
.log_global_after_sync
= tcg_log_global_after_sync
;
876 newas
->tcg_as_listener
.commit
= tcg_commit
;
877 memory_listener_register(&newas
->tcg_as_listener
, as
);
881 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
)
883 /* Return the AddressSpace corresponding to the specified index */
884 return cpu
->cpu_ases
[asidx
].as
;
888 void cpu_exec_unrealizefn(CPUState
*cpu
)
890 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
892 cpu_list_remove(cpu
);
894 if (cc
->vmsd
!= NULL
) {
895 vmstate_unregister(NULL
, cc
->vmsd
, cpu
);
897 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
898 vmstate_unregister(NULL
, &vmstate_cpu_common
, cpu
);
900 #ifndef CONFIG_USER_ONLY
901 tcg_iommu_free_notifier_list(cpu
);
905 Property cpu_common_props
[] = {
906 #ifndef CONFIG_USER_ONLY
907 /* Create a memory property for softmmu CPU object,
908 * so users can wire up its memory. (This can't go in hw/core/cpu.c
909 * because that file is compiled only once for both user-mode
910 * and system builds.) The default if no link is set up is to use
911 * the system address space.
913 DEFINE_PROP_LINK("memory", CPUState
, memory
, TYPE_MEMORY_REGION
,
916 DEFINE_PROP_END_OF_LIST(),
919 void cpu_exec_initfn(CPUState
*cpu
)
924 #ifndef CONFIG_USER_ONLY
925 cpu
->thread_id
= qemu_get_thread_id();
926 cpu
->memory
= system_memory
;
927 object_ref(OBJECT(cpu
->memory
));
931 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
)
933 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
934 static bool tcg_target_initialized
;
938 if (tcg_enabled() && !tcg_target_initialized
) {
939 tcg_target_initialized
= true;
940 cc
->tcg_initialize();
944 #ifndef CONFIG_USER_ONLY
945 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
946 vmstate_register(NULL
, cpu
->cpu_index
, &vmstate_cpu_common
, cpu
);
948 if (cc
->vmsd
!= NULL
) {
949 vmstate_register(NULL
, cpu
->cpu_index
, cc
->vmsd
, cpu
);
952 cpu
->iommu_notifiers
= g_array_new(false, true, sizeof(TCGIOMMUNotifier
*));
956 const char *parse_cpu_option(const char *cpu_option
)
960 gchar
**model_pieces
;
961 const char *cpu_type
;
963 model_pieces
= g_strsplit(cpu_option
, ",", 2);
964 if (!model_pieces
[0]) {
965 error_report("-cpu option cannot be empty");
969 oc
= cpu_class_by_name(CPU_RESOLVING_TYPE
, model_pieces
[0]);
971 error_report("unable to find CPU model '%s'", model_pieces
[0]);
972 g_strfreev(model_pieces
);
976 cpu_type
= object_class_get_name(oc
);
978 cc
->parse_features(cpu_type
, model_pieces
[1], &error_fatal
);
979 g_strfreev(model_pieces
);
983 #if defined(CONFIG_USER_ONLY)
984 void tb_invalidate_phys_addr(target_ulong addr
)
987 tb_invalidate_phys_page_range(addr
, addr
+ 1);
991 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
993 tb_invalidate_phys_addr(pc
);
996 void tb_invalidate_phys_addr(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
)
1002 if (!tcg_enabled()) {
1006 RCU_READ_LOCK_GUARD();
1007 mr
= address_space_translate(as
, addr
, &addr
, &l
, false, attrs
);
1008 if (!(memory_region_is_ram(mr
)
1009 || memory_region_is_romd(mr
))) {
1012 ram_addr
= memory_region_get_ram_addr(mr
) + addr
;
1013 tb_invalidate_phys_page_range(ram_addr
, ram_addr
+ 1);
1016 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
1019 hwaddr phys
= cpu_get_phys_page_attrs_debug(cpu
, pc
, &attrs
);
1020 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
1022 /* Locks grabbed by tb_invalidate_phys_addr */
1023 tb_invalidate_phys_addr(cpu
->cpu_ases
[asidx
].as
,
1024 phys
| (pc
& ~TARGET_PAGE_MASK
), attrs
);
1029 #ifndef CONFIG_USER_ONLY
1030 /* Add a watchpoint. */
1031 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
1032 int flags
, CPUWatchpoint
**watchpoint
)
1036 /* forbid ranges which are empty or run off the end of the address space */
1037 if (len
== 0 || (addr
+ len
- 1) < addr
) {
1038 error_report("tried to set invalid watchpoint at %"
1039 VADDR_PRIx
", len=%" VADDR_PRIu
, addr
, len
);
1042 wp
= g_malloc(sizeof(*wp
));
1048 /* keep all GDB-injected watchpoints in front */
1049 if (flags
& BP_GDB
) {
1050 QTAILQ_INSERT_HEAD(&cpu
->watchpoints
, wp
, entry
);
1052 QTAILQ_INSERT_TAIL(&cpu
->watchpoints
, wp
, entry
);
1055 tlb_flush_page(cpu
, addr
);
1062 /* Remove a specific watchpoint. */
1063 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
, vaddr len
,
1068 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
1069 if (addr
== wp
->vaddr
&& len
== wp
->len
1070 && flags
== (wp
->flags
& ~BP_WATCHPOINT_HIT
)) {
1071 cpu_watchpoint_remove_by_ref(cpu
, wp
);
1078 /* Remove a specific watchpoint by reference. */
1079 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
)
1081 QTAILQ_REMOVE(&cpu
->watchpoints
, watchpoint
, entry
);
1083 tlb_flush_page(cpu
, watchpoint
->vaddr
);
1088 /* Remove all matching watchpoints. */
1089 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
1091 CPUWatchpoint
*wp
, *next
;
1093 QTAILQ_FOREACH_SAFE(wp
, &cpu
->watchpoints
, entry
, next
) {
1094 if (wp
->flags
& mask
) {
1095 cpu_watchpoint_remove_by_ref(cpu
, wp
);
1100 /* Return true if this watchpoint address matches the specified
1101 * access (ie the address range covered by the watchpoint overlaps
1102 * partially or completely with the address range covered by the
1105 static inline bool watchpoint_address_matches(CPUWatchpoint
*wp
,
1106 vaddr addr
, vaddr len
)
1108 /* We know the lengths are non-zero, but a little caution is
1109 * required to avoid errors in the case where the range ends
1110 * exactly at the top of the address space and so addr + len
1111 * wraps round to zero.
1113 vaddr wpend
= wp
->vaddr
+ wp
->len
- 1;
1114 vaddr addrend
= addr
+ len
- 1;
1116 return !(addr
> wpend
|| wp
->vaddr
> addrend
);
1119 /* Return flags for watchpoints that match addr + prot. */
1120 int cpu_watchpoint_address_matches(CPUState
*cpu
, vaddr addr
, vaddr len
)
1125 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
1126 if (watchpoint_address_matches(wp
, addr
, TARGET_PAGE_SIZE
)) {
1132 #endif /* !CONFIG_USER_ONLY */
1134 /* Add a breakpoint. */
1135 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
1136 CPUBreakpoint
**breakpoint
)
1140 bp
= g_malloc(sizeof(*bp
));
1145 /* keep all GDB-injected breakpoints in front */
1146 if (flags
& BP_GDB
) {
1147 QTAILQ_INSERT_HEAD(&cpu
->breakpoints
, bp
, entry
);
1149 QTAILQ_INSERT_TAIL(&cpu
->breakpoints
, bp
, entry
);
1152 breakpoint_invalidate(cpu
, pc
);
1160 /* Remove a specific breakpoint. */
1161 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
)
1165 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
1166 if (bp
->pc
== pc
&& bp
->flags
== flags
) {
1167 cpu_breakpoint_remove_by_ref(cpu
, bp
);
1174 /* Remove a specific breakpoint by reference. */
1175 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
)
1177 QTAILQ_REMOVE(&cpu
->breakpoints
, breakpoint
, entry
);
1179 breakpoint_invalidate(cpu
, breakpoint
->pc
);
1184 /* Remove all matching breakpoints. */
1185 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
)
1187 CPUBreakpoint
*bp
, *next
;
1189 QTAILQ_FOREACH_SAFE(bp
, &cpu
->breakpoints
, entry
, next
) {
1190 if (bp
->flags
& mask
) {
1191 cpu_breakpoint_remove_by_ref(cpu
, bp
);
1196 /* enable or disable single step mode. EXCP_DEBUG is returned by the
1197 CPU loop after each instruction */
1198 void cpu_single_step(CPUState
*cpu
, int enabled
)
1200 if (cpu
->singlestep_enabled
!= enabled
) {
1201 cpu
->singlestep_enabled
= enabled
;
1202 if (kvm_enabled()) {
1203 kvm_update_guest_debug(cpu
, 0);
1205 /* must flush all the translated code to avoid inconsistencies */
1206 /* XXX: only flush what is necessary */
1212 void cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
1219 fprintf(stderr
, "qemu: fatal: ");
1220 vfprintf(stderr
, fmt
, ap
);
1221 fprintf(stderr
, "\n");
1222 cpu_dump_state(cpu
, stderr
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
1223 if (qemu_log_separate()) {
1225 qemu_log("qemu: fatal: ");
1226 qemu_log_vprintf(fmt
, ap2
);
1228 log_cpu_state(cpu
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
1236 #if defined(CONFIG_USER_ONLY)
1238 struct sigaction act
;
1239 sigfillset(&act
.sa_mask
);
1240 act
.sa_handler
= SIG_DFL
;
1242 sigaction(SIGABRT
, &act
, NULL
);
1248 #if !defined(CONFIG_USER_ONLY)
1249 /* Called from RCU critical section */
1250 static RAMBlock
*qemu_get_ram_block(ram_addr_t addr
)
1254 block
= atomic_rcu_read(&ram_list
.mru_block
);
1255 if (block
&& addr
- block
->offset
< block
->max_length
) {
1258 RAMBLOCK_FOREACH(block
) {
1259 if (addr
- block
->offset
< block
->max_length
) {
1264 fprintf(stderr
, "Bad ram offset %" PRIx64
"\n", (uint64_t)addr
);
1268 /* It is safe to write mru_block outside the iothread lock. This
1273 * xxx removed from list
1277 * call_rcu(reclaim_ramblock, xxx);
1280 * atomic_rcu_set is not needed here. The block was already published
1281 * when it was placed into the list. Here we're just making an extra
1282 * copy of the pointer.
1284 ram_list
.mru_block
= block
;
1288 static void tlb_reset_dirty_range_all(ram_addr_t start
, ram_addr_t length
)
1295 assert(tcg_enabled());
1296 end
= TARGET_PAGE_ALIGN(start
+ length
);
1297 start
&= TARGET_PAGE_MASK
;
1299 RCU_READ_LOCK_GUARD();
1300 block
= qemu_get_ram_block(start
);
1301 assert(block
== qemu_get_ram_block(end
- 1));
1302 start1
= (uintptr_t)ramblock_ptr(block
, start
- block
->offset
);
1304 tlb_reset_dirty(cpu
, start1
, length
);
1308 /* Note: start and end must be within the same ram block. */
1309 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start
,
1313 DirtyMemoryBlocks
*blocks
;
1314 unsigned long end
, page
;
1317 uint64_t mr_offset
, mr_size
;
1323 end
= TARGET_PAGE_ALIGN(start
+ length
) >> TARGET_PAGE_BITS
;
1324 page
= start
>> TARGET_PAGE_BITS
;
1326 WITH_RCU_READ_LOCK_GUARD() {
1327 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1328 ramblock
= qemu_get_ram_block(start
);
1329 /* Range sanity check on the ramblock */
1330 assert(start
>= ramblock
->offset
&&
1331 start
+ length
<= ramblock
->offset
+ ramblock
->used_length
);
1333 while (page
< end
) {
1334 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1335 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1336 unsigned long num
= MIN(end
- page
,
1337 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1339 dirty
|= bitmap_test_and_clear_atomic(blocks
->blocks
[idx
],
1344 mr_offset
= (ram_addr_t
)(page
<< TARGET_PAGE_BITS
) - ramblock
->offset
;
1345 mr_size
= (end
- page
) << TARGET_PAGE_BITS
;
1346 memory_region_clear_dirty_bitmap(ramblock
->mr
, mr_offset
, mr_size
);
1349 if (dirty
&& tcg_enabled()) {
1350 tlb_reset_dirty_range_all(start
, length
);
1356 DirtyBitmapSnapshot
*cpu_physical_memory_snapshot_and_clear_dirty
1357 (MemoryRegion
*mr
, hwaddr offset
, hwaddr length
, unsigned client
)
1359 DirtyMemoryBlocks
*blocks
;
1360 ram_addr_t start
= memory_region_get_ram_addr(mr
) + offset
;
1361 unsigned long align
= 1UL << (TARGET_PAGE_BITS
+ BITS_PER_LEVEL
);
1362 ram_addr_t first
= QEMU_ALIGN_DOWN(start
, align
);
1363 ram_addr_t last
= QEMU_ALIGN_UP(start
+ length
, align
);
1364 DirtyBitmapSnapshot
*snap
;
1365 unsigned long page
, end
, dest
;
1367 snap
= g_malloc0(sizeof(*snap
) +
1368 ((last
- first
) >> (TARGET_PAGE_BITS
+ 3)));
1369 snap
->start
= first
;
1372 page
= first
>> TARGET_PAGE_BITS
;
1373 end
= last
>> TARGET_PAGE_BITS
;
1376 WITH_RCU_READ_LOCK_GUARD() {
1377 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1379 while (page
< end
) {
1380 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1381 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1382 unsigned long num
= MIN(end
- page
,
1383 DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1385 assert(QEMU_IS_ALIGNED(offset
, (1 << BITS_PER_LEVEL
)));
1386 assert(QEMU_IS_ALIGNED(num
, (1 << BITS_PER_LEVEL
)));
1387 offset
>>= BITS_PER_LEVEL
;
1389 bitmap_copy_and_clear_atomic(snap
->dirty
+ dest
,
1390 blocks
->blocks
[idx
] + offset
,
1393 dest
+= num
>> BITS_PER_LEVEL
;
1397 if (tcg_enabled()) {
1398 tlb_reset_dirty_range_all(start
, length
);
1401 memory_region_clear_dirty_bitmap(mr
, offset
, length
);
1406 bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot
*snap
,
1410 unsigned long page
, end
;
1412 assert(start
>= snap
->start
);
1413 assert(start
+ length
<= snap
->end
);
1415 end
= TARGET_PAGE_ALIGN(start
+ length
- snap
->start
) >> TARGET_PAGE_BITS
;
1416 page
= (start
- snap
->start
) >> TARGET_PAGE_BITS
;
1418 while (page
< end
) {
1419 if (test_bit(page
, snap
->dirty
)) {
1427 /* Called from RCU critical section */
1428 hwaddr
memory_region_section_get_iotlb(CPUState
*cpu
,
1429 MemoryRegionSection
*section
)
1431 AddressSpaceDispatch
*d
= flatview_to_dispatch(section
->fv
);
1432 return section
- d
->map
.sections
;
1434 #endif /* defined(CONFIG_USER_ONLY) */
1436 #if !defined(CONFIG_USER_ONLY)
1438 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
1440 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
);
1442 static void *(*phys_mem_alloc
)(size_t size
, uint64_t *align
, bool shared
) =
1443 qemu_anon_ram_alloc
;
1446 * Set a custom physical guest memory alloator.
1447 * Accelerators with unusual needs may need this. Hopefully, we can
1448 * get rid of it eventually.
1450 void phys_mem_set_alloc(void *(*alloc
)(size_t, uint64_t *align
, bool shared
))
1452 phys_mem_alloc
= alloc
;
1455 static uint16_t phys_section_add(PhysPageMap
*map
,
1456 MemoryRegionSection
*section
)
1458 /* The physical section number is ORed with a page-aligned
1459 * pointer to produce the iotlb entries. Thus it should
1460 * never overflow into the page-aligned value.
1462 assert(map
->sections_nb
< TARGET_PAGE_SIZE
);
1464 if (map
->sections_nb
== map
->sections_nb_alloc
) {
1465 map
->sections_nb_alloc
= MAX(map
->sections_nb_alloc
* 2, 16);
1466 map
->sections
= g_renew(MemoryRegionSection
, map
->sections
,
1467 map
->sections_nb_alloc
);
1469 map
->sections
[map
->sections_nb
] = *section
;
1470 memory_region_ref(section
->mr
);
1471 return map
->sections_nb
++;
1474 static void phys_section_destroy(MemoryRegion
*mr
)
1476 bool have_sub_page
= mr
->subpage
;
1478 memory_region_unref(mr
);
1480 if (have_sub_page
) {
1481 subpage_t
*subpage
= container_of(mr
, subpage_t
, iomem
);
1482 object_unref(OBJECT(&subpage
->iomem
));
1487 static void phys_sections_free(PhysPageMap
*map
)
1489 while (map
->sections_nb
> 0) {
1490 MemoryRegionSection
*section
= &map
->sections
[--map
->sections_nb
];
1491 phys_section_destroy(section
->mr
);
1493 g_free(map
->sections
);
1497 static void register_subpage(FlatView
*fv
, MemoryRegionSection
*section
)
1499 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1501 hwaddr base
= section
->offset_within_address_space
1503 MemoryRegionSection
*existing
= phys_page_find(d
, base
);
1504 MemoryRegionSection subsection
= {
1505 .offset_within_address_space
= base
,
1506 .size
= int128_make64(TARGET_PAGE_SIZE
),
1510 assert(existing
->mr
->subpage
|| existing
->mr
== &io_mem_unassigned
);
1512 if (!(existing
->mr
->subpage
)) {
1513 subpage
= subpage_init(fv
, base
);
1515 subsection
.mr
= &subpage
->iomem
;
1516 phys_page_set(d
, base
>> TARGET_PAGE_BITS
, 1,
1517 phys_section_add(&d
->map
, &subsection
));
1519 subpage
= container_of(existing
->mr
, subpage_t
, iomem
);
1521 start
= section
->offset_within_address_space
& ~TARGET_PAGE_MASK
;
1522 end
= start
+ int128_get64(section
->size
) - 1;
1523 subpage_register(subpage
, start
, end
,
1524 phys_section_add(&d
->map
, section
));
1528 static void register_multipage(FlatView
*fv
,
1529 MemoryRegionSection
*section
)
1531 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1532 hwaddr start_addr
= section
->offset_within_address_space
;
1533 uint16_t section_index
= phys_section_add(&d
->map
, section
);
1534 uint64_t num_pages
= int128_get64(int128_rshift(section
->size
,
1538 phys_page_set(d
, start_addr
>> TARGET_PAGE_BITS
, num_pages
, section_index
);
1542 * The range in *section* may look like this:
1546 * where s stands for subpage and P for page.
1548 void flatview_add_to_dispatch(FlatView
*fv
, MemoryRegionSection
*section
)
1550 MemoryRegionSection remain
= *section
;
1551 Int128 page_size
= int128_make64(TARGET_PAGE_SIZE
);
1553 /* register first subpage */
1554 if (remain
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1555 uint64_t left
= TARGET_PAGE_ALIGN(remain
.offset_within_address_space
)
1556 - remain
.offset_within_address_space
;
1558 MemoryRegionSection now
= remain
;
1559 now
.size
= int128_min(int128_make64(left
), now
.size
);
1560 register_subpage(fv
, &now
);
1561 if (int128_eq(remain
.size
, now
.size
)) {
1564 remain
.size
= int128_sub(remain
.size
, now
.size
);
1565 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1566 remain
.offset_within_region
+= int128_get64(now
.size
);
1569 /* register whole pages */
1570 if (int128_ge(remain
.size
, page_size
)) {
1571 MemoryRegionSection now
= remain
;
1572 now
.size
= int128_and(now
.size
, int128_neg(page_size
));
1573 register_multipage(fv
, &now
);
1574 if (int128_eq(remain
.size
, now
.size
)) {
1577 remain
.size
= int128_sub(remain
.size
, now
.size
);
1578 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1579 remain
.offset_within_region
+= int128_get64(now
.size
);
1582 /* register last subpage */
1583 register_subpage(fv
, &remain
);
1586 void qemu_flush_coalesced_mmio_buffer(void)
1589 kvm_flush_coalesced_mmio_buffer();
1592 void qemu_mutex_lock_ramlist(void)
1594 qemu_mutex_lock(&ram_list
.mutex
);
1597 void qemu_mutex_unlock_ramlist(void)
1599 qemu_mutex_unlock(&ram_list
.mutex
);
1602 void ram_block_dump(Monitor
*mon
)
1607 RCU_READ_LOCK_GUARD();
1608 monitor_printf(mon
, "%24s %8s %18s %18s %18s\n",
1609 "Block Name", "PSize", "Offset", "Used", "Total");
1610 RAMBLOCK_FOREACH(block
) {
1611 psize
= size_to_str(block
->page_size
);
1612 monitor_printf(mon
, "%24s %8s 0x%016" PRIx64
" 0x%016" PRIx64
1613 " 0x%016" PRIx64
"\n", block
->idstr
, psize
,
1614 (uint64_t)block
->offset
,
1615 (uint64_t)block
->used_length
,
1616 (uint64_t)block
->max_length
);
1623 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1624 * may or may not name the same files / on the same filesystem now as
1625 * when we actually open and map them. Iterate over the file
1626 * descriptors instead, and use qemu_fd_getpagesize().
1628 static int find_min_backend_pagesize(Object
*obj
, void *opaque
)
1630 long *hpsize_min
= opaque
;
1632 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1633 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1634 long hpsize
= host_memory_backend_pagesize(backend
);
1636 if (host_memory_backend_is_mapped(backend
) && (hpsize
< *hpsize_min
)) {
1637 *hpsize_min
= hpsize
;
1644 static int find_max_backend_pagesize(Object
*obj
, void *opaque
)
1646 long *hpsize_max
= opaque
;
1648 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1649 HostMemoryBackend
*backend
= MEMORY_BACKEND(obj
);
1650 long hpsize
= host_memory_backend_pagesize(backend
);
1652 if (host_memory_backend_is_mapped(backend
) && (hpsize
> *hpsize_max
)) {
1653 *hpsize_max
= hpsize
;
1661 * TODO: We assume right now that all mapped host memory backends are
1662 * used as RAM, however some might be used for different purposes.
1664 long qemu_minrampagesize(void)
1666 long hpsize
= LONG_MAX
;
1667 long mainrampagesize
;
1668 Object
*memdev_root
;
1669 MachineState
*ms
= MACHINE(qdev_get_machine());
1671 mainrampagesize
= qemu_mempath_getpagesize(mem_path
);
1673 /* it's possible we have memory-backend objects with
1674 * hugepage-backed RAM. these may get mapped into system
1675 * address space via -numa parameters or memory hotplug
1676 * hooks. we want to take these into account, but we
1677 * also want to make sure these supported hugepage
1678 * sizes are applicable across the entire range of memory
1679 * we may boot from, so we take the min across all
1680 * backends, and assume normal pages in cases where a
1681 * backend isn't backed by hugepages.
1683 memdev_root
= object_resolve_path("/objects", NULL
);
1685 object_child_foreach(memdev_root
, find_min_backend_pagesize
, &hpsize
);
1687 if (hpsize
== LONG_MAX
) {
1688 /* No additional memory regions found ==> Report main RAM page size */
1689 return mainrampagesize
;
1692 /* If NUMA is disabled or the NUMA nodes are not backed with a
1693 * memory-backend, then there is at least one node using "normal" RAM,
1694 * so if its page size is smaller we have got to report that size instead.
1696 if (hpsize
> mainrampagesize
&&
1697 (ms
->numa_state
== NULL
||
1698 ms
->numa_state
->num_nodes
== 0 ||
1699 ms
->numa_state
->nodes
[0].node_memdev
== NULL
)) {
1702 error_report("Huge page support disabled (n/a for main memory).");
1705 return mainrampagesize
;
1711 long qemu_maxrampagesize(void)
1713 long pagesize
= qemu_mempath_getpagesize(mem_path
);
1714 Object
*memdev_root
= object_resolve_path("/objects", NULL
);
1717 object_child_foreach(memdev_root
, find_max_backend_pagesize
,
1723 long qemu_minrampagesize(void)
1725 return qemu_real_host_page_size
;
1727 long qemu_maxrampagesize(void)
1729 return qemu_real_host_page_size
;
1734 static int64_t get_file_size(int fd
)
1737 #if defined(__linux__)
1740 if (fstat(fd
, &st
) < 0) {
1744 /* Special handling for devdax character devices */
1745 if (S_ISCHR(st
.st_mode
)) {
1746 g_autofree
char *subsystem_path
= NULL
;
1747 g_autofree
char *subsystem
= NULL
;
1749 subsystem_path
= g_strdup_printf("/sys/dev/char/%d:%d/subsystem",
1750 major(st
.st_rdev
), minor(st
.st_rdev
));
1751 subsystem
= g_file_read_link(subsystem_path
, NULL
);
1753 if (subsystem
&& g_str_has_suffix(subsystem
, "/dax")) {
1754 g_autofree
char *size_path
= NULL
;
1755 g_autofree
char *size_str
= NULL
;
1757 size_path
= g_strdup_printf("/sys/dev/char/%d:%d/size",
1758 major(st
.st_rdev
), minor(st
.st_rdev
));
1760 if (g_file_get_contents(size_path
, &size_str
, NULL
, NULL
)) {
1761 return g_ascii_strtoll(size_str
, NULL
, 0);
1765 #endif /* defined(__linux__) */
1767 /* st.st_size may be zero for special files yet lseek(2) works */
1768 size
= lseek(fd
, 0, SEEK_END
);
1775 static int file_ram_open(const char *path
,
1776 const char *region_name
,
1781 char *sanitized_name
;
1787 fd
= open(path
, O_RDWR
);
1789 /* @path names an existing file, use it */
1792 if (errno
== ENOENT
) {
1793 /* @path names a file that doesn't exist, create it */
1794 fd
= open(path
, O_RDWR
| O_CREAT
| O_EXCL
, 0644);
1799 } else if (errno
== EISDIR
) {
1800 /* @path names a directory, create a file there */
1801 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1802 sanitized_name
= g_strdup(region_name
);
1803 for (c
= sanitized_name
; *c
!= '\0'; c
++) {
1809 filename
= g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path
,
1811 g_free(sanitized_name
);
1813 fd
= mkstemp(filename
);
1821 if (errno
!= EEXIST
&& errno
!= EINTR
) {
1822 error_setg_errno(errp
, errno
,
1823 "can't open backing store %s for guest RAM",
1828 * Try again on EINTR and EEXIST. The latter happens when
1829 * something else creates the file between our two open().
1836 static void *file_ram_alloc(RAMBlock
*block
,
1842 MachineState
*ms
= MACHINE(qdev_get_machine());
1845 block
->page_size
= qemu_fd_getpagesize(fd
);
1846 if (block
->mr
->align
% block
->page_size
) {
1847 error_setg(errp
, "alignment 0x%" PRIx64
1848 " must be multiples of page size 0x%zx",
1849 block
->mr
->align
, block
->page_size
);
1851 } else if (block
->mr
->align
&& !is_power_of_2(block
->mr
->align
)) {
1852 error_setg(errp
, "alignment 0x%" PRIx64
1853 " must be a power of two", block
->mr
->align
);
1856 block
->mr
->align
= MAX(block
->page_size
, block
->mr
->align
);
1857 #if defined(__s390x__)
1858 if (kvm_enabled()) {
1859 block
->mr
->align
= MAX(block
->mr
->align
, QEMU_VMALLOC_ALIGN
);
1863 if (memory
< block
->page_size
) {
1864 error_setg(errp
, "memory size 0x" RAM_ADDR_FMT
" must be equal to "
1865 "or larger than page size 0x%zx",
1866 memory
, block
->page_size
);
1870 memory
= ROUND_UP(memory
, block
->page_size
);
1873 * ftruncate is not supported by hugetlbfs in older
1874 * hosts, so don't bother bailing out on errors.
1875 * If anything goes wrong with it under other filesystems,
1878 * Do not truncate the non-empty backend file to avoid corrupting
1879 * the existing data in the file. Disabling shrinking is not
1880 * enough. For example, the current vNVDIMM implementation stores
1881 * the guest NVDIMM labels at the end of the backend file. If the
1882 * backend file is later extended, QEMU will not be able to find
1883 * those labels. Therefore, extending the non-empty backend file
1884 * is disabled as well.
1886 if (truncate
&& ftruncate(fd
, memory
)) {
1887 perror("ftruncate");
1890 area
= qemu_ram_mmap(fd
, memory
, block
->mr
->align
,
1891 block
->flags
& RAM_SHARED
, block
->flags
& RAM_PMEM
);
1892 if (area
== MAP_FAILED
) {
1893 error_setg_errno(errp
, errno
,
1894 "unable to map backing store for guest RAM");
1899 os_mem_prealloc(fd
, area
, memory
, ms
->smp
.cpus
, errp
);
1900 if (errp
&& *errp
) {
1901 qemu_ram_munmap(fd
, area
, memory
);
1911 /* Allocate space within the ram_addr_t space that governs the
1913 * Called with the ramlist lock held.
1915 static ram_addr_t
find_ram_offset(ram_addr_t size
)
1917 RAMBlock
*block
, *next_block
;
1918 ram_addr_t offset
= RAM_ADDR_MAX
, mingap
= RAM_ADDR_MAX
;
1920 assert(size
!= 0); /* it would hand out same offset multiple times */
1922 if (QLIST_EMPTY_RCU(&ram_list
.blocks
)) {
1926 RAMBLOCK_FOREACH(block
) {
1927 ram_addr_t candidate
, next
= RAM_ADDR_MAX
;
1929 /* Align blocks to start on a 'long' in the bitmap
1930 * which makes the bitmap sync'ing take the fast path.
1932 candidate
= block
->offset
+ block
->max_length
;
1933 candidate
= ROUND_UP(candidate
, BITS_PER_LONG
<< TARGET_PAGE_BITS
);
1935 /* Search for the closest following block
1938 RAMBLOCK_FOREACH(next_block
) {
1939 if (next_block
->offset
>= candidate
) {
1940 next
= MIN(next
, next_block
->offset
);
1944 /* If it fits remember our place and remember the size
1945 * of gap, but keep going so that we might find a smaller
1946 * gap to fill so avoiding fragmentation.
1948 if (next
- candidate
>= size
&& next
- candidate
< mingap
) {
1950 mingap
= next
- candidate
;
1953 trace_find_ram_offset_loop(size
, candidate
, offset
, next
, mingap
);
1956 if (offset
== RAM_ADDR_MAX
) {
1957 fprintf(stderr
, "Failed to find gap of requested size: %" PRIu64
"\n",
1962 trace_find_ram_offset(size
, offset
);
1967 static unsigned long last_ram_page(void)
1970 ram_addr_t last
= 0;
1972 RCU_READ_LOCK_GUARD();
1973 RAMBLOCK_FOREACH(block
) {
1974 last
= MAX(last
, block
->offset
+ block
->max_length
);
1976 return last
>> TARGET_PAGE_BITS
;
1979 static void qemu_ram_setup_dump(void *addr
, ram_addr_t size
)
1983 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1984 if (!machine_dump_guest_core(current_machine
)) {
1985 ret
= qemu_madvise(addr
, size
, QEMU_MADV_DONTDUMP
);
1987 perror("qemu_madvise");
1988 fprintf(stderr
, "madvise doesn't support MADV_DONTDUMP, "
1989 "but dump_guest_core=off specified\n");
1994 const char *qemu_ram_get_idstr(RAMBlock
*rb
)
1999 void *qemu_ram_get_host_addr(RAMBlock
*rb
)
2004 ram_addr_t
qemu_ram_get_offset(RAMBlock
*rb
)
2009 ram_addr_t
qemu_ram_get_used_length(RAMBlock
*rb
)
2011 return rb
->used_length
;
2014 bool qemu_ram_is_shared(RAMBlock
*rb
)
2016 return rb
->flags
& RAM_SHARED
;
2019 /* Note: Only set at the start of postcopy */
2020 bool qemu_ram_is_uf_zeroable(RAMBlock
*rb
)
2022 return rb
->flags
& RAM_UF_ZEROPAGE
;
2025 void qemu_ram_set_uf_zeroable(RAMBlock
*rb
)
2027 rb
->flags
|= RAM_UF_ZEROPAGE
;
2030 bool qemu_ram_is_migratable(RAMBlock
*rb
)
2032 return rb
->flags
& RAM_MIGRATABLE
;
2035 void qemu_ram_set_migratable(RAMBlock
*rb
)
2037 rb
->flags
|= RAM_MIGRATABLE
;
2040 void qemu_ram_unset_migratable(RAMBlock
*rb
)
2042 rb
->flags
&= ~RAM_MIGRATABLE
;
2045 /* Called with iothread lock held. */
2046 void qemu_ram_set_idstr(RAMBlock
*new_block
, const char *name
, DeviceState
*dev
)
2051 assert(!new_block
->idstr
[0]);
2054 char *id
= qdev_get_dev_path(dev
);
2056 snprintf(new_block
->idstr
, sizeof(new_block
->idstr
), "%s/", id
);
2060 pstrcat(new_block
->idstr
, sizeof(new_block
->idstr
), name
);
2062 RCU_READ_LOCK_GUARD();
2063 RAMBLOCK_FOREACH(block
) {
2064 if (block
!= new_block
&&
2065 !strcmp(block
->idstr
, new_block
->idstr
)) {
2066 fprintf(stderr
, "RAMBlock \"%s\" already registered, abort!\n",
2073 /* Called with iothread lock held. */
2074 void qemu_ram_unset_idstr(RAMBlock
*block
)
2076 /* FIXME: arch_init.c assumes that this is not called throughout
2077 * migration. Ignore the problem since hot-unplug during migration
2078 * does not work anyway.
2081 memset(block
->idstr
, 0, sizeof(block
->idstr
));
2085 size_t qemu_ram_pagesize(RAMBlock
*rb
)
2087 return rb
->page_size
;
2090 /* Returns the largest size of page in use */
2091 size_t qemu_ram_pagesize_largest(void)
2096 RAMBLOCK_FOREACH(block
) {
2097 largest
= MAX(largest
, qemu_ram_pagesize(block
));
2103 static int memory_try_enable_merging(void *addr
, size_t len
)
2105 if (!machine_mem_merge(current_machine
)) {
2106 /* disabled by the user */
2110 return qemu_madvise(addr
, len
, QEMU_MADV_MERGEABLE
);
2113 /* Only legal before guest might have detected the memory size: e.g. on
2114 * incoming migration, or right after reset.
2116 * As memory core doesn't know how is memory accessed, it is up to
2117 * resize callback to update device state and/or add assertions to detect
2118 * misuse, if necessary.
2120 int qemu_ram_resize(RAMBlock
*block
, ram_addr_t newsize
, Error
**errp
)
2124 newsize
= HOST_PAGE_ALIGN(newsize
);
2126 if (block
->used_length
== newsize
) {
2130 if (!(block
->flags
& RAM_RESIZEABLE
)) {
2131 error_setg_errno(errp
, EINVAL
,
2132 "Length mismatch: %s: 0x" RAM_ADDR_FMT
2133 " in != 0x" RAM_ADDR_FMT
, block
->idstr
,
2134 newsize
, block
->used_length
);
2138 if (block
->max_length
< newsize
) {
2139 error_setg_errno(errp
, EINVAL
,
2140 "Length too large: %s: 0x" RAM_ADDR_FMT
2141 " > 0x" RAM_ADDR_FMT
, block
->idstr
,
2142 newsize
, block
->max_length
);
2146 cpu_physical_memory_clear_dirty_range(block
->offset
, block
->used_length
);
2147 block
->used_length
= newsize
;
2148 cpu_physical_memory_set_dirty_range(block
->offset
, block
->used_length
,
2150 memory_region_set_size(block
->mr
, newsize
);
2151 if (block
->resized
) {
2152 block
->resized(block
->idstr
, newsize
, block
->host
);
2157 /* Called with ram_list.mutex held */
2158 static void dirty_memory_extend(ram_addr_t old_ram_size
,
2159 ram_addr_t new_ram_size
)
2161 ram_addr_t old_num_blocks
= DIV_ROUND_UP(old_ram_size
,
2162 DIRTY_MEMORY_BLOCK_SIZE
);
2163 ram_addr_t new_num_blocks
= DIV_ROUND_UP(new_ram_size
,
2164 DIRTY_MEMORY_BLOCK_SIZE
);
2167 /* Only need to extend if block count increased */
2168 if (new_num_blocks
<= old_num_blocks
) {
2172 for (i
= 0; i
< DIRTY_MEMORY_NUM
; i
++) {
2173 DirtyMemoryBlocks
*old_blocks
;
2174 DirtyMemoryBlocks
*new_blocks
;
2177 old_blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[i
]);
2178 new_blocks
= g_malloc(sizeof(*new_blocks
) +
2179 sizeof(new_blocks
->blocks
[0]) * new_num_blocks
);
2181 if (old_num_blocks
) {
2182 memcpy(new_blocks
->blocks
, old_blocks
->blocks
,
2183 old_num_blocks
* sizeof(old_blocks
->blocks
[0]));
2186 for (j
= old_num_blocks
; j
< new_num_blocks
; j
++) {
2187 new_blocks
->blocks
[j
] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE
);
2190 atomic_rcu_set(&ram_list
.dirty_memory
[i
], new_blocks
);
2193 g_free_rcu(old_blocks
, rcu
);
2198 static void ram_block_add(RAMBlock
*new_block
, Error
**errp
, bool shared
)
2201 RAMBlock
*last_block
= NULL
;
2202 ram_addr_t old_ram_size
, new_ram_size
;
2205 old_ram_size
= last_ram_page();
2207 qemu_mutex_lock_ramlist();
2208 new_block
->offset
= find_ram_offset(new_block
->max_length
);
2210 if (!new_block
->host
) {
2211 if (xen_enabled()) {
2212 xen_ram_alloc(new_block
->offset
, new_block
->max_length
,
2213 new_block
->mr
, &err
);
2215 error_propagate(errp
, err
);
2216 qemu_mutex_unlock_ramlist();
2220 new_block
->host
= phys_mem_alloc(new_block
->max_length
,
2221 &new_block
->mr
->align
, shared
);
2222 if (!new_block
->host
) {
2223 error_setg_errno(errp
, errno
,
2224 "cannot set up guest memory '%s'",
2225 memory_region_name(new_block
->mr
));
2226 qemu_mutex_unlock_ramlist();
2229 memory_try_enable_merging(new_block
->host
, new_block
->max_length
);
2233 new_ram_size
= MAX(old_ram_size
,
2234 (new_block
->offset
+ new_block
->max_length
) >> TARGET_PAGE_BITS
);
2235 if (new_ram_size
> old_ram_size
) {
2236 dirty_memory_extend(old_ram_size
, new_ram_size
);
2238 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
2239 * QLIST (which has an RCU-friendly variant) does not have insertion at
2240 * tail, so save the last element in last_block.
2242 RAMBLOCK_FOREACH(block
) {
2244 if (block
->max_length
< new_block
->max_length
) {
2249 QLIST_INSERT_BEFORE_RCU(block
, new_block
, next
);
2250 } else if (last_block
) {
2251 QLIST_INSERT_AFTER_RCU(last_block
, new_block
, next
);
2252 } else { /* list is empty */
2253 QLIST_INSERT_HEAD_RCU(&ram_list
.blocks
, new_block
, next
);
2255 ram_list
.mru_block
= NULL
;
2257 /* Write list before version */
2260 qemu_mutex_unlock_ramlist();
2262 cpu_physical_memory_set_dirty_range(new_block
->offset
,
2263 new_block
->used_length
,
2266 if (new_block
->host
) {
2267 qemu_ram_setup_dump(new_block
->host
, new_block
->max_length
);
2268 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_HUGEPAGE
);
2269 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
2270 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_DONTFORK
);
2271 ram_block_notify_add(new_block
->host
, new_block
->max_length
);
2276 RAMBlock
*qemu_ram_alloc_from_fd(ram_addr_t size
, MemoryRegion
*mr
,
2277 uint32_t ram_flags
, int fd
,
2280 RAMBlock
*new_block
;
2281 Error
*local_err
= NULL
;
2284 /* Just support these ram flags by now. */
2285 assert((ram_flags
& ~(RAM_SHARED
| RAM_PMEM
)) == 0);
2287 if (xen_enabled()) {
2288 error_setg(errp
, "-mem-path not supported with Xen");
2292 if (kvm_enabled() && !kvm_has_sync_mmu()) {
2294 "host lacks kvm mmu notifiers, -mem-path unsupported");
2298 if (phys_mem_alloc
!= qemu_anon_ram_alloc
) {
2300 * file_ram_alloc() needs to allocate just like
2301 * phys_mem_alloc, but we haven't bothered to provide
2305 "-mem-path not supported with this accelerator");
2309 size
= HOST_PAGE_ALIGN(size
);
2310 file_size
= get_file_size(fd
);
2311 if (file_size
> 0 && file_size
< size
) {
2312 error_setg(errp
, "backing store %s size 0x%" PRIx64
2313 " does not match 'size' option 0x" RAM_ADDR_FMT
,
2314 mem_path
, file_size
, size
);
2318 new_block
= g_malloc0(sizeof(*new_block
));
2320 new_block
->used_length
= size
;
2321 new_block
->max_length
= size
;
2322 new_block
->flags
= ram_flags
;
2323 new_block
->host
= file_ram_alloc(new_block
, size
, fd
, !file_size
, errp
);
2324 if (!new_block
->host
) {
2329 ram_block_add(new_block
, &local_err
, ram_flags
& RAM_SHARED
);
2332 error_propagate(errp
, local_err
);
2340 RAMBlock
*qemu_ram_alloc_from_file(ram_addr_t size
, MemoryRegion
*mr
,
2341 uint32_t ram_flags
, const char *mem_path
,
2348 fd
= file_ram_open(mem_path
, memory_region_name(mr
), &created
, errp
);
2353 block
= qemu_ram_alloc_from_fd(size
, mr
, ram_flags
, fd
, errp
);
2367 RAMBlock
*qemu_ram_alloc_internal(ram_addr_t size
, ram_addr_t max_size
,
2368 void (*resized
)(const char*,
2371 void *host
, bool resizeable
, bool share
,
2372 MemoryRegion
*mr
, Error
**errp
)
2374 RAMBlock
*new_block
;
2375 Error
*local_err
= NULL
;
2377 size
= HOST_PAGE_ALIGN(size
);
2378 max_size
= HOST_PAGE_ALIGN(max_size
);
2379 new_block
= g_malloc0(sizeof(*new_block
));
2381 new_block
->resized
= resized
;
2382 new_block
->used_length
= size
;
2383 new_block
->max_length
= max_size
;
2384 assert(max_size
>= size
);
2386 new_block
->page_size
= qemu_real_host_page_size
;
2387 new_block
->host
= host
;
2389 new_block
->flags
|= RAM_PREALLOC
;
2392 new_block
->flags
|= RAM_RESIZEABLE
;
2394 ram_block_add(new_block
, &local_err
, share
);
2397 error_propagate(errp
, local_err
);
2403 RAMBlock
*qemu_ram_alloc_from_ptr(ram_addr_t size
, void *host
,
2404 MemoryRegion
*mr
, Error
**errp
)
2406 return qemu_ram_alloc_internal(size
, size
, NULL
, host
, false,
2410 RAMBlock
*qemu_ram_alloc(ram_addr_t size
, bool share
,
2411 MemoryRegion
*mr
, Error
**errp
)
2413 return qemu_ram_alloc_internal(size
, size
, NULL
, NULL
, false,
2417 RAMBlock
*qemu_ram_alloc_resizeable(ram_addr_t size
, ram_addr_t maxsz
,
2418 void (*resized
)(const char*,
2421 MemoryRegion
*mr
, Error
**errp
)
2423 return qemu_ram_alloc_internal(size
, maxsz
, resized
, NULL
, true,
2427 static void reclaim_ramblock(RAMBlock
*block
)
2429 if (block
->flags
& RAM_PREALLOC
) {
2431 } else if (xen_enabled()) {
2432 xen_invalidate_map_cache_entry(block
->host
);
2434 } else if (block
->fd
>= 0) {
2435 qemu_ram_munmap(block
->fd
, block
->host
, block
->max_length
);
2439 qemu_anon_ram_free(block
->host
, block
->max_length
);
2444 void qemu_ram_free(RAMBlock
*block
)
2451 ram_block_notify_remove(block
->host
, block
->max_length
);
2454 qemu_mutex_lock_ramlist();
2455 QLIST_REMOVE_RCU(block
, next
);
2456 ram_list
.mru_block
= NULL
;
2457 /* Write list before version */
2460 call_rcu(block
, reclaim_ramblock
, rcu
);
2461 qemu_mutex_unlock_ramlist();
2465 void qemu_ram_remap(ram_addr_t addr
, ram_addr_t length
)
2472 RAMBLOCK_FOREACH(block
) {
2473 offset
= addr
- block
->offset
;
2474 if (offset
< block
->max_length
) {
2475 vaddr
= ramblock_ptr(block
, offset
);
2476 if (block
->flags
& RAM_PREALLOC
) {
2478 } else if (xen_enabled()) {
2482 if (block
->fd
>= 0) {
2483 flags
|= (block
->flags
& RAM_SHARED
?
2484 MAP_SHARED
: MAP_PRIVATE
);
2485 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2486 flags
, block
->fd
, offset
);
2489 * Remap needs to match alloc. Accelerators that
2490 * set phys_mem_alloc never remap. If they did,
2491 * we'd need a remap hook here.
2493 assert(phys_mem_alloc
== qemu_anon_ram_alloc
);
2495 flags
|= MAP_PRIVATE
| MAP_ANONYMOUS
;
2496 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2499 if (area
!= vaddr
) {
2500 error_report("Could not remap addr: "
2501 RAM_ADDR_FMT
"@" RAM_ADDR_FMT
"",
2505 memory_try_enable_merging(vaddr
, length
);
2506 qemu_ram_setup_dump(vaddr
, length
);
2511 #endif /* !_WIN32 */
2513 /* Return a host pointer to ram allocated with qemu_ram_alloc.
2514 * This should not be used for general purpose DMA. Use address_space_map
2515 * or address_space_rw instead. For local memory (e.g. video ram) that the
2516 * device owns, use memory_region_get_ram_ptr.
2518 * Called within RCU critical section.
2520 void *qemu_map_ram_ptr(RAMBlock
*ram_block
, ram_addr_t addr
)
2522 RAMBlock
*block
= ram_block
;
2524 if (block
== NULL
) {
2525 block
= qemu_get_ram_block(addr
);
2526 addr
-= block
->offset
;
2529 if (xen_enabled() && block
->host
== NULL
) {
2530 /* We need to check if the requested address is in the RAM
2531 * because we don't want to map the entire memory in QEMU.
2532 * In that case just map until the end of the page.
2534 if (block
->offset
== 0) {
2535 return xen_map_cache(addr
, 0, 0, false);
2538 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, false);
2540 return ramblock_ptr(block
, addr
);
2543 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
2544 * but takes a size argument.
2546 * Called within RCU critical section.
2548 static void *qemu_ram_ptr_length(RAMBlock
*ram_block
, ram_addr_t addr
,
2549 hwaddr
*size
, bool lock
)
2551 RAMBlock
*block
= ram_block
;
2556 if (block
== NULL
) {
2557 block
= qemu_get_ram_block(addr
);
2558 addr
-= block
->offset
;
2560 *size
= MIN(*size
, block
->max_length
- addr
);
2562 if (xen_enabled() && block
->host
== NULL
) {
2563 /* We need to check if the requested address is in the RAM
2564 * because we don't want to map the entire memory in QEMU.
2565 * In that case just map the requested area.
2567 if (block
->offset
== 0) {
2568 return xen_map_cache(addr
, *size
, lock
, lock
);
2571 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, lock
);
2574 return ramblock_ptr(block
, addr
);
2577 /* Return the offset of a hostpointer within a ramblock */
2578 ram_addr_t
qemu_ram_block_host_offset(RAMBlock
*rb
, void *host
)
2580 ram_addr_t res
= (uint8_t *)host
- (uint8_t *)rb
->host
;
2581 assert((uintptr_t)host
>= (uintptr_t)rb
->host
);
2582 assert(res
< rb
->max_length
);
2588 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2591 * ptr: Host pointer to look up
2592 * round_offset: If true round the result offset down to a page boundary
2593 * *ram_addr: set to result ram_addr
2594 * *offset: set to result offset within the RAMBlock
2596 * Returns: RAMBlock (or NULL if not found)
2598 * By the time this function returns, the returned pointer is not protected
2599 * by RCU anymore. If the caller is not within an RCU critical section and
2600 * does not hold the iothread lock, it must have other means of protecting the
2601 * pointer, such as a reference to the region that includes the incoming
2604 RAMBlock
*qemu_ram_block_from_host(void *ptr
, bool round_offset
,
2608 uint8_t *host
= ptr
;
2610 if (xen_enabled()) {
2611 ram_addr_t ram_addr
;
2612 RCU_READ_LOCK_GUARD();
2613 ram_addr
= xen_ram_addr_from_mapcache(ptr
);
2614 block
= qemu_get_ram_block(ram_addr
);
2616 *offset
= ram_addr
- block
->offset
;
2621 RCU_READ_LOCK_GUARD();
2622 block
= atomic_rcu_read(&ram_list
.mru_block
);
2623 if (block
&& block
->host
&& host
- block
->host
< block
->max_length
) {
2627 RAMBLOCK_FOREACH(block
) {
2628 /* This case append when the block is not mapped. */
2629 if (block
->host
== NULL
) {
2632 if (host
- block
->host
< block
->max_length
) {
2640 *offset
= (host
- block
->host
);
2642 *offset
&= TARGET_PAGE_MASK
;
2648 * Finds the named RAMBlock
2650 * name: The name of RAMBlock to find
2652 * Returns: RAMBlock (or NULL if not found)
2654 RAMBlock
*qemu_ram_block_by_name(const char *name
)
2658 RAMBLOCK_FOREACH(block
) {
2659 if (!strcmp(name
, block
->idstr
)) {
2667 /* Some of the softmmu routines need to translate from a host pointer
2668 (typically a TLB entry) back to a ram offset. */
2669 ram_addr_t
qemu_ram_addr_from_host(void *ptr
)
2674 block
= qemu_ram_block_from_host(ptr
, false, &offset
);
2676 return RAM_ADDR_INVALID
;
2679 return block
->offset
+ offset
;
2682 /* Generate a debug exception if a watchpoint has been hit. */
2683 void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
2684 MemTxAttrs attrs
, int flags
, uintptr_t ra
)
2686 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
2689 assert(tcg_enabled());
2690 if (cpu
->watchpoint_hit
) {
2692 * We re-entered the check after replacing the TB.
2693 * Now raise the debug interrupt so that it will
2694 * trigger after the current instruction.
2696 qemu_mutex_lock_iothread();
2697 cpu_interrupt(cpu
, CPU_INTERRUPT_DEBUG
);
2698 qemu_mutex_unlock_iothread();
2702 addr
= cc
->adjust_watchpoint_address(cpu
, addr
, len
);
2703 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
2704 if (watchpoint_address_matches(wp
, addr
, len
)
2705 && (wp
->flags
& flags
)) {
2706 if (flags
== BP_MEM_READ
) {
2707 wp
->flags
|= BP_WATCHPOINT_HIT_READ
;
2709 wp
->flags
|= BP_WATCHPOINT_HIT_WRITE
;
2711 wp
->hitaddr
= MAX(addr
, wp
->vaddr
);
2712 wp
->hitattrs
= attrs
;
2713 if (!cpu
->watchpoint_hit
) {
2714 if (wp
->flags
& BP_CPU
&&
2715 !cc
->debug_check_watchpoint(cpu
, wp
)) {
2716 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2719 cpu
->watchpoint_hit
= wp
;
2722 tb_check_watchpoint(cpu
, ra
);
2723 if (wp
->flags
& BP_STOP_BEFORE_ACCESS
) {
2724 cpu
->exception_index
= EXCP_DEBUG
;
2726 cpu_loop_exit_restore(cpu
, ra
);
2728 /* Force execution of one insn next time. */
2729 cpu
->cflags_next_tb
= 1 | curr_cflags();
2732 cpu_restore_state(cpu
, ra
, true);
2734 cpu_loop_exit_noexc(cpu
);
2738 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2743 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
2744 MemTxAttrs attrs
, uint8_t *buf
, hwaddr len
);
2745 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2746 const uint8_t *buf
, hwaddr len
);
2747 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
2748 bool is_write
, MemTxAttrs attrs
);
2750 static MemTxResult
subpage_read(void *opaque
, hwaddr addr
, uint64_t *data
,
2751 unsigned len
, MemTxAttrs attrs
)
2753 subpage_t
*subpage
= opaque
;
2757 #if defined(DEBUG_SUBPAGE)
2758 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
"\n", __func__
,
2759 subpage
, len
, addr
);
2761 res
= flatview_read(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2765 *data
= ldn_p(buf
, len
);
2769 static MemTxResult
subpage_write(void *opaque
, hwaddr addr
,
2770 uint64_t value
, unsigned len
, MemTxAttrs attrs
)
2772 subpage_t
*subpage
= opaque
;
2775 #if defined(DEBUG_SUBPAGE)
2776 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
2777 " value %"PRIx64
"\n",
2778 __func__
, subpage
, len
, addr
, value
);
2780 stn_p(buf
, len
, value
);
2781 return flatview_write(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2784 static bool subpage_accepts(void *opaque
, hwaddr addr
,
2785 unsigned len
, bool is_write
,
2788 subpage_t
*subpage
= opaque
;
2789 #if defined(DEBUG_SUBPAGE)
2790 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx
"\n",
2791 __func__
, subpage
, is_write
? 'w' : 'r', len
, addr
);
2794 return flatview_access_valid(subpage
->fv
, addr
+ subpage
->base
,
2795 len
, is_write
, attrs
);
2798 static const MemoryRegionOps subpage_ops
= {
2799 .read_with_attrs
= subpage_read
,
2800 .write_with_attrs
= subpage_write
,
2801 .impl
.min_access_size
= 1,
2802 .impl
.max_access_size
= 8,
2803 .valid
.min_access_size
= 1,
2804 .valid
.max_access_size
= 8,
2805 .valid
.accepts
= subpage_accepts
,
2806 .endianness
= DEVICE_NATIVE_ENDIAN
,
2809 static int subpage_register(subpage_t
*mmio
, uint32_t start
, uint32_t end
,
2814 if (start
>= TARGET_PAGE_SIZE
|| end
>= TARGET_PAGE_SIZE
)
2816 idx
= SUBPAGE_IDX(start
);
2817 eidx
= SUBPAGE_IDX(end
);
2818 #if defined(DEBUG_SUBPAGE)
2819 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2820 __func__
, mmio
, start
, end
, idx
, eidx
, section
);
2822 for (; idx
<= eidx
; idx
++) {
2823 mmio
->sub_section
[idx
] = section
;
2829 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
)
2833 /* mmio->sub_section is set to PHYS_SECTION_UNASSIGNED with g_malloc0 */
2834 mmio
= g_malloc0(sizeof(subpage_t
) + TARGET_PAGE_SIZE
* sizeof(uint16_t));
2837 memory_region_init_io(&mmio
->iomem
, NULL
, &subpage_ops
, mmio
,
2838 NULL
, TARGET_PAGE_SIZE
);
2839 mmio
->iomem
.subpage
= true;
2840 #if defined(DEBUG_SUBPAGE)
2841 printf("%s: %p base " TARGET_FMT_plx
" len %08x\n", __func__
,
2842 mmio
, base
, TARGET_PAGE_SIZE
);
2848 static uint16_t dummy_section(PhysPageMap
*map
, FlatView
*fv
, MemoryRegion
*mr
)
2851 MemoryRegionSection section
= {
2854 .offset_within_address_space
= 0,
2855 .offset_within_region
= 0,
2856 .size
= int128_2_64(),
2859 return phys_section_add(map
, §ion
);
2862 MemoryRegionSection
*iotlb_to_section(CPUState
*cpu
,
2863 hwaddr index
, MemTxAttrs attrs
)
2865 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
2866 CPUAddressSpace
*cpuas
= &cpu
->cpu_ases
[asidx
];
2867 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpuas
->memory_dispatch
);
2868 MemoryRegionSection
*sections
= d
->map
.sections
;
2870 return §ions
[index
& ~TARGET_PAGE_MASK
];
2873 static void io_mem_init(void)
2875 memory_region_init_io(&io_mem_unassigned
, NULL
, &unassigned_mem_ops
, NULL
,
2879 AddressSpaceDispatch
*address_space_dispatch_new(FlatView
*fv
)
2881 AddressSpaceDispatch
*d
= g_new0(AddressSpaceDispatch
, 1);
2884 n
= dummy_section(&d
->map
, fv
, &io_mem_unassigned
);
2885 assert(n
== PHYS_SECTION_UNASSIGNED
);
2887 d
->phys_map
= (PhysPageEntry
) { .ptr
= PHYS_MAP_NODE_NIL
, .skip
= 1 };
2892 void address_space_dispatch_free(AddressSpaceDispatch
*d
)
2894 phys_sections_free(&d
->map
);
2898 static void do_nothing(CPUState
*cpu
, run_on_cpu_data d
)
2902 static void tcg_log_global_after_sync(MemoryListener
*listener
)
2904 CPUAddressSpace
*cpuas
;
2906 /* Wait for the CPU to end the current TB. This avoids the following
2910 * ---------------------- -------------------------
2911 * TLB check -> slow path
2912 * notdirty_mem_write
2916 * TLB check -> fast path
2920 * by pushing the migration thread's memory read after the vCPU thread has
2921 * written the memory.
2923 if (replay_mode
== REPLAY_MODE_NONE
) {
2925 * VGA can make calls to this function while updating the screen.
2926 * In record/replay mode this causes a deadlock, because
2927 * run_on_cpu waits for rr mutex. Therefore no races are possible
2928 * in this case and no need for making run_on_cpu when
2929 * record/replay is not enabled.
2931 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2932 run_on_cpu(cpuas
->cpu
, do_nothing
, RUN_ON_CPU_NULL
);
2936 static void tcg_commit(MemoryListener
*listener
)
2938 CPUAddressSpace
*cpuas
;
2939 AddressSpaceDispatch
*d
;
2941 assert(tcg_enabled());
2942 /* since each CPU stores ram addresses in its TLB cache, we must
2943 reset the modified entries */
2944 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2945 cpu_reloading_memory_map();
2946 /* The CPU and TLB are protected by the iothread lock.
2947 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2948 * may have split the RCU critical section.
2950 d
= address_space_to_dispatch(cpuas
->as
);
2951 atomic_rcu_set(&cpuas
->memory_dispatch
, d
);
2952 tlb_flush(cpuas
->cpu
);
2955 static void memory_map_init(void)
2957 system_memory
= g_malloc(sizeof(*system_memory
));
2959 memory_region_init(system_memory
, NULL
, "system", UINT64_MAX
);
2960 address_space_init(&address_space_memory
, system_memory
, "memory");
2962 system_io
= g_malloc(sizeof(*system_io
));
2963 memory_region_init_io(system_io
, NULL
, &unassigned_io_ops
, NULL
, "io",
2965 address_space_init(&address_space_io
, system_io
, "I/O");
2968 MemoryRegion
*get_system_memory(void)
2970 return system_memory
;
2973 MemoryRegion
*get_system_io(void)
2978 #endif /* !defined(CONFIG_USER_ONLY) */
2980 /* physical memory access (slow version, mainly for debug) */
2981 #if defined(CONFIG_USER_ONLY)
2982 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
2983 uint8_t *buf
, target_ulong len
, int is_write
)
2986 target_ulong l
, page
;
2990 page
= addr
& TARGET_PAGE_MASK
;
2991 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
2994 flags
= page_get_flags(page
);
2995 if (!(flags
& PAGE_VALID
))
2998 if (!(flags
& PAGE_WRITE
))
3000 /* XXX: this code should not depend on lock_user */
3001 if (!(p
= lock_user(VERIFY_WRITE
, addr
, l
, 0)))
3004 unlock_user(p
, addr
, l
);
3006 if (!(flags
& PAGE_READ
))
3008 /* XXX: this code should not depend on lock_user */
3009 if (!(p
= lock_user(VERIFY_READ
, addr
, l
, 1)))
3012 unlock_user(p
, addr
, 0);
3023 static void invalidate_and_set_dirty(MemoryRegion
*mr
, hwaddr addr
,
3026 uint8_t dirty_log_mask
= memory_region_get_dirty_log_mask(mr
);
3027 addr
+= memory_region_get_ram_addr(mr
);
3029 /* No early return if dirty_log_mask is or becomes 0, because
3030 * cpu_physical_memory_set_dirty_range will still call
3031 * xen_modified_memory.
3033 if (dirty_log_mask
) {
3035 cpu_physical_memory_range_includes_clean(addr
, length
, dirty_log_mask
);
3037 if (dirty_log_mask
& (1 << DIRTY_MEMORY_CODE
)) {
3038 assert(tcg_enabled());
3039 tb_invalidate_phys_range(addr
, addr
+ length
);
3040 dirty_log_mask
&= ~(1 << DIRTY_MEMORY_CODE
);
3042 cpu_physical_memory_set_dirty_range(addr
, length
, dirty_log_mask
);
3045 void memory_region_flush_rom_device(MemoryRegion
*mr
, hwaddr addr
, hwaddr size
)
3048 * In principle this function would work on other memory region types too,
3049 * but the ROM device use case is the only one where this operation is
3050 * necessary. Other memory regions should use the
3051 * address_space_read/write() APIs.
3053 assert(memory_region_is_romd(mr
));
3055 invalidate_and_set_dirty(mr
, addr
, size
);
3058 static int memory_access_size(MemoryRegion
*mr
, unsigned l
, hwaddr addr
)
3060 unsigned access_size_max
= mr
->ops
->valid
.max_access_size
;
3062 /* Regions are assumed to support 1-4 byte accesses unless
3063 otherwise specified. */
3064 if (access_size_max
== 0) {
3065 access_size_max
= 4;
3068 /* Bound the maximum access by the alignment of the address. */
3069 if (!mr
->ops
->impl
.unaligned
) {
3070 unsigned align_size_max
= addr
& -addr
;
3071 if (align_size_max
!= 0 && align_size_max
< access_size_max
) {
3072 access_size_max
= align_size_max
;
3076 /* Don't attempt accesses larger than the maximum. */
3077 if (l
> access_size_max
) {
3078 l
= access_size_max
;
3085 static bool prepare_mmio_access(MemoryRegion
*mr
)
3087 bool unlocked
= !qemu_mutex_iothread_locked();
3088 bool release_lock
= false;
3090 if (unlocked
&& mr
->global_locking
) {
3091 qemu_mutex_lock_iothread();
3093 release_lock
= true;
3095 if (mr
->flush_coalesced_mmio
) {
3097 qemu_mutex_lock_iothread();
3099 qemu_flush_coalesced_mmio_buffer();
3101 qemu_mutex_unlock_iothread();
3105 return release_lock
;
3108 /* Called within RCU critical section. */
3109 static MemTxResult
flatview_write_continue(FlatView
*fv
, hwaddr addr
,
3112 hwaddr len
, hwaddr addr1
,
3113 hwaddr l
, MemoryRegion
*mr
)
3117 MemTxResult result
= MEMTX_OK
;
3118 bool release_lock
= false;
3121 if (!memory_access_is_direct(mr
, true)) {
3122 release_lock
|= prepare_mmio_access(mr
);
3123 l
= memory_access_size(mr
, l
, addr1
);
3124 /* XXX: could force current_cpu to NULL to avoid
3126 val
= ldn_he_p(buf
, l
);
3127 result
|= memory_region_dispatch_write(mr
, addr1
, val
,
3128 size_memop(l
), attrs
);
3131 ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
3132 memcpy(ptr
, buf
, l
);
3133 invalidate_and_set_dirty(mr
, addr1
, l
);
3137 qemu_mutex_unlock_iothread();
3138 release_lock
= false;
3150 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
3156 /* Called from RCU critical section. */
3157 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
3158 const uint8_t *buf
, hwaddr len
)
3163 MemTxResult result
= MEMTX_OK
;
3166 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true, attrs
);
3167 result
= flatview_write_continue(fv
, addr
, attrs
, buf
, len
,
3173 /* Called within RCU critical section. */
3174 MemTxResult
flatview_read_continue(FlatView
*fv
, hwaddr addr
,
3175 MemTxAttrs attrs
, uint8_t *buf
,
3176 hwaddr len
, hwaddr addr1
, hwaddr l
,
3181 MemTxResult result
= MEMTX_OK
;
3182 bool release_lock
= false;
3185 if (!memory_access_is_direct(mr
, false)) {
3187 release_lock
|= prepare_mmio_access(mr
);
3188 l
= memory_access_size(mr
, l
, addr1
);
3189 result
|= memory_region_dispatch_read(mr
, addr1
, &val
,
3190 size_memop(l
), attrs
);
3191 stn_he_p(buf
, l
, val
);
3194 ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
3195 memcpy(buf
, ptr
, l
);
3199 qemu_mutex_unlock_iothread();
3200 release_lock
= false;
3212 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
3218 /* Called from RCU critical section. */
3219 static MemTxResult
flatview_read(FlatView
*fv
, hwaddr addr
,
3220 MemTxAttrs attrs
, uint8_t *buf
, hwaddr len
)
3227 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false, attrs
);
3228 return flatview_read_continue(fv
, addr
, attrs
, buf
, len
,
3232 MemTxResult
address_space_read_full(AddressSpace
*as
, hwaddr addr
,
3233 MemTxAttrs attrs
, uint8_t *buf
, hwaddr len
)
3235 MemTxResult result
= MEMTX_OK
;
3239 RCU_READ_LOCK_GUARD();
3240 fv
= address_space_to_flatview(as
);
3241 result
= flatview_read(fv
, addr
, attrs
, buf
, len
);
3247 MemTxResult
address_space_write(AddressSpace
*as
, hwaddr addr
,
3249 const uint8_t *buf
, hwaddr len
)
3251 MemTxResult result
= MEMTX_OK
;
3255 RCU_READ_LOCK_GUARD();
3256 fv
= address_space_to_flatview(as
);
3257 result
= flatview_write(fv
, addr
, attrs
, buf
, len
);
3263 MemTxResult
address_space_rw(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
,
3264 uint8_t *buf
, hwaddr len
, bool is_write
)
3267 return address_space_write(as
, addr
, attrs
, buf
, len
);
3269 return address_space_read_full(as
, addr
, attrs
, buf
, len
);
3273 void cpu_physical_memory_rw(hwaddr addr
, uint8_t *buf
,
3274 hwaddr len
, int is_write
)
3276 address_space_rw(&address_space_memory
, addr
, MEMTXATTRS_UNSPECIFIED
,
3277 buf
, len
, is_write
);
3280 enum write_rom_type
{
3285 static inline MemTxResult
address_space_write_rom_internal(AddressSpace
*as
,
3290 enum write_rom_type type
)
3297 RCU_READ_LOCK_GUARD();
3300 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true, attrs
);
3302 if (!(memory_region_is_ram(mr
) ||
3303 memory_region_is_romd(mr
))) {
3304 l
= memory_access_size(mr
, l
, addr1
);
3307 ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
3310 memcpy(ptr
, buf
, l
);
3311 invalidate_and_set_dirty(mr
, addr1
, l
);
3314 flush_icache_range((uintptr_t)ptr
, (uintptr_t)ptr
+ l
);
3325 /* used for ROM loading : can write in RAM and ROM */
3326 MemTxResult
address_space_write_rom(AddressSpace
*as
, hwaddr addr
,
3328 const uint8_t *buf
, hwaddr len
)
3330 return address_space_write_rom_internal(as
, addr
, attrs
,
3331 buf
, len
, WRITE_DATA
);
3334 void cpu_flush_icache_range(hwaddr start
, hwaddr len
)
3337 * This function should do the same thing as an icache flush that was
3338 * triggered from within the guest. For TCG we are always cache coherent,
3339 * so there is no need to flush anything. For KVM / Xen we need to flush
3340 * the host's instruction cache at least.
3342 if (tcg_enabled()) {
3346 address_space_write_rom_internal(&address_space_memory
,
3347 start
, MEMTXATTRS_UNSPECIFIED
,
3348 NULL
, len
, FLUSH_CACHE
);
3359 static BounceBuffer bounce
;
3361 typedef struct MapClient
{
3363 QLIST_ENTRY(MapClient
) link
;
3366 QemuMutex map_client_list_lock
;
3367 static QLIST_HEAD(, MapClient
) map_client_list
3368 = QLIST_HEAD_INITIALIZER(map_client_list
);
3370 static void cpu_unregister_map_client_do(MapClient
*client
)
3372 QLIST_REMOVE(client
, link
);
3376 static void cpu_notify_map_clients_locked(void)
3380 while (!QLIST_EMPTY(&map_client_list
)) {
3381 client
= QLIST_FIRST(&map_client_list
);
3382 qemu_bh_schedule(client
->bh
);
3383 cpu_unregister_map_client_do(client
);
3387 void cpu_register_map_client(QEMUBH
*bh
)
3389 MapClient
*client
= g_malloc(sizeof(*client
));
3391 qemu_mutex_lock(&map_client_list_lock
);
3393 QLIST_INSERT_HEAD(&map_client_list
, client
, link
);
3394 if (!atomic_read(&bounce
.in_use
)) {
3395 cpu_notify_map_clients_locked();
3397 qemu_mutex_unlock(&map_client_list_lock
);
3400 void cpu_exec_init_all(void)
3402 qemu_mutex_init(&ram_list
.mutex
);
3403 /* The data structures we set up here depend on knowing the page size,
3404 * so no more changes can be made after this point.
3405 * In an ideal world, nothing we did before we had finished the
3406 * machine setup would care about the target page size, and we could
3407 * do this much later, rather than requiring board models to state
3408 * up front what their requirements are.
3410 finalize_target_page_bits();
3413 qemu_mutex_init(&map_client_list_lock
);
3416 void cpu_unregister_map_client(QEMUBH
*bh
)
3420 qemu_mutex_lock(&map_client_list_lock
);
3421 QLIST_FOREACH(client
, &map_client_list
, link
) {
3422 if (client
->bh
== bh
) {
3423 cpu_unregister_map_client_do(client
);
3427 qemu_mutex_unlock(&map_client_list_lock
);
3430 static void cpu_notify_map_clients(void)
3432 qemu_mutex_lock(&map_client_list_lock
);
3433 cpu_notify_map_clients_locked();
3434 qemu_mutex_unlock(&map_client_list_lock
);
3437 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, hwaddr len
,
3438 bool is_write
, MemTxAttrs attrs
)
3445 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3446 if (!memory_access_is_direct(mr
, is_write
)) {
3447 l
= memory_access_size(mr
, l
, addr
);
3448 if (!memory_region_access_valid(mr
, xlat
, l
, is_write
, attrs
)) {
3459 bool address_space_access_valid(AddressSpace
*as
, hwaddr addr
,
3460 hwaddr len
, bool is_write
,
3466 RCU_READ_LOCK_GUARD();
3467 fv
= address_space_to_flatview(as
);
3468 result
= flatview_access_valid(fv
, addr
, len
, is_write
, attrs
);
3473 flatview_extend_translation(FlatView
*fv
, hwaddr addr
,
3475 MemoryRegion
*mr
, hwaddr base
, hwaddr len
,
3476 bool is_write
, MemTxAttrs attrs
)
3480 MemoryRegion
*this_mr
;
3486 if (target_len
== 0) {
3491 this_mr
= flatview_translate(fv
, addr
, &xlat
,
3492 &len
, is_write
, attrs
);
3493 if (this_mr
!= mr
|| xlat
!= base
+ done
) {
3499 /* Map a physical memory region into a host virtual address.
3500 * May map a subset of the requested range, given by and returned in *plen.
3501 * May return NULL if resources needed to perform the mapping are exhausted.
3502 * Use only for reads OR writes - not for read-modify-write operations.
3503 * Use cpu_register_map_client() to know when retrying the map operation is
3504 * likely to succeed.
3506 void *address_space_map(AddressSpace
*as
,
3523 RCU_READ_LOCK_GUARD();
3524 fv
= address_space_to_flatview(as
);
3525 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
, attrs
);
3527 if (!memory_access_is_direct(mr
, is_write
)) {
3528 if (atomic_xchg(&bounce
.in_use
, true)) {
3531 /* Avoid unbounded allocations */
3532 l
= MIN(l
, TARGET_PAGE_SIZE
);
3533 bounce
.buffer
= qemu_memalign(TARGET_PAGE_SIZE
, l
);
3537 memory_region_ref(mr
);
3540 flatview_read(fv
, addr
, MEMTXATTRS_UNSPECIFIED
,
3545 return bounce
.buffer
;
3549 memory_region_ref(mr
);
3550 *plen
= flatview_extend_translation(fv
, addr
, len
, mr
, xlat
,
3551 l
, is_write
, attrs
);
3552 ptr
= qemu_ram_ptr_length(mr
->ram_block
, xlat
, plen
, true);
3557 /* Unmaps a memory region previously mapped by address_space_map().
3558 * Will also mark the memory as dirty if is_write == 1. access_len gives
3559 * the amount of memory that was actually read or written by the caller.
3561 void address_space_unmap(AddressSpace
*as
, void *buffer
, hwaddr len
,
3562 int is_write
, hwaddr access_len
)
3564 if (buffer
!= bounce
.buffer
) {
3568 mr
= memory_region_from_host(buffer
, &addr1
);
3571 invalidate_and_set_dirty(mr
, addr1
, access_len
);
3573 if (xen_enabled()) {
3574 xen_invalidate_map_cache_entry(buffer
);
3576 memory_region_unref(mr
);
3580 address_space_write(as
, bounce
.addr
, MEMTXATTRS_UNSPECIFIED
,
3581 bounce
.buffer
, access_len
);
3583 qemu_vfree(bounce
.buffer
);
3584 bounce
.buffer
= NULL
;
3585 memory_region_unref(bounce
.mr
);
3586 atomic_mb_set(&bounce
.in_use
, false);
3587 cpu_notify_map_clients();
3590 void *cpu_physical_memory_map(hwaddr addr
,
3594 return address_space_map(&address_space_memory
, addr
, plen
, is_write
,
3595 MEMTXATTRS_UNSPECIFIED
);
3598 void cpu_physical_memory_unmap(void *buffer
, hwaddr len
,
3599 int is_write
, hwaddr access_len
)
3601 return address_space_unmap(&address_space_memory
, buffer
, len
, is_write
, access_len
);
3604 #define ARG1_DECL AddressSpace *as
3607 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3608 #define RCU_READ_LOCK(...) rcu_read_lock()
3609 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3610 #include "memory_ldst.inc.c"
3612 int64_t address_space_cache_init(MemoryRegionCache
*cache
,
3618 AddressSpaceDispatch
*d
;
3625 cache
->fv
= address_space_get_flatview(as
);
3626 d
= flatview_to_dispatch(cache
->fv
);
3627 cache
->mrs
= *address_space_translate_internal(d
, addr
, &cache
->xlat
, &l
, true);
3630 memory_region_ref(mr
);
3631 if (memory_access_is_direct(mr
, is_write
)) {
3632 /* We don't care about the memory attributes here as we're only
3633 * doing this if we found actual RAM, which behaves the same
3634 * regardless of attributes; so UNSPECIFIED is fine.
3636 l
= flatview_extend_translation(cache
->fv
, addr
, len
, mr
,
3637 cache
->xlat
, l
, is_write
,
3638 MEMTXATTRS_UNSPECIFIED
);
3639 cache
->ptr
= qemu_ram_ptr_length(mr
->ram_block
, cache
->xlat
, &l
, true);
3645 cache
->is_write
= is_write
;
3649 void address_space_cache_invalidate(MemoryRegionCache
*cache
,
3653 assert(cache
->is_write
);
3654 if (likely(cache
->ptr
)) {
3655 invalidate_and_set_dirty(cache
->mrs
.mr
, addr
+ cache
->xlat
, access_len
);
3659 void address_space_cache_destroy(MemoryRegionCache
*cache
)
3661 if (!cache
->mrs
.mr
) {
3665 if (xen_enabled()) {
3666 xen_invalidate_map_cache_entry(cache
->ptr
);
3668 memory_region_unref(cache
->mrs
.mr
);
3669 flatview_unref(cache
->fv
);
3670 cache
->mrs
.mr
= NULL
;
3674 /* Called from RCU critical section. This function has the same
3675 * semantics as address_space_translate, but it only works on a
3676 * predefined range of a MemoryRegion that was mapped with
3677 * address_space_cache_init.
3679 static inline MemoryRegion
*address_space_translate_cached(
3680 MemoryRegionCache
*cache
, hwaddr addr
, hwaddr
*xlat
,
3681 hwaddr
*plen
, bool is_write
, MemTxAttrs attrs
)
3683 MemoryRegionSection section
;
3685 IOMMUMemoryRegion
*iommu_mr
;
3686 AddressSpace
*target_as
;
3688 assert(!cache
->ptr
);
3689 *xlat
= addr
+ cache
->xlat
;
3692 iommu_mr
= memory_region_get_iommu(mr
);
3698 section
= address_space_translate_iommu(iommu_mr
, xlat
, plen
,
3699 NULL
, is_write
, true,
3704 /* Called from RCU critical section. address_space_read_cached uses this
3705 * out of line function when the target is an MMIO or IOMMU region.
3708 address_space_read_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3709 void *buf
, hwaddr len
)
3715 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, false,
3716 MEMTXATTRS_UNSPECIFIED
);
3717 flatview_read_continue(cache
->fv
,
3718 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3722 /* Called from RCU critical section. address_space_write_cached uses this
3723 * out of line function when the target is an MMIO or IOMMU region.
3726 address_space_write_cached_slow(MemoryRegionCache
*cache
, hwaddr addr
,
3727 const void *buf
, hwaddr len
)
3733 mr
= address_space_translate_cached(cache
, addr
, &addr1
, &l
, true,
3734 MEMTXATTRS_UNSPECIFIED
);
3735 flatview_write_continue(cache
->fv
,
3736 addr
, MEMTXATTRS_UNSPECIFIED
, buf
, len
,
3740 #define ARG1_DECL MemoryRegionCache *cache
3742 #define SUFFIX _cached_slow
3743 #define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
3744 #define RCU_READ_LOCK() ((void)0)
3745 #define RCU_READ_UNLOCK() ((void)0)
3746 #include "memory_ldst.inc.c"
3748 /* virtual memory access for debug (includes writing to ROM) */
3749 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
3750 uint8_t *buf
, target_ulong len
, int is_write
)
3753 target_ulong l
, page
;
3755 cpu_synchronize_state(cpu
);
3760 page
= addr
& TARGET_PAGE_MASK
;
3761 phys_addr
= cpu_get_phys_page_attrs_debug(cpu
, page
, &attrs
);
3762 asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
3763 /* if no physical page mapped, return an error */
3764 if (phys_addr
== -1)
3766 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3769 phys_addr
+= (addr
& ~TARGET_PAGE_MASK
);
3771 address_space_write_rom(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3774 address_space_rw(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3785 * Allows code that needs to deal with migration bitmaps etc to still be built
3786 * target independent.
3788 size_t qemu_target_page_size(void)
3790 return TARGET_PAGE_SIZE
;
3793 int qemu_target_page_bits(void)
3795 return TARGET_PAGE_BITS
;
3798 int qemu_target_page_bits_min(void)
3800 return TARGET_PAGE_BITS_MIN
;
3804 bool target_words_bigendian(void)
3806 #if defined(TARGET_WORDS_BIGENDIAN)
3813 #ifndef CONFIG_USER_ONLY
3814 bool cpu_physical_memory_is_io(hwaddr phys_addr
)
3820 RCU_READ_LOCK_GUARD();
3821 mr
= address_space_translate(&address_space_memory
,
3822 phys_addr
, &phys_addr
, &l
, false,
3823 MEMTXATTRS_UNSPECIFIED
);
3825 res
= !(memory_region_is_ram(mr
) || memory_region_is_romd(mr
));
3829 int qemu_ram_foreach_block(RAMBlockIterFunc func
, void *opaque
)
3834 RCU_READ_LOCK_GUARD();
3835 RAMBLOCK_FOREACH(block
) {
3836 ret
= func(block
, opaque
);
3845 * Unmap pages of memory from start to start+length such that
3846 * they a) read as 0, b) Trigger whatever fault mechanism
3847 * the OS provides for postcopy.
3848 * The pages must be unmapped by the end of the function.
3849 * Returns: 0 on success, none-0 on failure
3852 int ram_block_discard_range(RAMBlock
*rb
, uint64_t start
, size_t length
)
3856 uint8_t *host_startaddr
= rb
->host
+ start
;
3858 if ((uintptr_t)host_startaddr
& (rb
->page_size
- 1)) {
3859 error_report("ram_block_discard_range: Unaligned start address: %p",
3864 if ((start
+ length
) <= rb
->used_length
) {
3865 bool need_madvise
, need_fallocate
;
3866 uint8_t *host_endaddr
= host_startaddr
+ length
;
3867 if ((uintptr_t)host_endaddr
& (rb
->page_size
- 1)) {
3868 error_report("ram_block_discard_range: Unaligned end address: %p",
3873 errno
= ENOTSUP
; /* If we are missing MADVISE etc */
3875 /* The logic here is messy;
3876 * madvise DONTNEED fails for hugepages
3877 * fallocate works on hugepages and shmem
3879 need_madvise
= (rb
->page_size
== qemu_host_page_size
);
3880 need_fallocate
= rb
->fd
!= -1;
3881 if (need_fallocate
) {
3882 /* For a file, this causes the area of the file to be zero'd
3883 * if read, and for hugetlbfs also causes it to be unmapped
3884 * so a userfault will trigger.
3886 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3887 ret
= fallocate(rb
->fd
, FALLOC_FL_PUNCH_HOLE
| FALLOC_FL_KEEP_SIZE
,
3891 error_report("ram_block_discard_range: Failed to fallocate "
3892 "%s:%" PRIx64
" +%zx (%d)",
3893 rb
->idstr
, start
, length
, ret
);
3898 error_report("ram_block_discard_range: fallocate not available/file"
3899 "%s:%" PRIx64
" +%zx (%d)",
3900 rb
->idstr
, start
, length
, ret
);
3905 /* For normal RAM this causes it to be unmapped,
3906 * for shared memory it causes the local mapping to disappear
3907 * and to fall back on the file contents (which we just
3908 * fallocate'd away).
3910 #if defined(CONFIG_MADVISE)
3911 ret
= madvise(host_startaddr
, length
, MADV_DONTNEED
);
3914 error_report("ram_block_discard_range: Failed to discard range "
3915 "%s:%" PRIx64
" +%zx (%d)",
3916 rb
->idstr
, start
, length
, ret
);
3921 error_report("ram_block_discard_range: MADVISE not available"
3922 "%s:%" PRIx64
" +%zx (%d)",
3923 rb
->idstr
, start
, length
, ret
);
3927 trace_ram_block_discard_range(rb
->idstr
, host_startaddr
, length
,
3928 need_madvise
, need_fallocate
, ret
);
3930 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
3931 "/%zx/" RAM_ADDR_FMT
")",
3932 rb
->idstr
, start
, length
, rb
->used_length
);
3939 bool ramblock_is_pmem(RAMBlock
*rb
)
3941 return rb
->flags
& RAM_PMEM
;
3946 void page_size_init(void)
3948 /* NOTE: we can always suppose that qemu_host_page_size >=
3950 if (qemu_host_page_size
== 0) {
3951 qemu_host_page_size
= qemu_real_host_page_size
;
3953 if (qemu_host_page_size
< TARGET_PAGE_SIZE
) {
3954 qemu_host_page_size
= TARGET_PAGE_SIZE
;
3956 qemu_host_page_mask
= -(intptr_t)qemu_host_page_size
;
3959 #if !defined(CONFIG_USER_ONLY)
3961 static void mtree_print_phys_entries(int start
, int end
, int skip
, int ptr
)
3963 if (start
== end
- 1) {
3964 qemu_printf("\t%3d ", start
);
3966 qemu_printf("\t%3d..%-3d ", start
, end
- 1);
3968 qemu_printf(" skip=%d ", skip
);
3969 if (ptr
== PHYS_MAP_NODE_NIL
) {
3970 qemu_printf(" ptr=NIL");
3972 qemu_printf(" ptr=#%d", ptr
);
3974 qemu_printf(" ptr=[%d]", ptr
);
3979 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3980 int128_sub((size), int128_one())) : 0)
3982 void mtree_print_dispatch(AddressSpaceDispatch
*d
, MemoryRegion
*root
)
3986 qemu_printf(" Dispatch\n");
3987 qemu_printf(" Physical sections\n");
3989 for (i
= 0; i
< d
->map
.sections_nb
; ++i
) {
3990 MemoryRegionSection
*s
= d
->map
.sections
+ i
;
3991 const char *names
[] = { " [unassigned]", " [not dirty]",
3992 " [ROM]", " [watch]" };
3994 qemu_printf(" #%d @" TARGET_FMT_plx
".." TARGET_FMT_plx
3997 s
->offset_within_address_space
,
3998 s
->offset_within_address_space
+ MR_SIZE(s
->mr
->size
),
3999 s
->mr
->name
? s
->mr
->name
: "(noname)",
4000 i
< ARRAY_SIZE(names
) ? names
[i
] : "",
4001 s
->mr
== root
? " [ROOT]" : "",
4002 s
== d
->mru_section
? " [MRU]" : "",
4003 s
->mr
->is_iommu
? " [iommu]" : "");
4006 qemu_printf(" alias=%s", s
->mr
->alias
->name
?
4007 s
->mr
->alias
->name
: "noname");
4012 qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
4013 P_L2_BITS
, P_L2_LEVELS
, d
->phys_map
.ptr
, d
->phys_map
.skip
);
4014 for (i
= 0; i
< d
->map
.nodes_nb
; ++i
) {
4017 Node
*n
= d
->map
.nodes
+ i
;
4019 qemu_printf(" [%d]\n", i
);
4021 for (j
= 0, jprev
= 0, prev
= *n
[0]; j
< ARRAY_SIZE(*n
); ++j
) {
4022 PhysPageEntry
*pe
= *n
+ j
;
4024 if (pe
->ptr
== prev
.ptr
&& pe
->skip
== prev
.skip
) {
4028 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);
4034 if (jprev
!= ARRAY_SIZE(*n
)) {
4035 mtree_print_phys_entries(jprev
, j
, prev
.skip
, prev
.ptr
);