accel/tcg/translator.c

   1 /*
   2  * Generic intermediate code generation.
   3  *
   4  * Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu>
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  */
   9
  10 #include "qemu/osdep.h"
  11 #include "qemu/log.h"
  12 #include "qemu/error-report.h"
  13 #include "exec/exec-all.h"
  14 #include "exec/translator.h"
  15 #include "exec/cpu_ldst.h"
  16 #include "exec/plugin-gen.h"
  17 #include "exec/cpu_ldst.h"
  18 #include "tcg/tcg-op-common.h"
  19 #include "internal-target.h"
  20
  21 static void set_can_do_io(DisasContextBase *db, bool val)
  22 {
  23     QEMU_BUILD_BUG_ON(sizeof_field(CPUState, neg.can_do_io) != 1);
  24     tcg_gen_st8_i32(tcg_constant_i32(val), tcg_env,
  25                     offsetof(ArchCPU, parent_obj.neg.can_do_io) -
  26                     offsetof(ArchCPU, env));
  27 }
  28
  29 bool translator_io_start(DisasContextBase *db)
  30 {
  31     /*
  32      * Ensure that this instruction will be the last in the TB.
  33      * The target may override this to something more forceful.
  34      */
  35     if (db->is_jmp == DISAS_NEXT) {
  36         db->is_jmp = DISAS_TOO_MANY;
  37     }
  38     return true;
  39 }
  40
  41 static TCGOp *gen_tb_start(DisasContextBase *db, uint32_t cflags)
  42 {
  43     TCGv_i32 count = NULL;
  44     TCGOp *icount_start_insn = NULL;
  45
  46     if ((cflags & CF_USE_ICOUNT) || !(cflags & CF_NOIRQ)) {
  47         count = tcg_temp_new_i32();
  48         tcg_gen_ld_i32(count, tcg_env,
  49                        offsetof(ArchCPU, parent_obj.neg.icount_decr.u32)
  50                        - offsetof(ArchCPU, env));
  51     }
  52
  53     if (cflags & CF_USE_ICOUNT) {
  54         /*
  55          * We emit a sub with a dummy immediate argument. Keep the insn index
  56          * of the sub so that we later (when we know the actual insn count)
  57          * can update the argument with the actual insn count.
  58          */
  59         tcg_gen_sub_i32(count, count, tcg_constant_i32(0));
  60         icount_start_insn = tcg_last_op();
  61     }
  62
  63     /*
  64      * Emit the check against icount_decr.u32 to see if we should exit
  65      * unless we suppress the check with CF_NOIRQ. If we are using
  66      * icount and have suppressed interruption the higher level code
  67      * should have ensured we don't run more instructions than the
  68      * budget.
  69      */
  70     if (cflags & CF_NOIRQ) {
  71         tcg_ctx->exitreq_label = NULL;
  72     } else {
  73         tcg_ctx->exitreq_label = gen_new_label();
  74         tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, tcg_ctx->exitreq_label);
  75     }
  76
  77     if (cflags & CF_USE_ICOUNT) {
  78         tcg_gen_st16_i32(count, tcg_env,
  79                          offsetof(ArchCPU, parent_obj.neg.icount_decr.u16.low)
  80                          - offsetof(ArchCPU, env));
  81     }
  82
  83     return icount_start_insn;
  84 }
  85
  86 static void gen_tb_end(const TranslationBlock *tb, uint32_t cflags,
  87                        TCGOp *icount_start_insn, int num_insns)
  88 {
  89     if (cflags & CF_USE_ICOUNT) {
  90         /*
  91          * Update the num_insn immediate parameter now that we know
  92          * the actual insn count.
  93          */
  94         tcg_set_insn_param(icount_start_insn, 2,
  95                            tcgv_i32_arg(tcg_constant_i32(num_insns)));
  96     }
  97
  98     if (tcg_ctx->exitreq_label) {
  99         gen_set_label(tcg_ctx->exitreq_label);
 100         tcg_gen_exit_tb(tb, TB_EXIT_REQUESTED);
 101     }
 102 }
 103
 104 bool translator_use_goto_tb(DisasContextBase *db, vaddr dest)
 105 {
 106     /* Suppress goto_tb if requested. */
 107     if (tb_cflags(db->tb) & CF_NO_GOTO_TB) {
 108         return false;
 109     }
 110
 111     /* Check for the dest on the same page as the start of the TB.  */
 112     return ((db->pc_first ^ dest) & TARGET_PAGE_MASK) == 0;
 113 }
 114
 115 void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
 116                      vaddr pc, void *host_pc, const TranslatorOps *ops,
 117                      DisasContextBase *db)
 118 {
 119     uint32_t cflags = tb_cflags(tb);
 120     TCGOp *icount_start_insn;
 121     TCGOp *first_insn_start = NULL;
 122     bool plugin_enabled;
 123
 124     /* Initialize DisasContext */
 125     db->tb = tb;
 126     db->pc_first = pc;
 127     db->pc_next = pc;
 128     db->is_jmp = DISAS_NEXT;
 129     db->num_insns = 0;
 130     db->max_insns = *max_insns;
 131     db->singlestep_enabled = cflags & CF_SINGLE_STEP;
 132     db->insn_start = NULL;
 133     db->host_addr[0] = host_pc;
 134     db->host_addr[1] = NULL;
 135
 136     ops->init_disas_context(db, cpu);
 137     tcg_debug_assert(db->is_jmp == DISAS_NEXT);  /* no early exit */
 138
 139     /* Start translating.  */
 140     icount_start_insn = gen_tb_start(db, cflags);
 141     ops->tb_start(db, cpu);
 142     tcg_debug_assert(db->is_jmp == DISAS_NEXT);  /* no early exit */
 143
 144     plugin_enabled = plugin_gen_tb_start(cpu, db, cflags & CF_MEMI_ONLY);
 145     db->plugin_enabled = plugin_enabled;
 146
 147     while (true) {
 148         *max_insns = ++db->num_insns;
 149         ops->insn_start(db, cpu);
 150         db->insn_start = tcg_last_op();
 151         if (first_insn_start == NULL) {
 152             first_insn_start = db->insn_start;
 153         }
 154         tcg_debug_assert(db->is_jmp == DISAS_NEXT);  /* no early exit */
 155
 156         if (plugin_enabled) {
 157             plugin_gen_insn_start(cpu, db);
 158         }
 159
 160         /*
 161          * Disassemble one instruction.  The translate_insn hook should
 162          * update db->pc_next and db->is_jmp to indicate what should be
 163          * done next -- either exiting this loop or locate the start of
 164          * the next instruction.
 165          */
 166         ops->translate_insn(db, cpu);
 167
 168         /*
 169          * We can't instrument after instructions that change control
 170          * flow although this only really affects post-load operations.
 171          *
 172          * Calling plugin_gen_insn_end() before we possibly stop translation
 173          * is important. Even if this ends up as dead code, plugin generation
 174          * needs to see a matching plugin_gen_insn_{start,end}() pair in order
 175          * to accurately track instrumented helpers that might access memory.
 176          */
 177         if (plugin_enabled) {
 178             plugin_gen_insn_end();
 179         }
 180
 181         /* Stop translation if translate_insn so indicated.  */
 182         if (db->is_jmp != DISAS_NEXT) {
 183             break;
 184         }
 185
 186         /* Stop translation if the output buffer is full,
 187            or we have executed all of the allowed instructions.  */
 188         if (tcg_op_buf_full() || db->num_insns >= db->max_insns) {
 189             db->is_jmp = DISAS_TOO_MANY;
 190             break;
 191         }
 192     }
 193
 194     /* Emit code to exit the TB, as indicated by db->is_jmp.  */
 195     ops->tb_stop(db, cpu);
 196     gen_tb_end(tb, cflags, icount_start_insn, db->num_insns);
 197
 198     /*
 199      * Manage can_do_io for the translation block: set to false before
 200      * the first insn and set to true before the last insn.
 201      */
 202     if (db->num_insns == 1) {
 203         tcg_debug_assert(first_insn_start == db->insn_start);
 204     } else {
 205         tcg_debug_assert(first_insn_start != db->insn_start);
 206         tcg_ctx->emit_before_op = first_insn_start;
 207         set_can_do_io(db, false);
 208     }
 209     tcg_ctx->emit_before_op = db->insn_start;
 210     set_can_do_io(db, true);
 211     tcg_ctx->emit_before_op = NULL;
 212
 213     if (plugin_enabled) {
 214         plugin_gen_tb_end(cpu, db->num_insns);
 215     }
 216
 217     /* The disas_log hook may use these values rather than recompute.  */
 218     tb->size = db->pc_next - db->pc_first;
 219     tb->icount = db->num_insns;
 220
 221     if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
 222         && qemu_log_in_addr_range(db->pc_first)) {
 223         FILE *logfile = qemu_log_trylock();
 224         if (logfile) {
 225             fprintf(logfile, "----------------\n");
 226             ops->disas_log(db, cpu, logfile);
 227             fprintf(logfile, "\n");
 228             qemu_log_unlock(logfile);
 229         }
 230     }
 231 }
 232
 233 static bool translator_ld(CPUArchState *env, DisasContextBase *db,
 234                           void *dest, vaddr pc, size_t len)
 235 {
 236     TranslationBlock *tb = db->tb;
 237     vaddr last = pc + len - 1;
 238     void *host;
 239     vaddr base;
 240
 241     /* Use slow path if first page is MMIO. */
 242     if (unlikely(tb_page_addr0(tb) == -1)) {
 243         return false;
 244     }
 245
 246     host = db->host_addr[0];
 247     base = db->pc_first;
 248
 249     if (likely(((base ^ last) & TARGET_PAGE_MASK) == 0)) {
 250         /* Entire read is from the first page. */
 251         memcpy(dest, host + (pc - base), len);
 252         return true;
 253     }
 254
 255     if (unlikely(((base ^ pc) & TARGET_PAGE_MASK) == 0)) {
 256         /* Read begins on the first page and extends to the second. */
 257         size_t len0 = -(pc | TARGET_PAGE_MASK);
 258         memcpy(dest, host + (pc - base), len0);
 259         pc += len0;
 260         dest += len0;
 261         len -= len0;
 262     }
 263
 264     /*
 265      * The read must conclude on the second page and not extend to a third.
 266      *
 267      * TODO: We could allow the two pages to be virtually discontiguous,
 268      * since we already allow the two pages to be physically discontiguous.
 269      * The only reasonable use case would be executing an insn at the end
 270      * of the address space wrapping around to the beginning.  For that,
 271      * we would need to know the current width of the address space.
 272      * In the meantime, assert.
 273      */
 274     base = (base & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
 275     assert(((base ^ pc) & TARGET_PAGE_MASK) == 0);
 276     assert(((base ^ last) & TARGET_PAGE_MASK) == 0);
 277     host = db->host_addr[1];
 278
 279     if (host == NULL) {
 280         tb_page_addr_t page0, old_page1, new_page1;
 281
 282         new_page1 = get_page_addr_code_hostp(env, base, &db->host_addr[1]);
 283
 284         /*
 285          * If the second page is MMIO, treat as if the first page
 286          * was MMIO as well, so that we do not cache the TB.
 287          */
 288         if (unlikely(new_page1 == -1)) {
 289             tb_unlock_pages(tb);
 290             tb_set_page_addr0(tb, -1);
 291             return false;
 292         }
 293
 294         /*
 295          * If this is not the first time around, and page1 matches,
 296          * then we already have the page locked.  Alternately, we're
 297          * not doing anything to prevent the PTE from changing, so
 298          * we might wind up with a different page, requiring us to
 299          * re-do the locking.
 300          */
 301         old_page1 = tb_page_addr1(tb);
 302         if (likely(new_page1 != old_page1)) {
 303             page0 = tb_page_addr0(tb);
 304             if (unlikely(old_page1 != -1)) {
 305                 tb_unlock_page1(page0, old_page1);
 306             }
 307             tb_set_page_addr1(tb, new_page1);
 308             tb_lock_page1(page0, new_page1);
 309         }
 310         host = db->host_addr[1];
 311     }
 312
 313     memcpy(dest, host + (pc - base), len);
 314     return true;
 315 }
 316
 317 static void plugin_insn_append(vaddr pc, const void *from, size_t size)
 318 {
 319 #ifdef CONFIG_PLUGIN
 320     struct qemu_plugin_insn *insn = tcg_ctx->plugin_insn;
 321     size_t off;
 322
 323     if (insn == NULL) {
 324         return;
 325     }
 326     off = pc - insn->vaddr;
 327     if (off < insn->data->len) {
 328         g_byte_array_set_size(insn->data, off);
 329     } else if (off > insn->data->len) {
 330         /* we have an unexpected gap */
 331         g_assert_not_reached();
 332     }
 333
 334     insn->data = g_byte_array_append(insn->data, from, size);
 335 #endif
 336 }
 337
 338 uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc)
 339 {
 340     uint8_t raw;
 341
 342     if (!translator_ld(env, db, &raw, pc, sizeof(raw))) {
 343         raw = cpu_ldub_code(env, pc);
 344     }
 345     plugin_insn_append(pc, &raw, sizeof(raw));
 346     return raw;
 347 }
 348
 349 uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
 350 {
 351     uint16_t raw, tgt;
 352
 353     if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
 354         tgt = tswap16(raw);
 355     } else {
 356         tgt = cpu_lduw_code(env, pc);
 357         raw = tswap16(tgt);
 358     }
 359     plugin_insn_append(pc, &raw, sizeof(raw));
 360     return tgt;
 361 }
 362
 363 uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
 364 {
 365     uint32_t raw, tgt;
 366
 367     if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
 368         tgt = tswap32(raw);
 369     } else {
 370         tgt = cpu_ldl_code(env, pc);
 371         raw = tswap32(tgt);
 372     }
 373     plugin_insn_append(pc, &raw, sizeof(raw));
 374     return tgt;
 375 }
 376
 377 uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
 378 {
 379     uint64_t raw, tgt;
 380
 381     if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
 382         tgt = tswap64(raw);
 383     } else {
 384         tgt = cpu_ldq_code(env, pc);
 385         raw = tswap64(tgt);
 386     }
 387     plugin_insn_append(pc, &raw, sizeof(raw));
 388     return tgt;
 389 }
 390
 391 void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8)
 392 {
 393     plugin_insn_append(pc, &insn8, sizeof(insn8));
 394 }