2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 #include "mac_dbdma.h"
40 #define VGA_BIOS_SIZE 65536
41 #define CFG_ADDR 0xf0000510
47 #define UNIN_DPRINTF(fmt, args...) \
48 do { printf("UNIN: " fmt , ##args); } while (0)
50 #define UNIN_DPRINTF(fmt, args...)
54 static void unin_writel (void *opaque
, target_phys_addr_t addr
, uint32_t value
)
56 UNIN_DPRINTF("writel addr " TARGET_FMT_plx
" val %x\n", addr
, value
);
59 static uint32_t unin_readl (void *opaque
, target_phys_addr_t addr
)
64 UNIN_DPRINTF("readl addr " TARGET_FMT_plx
" val %x\n", addr
, value
);
69 static CPUWriteMemoryFunc
*unin_write
[] = {
75 static CPUReadMemoryFunc
*unin_read
[] = {
81 static int fw_cfg_boot_set(void *opaque
, const char *boot_device
)
83 fw_cfg_add_i16(opaque
, FW_CFG_BOOT_DEVICE
, boot_device
[0]);
87 /* PowerPC Mac99 hardware initialisation */
88 static void ppc_core99_init (ram_addr_t ram_size
, int vga_ram_size
,
89 const char *boot_device
,
90 const char *kernel_filename
,
91 const char *kernel_cmdline
,
92 const char *initrd_filename
,
93 const char *cpu_model
)
95 CPUState
*env
= NULL
, *envs
[MAX_CPUS
];
97 qemu_irq
*pic
, **openpic_irqs
;
100 ram_addr_t ram_offset
, bios_offset
, vga_bios_offset
;
101 uint32_t kernel_base
, kernel_size
, initrd_base
, initrd_size
;
103 MacIONVRAMState
*nvr
;
105 int vga_bios_size
, bios_size
;
107 int pic_mem_index
, dbdma_mem_index
, cuda_mem_index
, escc_mem_index
;
110 BlockDriverState
*hd
[MAX_IDE_BUS
* MAX_IDE_DEVS
];
113 uint8_t *vga_bios_ptr
;
115 linux_boot
= (kernel_filename
!= NULL
);
118 if (cpu_model
== NULL
)
120 for (i
= 0; i
< smp_cpus
; i
++) {
121 env
= cpu_init(cpu_model
);
123 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
126 /* Set time-base frequency to 100 Mhz */
127 cpu_ppc_tb_init(env
, 100UL * 1000UL * 1000UL);
129 env
->osi_call
= vga_osi_call
;
131 qemu_register_reset(&cpu_ppc_reset
, env
);
136 ram_offset
= qemu_ram_alloc(ram_size
);
137 cpu_register_physical_memory(0, ram_size
, ram_offset
);
139 /* allocate and load BIOS */
140 bios_offset
= qemu_ram_alloc(BIOS_SIZE
);
141 if (bios_name
== NULL
)
142 bios_name
= PROM_FILENAME
;
143 snprintf(buf
, sizeof(buf
), "%s/%s", bios_dir
, bios_name
);
144 cpu_register_physical_memory(PROM_ADDR
, BIOS_SIZE
, bios_offset
| IO_MEM_ROM
);
146 /* Load OpenBIOS (ELF) */
147 bios_size
= load_elf(buf
, 0, NULL
, NULL
, NULL
);
148 if (bios_size
< 0 || bios_size
> BIOS_SIZE
) {
149 cpu_abort(env
, "qemu: could not load PowerPC bios '%s'\n", buf
);
153 /* allocate and load VGA BIOS */
154 vga_bios_offset
= qemu_ram_alloc(VGA_BIOS_SIZE
);
155 vga_bios_ptr
= qemu_get_ram_ptr(vga_bios_offset
);
156 snprintf(buf
, sizeof(buf
), "%s/%s", bios_dir
, VGABIOS_FILENAME
);
157 vga_bios_size
= load_image(buf
, vga_bios_ptr
+ 8);
158 if (vga_bios_size
< 0) {
159 /* if no bios is present, we can still work */
160 fprintf(stderr
, "qemu: warning: could not load VGA bios '%s'\n", buf
);
163 /* set a specific header (XXX: find real Apple format for NDRV
165 vga_bios_ptr
[0] = 'N';
166 vga_bios_ptr
[1] = 'D';
167 vga_bios_ptr
[2] = 'R';
168 vga_bios_ptr
[3] = 'V';
169 cpu_to_be32w((uint32_t *)(vga_bios_ptr
+ 4), vga_bios_size
);
174 uint64_t lowaddr
= 0;
175 kernel_base
= KERNEL_LOAD_ADDR
;
177 /* Now we can load the kernel. The first step tries to load the kernel
178 supposing PhysAddr = 0x00000000. If that was wrong the kernel is
179 loaded again, the new PhysAddr being computed from lowaddr. */
180 kernel_size
= load_elf(kernel_filename
, kernel_base
, NULL
, &lowaddr
, NULL
);
181 if (kernel_size
> 0 && lowaddr
!= KERNEL_LOAD_ADDR
) {
182 kernel_size
= load_elf(kernel_filename
, (2 * kernel_base
) - lowaddr
,
186 kernel_size
= load_aout(kernel_filename
, kernel_base
,
187 ram_size
- kernel_base
);
189 kernel_size
= load_image_targphys(kernel_filename
,
191 ram_size
- kernel_base
);
192 if (kernel_size
< 0) {
193 cpu_abort(env
, "qemu: could not load kernel '%s'\n",
198 if (initrd_filename
) {
199 initrd_base
= INITRD_LOAD_ADDR
;
200 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
201 ram_size
- initrd_base
);
202 if (initrd_size
< 0) {
203 cpu_abort(env
, "qemu: could not load initial ram disk '%s'\n",
211 ppc_boot_device
= 'm';
217 ppc_boot_device
= '\0';
218 /* We consider that NewWorld PowerMac never have any floppy drive
219 * For now, OHW cannot boot from the network.
221 for (i
= 0; boot_device
[i
] != '\0'; i
++) {
222 if (boot_device
[i
] >= 'c' && boot_device
[i
] <= 'f') {
223 ppc_boot_device
= boot_device
[i
];
227 if (ppc_boot_device
== '\0') {
228 fprintf(stderr
, "No valid boot device for Mac99 machine\n");
233 isa_mem_base
= 0x80000000;
235 /* Register 8 MB of ISA IO space */
236 isa_mmio_init(0xf2000000, 0x00800000);
239 unin_memory
= cpu_register_io_memory(0, unin_read
, unin_write
, NULL
);
240 cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory
);
242 openpic_irqs
= qemu_mallocz(smp_cpus
* sizeof(qemu_irq
*));
244 qemu_mallocz(smp_cpus
* sizeof(qemu_irq
) * OPENPIC_OUTPUT_NB
);
245 for (i
= 0; i
< smp_cpus
; i
++) {
246 /* Mac99 IRQ connection between OpenPIC outputs pins
247 * and PowerPC input pins
249 switch (PPC_INPUT(env
)) {
250 case PPC_FLAGS_INPUT_6xx
:
251 openpic_irqs
[i
] = openpic_irqs
[0] + (i
* OPENPIC_OUTPUT_NB
);
252 openpic_irqs
[i
][OPENPIC_OUTPUT_INT
] =
253 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_INT
];
254 openpic_irqs
[i
][OPENPIC_OUTPUT_CINT
] =
255 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_INT
];
256 openpic_irqs
[i
][OPENPIC_OUTPUT_MCK
] =
257 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_MCP
];
258 /* Not connected ? */
259 openpic_irqs
[i
][OPENPIC_OUTPUT_DEBUG
] = NULL
;
261 openpic_irqs
[i
][OPENPIC_OUTPUT_RESET
] =
262 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_HRESET
];
264 #if defined(TARGET_PPC64)
265 case PPC_FLAGS_INPUT_970
:
266 openpic_irqs
[i
] = openpic_irqs
[0] + (i
* OPENPIC_OUTPUT_NB
);
267 openpic_irqs
[i
][OPENPIC_OUTPUT_INT
] =
268 ((qemu_irq
*)env
->irq_inputs
)[PPC970_INPUT_INT
];
269 openpic_irqs
[i
][OPENPIC_OUTPUT_CINT
] =
270 ((qemu_irq
*)env
->irq_inputs
)[PPC970_INPUT_INT
];
271 openpic_irqs
[i
][OPENPIC_OUTPUT_MCK
] =
272 ((qemu_irq
*)env
->irq_inputs
)[PPC970_INPUT_MCP
];
273 /* Not connected ? */
274 openpic_irqs
[i
][OPENPIC_OUTPUT_DEBUG
] = NULL
;
276 openpic_irqs
[i
][OPENPIC_OUTPUT_RESET
] =
277 ((qemu_irq
*)env
->irq_inputs
)[PPC970_INPUT_HRESET
];
279 #endif /* defined(TARGET_PPC64) */
281 cpu_abort(env
, "Bus model not supported on mac99 machine\n");
285 pic
= openpic_init(NULL
, &pic_mem_index
, smp_cpus
, openpic_irqs
, NULL
);
286 pci_bus
= pci_pmac_init(pic
);
287 /* init basic PC hardware */
288 pci_vga_init(pci_bus
, vga_ram_size
,
289 vga_bios_offset
, vga_bios_size
);
291 /* XXX: suppress that */
292 dummy_irq
= i8259_init(NULL
);
294 escc_mem_index
= escc_init(0x80013000, dummy_irq
[4], dummy_irq
[5],
295 serial_hds
[0], serial_hds
[1], ESCC_CLOCK
, 4);
297 for(i
= 0; i
< nb_nics
; i
++)
298 pci_nic_init(pci_bus
, &nd_table
[i
], -1, "ne2k_pci");
300 if (drive_get_max_bus(IF_IDE
) >= MAX_IDE_BUS
) {
301 fprintf(stderr
, "qemu: too many IDE bus\n");
304 for(i
= 0; i
< MAX_IDE_BUS
* MAX_IDE_DEVS
; i
++) {
305 index
= drive_get_index(IF_IDE
, i
/ MAX_IDE_DEVS
, i
% MAX_IDE_DEVS
);
307 hd
[i
] = drives_table
[index
].bdrv
;
311 dbdma
= DBDMA_init(&dbdma_mem_index
);
312 pci_cmd646_ide_init(pci_bus
, hd
, 0);
314 /* cuda also initialize ADB */
315 cuda_init(&cuda_mem_index
, pic
[0x19]);
317 adb_kbd_init(&adb_bus
);
318 adb_mouse_init(&adb_bus
);
321 macio_init(pci_bus
, PCI_DEVICE_ID_APPLE_UNI_N_KEYL
, 0, pic_mem_index
,
322 dbdma_mem_index
, cuda_mem_index
, NULL
, 0, NULL
,
326 usb_ohci_init_pci(pci_bus
, 3, -1);
329 if (graphic_depth
!= 15 && graphic_depth
!= 32 && graphic_depth
!= 8)
332 /* The NewWorld NVRAM is not located in the MacIO device */
333 nvr
= macio_nvram_init(&nvram_mem_index
, 0x2000, 1);
334 pmac_format_nvram_partition(nvr
, 0x2000);
335 macio_nvram_map(nvr
, 0xFFF04000);
336 /* No PCI init: the BIOS will do it */
338 fw_cfg
= fw_cfg_init(0, 0, CFG_ADDR
, CFG_ADDR
+ 2);
339 fw_cfg_add_i32(fw_cfg
, FW_CFG_ID
, 1);
340 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
341 fw_cfg_add_i16(fw_cfg
, FW_CFG_MACHINE_ID
, ARCH_MAC99
);
342 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, kernel_base
);
343 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
344 if (kernel_cmdline
) {
345 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_CMDLINE
, CMDLINE_ADDR
);
346 pstrcpy_targphys(CMDLINE_ADDR
, TARGET_PAGE_SIZE
, kernel_cmdline
);
348 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_CMDLINE
, 0);
350 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_base
);
351 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
352 fw_cfg_add_i16(fw_cfg
, FW_CFG_BOOT_DEVICE
, ppc_boot_device
);
353 qemu_register_boot_set(fw_cfg_boot_set
, fw_cfg
);
356 QEMUMachine core99_machine
= {
358 .desc
= "Mac99 based PowerMAC",
359 .init
= ppc_core99_init
,
360 .max_cpus
= MAX_CPUS
,