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[qemu/dscho.git] / target-i386 / exec.h
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1 /*
2 * i386 execution defines
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "config.h"
21 #include "dyngen-exec.h"
23 /* XXX: factorize this mess */
24 #ifdef TARGET_X86_64
25 #define TARGET_LONG_BITS 64
26 #else
27 #define TARGET_LONG_BITS 32
28 #endif
30 #include "cpu-defs.h"
32 /* at least 4 register variables are defined */
33 register struct CPUX86State *env asm(AREG0);
35 #if TARGET_LONG_BITS > HOST_LONG_BITS
37 /* no registers can be used */
38 #define T0 (env->t0)
39 #define T1 (env->t1)
40 #define T2 (env->t2)
42 #else
44 /* XXX: use unsigned long instead of target_ulong - better code will
45 be generated for 64 bit CPUs */
46 register target_ulong T0 asm(AREG1);
47 register target_ulong T1 asm(AREG2);
48 register target_ulong T2 asm(AREG3);
50 /* if more registers are available, we define some registers too */
51 #ifdef AREG4
52 register target_ulong EAX asm(AREG4);
53 #define reg_EAX
54 #endif
56 #ifdef AREG5
57 register target_ulong ESP asm(AREG5);
58 #define reg_ESP
59 #endif
61 #ifdef AREG6
62 register target_ulong EBP asm(AREG6);
63 #define reg_EBP
64 #endif
66 #ifdef AREG7
67 register target_ulong ECX asm(AREG7);
68 #define reg_ECX
69 #endif
71 #ifdef AREG8
72 register target_ulong EDX asm(AREG8);
73 #define reg_EDX
74 #endif
76 #ifdef AREG9
77 register target_ulong EBX asm(AREG9);
78 #define reg_EBX
79 #endif
81 #ifdef AREG10
82 register target_ulong ESI asm(AREG10);
83 #define reg_ESI
84 #endif
86 #ifdef AREG11
87 register target_ulong EDI asm(AREG11);
88 #define reg_EDI
89 #endif
91 #endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
93 #define A0 T2
95 extern FILE *logfile;
96 extern int loglevel;
98 #ifndef reg_EAX
99 #define EAX (env->regs[R_EAX])
100 #endif
101 #ifndef reg_ECX
102 #define ECX (env->regs[R_ECX])
103 #endif
104 #ifndef reg_EDX
105 #define EDX (env->regs[R_EDX])
106 #endif
107 #ifndef reg_EBX
108 #define EBX (env->regs[R_EBX])
109 #endif
110 #ifndef reg_ESP
111 #define ESP (env->regs[R_ESP])
112 #endif
113 #ifndef reg_EBP
114 #define EBP (env->regs[R_EBP])
115 #endif
116 #ifndef reg_ESI
117 #define ESI (env->regs[R_ESI])
118 #endif
119 #ifndef reg_EDI
120 #define EDI (env->regs[R_EDI])
121 #endif
122 #define EIP (env->eip)
123 #define DF (env->df)
125 #define CC_SRC (env->cc_src)
126 #define CC_DST (env->cc_dst)
127 #define CC_OP (env->cc_op)
129 /* float macros */
130 #define FT0 (env->ft0)
131 #define ST0 (env->fpregs[env->fpstt].d)
132 #define ST(n) (env->fpregs[(env->fpstt + (n)) & 7].d)
133 #define ST1 ST(1)
135 #ifdef USE_FP_CONVERT
136 #define FP_CONVERT (env->fp_convert)
137 #endif
139 #include "cpu.h"
140 #include "exec-all.h"
142 typedef struct CCTable {
143 int (*compute_all)(void); /* return all the flags */
144 int (*compute_c)(void); /* return the C flag */
145 } CCTable;
147 extern CCTable cc_table[];
149 void load_seg(int seg_reg, int selector);
150 void helper_ljmp_protected_T0_T1(int next_eip);
151 void helper_lcall_real_T0_T1(int shift, int next_eip);
152 void helper_lcall_protected_T0_T1(int shift, int next_eip);
153 void helper_iret_real(int shift);
154 void helper_iret_protected(int shift, int next_eip);
155 void helper_lret_protected(int shift, int addend);
156 void helper_lldt_T0(void);
157 void helper_ltr_T0(void);
158 void helper_movl_crN_T0(int reg);
159 void helper_movl_drN_T0(int reg);
160 void helper_invlpg(target_ulong addr);
161 void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
162 void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
163 void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
164 void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr);
165 int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
166 int is_write, int is_user, int is_softmmu);
167 void tlb_fill(target_ulong addr, int is_write, int is_user,
168 void *retaddr);
169 void __hidden cpu_lock(void);
170 void __hidden cpu_unlock(void);
171 void do_interrupt(int intno, int is_int, int error_code,
172 target_ulong next_eip, int is_hw);
173 void do_interrupt_user(int intno, int is_int, int error_code,
174 target_ulong next_eip);
175 void raise_interrupt(int intno, int is_int, int error_code,
176 int next_eip_addend);
177 void raise_exception_err(int exception_index, int error_code);
178 void raise_exception(int exception_index);
179 void do_smm_enter(void);
180 void __hidden cpu_loop_exit(void);
182 void OPPROTO op_movl_eflags_T0(void);
183 void OPPROTO op_movl_T0_eflags(void);
184 void helper_divl_EAX_T0(void);
185 void helper_idivl_EAX_T0(void);
186 void helper_mulq_EAX_T0(void);
187 void helper_imulq_EAX_T0(void);
188 void helper_imulq_T0_T1(void);
189 void helper_divq_EAX_T0(void);
190 void helper_idivq_EAX_T0(void);
191 void helper_bswapq_T0(void);
192 void helper_cmpxchg8b(void);
193 void helper_single_step(void);
194 void helper_cpuid(void);
195 void helper_enter_level(int level, int data32);
196 void helper_enter64_level(int level, int data64);
197 void helper_sysenter(void);
198 void helper_sysexit(void);
199 void helper_syscall(int next_eip_addend);
200 void helper_sysret(int dflag);
201 void helper_rdtsc(void);
202 void helper_rdmsr(void);
203 void helper_wrmsr(void);
204 void helper_lsl(void);
205 void helper_lar(void);
206 void helper_verr(void);
207 void helper_verw(void);
208 void helper_rsm(void);
210 void check_iob_T0(void);
211 void check_iow_T0(void);
212 void check_iol_T0(void);
213 void check_iob_DX(void);
214 void check_iow_DX(void);
215 void check_iol_DX(void);
217 #if !defined(CONFIG_USER_ONLY)
219 #include "softmmu_exec.h"
221 static inline double ldfq(target_ulong ptr)
223 union {
224 double d;
225 uint64_t i;
226 } u;
227 u.i = ldq(ptr);
228 return u.d;
231 static inline void stfq(target_ulong ptr, double v)
233 union {
234 double d;
235 uint64_t i;
236 } u;
237 u.d = v;
238 stq(ptr, u.i);
241 static inline float ldfl(target_ulong ptr)
243 union {
244 float f;
245 uint32_t i;
246 } u;
247 u.i = ldl(ptr);
248 return u.f;
251 static inline void stfl(target_ulong ptr, float v)
253 union {
254 float f;
255 uint32_t i;
256 } u;
257 u.f = v;
258 stl(ptr, u.i);
261 #endif /* !defined(CONFIG_USER_ONLY) */
263 #ifdef USE_X86LDOUBLE
264 /* use long double functions */
265 #define floatx_to_int32 floatx80_to_int32
266 #define floatx_to_int64 floatx80_to_int64
267 #define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
268 #define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
269 #define floatx_abs floatx80_abs
270 #define floatx_chs floatx80_chs
271 #define floatx_round_to_int floatx80_round_to_int
272 #define floatx_compare floatx80_compare
273 #define floatx_compare_quiet floatx80_compare_quiet
274 #define sin sinl
275 #define cos cosl
276 #define sqrt sqrtl
277 #define pow powl
278 #define log logl
279 #define tan tanl
280 #define atan2 atan2l
281 #define floor floorl
282 #define ceil ceill
283 #define ldexp ldexpl
284 #else
285 #define floatx_to_int32 float64_to_int32
286 #define floatx_to_int64 float64_to_int64
287 #define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
288 #define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
289 #define floatx_abs float64_abs
290 #define floatx_chs float64_chs
291 #define floatx_round_to_int float64_round_to_int
292 #define floatx_compare float64_compare
293 #define floatx_compare_quiet float64_compare_quiet
294 #endif
296 extern CPU86_LDouble sin(CPU86_LDouble x);
297 extern CPU86_LDouble cos(CPU86_LDouble x);
298 extern CPU86_LDouble sqrt(CPU86_LDouble x);
299 extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
300 extern CPU86_LDouble log(CPU86_LDouble x);
301 extern CPU86_LDouble tan(CPU86_LDouble x);
302 extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
303 extern CPU86_LDouble floor(CPU86_LDouble x);
304 extern CPU86_LDouble ceil(CPU86_LDouble x);
306 #define RC_MASK 0xc00
307 #define RC_NEAR 0x000
308 #define RC_DOWN 0x400
309 #define RC_UP 0x800
310 #define RC_CHOP 0xc00
312 #define MAXTAN 9223372036854775808.0
314 #ifdef USE_X86LDOUBLE
316 /* only for x86 */
317 typedef union {
318 long double d;
319 struct {
320 unsigned long long lower;
321 unsigned short upper;
322 } l;
323 } CPU86_LDoubleU;
325 /* the following deal with x86 long double-precision numbers */
326 #define MAXEXPD 0x7fff
327 #define EXPBIAS 16383
328 #define EXPD(fp) (fp.l.upper & 0x7fff)
329 #define SIGND(fp) ((fp.l.upper) & 0x8000)
330 #define MANTD(fp) (fp.l.lower)
331 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
333 #else
335 /* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
336 typedef union {
337 double d;
338 #if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
339 struct {
340 uint32_t lower;
341 int32_t upper;
342 } l;
343 #else
344 struct {
345 int32_t upper;
346 uint32_t lower;
347 } l;
348 #endif
349 #ifndef __arm__
350 int64_t ll;
351 #endif
352 } CPU86_LDoubleU;
354 /* the following deal with IEEE double-precision numbers */
355 #define MAXEXPD 0x7ff
356 #define EXPBIAS 1023
357 #define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
358 #define SIGND(fp) ((fp.l.upper) & 0x80000000)
359 #ifdef __arm__
360 #define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
361 #else
362 #define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
363 #endif
364 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
365 #endif
367 static inline void fpush(void)
369 env->fpstt = (env->fpstt - 1) & 7;
370 env->fptags[env->fpstt] = 0; /* validate stack entry */
373 static inline void fpop(void)
375 env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
376 env->fpstt = (env->fpstt + 1) & 7;
379 #ifndef USE_X86LDOUBLE
380 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
382 CPU86_LDoubleU temp;
383 int upper, e;
384 uint64_t ll;
386 /* mantissa */
387 upper = lduw(ptr + 8);
388 /* XXX: handle overflow ? */
389 e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
390 e |= (upper >> 4) & 0x800; /* sign */
391 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
392 #ifdef __arm__
393 temp.l.upper = (e << 20) | (ll >> 32);
394 temp.l.lower = ll;
395 #else
396 temp.ll = ll | ((uint64_t)e << 52);
397 #endif
398 return temp.d;
401 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
403 CPU86_LDoubleU temp;
404 int e;
406 temp.d = f;
407 /* mantissa */
408 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
409 /* exponent + sign */
410 e = EXPD(temp) - EXPBIAS + 16383;
411 e |= SIGND(temp) >> 16;
412 stw(ptr + 8, e);
414 #else
416 /* XXX: same endianness assumed */
418 #ifdef CONFIG_USER_ONLY
420 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
422 return *(CPU86_LDouble *)ptr;
425 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
427 *(CPU86_LDouble *)ptr = f;
430 #else
432 /* we use memory access macros */
434 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
436 CPU86_LDoubleU temp;
438 temp.l.lower = ldq(ptr);
439 temp.l.upper = lduw(ptr + 8);
440 return temp.d;
443 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
445 CPU86_LDoubleU temp;
447 temp.d = f;
448 stq(ptr, temp.l.lower);
449 stw(ptr + 8, temp.l.upper);
452 #endif /* !CONFIG_USER_ONLY */
454 #endif /* USE_X86LDOUBLE */
456 #define FPUS_IE (1 << 0)
457 #define FPUS_DE (1 << 1)
458 #define FPUS_ZE (1 << 2)
459 #define FPUS_OE (1 << 3)
460 #define FPUS_UE (1 << 4)
461 #define FPUS_PE (1 << 5)
462 #define FPUS_SF (1 << 6)
463 #define FPUS_SE (1 << 7)
464 #define FPUS_B (1 << 15)
466 #define FPUC_EM 0x3f
468 extern const CPU86_LDouble f15rk[7];
470 void helper_fldt_ST0_A0(void);
471 void helper_fstt_ST0_A0(void);
472 void fpu_raise_exception(void);
473 CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
474 void helper_fbld_ST0_A0(void);
475 void helper_fbst_ST0_A0(void);
476 void helper_f2xm1(void);
477 void helper_fyl2x(void);
478 void helper_fptan(void);
479 void helper_fpatan(void);
480 void helper_fxtract(void);
481 void helper_fprem1(void);
482 void helper_fprem(void);
483 void helper_fyl2xp1(void);
484 void helper_fsqrt(void);
485 void helper_fsincos(void);
486 void helper_frndint(void);
487 void helper_fscale(void);
488 void helper_fsin(void);
489 void helper_fcos(void);
490 void helper_fxam_ST0(void);
491 void helper_fstenv(target_ulong ptr, int data32);
492 void helper_fldenv(target_ulong ptr, int data32);
493 void helper_fsave(target_ulong ptr, int data32);
494 void helper_frstor(target_ulong ptr, int data32);
495 void helper_fxsave(target_ulong ptr, int data64);
496 void helper_fxrstor(target_ulong ptr, int data64);
497 void restore_native_fp_state(CPUState *env);
498 void save_native_fp_state(CPUState *env);
499 float approx_rsqrt(float a);
500 float approx_rcp(float a);
501 void update_fp_status(void);
502 void helper_hlt(void);
503 void helper_monitor(void);
504 void helper_mwait(void);
506 extern const uint8_t parity_table[256];
507 extern const uint8_t rclw_table[32];
508 extern const uint8_t rclb_table[32];
510 static inline uint32_t compute_eflags(void)
512 return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
515 /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
516 static inline void load_eflags(int eflags, int update_mask)
518 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
519 DF = 1 - (2 * ((eflags >> 10) & 1));
520 env->eflags = (env->eflags & ~update_mask) |
521 (eflags & update_mask);
524 static inline void env_to_regs(void)
526 #ifdef reg_EAX
527 EAX = env->regs[R_EAX];
528 #endif
529 #ifdef reg_ECX
530 ECX = env->regs[R_ECX];
531 #endif
532 #ifdef reg_EDX
533 EDX = env->regs[R_EDX];
534 #endif
535 #ifdef reg_EBX
536 EBX = env->regs[R_EBX];
537 #endif
538 #ifdef reg_ESP
539 ESP = env->regs[R_ESP];
540 #endif
541 #ifdef reg_EBP
542 EBP = env->regs[R_EBP];
543 #endif
544 #ifdef reg_ESI
545 ESI = env->regs[R_ESI];
546 #endif
547 #ifdef reg_EDI
548 EDI = env->regs[R_EDI];
549 #endif
552 static inline void regs_to_env(void)
554 #ifdef reg_EAX
555 env->regs[R_EAX] = EAX;
556 #endif
557 #ifdef reg_ECX
558 env->regs[R_ECX] = ECX;
559 #endif
560 #ifdef reg_EDX
561 env->regs[R_EDX] = EDX;
562 #endif
563 #ifdef reg_EBX
564 env->regs[R_EBX] = EBX;
565 #endif
566 #ifdef reg_ESP
567 env->regs[R_ESP] = ESP;
568 #endif
569 #ifdef reg_EBP
570 env->regs[R_EBP] = EBP;
571 #endif
572 #ifdef reg_ESI
573 env->regs[R_ESI] = ESI;
574 #endif
575 #ifdef reg_EDI
576 env->regs[R_EDI] = EDI;
577 #endif
580 static inline int cpu_halted(CPUState *env) {
581 /* handle exit of HALTED state */
582 if (!(env->hflags & HF_HALTED_MASK))
583 return 0;
584 /* disable halt condition */
585 if ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
586 (env->eflags & IF_MASK)) {
587 env->hflags &= ~HF_HALTED_MASK;
588 return 0;
590 return EXCP_HALTED;