Replace tabs by 8 spaces. No code change, by Herve Poussineau.
[qemu/dscho.git] / disas.c
blob1bf5bc8f34b0668baaa79747223c338e03e9b831
1 /* General "disassemble this chunk" code. Used for debugging. */
2 #include "config.h"
3 #include "dis-asm.h"
4 #include "elf.h"
5 #include <errno.h>
7 #include "cpu.h"
8 #include "exec-all.h"
9 #include "disas.h"
11 /* Filled in by elfload.c. Simplistic, but will do for now. */
12 struct syminfo *syminfos = NULL;
14 /* Get LENGTH bytes from info's buffer, at target address memaddr.
15 Transfer them to myaddr. */
16 int
17 buffer_read_memory (memaddr, myaddr, length, info)
18 bfd_vma memaddr;
19 bfd_byte *myaddr;
20 int length;
21 struct disassemble_info *info;
23 if (memaddr < info->buffer_vma
24 || memaddr + length > info->buffer_vma + info->buffer_length)
25 /* Out of bounds. Use EIO because GDB uses it. */
26 return EIO;
27 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
28 return 0;
31 /* Get LENGTH bytes from info's buffer, at target address memaddr.
32 Transfer them to myaddr. */
33 static int
34 target_read_memory (bfd_vma memaddr,
35 bfd_byte *myaddr,
36 int length,
37 struct disassemble_info *info)
39 int i;
40 for(i = 0; i < length; i++) {
41 myaddr[i] = ldub_code(memaddr + i);
43 return 0;
46 /* Print an error message. We can assume that this is in response to
47 an error return from buffer_read_memory. */
48 void
49 perror_memory (status, memaddr, info)
50 int status;
51 bfd_vma memaddr;
52 struct disassemble_info *info;
54 if (status != EIO)
55 /* Can't happen. */
56 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
57 else
58 /* Actually, address between memaddr and memaddr + len was
59 out of bounds. */
60 (*info->fprintf_func) (info->stream,
61 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
64 /* This could be in a separate file, to save miniscule amounts of space
65 in statically linked executables. */
67 /* Just print the address is hex. This is included for completeness even
68 though both GDB and objdump provide their own (to print symbolic
69 addresses). */
71 void
72 generic_print_address (addr, info)
73 bfd_vma addr;
74 struct disassemble_info *info;
76 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
79 /* Just return the given address. */
81 int
82 generic_symbol_at_address (addr, info)
83 bfd_vma addr;
84 struct disassemble_info * info;
86 return 1;
89 bfd_vma bfd_getl32 (const bfd_byte *addr)
91 unsigned long v;
93 v = (unsigned long) addr[0];
94 v |= (unsigned long) addr[1] << 8;
95 v |= (unsigned long) addr[2] << 16;
96 v |= (unsigned long) addr[3] << 24;
97 return (bfd_vma) v;
100 bfd_vma bfd_getb32 (const bfd_byte *addr)
102 unsigned long v;
104 v = (unsigned long) addr[0] << 24;
105 v |= (unsigned long) addr[1] << 16;
106 v |= (unsigned long) addr[2] << 8;
107 v |= (unsigned long) addr[3];
108 return (bfd_vma) v;
111 bfd_vma bfd_getl16 (const bfd_byte *addr)
113 unsigned long v;
115 v = (unsigned long) addr[0];
116 v |= (unsigned long) addr[1] << 8;
117 return (bfd_vma) v;
120 bfd_vma bfd_getb16 (const bfd_byte *addr)
122 unsigned long v;
124 v = (unsigned long) addr[0] << 24;
125 v |= (unsigned long) addr[1] << 16;
126 return (bfd_vma) v;
129 #ifdef TARGET_ARM
130 static int
131 print_insn_thumb1(bfd_vma pc, disassemble_info *info)
133 return print_insn_arm(pc | 1, info);
135 #endif
137 /* Disassemble this for me please... (debugging). 'flags' has the following
138 values:
139 i386 - nonzero means 16 bit code
140 arm - nonzero means thumb code
141 ppc - nonzero means little endian
142 other targets - unused
144 void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
146 target_ulong pc;
147 int count;
148 struct disassemble_info disasm_info;
149 int (*print_insn)(bfd_vma pc, disassemble_info *info);
151 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
153 disasm_info.read_memory_func = target_read_memory;
154 disasm_info.buffer_vma = code;
155 disasm_info.buffer_length = size;
157 #ifdef TARGET_WORDS_BIGENDIAN
158 disasm_info.endian = BFD_ENDIAN_BIG;
159 #else
160 disasm_info.endian = BFD_ENDIAN_LITTLE;
161 #endif
162 #if defined(TARGET_I386)
163 if (flags == 2)
164 disasm_info.mach = bfd_mach_x86_64;
165 else if (flags == 1)
166 disasm_info.mach = bfd_mach_i386_i8086;
167 else
168 disasm_info.mach = bfd_mach_i386_i386;
169 print_insn = print_insn_i386;
170 #elif defined(TARGET_ARM)
171 if (flags)
172 print_insn = print_insn_thumb1;
173 else
174 print_insn = print_insn_arm;
175 #elif defined(TARGET_SPARC)
176 print_insn = print_insn_sparc;
177 #ifdef TARGET_SPARC64
178 disasm_info.mach = bfd_mach_sparc_v9b;
179 #endif
180 #elif defined(TARGET_PPC)
181 if (flags)
182 disasm_info.endian = BFD_ENDIAN_LITTLE;
183 #ifdef TARGET_PPC64
184 disasm_info.mach = bfd_mach_ppc64;
185 #else
186 disasm_info.mach = bfd_mach_ppc;
187 #endif
188 print_insn = print_insn_ppc;
189 #elif defined(TARGET_M68K)
190 print_insn = print_insn_m68k;
191 #elif defined(TARGET_MIPS)
192 #ifdef TARGET_WORDS_BIGENDIAN
193 print_insn = print_insn_big_mips;
194 #else
195 print_insn = print_insn_little_mips;
196 #endif
197 #elif defined(TARGET_SH4)
198 disasm_info.mach = bfd_mach_sh4;
199 print_insn = print_insn_sh;
200 #elif defined(TARGET_ALPHA)
201 disasm_info.mach = bfd_mach_alpha;
202 print_insn = print_insn_alpha;
203 #else
204 fprintf(out, "0x" TARGET_FMT_lx
205 ": Asm output not supported on this arch\n", code);
206 return;
207 #endif
209 for (pc = code; pc < code + size; pc += count) {
210 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
211 count = print_insn(pc, &disasm_info);
212 #if 0
214 int i;
215 uint8_t b;
216 fprintf(out, " {");
217 for(i = 0; i < count; i++) {
218 target_read_memory(pc + i, &b, 1, &disasm_info);
219 fprintf(out, " %02x", b);
221 fprintf(out, " }");
223 #endif
224 fprintf(out, "\n");
225 if (count < 0)
226 break;
230 /* Disassemble this for me please... (debugging). */
231 void disas(FILE *out, void *code, unsigned long size)
233 unsigned long pc;
234 int count;
235 struct disassemble_info disasm_info;
236 int (*print_insn)(bfd_vma pc, disassemble_info *info);
238 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
240 disasm_info.buffer = code;
241 disasm_info.buffer_vma = (unsigned long)code;
242 disasm_info.buffer_length = size;
244 #ifdef WORDS_BIGENDIAN
245 disasm_info.endian = BFD_ENDIAN_BIG;
246 #else
247 disasm_info.endian = BFD_ENDIAN_LITTLE;
248 #endif
249 #if defined(__i386__)
250 disasm_info.mach = bfd_mach_i386_i386;
251 print_insn = print_insn_i386;
252 #elif defined(__x86_64__)
253 disasm_info.mach = bfd_mach_x86_64;
254 print_insn = print_insn_i386;
255 #elif defined(__powerpc__)
256 print_insn = print_insn_ppc;
257 #elif defined(__alpha__)
258 print_insn = print_insn_alpha;
259 #elif defined(__sparc__)
260 print_insn = print_insn_sparc;
261 #if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
262 disasm_info.mach = bfd_mach_sparc_v9b;
263 #endif
264 #elif defined(__arm__)
265 print_insn = print_insn_arm;
266 #elif defined(__MIPSEB__)
267 print_insn = print_insn_big_mips;
268 #elif defined(__MIPSEL__)
269 print_insn = print_insn_little_mips;
270 #elif defined(__m68k__)
271 print_insn = print_insn_m68k;
272 #elif defined(__s390__)
273 print_insn = print_insn_s390;
274 #else
275 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
276 (long) code);
277 return;
278 #endif
279 for (pc = (unsigned long)code; pc < (unsigned long)code + size; pc += count) {
280 fprintf(out, "0x%08lx: ", pc);
281 #ifdef __arm__
282 /* since data is included in the code, it is better to
283 display code data too */
284 fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
285 #endif
286 count = print_insn(pc, &disasm_info);
287 fprintf(out, "\n");
288 if (count < 0)
289 break;
293 /* Look up symbol for debugging purpose. Returns "" if unknown. */
294 const char *lookup_symbol(target_ulong orig_addr)
296 unsigned int i;
297 /* Hack, because we know this is x86. */
298 Elf32_Sym *sym;
299 struct syminfo *s;
300 target_ulong addr;
302 for (s = syminfos; s; s = s->next) {
303 sym = s->disas_symtab;
304 for (i = 0; i < s->disas_num_syms; i++) {
305 if (sym[i].st_shndx == SHN_UNDEF
306 || sym[i].st_shndx >= SHN_LORESERVE)
307 continue;
309 if (ELF_ST_TYPE(sym[i].st_info) != STT_FUNC)
310 continue;
312 addr = sym[i].st_value;
313 #if defined(TARGET_ARM) || defined (TARGET_MIPS)
314 /* The bottom address bit marks a Thumb or MIPS16 symbol. */
315 addr &= ~(target_ulong)1;
316 #endif
317 if (orig_addr >= addr
318 && orig_addr < addr + sym[i].st_size)
319 return s->disas_strtab + sym[i].st_name;
322 return "";
325 #if !defined(CONFIG_USER_ONLY)
327 void term_vprintf(const char *fmt, va_list ap);
328 void term_printf(const char *fmt, ...);
330 static int monitor_disas_is_physical;
331 static CPUState *monitor_disas_env;
333 static int
334 monitor_read_memory (memaddr, myaddr, length, info)
335 bfd_vma memaddr;
336 bfd_byte *myaddr;
337 int length;
338 struct disassemble_info *info;
340 if (monitor_disas_is_physical) {
341 cpu_physical_memory_rw(memaddr, myaddr, length, 0);
342 } else {
343 cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
345 return 0;
348 static int monitor_fprintf(FILE *stream, const char *fmt, ...)
350 va_list ap;
351 va_start(ap, fmt);
352 term_vprintf(fmt, ap);
353 va_end(ap);
354 return 0;
357 void monitor_disas(CPUState *env,
358 target_ulong pc, int nb_insn, int is_physical, int flags)
360 int count, i;
361 struct disassemble_info disasm_info;
362 int (*print_insn)(bfd_vma pc, disassemble_info *info);
364 INIT_DISASSEMBLE_INFO(disasm_info, NULL, monitor_fprintf);
366 monitor_disas_env = env;
367 monitor_disas_is_physical = is_physical;
368 disasm_info.read_memory_func = monitor_read_memory;
370 disasm_info.buffer_vma = pc;
372 #ifdef TARGET_WORDS_BIGENDIAN
373 disasm_info.endian = BFD_ENDIAN_BIG;
374 #else
375 disasm_info.endian = BFD_ENDIAN_LITTLE;
376 #endif
377 #if defined(TARGET_I386)
378 if (flags == 2)
379 disasm_info.mach = bfd_mach_x86_64;
380 else if (flags == 1)
381 disasm_info.mach = bfd_mach_i386_i8086;
382 else
383 disasm_info.mach = bfd_mach_i386_i386;
384 print_insn = print_insn_i386;
385 #elif defined(TARGET_ARM)
386 print_insn = print_insn_arm;
387 #elif defined(TARGET_SPARC)
388 print_insn = print_insn_sparc;
389 #ifdef TARGET_SPARC64
390 disasm_info.mach = bfd_mach_sparc_v9b;
391 #endif
392 #elif defined(TARGET_PPC)
393 #ifdef TARGET_PPC64
394 disasm_info.mach = bfd_mach_ppc64;
395 #else
396 disasm_info.mach = bfd_mach_ppc;
397 #endif
398 print_insn = print_insn_ppc;
399 #elif defined(TARGET_M68K)
400 print_insn = print_insn_m68k;
401 #elif defined(TARGET_MIPS)
402 #ifdef TARGET_WORDS_BIGENDIAN
403 print_insn = print_insn_big_mips;
404 #else
405 print_insn = print_insn_little_mips;
406 #endif
407 #else
408 term_printf("0x" TARGET_FMT_lx
409 ": Asm output not supported on this arch\n", pc);
410 return;
411 #endif
413 for(i = 0; i < nb_insn; i++) {
414 term_printf("0x" TARGET_FMT_lx ": ", pc);
415 count = print_insn(pc, &disasm_info);
416 term_printf("\n");
417 if (count < 0)
418 break;
419 pc += count;
422 #endif