include/qom/cpu.h

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_CPU_H
  21 #define QEMU_CPU_H
  22
  23 #include <signal.h>
  24 #include <setjmp.h>
  25 #include "hw/qdev-core.h"
  26 #include "disas/bfd.h"
  27 #include "exec/hwaddr.h"
  28 #include "exec/memattrs.h"
  29 #include "qemu/queue.h"
  30 #include "qemu/thread.h"
  31 #include "qemu/typedefs.h"
  32
  33 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
  34                                      void *opaque);
  35
  36 /**
  37  * vaddr:
  38  * Type wide enough to contain any #target_ulong virtual address.
  39  */
  40 typedef uint64_t vaddr;
  41 #define VADDR_PRId PRId64
  42 #define VADDR_PRIu PRIu64
  43 #define VADDR_PRIo PRIo64
  44 #define VADDR_PRIx PRIx64
  45 #define VADDR_PRIX PRIX64
  46 #define VADDR_MAX UINT64_MAX
  47
  48 /**
  49  * SECTION:cpu
  50  * @section_id: QEMU-cpu
  51  * @title: CPU Class
  52  * @short_description: Base class for all CPUs
  53  */
  54
  55 #define TYPE_CPU "cpu"
  56
  57 /* Since this macro is used a lot in hot code paths and in conjunction with
  58  * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
  59  * an unchecked cast.
  60  */
  61 #define CPU(obj) ((CPUState *)(obj))
  62
  63 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
  64 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
  65
  66 typedef struct CPUState CPUState;
  67
  68 typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
  69                                     bool is_write, bool is_exec, int opaque,
  70                                     unsigned size);
  71
  72 struct TranslationBlock;
  73
  74 /**
  75  * CPUClass:
  76  * @class_by_name: Callback to map -cpu command line model name to an
  77  * instantiatable CPU type.
  78  * @parse_features: Callback to parse command line arguments.
  79  * @reset: Callback to reset the #CPUState to its initial state.
  80  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
  81  * @has_work: Callback for checking if there is work to do.
  82  * @do_interrupt: Callback for interrupt handling.
  83  * @do_unassigned_access: Callback for unassigned access handling.
  84  * @do_unaligned_access: Callback for unaligned access handling, if
  85  * the target defines #ALIGNED_ONLY.
  86  * @virtio_is_big_endian: Callback to return %true if a CPU which supports
  87  * runtime configurable endianness is currently big-endian. Non-configurable
  88  * CPUs can use the default implementation of this method. This method should
  89  * not be used by any callers other than the pre-1.0 virtio devices.
  90  * @memory_rw_debug: Callback for GDB memory access.
  91  * @dump_state: Callback for dumping state.
  92  * @dump_statistics: Callback for dumping statistics.
  93  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
  94  * @get_paging_enabled: Callback for inquiring whether paging is enabled.
  95  * @get_memory_mapping: Callback for obtaining the memory mappings.
  96  * @set_pc: Callback for setting the Program Counter register.
  97  * @synchronize_from_tb: Callback for synchronizing state from a TCG
  98  * #TranslationBlock.
  99  * @handle_mmu_fault: Callback for handling an MMU fault.
 100  * @get_phys_page_debug: Callback for obtaining a physical address.
 101  * @gdb_read_register: Callback for letting GDB read a register.
 102  * @gdb_write_register: Callback for letting GDB write a register.
 103  * @debug_excp_handler: Callback for handling debug exceptions.
 104  * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
 105  * 64-bit VM coredump.
 106  * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
 107  * note to a 32-bit VM coredump.
 108  * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
 109  * 32-bit VM coredump.
 110  * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
 111  * note to a 32-bit VM coredump.
 112  * @vmsd: State description for migration.
 113  * @gdb_num_core_regs: Number of core registers accessible to GDB.
 114  * @gdb_core_xml_file: File name for core registers GDB XML description.
 115  * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
 116  *           before the insn which triggers a watchpoint rather than after it.
 117  * @cpu_exec_enter: Callback for cpu_exec preparation.
 118  * @cpu_exec_exit: Callback for cpu_exec cleanup.
 119  * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec.
 120  * @disas_set_info: Setup architecture specific components of disassembly info
 121  *
 122  * Represents a CPU family or model.
 123  */
 124 typedef struct CPUClass {
 125     /*< private >*/
 126     DeviceClass parent_class;
 127     /*< public >*/
 128
 129     ObjectClass *(*class_by_name)(const char *cpu_model);
 130     void (*parse_features)(CPUState *cpu, char *str, Error **errp);
 131
 132     void (*reset)(CPUState *cpu);
 133     int reset_dump_flags;
 134     bool (*has_work)(CPUState *cpu);
 135     void (*do_interrupt)(CPUState *cpu);
 136     CPUUnassignedAccess do_unassigned_access;
 137     void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
 138                                 int is_write, int is_user, uintptr_t retaddr);
 139     bool (*virtio_is_big_endian)(CPUState *cpu);
 140     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
 141                            uint8_t *buf, int len, bool is_write);
 142     void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 143                        int flags);
 144     void (*dump_statistics)(CPUState *cpu, FILE *f,
 145                             fprintf_function cpu_fprintf, int flags);
 146     int64_t (*get_arch_id)(CPUState *cpu);
 147     bool (*get_paging_enabled)(const CPUState *cpu);
 148     void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
 149                                Error **errp);
 150     void (*set_pc)(CPUState *cpu, vaddr value);
 151     void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
 152     int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
 153                             int mmu_index);
 154     hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
 155     int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
 156     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
 157     void (*debug_excp_handler)(CPUState *cpu);
 158
 159     int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
 160                             int cpuid, void *opaque);
 161     int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 162                                 void *opaque);
 163     int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
 164                             int cpuid, void *opaque);
 165     int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 166                                 void *opaque);
 167
 168     const struct VMStateDescription *vmsd;
 169     int gdb_num_core_regs;
 170     const char *gdb_core_xml_file;
 171     bool gdb_stop_before_watchpoint;
 172
 173     void (*cpu_exec_enter)(CPUState *cpu);
 174     void (*cpu_exec_exit)(CPUState *cpu);
 175     bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
 176
 177     void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
 178 } CPUClass;
 179
 180 #ifdef HOST_WORDS_BIGENDIAN
 181 typedef struct icount_decr_u16 {
 182     uint16_t high;
 183     uint16_t low;
 184 } icount_decr_u16;
 185 #else
 186 typedef struct icount_decr_u16 {
 187     uint16_t low;
 188     uint16_t high;
 189 } icount_decr_u16;
 190 #endif
 191
 192 typedef struct CPUBreakpoint {
 193     vaddr pc;
 194     int flags; /* BP_* */
 195     QTAILQ_ENTRY(CPUBreakpoint) entry;
 196 } CPUBreakpoint;
 197
 198 typedef struct CPUWatchpoint {
 199     vaddr vaddr;
 200     vaddr len;
 201     vaddr hitaddr;
 202     MemTxAttrs hitattrs;
 203     int flags; /* BP_* */
 204     QTAILQ_ENTRY(CPUWatchpoint) entry;
 205 } CPUWatchpoint;
 206
 207 struct KVMState;
 208 struct kvm_run;
 209
 210 #define TB_JMP_CACHE_BITS 12
 211 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
 212
 213 /**
 214  * CPUState:
 215  * @cpu_index: CPU index (informative).
 216  * @nr_cores: Number of cores within this CPU package.
 217  * @nr_threads: Number of threads within this CPU.
 218  * @numa_node: NUMA node this CPU is belonging to.
 219  * @host_tid: Host thread ID.
 220  * @running: #true if CPU is currently running (usermode).
 221  * @created: Indicates whether the CPU thread has been successfully created.
 222  * @interrupt_request: Indicates a pending interrupt request.
 223  * @halted: Nonzero if the CPU is in suspended state.
 224  * @stop: Indicates a pending stop request.
 225  * @stopped: Indicates the CPU has been artificially stopped.
 226  * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
 227  * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
 228  *           CPU and return to its top level loop.
 229  * @singlestep_enabled: Flags for single-stepping.
 230  * @icount_extra: Instructions until next timer event.
 231  * @icount_decr: Number of cycles left, with interrupt flag in high bit.
 232  * This allows a single read-compare-cbranch-write sequence to test
 233  * for both decrementer underflow and exceptions.
 234  * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
 235  * requires that IO only be performed on the last instruction of a TB
 236  * so that interrupts take effect immediately.
 237  * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
 238  *            AddressSpaces this CPU has)
 239  * @as: Pointer to the first AddressSpace, for the convenience of targets which
 240  *      only have a single AddressSpace
 241  * @env_ptr: Pointer to subclass-specific CPUArchState field.
 242  * @current_tb: Currently executing TB.
 243  * @gdb_regs: Additional GDB registers.
 244  * @gdb_num_regs: Number of total registers accessible to GDB.
 245  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
 246  * @next_cpu: Next CPU sharing TB cache.
 247  * @opaque: User data.
 248  * @mem_io_pc: Host Program Counter at which the memory was accessed.
 249  * @mem_io_vaddr: Target virtual address at which the memory was accessed.
 250  * @kvm_fd: vCPU file descriptor for KVM.
 251  * @work_mutex: Lock to prevent multiple access to queued_work_*.
 252  * @queued_work_first: First asynchronous work pending.
 253  *
 254  * State of one CPU core or thread.
 255  */
 256 struct CPUState {
 257     /*< private >*/
 258     DeviceState parent_obj;
 259     /*< public >*/
 260
 261     int nr_cores;
 262     int nr_threads;
 263     int numa_node;
 264
 265     struct QemuThread *thread;
 266 #ifdef _WIN32
 267     HANDLE hThread;
 268 #endif
 269     int thread_id;
 270     uint32_t host_tid;
 271     bool running;
 272     struct QemuCond *halt_cond;
 273     bool thread_kicked;
 274     bool created;
 275     bool stop;
 276     bool stopped;
 277     bool crash_occurred;
 278     bool exit_request;
 279     uint32_t interrupt_request;
 280     int singlestep_enabled;
 281     int64_t icount_extra;
 282     sigjmp_buf jmp_env;
 283
 284     QemuMutex work_mutex;
 285     struct qemu_work_item *queued_work_first, *queued_work_last;
 286
 287     CPUAddressSpace *cpu_ases;
 288     AddressSpace *as;
 289
 290     void *env_ptr; /* CPUArchState */
 291     struct TranslationBlock *current_tb;
 292     struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];
 293     struct GDBRegisterState *gdb_regs;
 294     int gdb_num_regs;
 295     int gdb_num_g_regs;
 296     QTAILQ_ENTRY(CPUState) node;
 297
 298     /* ice debug support */
 299     QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints;
 300
 301     QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints;
 302     CPUWatchpoint *watchpoint_hit;
 303
 304     void *opaque;
 305
 306     /* In order to avoid passing too many arguments to the MMIO helpers,
 307      * we store some rarely used information in the CPU context.
 308      */
 309     uintptr_t mem_io_pc;
 310     vaddr mem_io_vaddr;
 311
 312     int kvm_fd;
 313     bool kvm_vcpu_dirty;
 314     struct KVMState *kvm_state;
 315     struct kvm_run *kvm_run;
 316
 317     /* TODO Move common fields from CPUArchState here. */
 318     int cpu_index; /* used by alpha TCG */
 319     uint32_t halted; /* used by alpha, cris, ppc TCG */
 320     union {
 321         uint32_t u32;
 322         icount_decr_u16 u16;
 323     } icount_decr;
 324     uint32_t can_do_io;
 325     int32_t exception_index; /* used by m68k TCG */
 326
 327     /* Used to keep track of an outstanding cpu throttle thread for migration
 328      * autoconverge
 329      */
 330     bool throttle_thread_scheduled;
 331
 332     /* Note that this is accessed at the start of every TB via a negative
 333        offset from AREG0.  Leave this field at the end so as to make the
 334        (absolute value) offset as small as possible.  This reduces code
 335        size, especially for hosts without large memory offsets.  */
 336     uint32_t tcg_exit_req;
 337 };
 338
 339 QTAILQ_HEAD(CPUTailQ, CPUState);
 340 extern struct CPUTailQ cpus;
 341 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
 342 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
 343 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
 344     QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
 345 #define CPU_FOREACH_REVERSE(cpu) \
 346     QTAILQ_FOREACH_REVERSE(cpu, &cpus, CPUTailQ, node)
 347 #define first_cpu QTAILQ_FIRST(&cpus)
 348
 349 extern __thread CPUState *current_cpu;
 350
 351 /**
 352  * cpu_paging_enabled:
 353  * @cpu: The CPU whose state is to be inspected.
 354  *
 355  * Returns: %true if paging is enabled, %false otherwise.
 356  */
 357 bool cpu_paging_enabled(const CPUState *cpu);
 358
 359 /**
 360  * cpu_get_memory_mapping:
 361  * @cpu: The CPU whose memory mappings are to be obtained.
 362  * @list: Where to write the memory mappings to.
 363  * @errp: Pointer for reporting an #Error.
 364  */
 365 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 366                             Error **errp);
 367
 368 /**
 369  * cpu_write_elf64_note:
 370  * @f: pointer to a function that writes memory to a file
 371  * @cpu: The CPU whose memory is to be dumped
 372  * @cpuid: ID number of the CPU
 373  * @opaque: pointer to the CPUState struct
 374  */
 375 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 376                          int cpuid, void *opaque);
 377
 378 /**
 379  * cpu_write_elf64_qemunote:
 380  * @f: pointer to a function that writes memory to a file
 381  * @cpu: The CPU whose memory is to be dumped
 382  * @cpuid: ID number of the CPU
 383  * @opaque: pointer to the CPUState struct
 384  */
 385 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 386                              void *opaque);
 387
 388 /**
 389  * cpu_write_elf32_note:
 390  * @f: pointer to a function that writes memory to a file
 391  * @cpu: The CPU whose memory is to be dumped
 392  * @cpuid: ID number of the CPU
 393  * @opaque: pointer to the CPUState struct
 394  */
 395 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 396                          int cpuid, void *opaque);
 397
 398 /**
 399  * cpu_write_elf32_qemunote:
 400  * @f: pointer to a function that writes memory to a file
 401  * @cpu: The CPU whose memory is to be dumped
 402  * @cpuid: ID number of the CPU
 403  * @opaque: pointer to the CPUState struct
 404  */
 405 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 406                              void *opaque);
 407
 408 /**
 409  * CPUDumpFlags:
 410  * @CPU_DUMP_CODE:
 411  * @CPU_DUMP_FPU: dump FPU register state, not just integer
 412  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
 413  */
 414 enum CPUDumpFlags {
 415     CPU_DUMP_CODE = 0x00010000,
 416     CPU_DUMP_FPU  = 0x00020000,
 417     CPU_DUMP_CCOP = 0x00040000,
 418 };
 419
 420 /**
 421  * cpu_dump_state:
 422  * @cpu: The CPU whose state is to be dumped.
 423  * @f: File to dump to.
 424  * @cpu_fprintf: Function to dump with.
 425  * @flags: Flags what to dump.
 426  *
 427  * Dumps CPU state.
 428  */
 429 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 430                     int flags);
 431
 432 /**
 433  * cpu_dump_statistics:
 434  * @cpu: The CPU whose state is to be dumped.
 435  * @f: File to dump to.
 436  * @cpu_fprintf: Function to dump with.
 437  * @flags: Flags what to dump.
 438  *
 439  * Dumps CPU statistics.
 440  */
 441 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 442                          int flags);
 443
 444 #ifndef CONFIG_USER_ONLY
 445 /**
 446  * cpu_get_phys_page_debug:
 447  * @cpu: The CPU to obtain the physical page address for.
 448  * @addr: The virtual address.
 449  *
 450  * Obtains the physical page corresponding to a virtual one.
 451  * Use it only for debugging because no protection checks are done.
 452  *
 453  * Returns: Corresponding physical page address or -1 if no page found.
 454  */
 455 static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
 456 {
 457     CPUClass *cc = CPU_GET_CLASS(cpu);
 458
 459     return cc->get_phys_page_debug(cpu, addr);
 460 }
 461 #endif
 462
 463 /**
 464  * cpu_reset:
 465  * @cpu: The CPU whose state is to be reset.
 466  */
 467 void cpu_reset(CPUState *cpu);
 468
 469 /**
 470  * cpu_class_by_name:
 471  * @typename: The CPU base type.
 472  * @cpu_model: The model string without any parameters.
 473  *
 474  * Looks up a CPU #ObjectClass matching name @cpu_model.
 475  *
 476  * Returns: A #CPUClass or %NULL if not matching class is found.
 477  */
 478 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
 479
 480 /**
 481  * cpu_generic_init:
 482  * @typename: The CPU base type.
 483  * @cpu_model: The model string including optional parameters.
 484  *
 485  * Instantiates a CPU, processes optional parameters and realizes the CPU.
 486  *
 487  * Returns: A #CPUState or %NULL if an error occurred.
 488  */
 489 CPUState *cpu_generic_init(const char *typename, const char *cpu_model);
 490
 491 /**
 492  * cpu_has_work:
 493  * @cpu: The vCPU to check.
 494  *
 495  * Checks whether the CPU has work to do.
 496  *
 497  * Returns: %true if the CPU has work, %false otherwise.
 498  */
 499 static inline bool cpu_has_work(CPUState *cpu)
 500 {
 501     CPUClass *cc = CPU_GET_CLASS(cpu);
 502
 503     g_assert(cc->has_work);
 504     return cc->has_work(cpu);
 505 }
 506
 507 /**
 508  * qemu_cpu_is_self:
 509  * @cpu: The vCPU to check against.
 510  *
 511  * Checks whether the caller is executing on the vCPU thread.
 512  *
 513  * Returns: %true if called from @cpu's thread, %false otherwise.
 514  */
 515 bool qemu_cpu_is_self(CPUState *cpu);
 516
 517 /**
 518  * qemu_cpu_kick:
 519  * @cpu: The vCPU to kick.
 520  *
 521  * Kicks @cpu's thread.
 522  */
 523 void qemu_cpu_kick(CPUState *cpu);
 524
 525 /**
 526  * cpu_is_stopped:
 527  * @cpu: The CPU to check.
 528  *
 529  * Checks whether the CPU is stopped.
 530  *
 531  * Returns: %true if run state is not running or if artificially stopped;
 532  * %false otherwise.
 533  */
 534 bool cpu_is_stopped(CPUState *cpu);
 535
 536 /**
 537  * run_on_cpu:
 538  * @cpu: The vCPU to run on.
 539  * @func: The function to be executed.
 540  * @data: Data to pass to the function.
 541  *
 542  * Schedules the function @func for execution on the vCPU @cpu.
 543  */
 544 void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 545
 546 /**
 547  * async_run_on_cpu:
 548  * @cpu: The vCPU to run on.
 549  * @func: The function to be executed.
 550  * @data: Data to pass to the function.
 551  *
 552  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
 553  */
 554 void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 555
 556 /**
 557  * qemu_get_cpu:
 558  * @index: The CPUState@cpu_index value of the CPU to obtain.
 559  *
 560  * Gets a CPU matching @index.
 561  *
 562  * Returns: The CPU or %NULL if there is no matching CPU.
 563  */
 564 CPUState *qemu_get_cpu(int index);
 565
 566 /**
 567  * cpu_exists:
 568  * @id: Guest-exposed CPU ID to lookup.
 569  *
 570  * Search for CPU with specified ID.
 571  *
 572  * Returns: %true - CPU is found, %false - CPU isn't found.
 573  */
 574 bool cpu_exists(int64_t id);
 575
 576 /**
 577  * cpu_throttle_set:
 578  * @new_throttle_pct: Percent of sleep time. Valid range is 1 to 99.
 579  *
 580  * Throttles all vcpus by forcing them to sleep for the given percentage of
 581  * time. A throttle_percentage of 25 corresponds to a 75% duty cycle roughly.
 582  * (example: 10ms sleep for every 30ms awake).
 583  *
 584  * cpu_throttle_set can be called as needed to adjust new_throttle_pct.
 585  * Once the throttling starts, it will remain in effect until cpu_throttle_stop
 586  * is called.
 587  */
 588 void cpu_throttle_set(int new_throttle_pct);
 589
 590 /**
 591  * cpu_throttle_stop:
 592  *
 593  * Stops the vcpu throttling started by cpu_throttle_set.
 594  */
 595 void cpu_throttle_stop(void);
 596
 597 /**
 598  * cpu_throttle_active:
 599  *
 600  * Returns: %true if the vcpus are currently being throttled, %false otherwise.
 601  */
 602 bool cpu_throttle_active(void);
 603
 604 /**
 605  * cpu_throttle_get_percentage:
 606  *
 607  * Returns the vcpu throttle percentage. See cpu_throttle_set for details.
 608  *
 609  * Returns: The throttle percentage in range 1 to 99.
 610  */
 611 int cpu_throttle_get_percentage(void);
 612
 613 #ifndef CONFIG_USER_ONLY
 614
 615 typedef void (*CPUInterruptHandler)(CPUState *, int);
 616
 617 extern CPUInterruptHandler cpu_interrupt_handler;
 618
 619 /**
 620  * cpu_interrupt:
 621  * @cpu: The CPU to set an interrupt on.
 622  * @mask: The interupts to set.
 623  *
 624  * Invokes the interrupt handler.
 625  */
 626 static inline void cpu_interrupt(CPUState *cpu, int mask)
 627 {
 628     cpu_interrupt_handler(cpu, mask);
 629 }
 630
 631 #else /* USER_ONLY */
 632
 633 void cpu_interrupt(CPUState *cpu, int mask);
 634
 635 #endif /* USER_ONLY */
 636
 637 #ifdef CONFIG_SOFTMMU
 638 static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
 639                                          bool is_write, bool is_exec,
 640                                          int opaque, unsigned size)
 641 {
 642     CPUClass *cc = CPU_GET_CLASS(cpu);
 643
 644     if (cc->do_unassigned_access) {
 645         cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
 646     }
 647 }
 648
 649 static inline void cpu_unaligned_access(CPUState *cpu, vaddr addr,
 650                                         int is_write, int is_user,
 651                                         uintptr_t retaddr)
 652 {
 653     CPUClass *cc = CPU_GET_CLASS(cpu);
 654
 655     cc->do_unaligned_access(cpu, addr, is_write, is_user, retaddr);
 656 }
 657 #endif
 658
 659 /**
 660  * cpu_set_pc:
 661  * @cpu: The CPU to set the program counter for.
 662  * @addr: Program counter value.
 663  *
 664  * Sets the program counter for a CPU.
 665  */
 666 static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
 667 {
 668     CPUClass *cc = CPU_GET_CLASS(cpu);
 669
 670     cc->set_pc(cpu, addr);
 671 }
 672
 673 /**
 674  * cpu_reset_interrupt:
 675  * @cpu: The CPU to clear the interrupt on.
 676  * @mask: The interrupt mask to clear.
 677  *
 678  * Resets interrupts on the vCPU @cpu.
 679  */
 680 void cpu_reset_interrupt(CPUState *cpu, int mask);
 681
 682 /**
 683  * cpu_exit:
 684  * @cpu: The CPU to exit.
 685  *
 686  * Requests the CPU @cpu to exit execution.
 687  */
 688 void cpu_exit(CPUState *cpu);
 689
 690 /**
 691  * cpu_resume:
 692  * @cpu: The CPU to resume.
 693  *
 694  * Resumes CPU, i.e. puts CPU into runnable state.
 695  */
 696 void cpu_resume(CPUState *cpu);
 697
 698 /**
 699  * qemu_init_vcpu:
 700  * @cpu: The vCPU to initialize.
 701  *
 702  * Initializes a vCPU.
 703  */
 704 void qemu_init_vcpu(CPUState *cpu);
 705
 706 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 707 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
 708 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 709
 710 /**
 711  * cpu_single_step:
 712  * @cpu: CPU to the flags for.
 713  * @enabled: Flags to enable.
 714  *
 715  * Enables or disables single-stepping for @cpu.
 716  */
 717 void cpu_single_step(CPUState *cpu, int enabled);
 718
 719 /* Breakpoint/watchpoint flags */
 720 #define BP_MEM_READ           0x01
 721 #define BP_MEM_WRITE          0x02
 722 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
 723 #define BP_STOP_BEFORE_ACCESS 0x04
 724 /* 0x08 currently unused */
 725 #define BP_GDB                0x10
 726 #define BP_CPU                0x20
 727 #define BP_ANY                (BP_GDB | BP_CPU)
 728 #define BP_WATCHPOINT_HIT_READ 0x40
 729 #define BP_WATCHPOINT_HIT_WRITE 0x80
 730 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
 731
 732 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
 733                           CPUBreakpoint **breakpoint);
 734 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
 735 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
 736 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
 737
 738 /* Return true if PC matches an installed breakpoint.  */
 739 static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
 740 {
 741     CPUBreakpoint *bp;
 742
 743     if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) {
 744         QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
 745             if (bp->pc == pc && (bp->flags & mask)) {
 746                 return true;
 747             }
 748         }
 749     }
 750     return false;
 751 }
 752
 753 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
 754                           int flags, CPUWatchpoint **watchpoint);
 755 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
 756                           vaddr len, int flags);
 757 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
 758 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
 759
 760 void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...)
 761     GCC_FMT_ATTR(2, 3);
 762 void cpu_exec_exit(CPUState *cpu);
 763
 764 #ifdef CONFIG_SOFTMMU
 765 extern const struct VMStateDescription vmstate_cpu_common;
 766 #else
 767 #define vmstate_cpu_common vmstate_dummy
 768 #endif
 769
 770 #define VMSTATE_CPU() {                                                     \
 771     .name = "parent_obj",                                                   \
 772     .size = sizeof(CPUState),                                               \
 773     .vmsd = &vmstate_cpu_common,                                            \
 774     .flags = VMS_STRUCT,                                                    \
 775     .offset = 0,                                                            \
 776 }
 777
 778 #endif